Digital Design by Emulation - KMUTTwebstaff.kmutt.ac.th/~sarawan.won/INC447/Emulation.pdf ·...

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Digital Design by Emulation

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Overview

Discrete Equivalent

Numerical Integration

- Forward Rule

- Backward Rule

- Billinear Rule

- Bilinear with Prewarping

Pole-Zero Mapping

Hold Equivalent

Example

Digital Design by Emulation

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Discrete Equivalent

Digital Design by Emulation

Numerical Integration

Pole-Zero Mapping

Hold Equivalent

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Numerical Integration

Digital Design by Emulation

Approximation of 1/s

• Forward Rule

• Backward Rule

• Bilinear/Tustin’s Rule

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Digital Design by Emulation

Forward Rule

Numerical Integration

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Digital Design by Emulation

Backward Rule

Numerical Integration

Tz

zs

1−=

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Digital Design by Emulation

Bilinear

Numerical Integration

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Digital Design by Emulation

Numerical Integration

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Digital Design by Emulation

Example

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Numerical Integration

Digital Design by Emulation

Mapping of stability region

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Bilinear Approximation with Prewarping

Digital Design by Emulation

An extension of Tustin’s rule to deal with the frequency distortion.

Prewarping

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Example

Digital Design by Emulation

A 3rd order low-pass Butterworth filter with unity pass band

Fs = 10 Hz

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Example

Digital Design by Emulation

A 3rd order low-pass Butterworth filter with unity pass band

Fs = 1 Hz

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Example

Digital Design by Emulation

A 3rd order low-pass Butterworth filter with unity pass band

Fs = 0.5 Hz

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Discrete Equivalent

Digital Design by Emulation

Numerical Integration

Pole-Zero Mapping

Hold Equivalent

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Digital Design by Emulation

Pole-Zero Mapping

Uses the map z = esT to locate the zeros and poles and set the gain of a discrete transfer function that approximates the given C(s)

Given a continuous-time system C(s) with nz zeros and np poles

Procedure

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Digital Design by Emulation

Example

Pole-zero mapping

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Discrete Equivalent

Digital Design by Emulation

Numerical Integration

Pole-Zero Mapping

Hold Equivalent

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Digital Design by Emulation

Hold Equivalent

Zero-Order Hold Equivalent

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Digital Design by Emulation

Hold Equivalent

First-Order Hold Equivalent

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Digital Design by Emulation

Example

Using

and

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Digital Design by Emulation

MATLAB Time

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Digital Design by Emulation

Example

Antenna servo discrete controller

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Digital Design by Emulation

Example

1. Find G(z)

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Digital Design by Emulation

Example

2. Find C(z) by Pole-Zero Mapping

⎟⎟⎠

⎞⎜⎜⎝

⎛−−

⎟⎟⎠

⎞⎜⎜⎝

⎛−−

= −

−

−

−

T

T

T

T

ez

ez

e

ezC

1.0

1.01

1)(

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Digital Design by Emulation

Example

Effect of sampling rate

Fs = 5 Hz Fs = 1 Hz

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Digital Design by Emulation

Example

Bode Plots

Cont. design:PM = 51.8◦ at ωgc = 0.8 rad/sec.

Fs = 5 Hz: Delay ≈ T/2 Phase lag ≈ 4.5 ◦

PM ≈ 47.3◦ at ωgc = 0.8 rad/sec.

Fs = 1 Hz: Delay ≈ T/2 Phase lag ≈ 23 ◦

PM ≈ 28.8◦ at ωgc = 0.8 rad/sec.

ξ ≈ 0.29 Mp ≈ 0.4 > 0.16

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Digital Design by Emulation

Emulation Design

1. A reasonable choice of T is important

A rule of thumb is to sample 20 to 30 times the expected closed-loopbandwidth. From the time domain perspective, a reasonable choiceof T is one that results in 8 to 10 samples in the closed-loop rise time.

Remark:

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Digital Design by Emulation

Emulation Design

2. To cope with the delay introduced by ZOH in the digital implementation, one may add the delay time of T/2 sec to the plant and design the continuous controller based upon the delayed process.

Remark:

)(tu )(ty)(sG2/sTe−

n-order Padé Approximation of 2/sTe−

n

n

s

ns

ns

e)

21(

)2

1(

θ

θθ

+

−≈−