Dynamic Translator: Firmware-Scheduled VLIW Processor

Dynamic Translator: Firmware-Scheduled VLIW Processor

CSE 560: Team BooY@Saurabh GayenBrandon Heller

Table of Contents

Dynamic Translation Our Implementation

Software Firmware Hardware

Integrated System Conclusions Questions

What is a Dynamic Translator?

Execute Block

Translate Block

start

Dynamic Translation : How it fits in

MIPS External ISA

MIPS processor

MIPS programmer

VLIW Internal ISA Dynamic Translator

VLIW processor

Dynamic Translator

Dynamic Translation: Types

SoftwareJava VM, VMWare, Dynamo

CodesignedCrusoe, Efficeon

HardwarePentium, Athlon

Codesigned DT Advantages

hardware/software flexibility power efficiency dynamically optimized code ISA independence

Implementation

Software Toolchain C input MIPS binary output VLIW binary output

Firmware basic block translator

Hardware VLIW support translator support

Software Toolchain

GCC Compiler

Perl Assembler

C Code MIPS asm

MIPS binary

VLIW binary

...void swap(int* p, int* q){ int temp; temp = *p; *p = *q; *q = temp;}...

...

.type swap,@function

swap:

.ent swap

swap:

.frame $sp,72,$31

.mask0x90070000,-8

.fmask0x00000000,0

.cpload $25

subu $sp,$sp,72

...

200 00100000000001000000000000000000

204 00100000000000010000000000000001

208 00100000000000100000000000000001

212 10000000000000000000000000000000

216 10000000000000000000000000000000

220 10000000000000000000000000000000

224 …

Firmware

Execute Block

Translate Block

initializeinitialize

translate mode execute mode

branch/jump?

enter translator

read next instruction (MIPS)

write next instruction (VLIW)

loop

translate

execute next instruction (VLIW)

loop

execute

branch/jump?

…

addi $13,$13,1 nop

nop sw $10,16($0)

addi $14,$14,1 nop

sw $11,20($0) nop

nop sw $12,24($0)

nop sw $15,28($0)

nop nop

nop nop

nop nop

…

Firmware

…

addi $13,$13,1

sw $10,16($0)

addi $14,$14,1

sw $11,20($0)

sw $12,24($0)

sw $15,28($0)

nop

nop

nop

…

MIPS code VLIW codefirmware

Bundle format :

Functionality : Translate

Copy instructions into correct slot Fill other slot with nop Repeat copies until end of basic block

Execute translated block Repeat until end of basic block

MEM / BR ALU

Hardware overview

VLIW Conversion Memory Mapping DT Conversion

Hardware : VLIW Conversion

Hardware : Memory Map external view internal view

memory (0x0000 – 0x7FFF)

MIPS program

data

data_mem (0x0000 – 0x7FFF)

MIPS code

data

vliw_rom (0x8000 – 0xBFFF)

vliw_mem (0xC000 – 0xFFFF)

VLIW code translations

firmware data

VLIW firmware

Dynamic Translator: Hardware

Data Memory

Initialization

MIPS code

Firmware

VLIW MemoryData Memory

0x00 add

0x04 sw

0x08 j

VLIW ROMVLIW ROM

…

<firmware>

…

Translation : alu

addnop

VLIW MemoryData Memory

0x00 add

0x04 sw

0x08 j

Data Memory

0x00 add

0x04 sw

0x08 j

VLIW Memory

0x00 add

VLIW Memory

0x00 add nop

Translation : mem

swnop

VLIW Memory

0x00 add nop

VLIW Memory

0x00 add nop

0x08 nop

VLIW Memory

0x00 add nop

0x08 nop sw

Data Memory

0x00 add

0x04 sw

0x08 j

Translation : br

jnop

VLIW Memory

0x00 add nop

0x08 nop sw

VLIW Memory

0x00 add nop

0x08 nop sw

0x10 j

VLIW Memory

0x00 add nop

0x08 nop sw

0x10 j nop

Data Memory

0x00 add

0x04 sw

0x08 j

Execution : aluPC 0xC000

add

nop

VLIW Memory

0x00 add nop

0x08 nop sw

0x10 j nop

Execution : memPC 0xC008

nop

sw

VLIW Memory

0x00 add nop

0x08 nop sw

0x10 j nop

Execution : branchPC 0xC010

j

nopraw_loc

firmware_loc

PC 0x8000

VLIW Memory

0x00 add nop

0x08 nop sw

0x10 j nop

Conclusions

We have implemented a complete system to do dynamic translation.

We need environment in which we can more easily codesign.

Future work

Smarter translator Profiling Translation cache No known open platform for dynamic

translation researchWash U should build one!

Questions?