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ECE 447: Lecture 12
Logic, Arithmetic, Data Test and Control
Instructions of MC68HC11
ECE 447: Groups of Instructions (1)
1. Data handling instructions a. Move instructions (e.g., load, store, exchange) b. Alter data instructions (e.g., clear, increment, decrement) c. Edit instructions (e.g., shift, rotate)
2. Logic instructions (e.g., and, or, xor)
3. Arithmetic instructions (e.g., add, subtract, multiply, divide, negate)
ECE 447: Groups of Instructions (2)
4. Data test instructions (e.g. compare, test, bit test)
5. Control instructions (e.g., jump, branch)
6. Condition code instructions (e.g., set carry, clear overflow flag)
7. Stack operations (e.g. push, pull)
ECE 447: Groups of Instructions (3)
8. Subroutine-related instructions (e.g. jump to subroutine, return from subroutine)
9. Interrupt-related instructions (e.g. software interrupt, return from interrupt, wait for interrupt)
10. Miscellaneous instructions (e.g. no operation, stop)
ECE 447: Move Instructions (1)
1. memory register
LDA[A, B] MLD[D, X, Y, S] M
2. register memory
STA[A, B] MST[D, X, Y, S] M
3. register register
TAB, TBA
4. memory memory
IMM, DIR, EXT, IND
DIR, EXT, IND
INH
N Z V C
0 –
0 –
0 –
ECE 447: Move Instructions (2)
1. register register
XGD[X, Y]
N Z V C
– – – –INH
ECE 447: Alter Data Instructions (1)
1. 0 register
CLR[A, B]
2. 0 memory
CLR M EXT, IND
INH
N Z V C
0 1 0 0
0 1 0 0
ECE 447: Alter Data Instructions (2)
3. increment X++INC[A, B]INC MIN[X, Y]
4. decrement X--DEC[A, B]DEC MDE[X, Y]
– INHEXT, IND INH – – –
INHEXT, IND INH
–
– – –
N Z V C
ECE 447: Logic Instructions (1)
1. AND Acc & M Acc
AND[A, B] M
2. OR Acc | M Acc
ORA[A, B] M
3. XOR Acc M Acc
EOR[A, B] M
IMM, DIR, EXT, IND
N Z V C
IMM, DIR, EXT, IND
IMM, DIR, EXT, IND
0 –
0 –
0 –
ECE 447: Logic Instructions (2)
3. complement X X
COM[A, B]COM M
4. bit set M | mask M
BSET M, mask
5. bit clear M & mask M
BCLR M, mask
INHEXT, IND
N Z V C
DIR, IND
0 1
0 –
0 –DIR, IND
ECE 447: Arithmetic Instructions (1)
1. addition Acc + M [+ C] Acc
ADD[A, B, D] MADC[A, B] M
2. subtraction Acc – M [-C] Acc
SUB[A, B, D] MSBC[A, B] M
IMM, DIR, EXT, IND
N Z V C
IMM, DIR, EXT, IND
ECE 447: Arithmetic Instructions (2)
EXT, IND
INH
3. negation -X
NEG[A, B]NEG M
4. addition Reg + B Reg
ABAAB [X, Y]
5. subtraction A – B A
SBA
INH
INH
– – – –
ECE 447: Signed vs. Unsigned
B = b7 b6 b5 b4 b3 b2 b1 b0
Unsigned number
Signed number
B = b7 b6 b5 b4 b3 b2 b1 b0
B = b7 b6 b5 b4 b3 b2 b1 b0
128 64 32 16 8 4 2 1weights
weights -128 64 32 16 8 4 2 1
B = b020 + b121 + b222 + b323 + b424 + b525 + b626 + b727 = bi2ii=0
7
B = b020 + b121 + b222 + b323 + b424 + b525 + b626 - b727 = - b727 + bi2ii=0
6
ECE 447: 2’s Complement Representation
-8 -7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 7
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
Xk=4
X>0 0 X<0
X+2k = X+10
ECE 447: Unsigned vs. Signed Addition
Machine Programmer
0 0 0 1 0 0 1 11 0 0 0 0 1 0 11 0 0 1 1 0 0 0
111
Unsignedmind
Signedmind128 64 32 16 8 4 2 1weight
carry
XYS
+
=
FA
x0 y0
s0
c1
FA
x1 y1
s1
c2
FA
x2 y2
s2
c3
FA
x3 y3
s3
c4FA
x4 y4
s4
c5
FA
x5 y5
s5
c6
FA
x6 y6
s6
c7
FA
x7 y7
s7
c8
ECE447: Definitions of CCR flags (1)
Z = 1 if result = 0 0 otherwise
Zero flag - Z
N = sign bit of the result r7 - for 8-bit operands r15 - for 16-bit operands
Negative flag- N
zero result
negative result
ECE447: Definitions of CCR flags (2)
C = 1 if result > MAX_UNSIGNED or result < 0 (a borrow occurred) 0 otherwise
where MAX_UNSIGNED = 28-1 for 8-bit operands (registers A, B) 216-1 for 16-bit operands (register D)
V = 1 if result > MAX_SIGNED or result < MIN_SIGNED 0 otherwise
where MAX_SIGNED = 27-1 for 8-bit operands (registers A, B) 215-1 for 16-bit operands (register D)
MIN_SIGNED = -27 for 8-bit operands (registers A, B) -215 for 16-bit operands (register D)
Carry flag - C
Overflow flag - V
out-of-range for unsigned numbers
out-of-range for signed numbers
ECE 447: Overflow of Signed Numbers
Indication of overflow
Positive+ Positive= Negative
Negative+ Negative= Positive
Formulas
Overflow2’s complement = xk-1 yk-1 sk-1 + xk-1 yk-1 sk-1
1. unsigned multiplication A x B D
MUL
2. unsigned division D/IX IX D mod IX D
IDIV
3. unsigned fractional division D < IX (scaled by 216) D/ IX IX (scaled by 216) D mod IX D
4. decimal adjustment
DAA
ECE 447: Arithmetic Instructions (3)
INH
N Z V C
INH
INH
– – –
– 0
– FDIV
INH ?
ECE 447: Sign Extension
Extending the number of bits of a signed number
xk-1 xk-2 … x1 x0
yk’-1 yk’-2 … yk yk-1 yk-2 … y1 y0
X
Y
two’s complement
xk-1 xk-1 xk-1 . . .xk-1 xk-2 … x1 x0
ECE 447: Data Test Instructions
3. test register
TST[A, B] 0 0INH
IMM, DIR, EXT, IND
1. comparison R - M
CMP[A, B] MCP[D, X, Y] M
N Z V C
INH
2. comparison A – B
CBA
ECE 447: Data Test Instructions
0 –IMM, DIR, EXT, IND
4. test memory
TST M
5. Bit test Acc & M
BIT[A, B] M
N Z V C
0 0EXT, IND
ECE 447: Branch Instructions (1)
REL N Z V C– – – –
after comparison register vs. memory
unsigned numbers signed numbers
BHI higher >BLO lower <
BHS higher or same BLS lower or same
BGT greater than >BLT less than <
BGE greater than or equal BLE less than or equal
BEQ equal =BNE not equal
ECE 447: Brach Instructions (2)
after arithmetic operations (testing for overflow)
unsigned numbers signed numbers
BCS carry setBCC carry clear
BVS overflow setBVC overflow clear
BPL plus 0BMI minus < 0
after testing register or memory
unconditional
BRA alwaysBRN never
ECE 447: Bit test and branch instructions
– – – –DIR, IND
1. Bit test and branch branch if (M & mask) == 0
BRCLR M, mask label
– – – –DIR, IND
2. Bit test and branch branch if (M & mask) == 0
BRSET M, mask label
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