Emerging Technologies: A CompSci Perspective

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Emerging Technologies: A CompSci Perspective. Tim Sherwood. UC SANTA BARBARA. Software Beware. The End of an Era. $381B / year. The Beginning of a New Era. 3D Stacks of Dies. 80 Cores. Integrated MEMS. The Role of Architecture. Demands. SW. HW. Constraints. - PowerPoint PPT Presentation

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Emerging Technologies:A CompSci Perspective

UC SANTA BARBARA

Tim Sherwood

Software Beware

The End of an Era

$381B / year

The Beginning of a New Era

80 Cores

Integrated MEMS

3D Stacks of Dies

The Role of Architecture

Applications

Runtime System

Architecture

Circuit

Device

Package

SW

HW

Constraints

Demands

Emer

ging

Tec

hnol

ogy

(Noise, Thermal, Yield)

(Battery Life, Performance, Programmability )

temppackage

total power

dynamic power

Vutilized area

communication

A Simple Performance “Ecosystem”

parallelismfreq

leakage

app

OS or runtime

feedback

chip performanceNo multicore, no spatial variance, no temporal variance, no metrics of cost or error or yield

3D Integration

80 Cores

Integrated MEMS

3D Stacks of Dies

3d technology

ThroughSiliconVias (TSV)

5x5μm

Standard Si Substrate

CMP Reduced Si Layer

activelayer

• Science Fiction? Intel, IBM, Ziptronix invest heavily in 3d integration

research Many demonstrated 3d prototype systems

Work at UCSB

• Shashidhar Mysore, Banit Agrawal, Sheng-Chih Lin, Navin Srivastava, Kaustav Banerjee and Timothy Sherwood. Introspective 3D Chips , Proceedings of the Twelfth International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), October 2006. San Jose, CA

• Gian Luca Loi, Banit Agrawal, Navin Srivastava, Sheng-Chih Lin, Timothy Sherwood, Kaustav Banerjee. A Thermally-Aware Performance Analysis of Vertically Integrated (3-D) Processor-Memory Hierarchy, Proceedings of the 43nd Design Automation Conference (DAC), June 2006. San Francisco, CA

Basic Savings in 3D

Area: 4Dist: √8 ≈ 2.8

Area: 2Dist: √4 ≈ 2 + 1L

Area: 1Dist: √2 ≈ 1.4 + 3L

BW: √8 ≈ 2.8 BW: 2√4 ≈ 4 BW: 4√2 ≈ 5.6

On-chip Latency improvedBandwidth could improve even more

UCSB First to Successfully Model Thermal/Performance

Addressing more than Performance

• The hardware/software boundary is uniquely situated Ultimately, Everything is an instruction

Used by Intel, AMD, Freescale, to guide their development

• Could Provide Unprecedented Visibility Not just data capture, we need the ability to put together

a cohesive picture of system interactions and correlate between them in a sound and non-intrusive manner

Cutting Through Abstraction

Complex interactions across levels of abstraction make debugging, optimizing, securing, and analysis in general difficult

To In

tegr

ated

Mon

itorin

g H

ardw

are

L1_BPU

Decode

Trace CacheTop

L2_BPU

Bus ControlMOB ITLB

Trace Cache BottomDTLB

L1Cache

Top

L2 Cache

L1 CacheBottom

FP Exec

UROM

FP Reg

Alloc

Rename InstrQ1 Sched Instr

Q2

Int RegRetire

Int Exec MemCtl790

320

2

32

What programmers want

32 bit Memory Address32 bit Memory Value10 bit Opcodes2, 5 bit Register Names2, 32 bit Register Values10 bits of “status”

3x3x3x3x3x3x

4x4x4x4x4x4x

1892 bits per cycle = 1 terrabyte/sec @ 4Ghz

Less buggy systems ($54 Billion / Year )

Why programmers cant have it• Interconnect is not free

Huge cross chip busses OptBuf 285um 20,000 buffers

• Analysis is not free Significant processing

required• Extra cost of added heat

$15 budget for cooling• Used by developers

To In

tegr

ated

Mon

itorin

g H

ardw

are

L1_BPU

Decode

Trace CacheTop

L2_BPU

Bus ControlMOB ITLB

Trace Cache BottomDTLB

L1Cache

Top

L2 Cache

L1 CacheBottom

FP Exec

UROM

FP Reg

Alloc

Rename InstrQ1 Sched Instr

Q2

Int RegRetire

Int Exec MemCtl790

320

2

32

Thermal Impact

w/ 4x Processing w/ 8x ProcessingP4 – Base Case

Pro

cess

ing

Laye

r

w/ 3D Layer

Ana

lysi

s La

yer

Conclusions

• Emerging Technologies will play a significant new role Risk is hard to avert right now

• UCSB Computer Science and Engineering Collaborate across disciplines to consider the entire

SW/HW

• Research that is driving industry UCSB Technology in use in most Microprocessors and

Networks Always looking for more collaboration with industry

partners

http://www.cs.ucsb.edu/~arch/NSF CNS 0524771, NSF CCF 0702798, NSF CCF 0448654

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