ESE370: Circuit-Level Modeling, Design, and Optimizationese370/fall2020/handouts/lec...1 ESE370:...

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ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems

Lec 21: October 26, 2020Distributed RC Wire and Elmore Delay

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Today

! Estimate delay in RC Network" Elmore delay calculation

! Apply to wire delay! Apply to pass transistor circuits

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Previously: Equivalent RC

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Previously: Distributed RC (preclass 1)

! What are the time constants?

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1 2 3 4 5 6 7 8 9 10 (ns)

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Elmore Delay: Distributed RC network

! The delay from source s to node 5" N = number of nodes in circuit

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C5

𝑅!" =#𝑅# ⇒ (𝑅# ∈ 𝑝𝑎𝑡ℎ 𝑠 → 5 ∩𝑝𝑎𝑡ℎ 𝑠 → 𝑘 )

𝜏$! =#"%&

'

𝐶"𝑅!"

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Elmore Delay: Distributed RC network

! The delay from source s to node 5" N = number of nodes in circuit

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C5

𝑅!" =#𝑅# ⇒ (𝑅# ∈ 𝑝𝑎𝑡ℎ 𝑠 → 5 ∩𝑝𝑎𝑡ℎ 𝑠 → 𝑘 )

𝜏$! =#"%&

'

𝐶"𝑅!"

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Elmore Delay: Distributed RC network

! The delay from source s to node 5" N = number of nodes in circuit

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C5

𝑅!" =#𝑅# ⇒ (𝑅# ∈ 𝑝𝑎𝑡ℎ 𝑠 → 5 ∩𝑝𝑎𝑡ℎ 𝑠 → 𝑘 )

𝜏$! =#"%&

'

𝐶"𝑅!"

k=4

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Elmore Delay: Distributed RC network

! The delay from source s to node 5" N = number of nodes in circuit

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k=4

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C5

𝑅!" =#𝑅# ⇒ (𝑅# ∈ 𝑝𝑎𝑡ℎ 𝑠 → 5 ∩𝑝𝑎𝑡ℎ 𝑠 → 𝑘 )

𝜏$! =#"%&

'

𝐶"𝑅!"

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Elmore Delay: Distributed RC network

! The delay from source s to node 5" N = number of nodes in circuit

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C5

k=4

𝑅!" =#𝑅# ⇒ (𝑅# ∈ 𝑝𝑎𝑡ℎ 𝑠 → 5 ∩𝑝𝑎𝑡ℎ 𝑠 → 𝑘 )

𝜏$! =#"%&

'

𝐶"𝑅!"

𝑅!" = 𝑅# + 𝑅$

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Elmore Delay: Distributed RC network

! The delay from source s to node 5" N = number of nodes in circuit

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C5

𝑅!" =#𝑅# ⇒ (𝑅# ∈ 𝑝𝑎𝑡ℎ 𝑠 → 5 ∩𝑝𝑎𝑡ℎ 𝑠 → 𝑘 )

𝜏$! =#"%&

'

𝐶"𝑅!" =?

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Elmore Delay: Distributed RC network

! The delay from source s to node 5" N = number of nodes in circuit

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C5

𝑅!" =#𝑅# ⇒ (𝑅# ∈ 𝑝𝑎𝑡ℎ 𝑠 → 5 ∩𝑝𝑎𝑡ℎ 𝑠 → 𝑘 )

𝜏$! =#"%&

'

𝐶"𝑅!" =?

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What is response?

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y

P

Q

P

Q

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SPICE Response

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1 2 3 4 5 6 7 8 9 10 (ns)

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Elmore Delay: Practice (preclass 1)

! The delay from source s to node i" N = number of nodes in circuit

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Rik = Rj∑ ⇒ (Rj ∈ [path(s→ i)∩ path(s→ k)])

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τ Di = CkRikk=1

N

∑

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Apply (preclass 1)

! What is Elmore delay?" S #Z

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/z

zy

C1 C2

C3

s

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SPICE Response

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1 2 3 4 5 6 7 8 9 10 (ns)

C1 C2

C3

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Elmore Delay: Special Ladder Case

! For each resistor Ck in path" Compute Rkk = sum of all Rs upstream of Ck

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τDN = Ckk=1

N

∑ Rjj=1

k

∑ = Ckk=1

N

∑ Rkk

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Elmore Delay: Special Ladder Case

! For each resistor Ck in path" Compute Rkk = sum of all Rs upstream of Ck

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C1*(R1)+C2*(R1+R2)

τDN = Ckk=1

N

∑ Rjj=1

k

∑ = Ckk=1

N

∑ Rkk

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Elmore Delay: Special Ladder Case

! For each resistor Ck in path" Compute Rkk = sum of all Rs upstream of Ck

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C1*(R1)+C2*(R1+R2)

=3RC=3ns

τDN = Ckk=1

N

∑ Rjj=1

k

∑ = Ckk=1

N

∑ Rkk

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! Equations from KCL?

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R1 R2

C1 C2

Compare KCL: Setup

VS −V1R1

=V1 −V2R2

+C1dV1dt

V1 −V2R2

=C2dV2dt

VSV1 V2

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@V1:

@V2:

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VS −V1R1

=V1 −V2R2

+C1dV1dt

VSR1=V1R1+V1R2−V2R2+C1

dV1dt

VS =V1 1+R1R2

"

#$

%

&'−

R1V2R2

+ R1C1dV1dt

V1 −V2R2

=C2dV2dt

V1R2

=V2R2+C2

dV2dt

V1 =V2 + R2C2dV2dt

dV1dt

=dV2dt

+ R2C2d 2V2dt2

Compare KCL: Math

@V1: @V2:

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VS =V1 1+R1R2

!

"#

$

%&−

R1R2V2 + R1C1

dV1dt

VS = V2 + R2C2dV2dt

!

"#

$

%& 1+

R1R2

!

"#

$

%&−

R1R2V2 + R1C1

dV2dt

+ R2C2d 2V2dt2

!

"#

$

%&

VS =V2 + R2C2 1+R1R2

!

"#

$

%&+ R1C1

!

"##

$

%&&dV2dt

+ R1C1R2C2d 2V2dt2

VS =V2 + (R2C2 + R1C2 + R1C1)dV2dt

+ R1C1R2C2d 2V2dt2

Compare KCL: Math

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VS =V2 + (R2C2 + R1C2 + R1C1)dV2dt

+ R1C1R2C2d 2V2dt2

VS =V2 +3RCdV2dt

+ R2C2 d2V2dt2

R1 = R2 = RC1 =C2 =C

Compare KCL: Math

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VS =V2 + (R2C2 + R1C2 + R1C1)dV2dt

+ R1C1R2C2d 2V2dt2

VS =V2 +3RCdV2dt

+ R2C2 d2V2dt2

V2 = A(1+ e−αt )→

VS = A(1+ e−αt )−3RC ⋅αAe−αt + R2C2 ⋅α 2Ae−αt

R1 = R2 = RC1 =C2 =C

Compare KCL: Math

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V2 = A(1+ e−αt )→

VS = A(1+ e−αt )−3RC ⋅αAe−αt + R2C2 ⋅α 2Ae−αt

t =∞→V2 =VS = A

VS =VS (1+ e−αt )−3RC ⋅αVSe

−αt + R2C2 ⋅α 2VSe−αt

0 = e−αt −3RC ⋅αe−αt + R2C2 ⋅α 2e−αt

0 = e−αt (1−3RCα + R2C2 ⋅α 2 )0 =1−3RCα + R2C2 ⋅α 2

Compare KCL: Math

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V2 = A(1+ e−αt )→

VS = A(1+ e−αt )−3RC ⋅αAe−αt + R2C2 ⋅α 2Ae−αt

t =∞→V2 =VS = A

VS =VS (1+ e−αt )−3RC ⋅αVSe

−αt + R2C2 ⋅α 2VSe−αt

0 = e−αt −3RC ⋅αe−αt + R2C2 ⋅α 2e−αt

0 = e−αt (1−3RCα + R2C2 ⋅α 2 )0 =1−3RCα + R2C2 ⋅α 2

Compare KCL: Math

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V2 =VS (1+ e−αt )

0 =1−3RCα + R2C2 ⋅α 2

α =3RC ± 9(RC)2 − 4(RC)2

2(RC)2=3RC ± 5RC2(RC)2

=3± 52RC

→ τ =2

3± 5RC ≈ 2.6RC

Compare KCL: Math

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V2 =VS (1+ e−αt )

0 =1−3RCα + R2C2 ⋅α 2

α =3RC ± 9(RC)2 − 4(RC)2

2(RC)2=3RC ± 5RC2(RC)2

=3± 52RC

→ τ =2

3± 5RC ≈ 2.6RC

Compare KCL: Math

=3RC=3ns

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Elmore Delay: Distributed RC network

! The delay from source to node i" N = number of nodes in circuit

! Special ladder case

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Rik = Rj∑ ⇒ (Rj ∈ [path(s→ i)∩ path(s→ k)])

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τ Di = CkRikk=1

N

∑

τDN = Ckk=1

N

∑ Rjj=1

k

∑ = Ckk=1

N

∑ Rkk

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Wire Delay

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Wire Resistance

100um

1um

1um

A

B

R = ρLA

R = 10−7Ω⋅m ⋅100µm1µm ⋅1µm =10Ω

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Wire Capacitance

4 m

0.2 mm

0.1 mm

A

B

0.1 mm

metal plate

dielectric material

C = εdAd

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Wire as Distributed RC Ladder

! Measure wire length in units " Say l" Each l unit has Cunit, Runit

" Unit capacitance and resistance of wire of length l

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Wire Delay

! Delay of Wire N units long:

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Wire Delay

! Delay of Wire N units long:RunitCunit

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Wire Delay

! Delay of Wire N units long:RunitCunit+ 2RunitCunit

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Wire Delay

! Delay of Wire N units long:RunitCunit+ 2RunitCunit+ 3Runit*Cunit + … +NRunit*Cunit=(Runit*Cunit)*(N+(N-1)+(N-2)+….1)

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Sum of integers (preclass 2)

! What’s the sum of the integer 1 to N?

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kk=0

N

∑ =

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Sum of integers

! What’s the sum of the integer 1 to N?

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kk=0

N

∑ = N(N +1)2 ≈N 2

2

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Wire Delay (preclass 3)

! Delay of Wire N units long:Runit*(N*Cunit)+ Runit((N-1)*Cunit+ Runit*(N-2)*Cunit + … +Runit*Cunit=(Runit*Cunit)*(N+N-1+N-2+….1) ~=RunitCunit*N2/2

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Lumped RC Wire? (preclass 4)

! What would the delay be if we treated the wire as lumped R and C?

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Rwire = N×Runit Cwire = N×Cunit

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Wire Delay

! Rwire = N*Runit! Cwire=N*Cunit! Lumped RC wire delay = Runit*Cunit*N2

! Distributed RC Wire delay = Runit*Cunit*N2/2

! Distributed has half the delay of lumped RC product

! Delay is quadratic in length of wire in both cases

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8

Apply to Gates

Pass Transistor and CMOS

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Pass Transistor XOR

! Delay when A=B=1?

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Pass Transistor XOR (preclass 5)

! Delay when A=1, B=0?" Start with equivalent

RC circuit

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Unbuffered (preclass 6)

! Circuit # Delay?" 2 stages

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Unbuffered (preclass 7)

! Circuit # Delay?" 3 stages

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Unbuffered (preclass 8)

! Delay as a function of number of stages, k?

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…

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CMOS XOR (preclass 9)

! Delay with Cdiff>0?

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Idea

! Elmore delay calculation allows us to estimate delay for distributed RC network" Necessary for pass transistors

! Wires are distributed RC " Half delay lumped calculation" Still quadratic in length

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Admin

! Project 1" Milestone due tonight

" Will get feedback by Wednesday morning

" Final report due Monday 11/2 midnight

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