Large-Scale Full-Wave Simulation · 2008. 7. 21. · Large-Scale Full-Wave Simulation Sharad Kapur...

Large-Scale Full-Wave Simulation

Sharad Kapur and David Long

Integrand Software, Inc.

Areas of interest

Passive Components

RF/Analog Chips

Packages

Signal Integrity

• Consistent trends in IC design– Increasing operating frequencies– Modeling of passive structures

(components, interconnect)is very important

• Accurate modeling required for– RF design (components)– RF Blocks/Mixed signal design

(coupling between analog and digital parts)

– Package parasitics– Signal integrity and interconnect

analysis

Inaccurate modeling of various effects

• Wire over high-resistivity substrate

• Strong frequency dependence• Value used in practice is 300%

different than the true value• Reason:

Effective ground plane moves south at high frequencies

Vision

• Full-wave field solvers can be made practical – Replace patchwork of point tools – accuracy of the commercial full-wave tools for

chip-size problems

• ElectroMagnetic Extractor (EMX)– Handle all electromagnetic effects in a “unified” manner– Efficient and very accurate– Layout -> Spice/Spice like representation– Remove layers of intermediate steps and sources of error

Fundamental problem

• Efficiency• Structures are discretized into

panels and unknowns to be solved for are things like charge/current

• Accurate simulations are computationally expensive

• Traditional full-wave EM simulation tools can take hours to days to do simple structures

Solving the linear system

• Conventional methods O(N3) time– Cubic complexity kills (2x problem size

8x time)• In 80s-90s slew of techniques for

solving these systems• Iterative methods reduce time to O(N2)• Fast Matrix-Vector methods O(N)

– Fast Multipole Methods, SVD methods, P-FFT methods

• Fundamentally changed computational electromagnetics

ϕσ =A

Revisiting the full-wave problem

• Nebula had sufficient speed to do the electrostatic (capacitance) problem for block sized problems– For the full-wave problem cannot use some of the tricks– compressing geometric information– shielding

• Revisiting the problem first solved with IES3

with a completely new direction of attack• Several new ideas in the implementation • Will talk about two of them…

Idea 1: Layout is regular

1. Wires are paths of constant width2. Distance between adjacent routing

is constant3. Routing is at 45 or 90 degrees4. Components, spiral inductors,

capacitors, are symmetric5. Normal notion of regularity,

repeated instances of subcircuits

• Layout “space” is actually a very small subset of all possible routing

• Can you take advantage of this?

Conventional approach

• In all previous approaches, mesh generation and field solution viewed as orthogonal sub problems

• Mesh generation– Typically unstructured Delauny triangulation

• Field solution– Uses a fast solver method– Independent of the underlying mesh

• Cannot take advantage of layout regularity

• Unstructured mesh • Colors mapped to shapes• Random sizes from an

unstructured mesh• Every triangle interacts with

every other triangle• Pairs of interactions are

dissimilar, because of the shapes and the distances between the triangles

• Layout has a lot of structure• This structure can be

imposed on the mesh• A small set of canonical

shapes• Very few distinct colors

representing unique shapes• Build a house with uniform

bricks• Identical interactions are

repeated all over• Few unstructured “left over”

regions are a small part of the mesh

Routing of a 16 bit bus line from a 10GHz chip

Quadrature CMOS VCO (Gierkink, Frye, courtesy Agere)

Algorithm for creating regular meshes

• Wire recognition algorithm was developed

• Sweep through the layout identifying wires

• Grey regions are identified wires

• Once the wires are identified• A mesh is created from a small

set of canonical shapes

The JesterRCF

Algorithm for creating regular meshes

• Wire recognition algorithm was developed

• Sweep through the layout identifying wires

• Grey regions are identified wires

• Once the wires are identified• A mesh is created from a

small set of canonical shapes

Algorithm for creating regular meshes

• Wire recognition algorithm was developed

• Sweep through the layout identifying wires

• Grey regions are identified wires

• Once the wires are identified• A mesh is created from a

small set of canonical shapes

Exploiting the regularity

• Embedded in the FMM • Direct interactions represented

by sparse matrix• Lot of structure in the sparse

matrix with identical entries• Substantially more compact

representation– Reduction in time for matrix

construction (integral time)– Reduction in storage

Idea 2: Approximating the vector formulation

• Vector potential term isdominant cost

• With RWG basis functions– 3 roof tops for each triangle– 4 roof tops for each rectangle– Between two shapes need to

compute 9-16 interactions – 1 for scalar interaction

rr

rE

Jj A0 = + +∇

σω φ

Approximating the Vector potential

• To avoid ill-conditioning basis functions are decomposed into curl free and divergence free bases (loops and patches)

• Current flow through a triangle due to loop is a constant!

• Can be exactly represented by a scalar integral over source

• Approximation for other vector contributions

Approximating the vector potential

• In the limit of fine mesh approximation is exact

• Intuition: The current flow smoothly varies across shapes and very small amount of charge is deposited as current leaves a shape

• Approximation is valid for practical problems and frequencies

Examples

10s 35s 360s

Comparsion to IES3

20x-40x saving in memory20x-30x saving in time

Better accuracy than IES3

• PBP001 – blue• PBP002 – black• Sim - red

1. Inductance2. Q3. Resistance4. Impedance

L15

Integrated Filter Design

• Integrated filter design• Courtesy of STATS• Circuit is a band pass

filter• Contains inductors,

resistors, capacitors• Capacitors are MIM

caps (very close metal plates)

Integrated Filter Design

• Comparison of EMX simulation to measurement

• Simulation and measurement agree well within process variation

• Other simulation tools (cannot name names here) are not able to predict either the profile or the insertion loss accurately

• Structure designed and measured by Bob Frye

Conclusion

• Developed a new full-wave simulation tool• Takes advantage of layout regularity• New formulation for vector potential • 50x faster than previous approaches• Used for model generation and RF block level

simulation, packaging, etc.• Potential application in many other areas