Lecture 2 ESDM

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Modeling of Digital Gates

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Positive and Negative Logic

Logic value 0

Logic value 1

Positive Logic

H

L Logic value 1

Logic value 0

Negative Logic

H

L

Positive Binary Logic System High level - logic

1Low level - logic

0

Negative Binary Logic System High level - logic

0Low level - logic

1

Logic ‘1’Logic ‘0’Undefined value

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TTL Logic Levels• Logic ‘1’ - VH

2.4V VH 5V

• Logic ‘0’ - VL

0V VL 0.4 V

• Undefined 0.4 V < V < 2.4 V

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TTL Logic Levels• Floating signals may take on illegal values

• What happens during a signal transition?

0.4V

2.4V

Logic ‘0’

Undefined

Logic ‘1’

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Classification of Logic Families

Logic families are classified based on• Devices Used

example: diodes ,transistors etc.• Structure of Digital Circuits

example: MOSFET(PMOS,NMOS)

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Logic Families Differ In:

• Logic Levels • Propagation Delays• Driving Capabilities• Other Parameters

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TTL and CMOS(basic structures)

BJT

TTL

MOSFET(NMOS, PMOS)

CMOS

Transistor Types

Logic Gate Families

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TTL and CMOS(Characteristics)

TTL CMOS

•Faster•Stronger drive capability

•Low power consumption•Simpler to make•Greater packing density•Better noise immunity

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Integration levels• SSI -small scale integration• MSI -medium scale integration• LSI -large scale integration• VLSI-very large scale integration• ULSI-ultra large scale integration• GSI -giant scale integration

Complexity of a single chip is called Scale of Integration.

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Integration Levels (comparison)

Levels of integration

Transistors/package

Gates/chip

Applications

SSI 1-100 <12 Logic gatesOp-amps

MSI 100-1000 12-99 Registers Filters

LSI 1000-10000

1000 8 bit processor, A/D converter

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….contd

VLSI 10k gates/chip

16,32 bit processor256KB memoryDS processor

ULSI 100k gates/chip

64 bit processor8 MB memoryImage processor

GSI 1M gates/chip

64 MB memorymultiprocessor

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TRANSISTOR TRANSISTOR

LOGIC

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TALK FLOW

• LOGIC FAMILY• WHY TTL• I/P & O/P CHARACTERISTICS• DIFFERENT TYPES OF CONNECTIONS• BASIC PROPERTIES• DIFFERENT TYPES OF TTL LOGIC GATES• LOGIC FAMILY TRADE OFFS• PERFORMANCE CHARACTERISTICS• PRECAUTION• APPLICATION• CONCLUSION

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Logic Families

• RTL – Resistor-Transistor Logic• DTL – Diode-Transistor Logic• TTL – Transistor-Transistor

Logic• ECL – Emitter-Coupled Logic•MOS – Metal-oxide

semiconductor• CMOS – Complementary MOS

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DTL

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TTL Supply voltage +5V• Typically pulls HIGH only to

about +3.5V• Can drive TTL, NMOS • Pull-up resistor can swing TTL

output to full +5V

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TTL input and output

• Input Sources a sizable (mA) current when held LOW

• Draws only a small (20µA) current when HIGH Output

• Can sink a large current to GND when LOW

• Can source at least a few mA when HIGH at about +3.5V

• Threshold is around +1.3V

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Totem Pole TTL

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Open Collector TTL

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SCHOTTKY TTL

• A Schottky PN junction is made up of a semiconductor and a metal. This kindof junction has two characteristics: low turn-on voltage and low junction capacitance.

• When a Schottky junction is used the transistor is faster because of the lower junction capacitance .

• Schottky TTL is thus faster than standard TTL and the terminal voltages are slightlydifferent.

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Schottky TTL

• Schottky diodes and

Schottky transistors

replace conventional TTL

transistors

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Basic properties of TTL families

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Building logic gates with transistors

Input Output

0 1

1 0

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Basic Transistor-Transistor Logic (TTL) Inverter

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TTL AND gate implementation

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TTL NOR gate implementation

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Logic Family Tradeoffs

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PERFORMANCE CHARACTERISTICS

• – Supply voltage• – Speed Power Product• – Fan-out• – Noise immunity• – Speed• – Propagation Delay Time

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Switching Time

Vdd90% Vdd

10% Vdd

tHL tLH

Vo

tr tf

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Output Switching Times

• tLH- low to high rise time (tr)

Time interval between 10% to 90% of Vdd

• tHL- high to low time or fall time (tf)

Time for signal to fall from 90%Vdd to 10%Vdd

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Maximum Switching Frequency

• Switching is fast with tmin=thl+tlh

• Max switching freq is given by fmax=1/tmin

• Eg: thl =0.5 nsec, tlh=1.0 nsec

tmin =1.5 nsec

fmax=1/ tmin=666.67Mhz

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Propagation Delay

It is the physical delay as the logical signal propagates through the gates.

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tplh and tphl

• tplh-is the propagation delay component for an output high to low transition.– It is the time which elapses from the

instance the input reaches 50% of VDD to the time the output reaches 50% of VDD.

• tphl –is the propagation delay component for an output low to high transition.

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Fan-out

Fan-out of a gate is the number of gates driven by that gate i.e the maximum number of gates (load ) that can exist without impairing the normal operation of the gate.

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Fan-out

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Fan-out Of Inverter

No Load :Fan-out is 0

With 3 inverter load:Fan-out is 3

Load: Fan-out is 1

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Fan-in

Fan-in of a gate is the number of inputs that can be connected to it without impairing the normal operation of the gate.

Number of inputs to a logic gate example: for NAND gate with n inputs

n = 2: Fan-in:2

n = 3: Fan-in:3

n = 4: Fan-in:4

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Other details to be considered…

• Extension of propagation delay concepts to other logic gates. eg: AND gate, OR gate.

• Effect of Fan-in and Fan-out on logic cascades.

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Noise Margin

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Propagation delay

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Propagation delays

REFERENCE:-Data abstracted from Texas Instruments TTL Data Book

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More caution on TTL

• An open TTL input is barely high so do not leave

• Unused inputs that affect the logic state of a chip

• (e.g. RESET input) must be tied to HIGH or LOW as appropriate

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APPLICATION OF TTL

• In educational institutions TTL usually preferred because it does not have any handling restrictions.

• Also we can use open collector gates to drive LEDS and LAMPS.

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Simple Voltmeter MonitorsTTL Supplies

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CONCLUSION

Transistor Transistor Logic (TTL) is a class of digital circuits built from BJT and resistors.

It is notable for being a widespread integrated circuit family used in many applications such as computers, industrial controls, test equipment and instrumentation etc.

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Questions

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