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Dresden, 19.März 2015
19. Leibnizkonferenz
LEIBNIZ-Konferenz Industrielle Revolution 4.0 im historischen Kontext
„Technologie der Mikroelektronik
der Schlüssel für die digitale Revolution“
Michael Raab
LEIBNIZ-Konferenz, Industrielle Revolution 4.0 im historischen Kontext 2
1MDRAM Speicherchip aus Dresden
First full functional 1MDRAM August 1988
AMD – Jerry Sanders
„It is all about people“
Estimated number of produced parts in Dresden: 30kdice between Sept 1988 and 1990
Development without economical effect but
Chipfläche 65.5mm2
LEIBNIZ-Konferenz, Industrielle Revolution 4.0 im historischen Kontext 3
Technology 1MDRAM-1µm (1988) vs 32nm (2010)
55 mask layer (20 Implants)
HK Metal Gate
5th Gen Strained Silicon
11 Layers of Metal (Cu)
SOI Substrate (300mm wafer)
Gate Length: 35nm
SRAM Cell Size = 0.258µm2
16 mask layer (6 Implants)
Poly Silicon Gate
MoSi Bitleitung
1 Layer of Metal (Al/Si)
Si Substrate (125mm wafer)
Gate Length: 1000nm
DRAM Cell Size = 32.4µm2
Scaling by factor of ~30 in 22years, 10Tech Nodes in between
LEIBNIZ-Konferenz, Industrielle Revolution 4.0 im historischen Kontext 4
High Advanced Technologies in Dresden
130nm
2003
SOI
45nm
2008
Immersion Lithography
180nm
2000
Cu Interconnect
90nm
2004
Strained-Si
130nm
2002
Low-K dielectric
65nm
2006
Multi-Strain Transistor
65nm
8 technologies successfully developed through Joint
Development Alliance and AMD/GLOBALFOUNDRIES collaboration
All technologies run in high volume manufacturing
32nm and 28nm volume manufacturing at GLOBALFOUNDRIES
Further scaling in GLOBALFOUNDRIES-Dresden only with EU
and Germany funding, support and focus
32/28nm
HKMG
2010
Cu Cu
Pores in
dielectric
ULK
LEIBNIZ-Konferenz, Industrielle Revolution 4.0 im historischen Kontext 5
ITRS Roadmap
22nm 2011
14nm 2014
10nm 2016
9nm 2018 2019
7nm 2022
22nm
14nm
LEIBNIZ-Konferenz, Industrielle Revolution 4.0 im historischen Kontext 6
From Bipolar to CMOS at highest performance
100
101
102
103
104
105
106
107
108
109
1010
1011
1012
1013
1960 1970 1980 1990 2000 2010 2020 2030
1965 Data (Moore)
Memory
Microprocessor
D120
U253
U264
U61000
dev
10µm 1µm 100nm 10nm
Bipolar PMOS NMOS CMOS Voltage
Scaling
Pwr Eff
Scaling
New Nano-
structures
Tra
nsi
sto
rs/D
ie
65nm
45nm AM/ZM Dresden
AMD
Source:
Intel / P. Gargini
ISS Europe 2009
GLOBALFOUNDRIES
32nm
~ 1.4 – 1.5 billion
transistors per die,
28nm
~ 9billion transistors
per die, 450mm2
180nm
130nm
LEIBNIZ-Konferenz, Industrielle Revolution 4.0 im historischen Kontext 7
Mikroelektronik Aufwand
Cost explosion for technology node
Intel/TSMC/Samsung/GLOBALFOUNDRIES/SMIC/UMC
Zusätzliche gezielte Förderungen können
20nm, 14nm …. in Europe ermöglichen
LEIBNIZ-Konferenz, Industrielle Revolution 4.0 im historischen Kontext
TSMC Revenue to change from 28nm 20nm
Don’t stop development
followed by production
10nm in 1H2016
1 year 28nm
LEIBNIZ-Konferenz, Industrielle Revolution 4.0 im historischen Kontext 9
INTELs 14nm Technology with 2nd-Generation FINFET
Self-Aligned Double Patterning, 0.0588µm2 SRAM cell size
4th generation high-k metal gate, and 6th-generation strained silicon
Idsat improvement of 15% for NMOS and 41% for PMOS over 22nm
42nm fin and 70nm contacted gate pitch Idsat are 1.04mA/µm at Vdd 0.7V
Slopes are maintained at ~65mV/decade; DIBL is ~60mV/V and ~75 mV/V for NMOS and PMOS, respectively IEDM2014
LEIBNIZ-Konferenz, Industrielle Revolution 4.0 im historischen Kontext
Sector Market Size in US$
Datenverarbeitung
($ 455 Milliarden)
Netzwerktechnik
($ 99 Milliarden)
Automobilelektronik
($ 100 Milliarden)
Mobilkommunikation
($ 223 Milliarden)
Industrieelektronik
($ 318 Milliarden)
Medizintechnik
($ 173 Milliarden)
Halbleiter
($333 Milliarden,) 2014, WSTS
Halbleitermarkt: das Herz für komplexe Systeme
LEIBNIZ-Konferenz, Industrielle Revolution 4.0 im historischen Kontext
Interposer or TSV
SoC auch mit Interposer oder TSV
nur gemeinsam mit Basistechnologie möglich
Handbook of 3D Integration: Volume 3 - 3D Process Technology
Philip Garrou, Mitsumasa Koyanagi, Peter Ramm
Internationale Roadmap mit klaren System-Vorstellungen und 3D-Integration
LEIBNIZ-Konferenz, Industrielle Revolution 4.0 im historischen Kontext
Technology Summary enabling Industrial4.0
More Moore is now driven by
Low-Power Product
Smart System Integration
Challenge for Technology scaling
Europe requires semiconductors to be
competitive in Future and Industry 4.0
Semiconductor business enable
growing markets
Dedicated Semiconductor
Founding required
Semiconductor Production in
Europe should be Industrial
demand
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