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qulsar.com
Qulsar, Inc. 1798 Technology Drive, #139 San Jose, CA 95110 T: +1 (408) 715-‐1098 E: info@qulsar.com
Qulsar Sweden AB Torshamnsgatan 35 SE-‐164 40 Kista T: +46 8 750 7850 F: +46 8 750 7851 © 2016 Qulsar, Inc. Qulsar and the Qulsar logo are trademarks of Qulsar,
Inc. All rights reserved. All specificaSons subject to change without noSce.
SJC-PM0055-MM.1.0
M88 Managed Clock Engine Product Brief
APPLICATIONS • Mobile backhaul Carrier Ethernet • Macro / micro and small cells (eNodeBs) • C-‐RAN BBU to RRH sync • DOCSIS CMTS and Remote PHY • Datacenter switches • Broadband access networks (e.g., G.fast
DSL and PON) FEATURES • Unified full clock soluSon • Synchronizes to GNSS, syncE, BITS, PTP
(IEEE-‐1588v2). • Industry-‐leading 1588 performance
algorithms • Gateway and boundary clock • Supports one-‐step and two-‐ step clock • Telecom, power & default profiles • Industry leading algorithm for G.8261 • Meets the requirements of: -‐ ITU-‐T G.8261, G.8265, G.8275 -‐ ITU-‐T G.8273 T-‐GM, T-‐BC and T-‐TSC -‐ ITU-‐T G.8262 (SyncE) EEC OpSons 1 & 2 -‐ ITU-‐T G.812 Type III, IV -‐ ITU-‐T G.813 OpSon 1 -‐Telcordia GR1244, GR253 (Stratum 3/3E • Flexible frequency synthesis with mulSple
outputs • Status monitoring: LOS, OOF, LOL • Scalable to 128 PTP clients BENEFITS • Easy & rapid integraSon in host system • Full clock subsystem, lower design cost • Excellent jijer performance • Low power consumpSon • Low jijer network synchronized mulSple
frequency outputs
Developed in close collaboraSon with Silicon Labs, the Qulsar M88 Managed Clock Engine Module combines a high precision IEEE 1588v2 PTP packet gateway clock with Silicon Labs’ Si5348 ultra-‐low jijer network synchronizer. The M88 is a turnkey hardware and solware soluSon that provides IEEE 1588v2 and SyncE standards-‐compliant phase and frequency synchronizaSon, jijer ajenuaSon and clock generaSon in a unified, small form factor design.
The M88 includes a flexible mulS-‐sync clock manager, enabling the soluSon to synchronize to a wide variety of references, including GNSS (1 PPS + ToD), IEEE 1588 (PTP), SyncE and BITS, while providing simplified clock input monitoring and management. The M88 incorporates an industry-‐leading IEEE 1588 servo algorithm to generate the high precision synchronized clock outputs required to distribute precise and accurate Sming signals for 4G and evolving 5G transport and access networks. Typical applicaSons include phase and frequency synchronizaSon for wireless infrastructure and wireline broadband networks such as PON, DOCSIS, G.fast DSL and data center switches.
Leveraging Silicon Labs’ Si5348 network synchronizer clock, the M88 offers unmatched frequency synthesis flexibility and ultra-‐low jijer. The three independent DSPLLs are individually configurable as SyncE PLLs or a general-‐purpose PLLs for processor/FPGA clocking. The unique design of the Si5348 allows the device to accept a TCXO/OCXO with any frequency, and the reference clock jijer does not degrade output performance.
Technical Performance & FuncMons
The M88 is a fully managed clock module for systems implemenSng network based Sming. The M88 includes funcSons that are necessary for a network clock synchronizer, a IEEE 1588 implementaSon (either boundary or gateway clock) and a jijer cleaner.
Industry-‐leading algorithms deliver high precision performance when the host system needs to synchronize to an incoming clock signal. The M88 displays leading performance against the ITU-‐T G.8261 and G.8273.2 test suite.
Turnkey IEEE 1588v2 and SyncE Network SynchronizaSon SoluSon
qulsar.com
Qulsar, Inc. 1798 Technology Drive, #139 San Jose, CA 95110 T: +1 (408) 715-‐1098 E: info@qulsar.com
Qulsar Sweden AB Torshamnsgatan 35 SE-‐164 40 Kista T: +46 8 750 7850 F: +46 8 750 7851
© 2016 Qulsar, Inc. Qulsar and the Qulsar logo are trademarks of Qulsar, Inc. All rights reserved. All specificaSons subject to change without noSce.
PAGE 2 of 2
SJC-PM0055-MM.1.0
M88 Managed Clock Engine (Product Brief)
MulM-‐sync & Algorithms
The M88 combines clock generaSon, digital oscillator control, input monitoring & management, packet Sming (PTP / IEEE 1588) with advanced servo algorithms. This enables the host system to use mulSple low-‐jijer (i.e. low phase noise) clock outputs, and to get the benefit of a diverse set of mulSple clock inputs.
In addiSon, the M88 has cupng edge technology that enables it to manage mulSple inputs. The ability to use mulSple synchronizaSon inputs is parScularly powerful in today’s applicaSons, where a host system may need to be versaSle and deployable in mulSple environments.
System Features • Assisted ParSal Timing Support Clock (APTSC ) G.8273.4 • Fully compliant to telecom, power & default profiles • Telecom Boundary Clock (T-‐BC) ITU-‐T G8273.21 (tested as
per plan) • MulS-‐sync handling support • Phase accuracy bejer than ±1µs • Frequency <1ppb under ITU-‐T G.8261 test condiSons 1
Network Interface • 2x RGMII ports • Integrated TCP/IP stack • IPv4 and IPv6 (PTP)
FuncMonal DescripMon
1 ITU-‐T G.8261 & ITU-‐T-‐G8273.2 tests conducted at both Qulsar internal labs and 3rd party labs – details available on request and under NDA
Outputs • 5x low-‐jijer (low phase noise) outputs with programmable
frequency up to 350 MHz; outputs could be locked to sync inputs as desired
-‐ Programmable loop B/W per DSPLL: 1 mHz -‐ 4 kHz • AddiSonal 5/10/20/25 MHz syntonized output • Time outputs: 1 pps & ToD (Sme of day) • IEEE 1588 (PTP) output (in GM mode) – may be locked to GNSS, or
PTP (in gateway clock mode), or external 1 pps / ToD
Timing References (Inputs) • 1x PPS/TOD; • AlternaSve PPS • PTP • SyncE • External oscillator • 3x frequency inputs
Physical Interfaces • 2x GbE RGMII signal • Clock inputs/outputs configurable – LVDS, LVPECL, LVCMOS, HCSL,
CML
PTP Master • Accuracy with GPS as reference bejer than ±25ns • Support 1 step and 2 step • Output Sync rate: up to 128 sync packet per second
Other Features • DHCPv4 client; FTP server; TELNET server; SSH server; serial
terminal • Remote firmware upgrade • Command line interface configuraSon (Telnet, SSH or serial port
terminal)
ToD Format (output) • ASCII, NMEA and China Mobile Binary format
Physical Interfaces • GPIO, Asynchronous serial, SPI, RGMII and MDIO
OperaMng SpecificaMons • Supply: 3.3V, 1.8V, 1.2V +/-‐ 10% • OperaSng temperature: 0oC to 70oC (-‐40oC to 85oC opSonal) • RoHS compliant • Low power processor module: 1.1W (typical)
Physical SpecificaMons • Package: LGA-‐144 • Size: 29.2 mm X 29.2mm
M88
SyncE RX
Clocks
(Up to 4)
SyncE TX or
Other Clocks
(Up to 6)
GPS (optional) 1pps 1pps
25MHz
ToD
RGMII (x2)
SPI and UART (x2)
Network Switch / PHYs
Recommended