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MOS Field-Effect Transistors (MOSFETs). 1. Figure 4.1 Physical structure of the enhancement-type NMOS transistor: (a) perspective view; (b) cross-section. Typically L = 0.1 to 3 m m, W = 0.2 to 100 m m, and the thickness of the oxide layer (t ox ) is in the range of 2 to 50 nm. - PowerPoint PPT Presentation
Citation preview
1
MOS Field-EffectTransistors (MOSFETs)
Microelectronic Circuits - Fifth Edition Sedra/Smith 2Copyright 2004 by Oxford University Press, Inc.
Figure 4.1 Physical structure of the enhancement-type NMOS transistor: (a) perspective view; (b) cross-section. Typically L = 0.1 to 3 m, W = 0.2 to 100 m, and the thickness of the oxide layer (tox) is in the range of 2 to 50 nm.
Microelectronic Circuits - Fifth Edition Sedra/Smith 3Copyright 2004 by Oxford University Press, Inc.
Figure 4.2 The enhancement-type NMOS transistor with a positive voltage applied to the gate. An n channel is induced at the top of the substrate beneath the gate.
Ingat pada p-n junction
Microelectronic Circuits - Fifth Edition Sedra/Smith 4Copyright 2004 by Oxford University Press, Inc.
Figure 4.3 An NMOS transistor with vGS > Vt and with a small vDS applied. The device acts as a resistance whose value is determined by vGS. Specifically, the channel conductance is proportional to vGS – Vt’ and thus iD is proportional to (vGS – Vt) vDS. Note that the depletion region is not shown (for simplicity).
Microelectronic Circuits - Fifth Edition Sedra/Smith 5Copyright 2004 by Oxford University Press, Inc.
Figure 4.4 The iD–vDS characteristics of the MOSFET in Fig. 4.3 when the voltage applied between drain and source, vDS, is kept small. The device operates as a linear resistor whose value is controlled by vGS.
Microelectronic Circuits - Fifth Edition Sedra/Smith 6Copyright 2004 by Oxford University Press, Inc.
Figure 4.5 Operation of the enhancement NMOS transistor as vDS is increased. The induced channel acquires a tapered shape, and its resistance increases as vDS is increased. Here, vGS is kept constant at a value > Vt.
Microelectronic Circuits - Fifth Edition Sedra/Smith 7Copyright 2004 by Oxford University Press, Inc.
Figure 4.6 The drain current iD versus the drain-to-source voltage vDS for an enhancement-type NMOS transistor operated with vGS > Vt.
Microelectronic Circuits - Fifth Edition Sedra/Smith 8Copyright 2004 by Oxford University Press, Inc.
Figure 4.7 Increasing vDS causes the channel to acquire a tapered shape. Eventually, as vDS reaches vGS – Vt’ the channel is pinched off at the drain end. Increasing vDS above vGS – Vt has little effect (theoretically, no effect) on the channel’s shape.
Microelectronic Circuits - Fifth Edition Sedra/Smith 9Copyright 2004 by Oxford University Press, Inc.
Figure 4.8 Derivation of the iD–vDS characteristic of the NMOS transistor.
ox
oxox t
C
Kapasitansi gate-channel
(dielektrik SiO2) per
satuan area (1)
Equipotential pada arah y (melebar)
Muatan tersimpan dalamKapasitor (3)
VCQ
(2)
Muatan tersimpan dalam“potongan” equipotensial(4)
tGSox VxvvdxWCdq )(
Microelectronic Circuits - Fifth Edition Sedra/Smith 10Copyright 2004 by Oxford University Press, Inc.
Figure 4.8 Derivation of the iD–vDS characteristic of the NMOS transistor.
tGSox VxvvWCdx
dq )(
Muatan pada celah potongan sehingga
Medan listrik pada “potongan”
dx
xdvxE
Laju elektron (drift)Karena medan listrik
dx
xdvxE
dt
dxnn
Arus drift pada celah “potongan”
dt
dx
dx
dq
dt
dqi
tGSox VxvvdxWCdq )(
dx
xdvVxvvWCi tGSoxn )(
Microelectronic Circuits - Fifth Edition Sedra/Smith 11Copyright 2004 by Oxford University Press, Inc.
dx
xdvVxvvWCii tGSoxnD )(
Arus drain yang disebabkan arus drift pada celah “potongan”
xdvVxvvWCdxi tGSoxnD )(
dapat disusun menjadi
Integrasi dengan batas sourcedan drain atau x antar 0 dan L
dan tegangan 0 dan vDS
DSv
tGSoxn
L
D xdvVxvvWCdxi00
)(
memberikan
2
2
1DSDStGSoxnD vvVv
L
WCi
Untuk saturasi tGSDsat Vvv arus drain menjadi 22
1tGSoxnD Vv
L
WCi
Microelectronic Circuits - Fifth Edition Sedra/Smith 12Copyright 2004 by Oxford University Press, Inc.
22
1tGSoxnD Vv
L
WCi
2
2
1DSDStGSoxnD vvVv
L
WCi definisi konstanta
oxnn Ck '
2'
2
1DSDStGSnD vvVv
L
Wki
2'
2
1tGSnD Vv
L
Wki
Microelectronic Circuits - Fifth Edition Sedra/Smith 13Copyright 2004 by Oxford University Press, Inc.
Figure 4.9 Cross-section of a CMOS integrated circuit. Note that the PMOS transistor is formed in a separate n-type region, known as an n well. Another arrangement is also possible in which an n-type body is used and the n device is formed in a p well. Not shown are the connections made to the p-type body and to the n well; the latter functions as the body terminal for the p-channel device.
Microelectronic Circuits - Fifth Edition Sedra/Smith 14Copyright 2004 by Oxford University Press, Inc.
Potonganmelintang
Layout
Microelectronic Circuits - Fifth Edition Sedra/Smith 15Copyright 2004 by Oxford University Press, Inc.
Figure 4.10 (a) Circuit symbol for the n-channel enhancement-type MOSFET. (b) Modified circuit symbol with an arrowhead on the source terminal to distinguish it from the drain and to indicate device polarity (i.e., n channel). (c) Simplified circuit symbol to be used when the source is connected to the body or when the effect of the body on device operation is unimportant.
Perhatikan: arah panah menunjukkan arah junction seperti pada dioda
Kanal tipe n dan bodi tipe p
Microelectronic Circuits - Fifth Edition Sedra/Smith 16Copyright 2004 by Oxford University Press, Inc.
Figure 4.11 (a) An n-channel enhancement-type MOSFET with vGS and vDS applied and with the normal directions of current flow indicated. (b) The iD–vDS characteristics for a device with k’n (W/L) = 1.0 mA/V2.
Perilaku arus-tegangan MOSFET dan Daerah Operasinya
Pengukuran/ Karakterisasi
Microelectronic Circuits - Fifth Edition Sedra/Smith 17Copyright 2004 by Oxford University Press, Inc.
Daerah Trioda
tGS Vv Syarat1. kanal terbentuk2. Kanal kontinyu
“Bentuk” Kanal
Kanal kontinyu atau tegangan gate-drain masihmembentuk kanal (daerah deplesi belumterlalu besar sehingga membuat kanalPinch-off)
tGD Vv
atau tGSDS Vvv
2'
2
1DSDStGSnD vvVv
L
Wki
Persamaan arus-tegangan
Microelectronic Circuits - Fifth Edition Sedra/Smith 18Copyright 2004 by Oxford University Press, Inc.
Daerah Trioda
2'
2
1DSDStGSnD vvVv
L
Wki
Persamaan arus-tegangan
untuk
menjadi DStGSnD vVvL
Wki '
tGSDS Vvv 2
1
'
tGSn
Vv
kecilvD
DSDS Vv
L
Wk
i
vr
GSGS
DS
dapat dinyatakan sebagai
Dengan definisi tGSOV VVV
menjadiOVn
DS
VL
Wk
r'
1
syarat OVDS Vv 2
Mengapa DS huruf kapital?
Microelectronic Circuits - Fifth Edition Sedra/Smith 19Copyright 2004 by Oxford University Press, Inc.
Daerah Saturasi
tGS Vv Syarat1. kanal terbentuk2. Pinch-off
“Bentuk” Kanal
Kanal pinch-off, tegangan gate-drain tidaklagi membentuk kanal, arus drain hanyaditentukan jumlah muatan yang dibentuktegangan gate pada kanal
tGD Vv
atau tGSDS Vvv
Persamaan arus-tegangan
2'
2
1tGSnD Vv
L
Wki
Microelectronic Circuits - Fifth Edition Sedra/Smith 20Copyright 2004 by Oxford University Press, Inc.
Figure 4.12 The iD–vGS characteristic for an enhancement-type NMOS transistor in saturation (Vt = 1 V, k’n W/L = 1.0 mA/V2).
Daerah Saturasi
Persamaan arus-tegangan
2'
2
1tGSnD Vv
L
Wki
GSDS vv
Untuk drain-gate terhubungsingkat
2'
2
1DSnD v
L
Wki
MOSFET selalu saturasikarena 0tV
Microelectronic Circuits - Fifth Edition Sedra/Smith 21Copyright 2004 by Oxford University Press, Inc.
Figure 4.13 Large-signal equivalent-circuit model of an n-channel MOSFET operating in the saturation region.
Microelectronic Circuits - Fifth Edition Sedra/Smith 22Copyright 2004 by Oxford University Press, Inc.
Figure 4.14 The relative levels of the terminal voltages of the enhancement NMOS transistor for operation in the triode region and in the saturation region.
Microelectronic Circuits - Fifth Edition Sedra/Smith 23Copyright 2004 by Oxford University Press, Inc.
Figure 4.15 Increasing vDS beyond vDSsat causes the channel pinch-off point to move slightly away from the drain, thus reducing the effective channel length (by DL).
Setelah mencapai saturasi apabila tegangan drain-source masih dinaikkan, maka panjang kanal berkurang
2'
2
1tGSnD Vv
LL
Wki
2'
/1
1
2
1tGSnD Vv
LLL
Wki
1/ LL 2' /12
1tGSnD VvLL
L
Wki
2' 12
1tGSDSnD Vvv
L
Wki
Persamaan arus semula
2'
2
1tGSnD Vv
L
Wki
menjadi
disusun ulang
untuk dapat didekati dengan
LL / sebanding dengan DSv
dan dapat dinyatakan denganDSv
L
L sehingga
Microelectronic Circuits - Fifth Edition Sedra/Smith 24Copyright 2004 by Oxford University Press, Inc.
Figure 4.16 Effect of vDS on iD in the saturation region. The MOSFET parameter VA depends on the process technology and, for a given process, is proportional to the channel length L.
2' 12
1tGSDSnD Vvv
L
Wki
0Di 1
AV
1
tetapvDS
Do
GSv
ir
12'
2
1
tGSno VV
L
Wkr
Do I
r
1D
Ao I
Vr
untuk maka
Definisikan maka
sehingga atau dimana 2'
2
1tGSnD VV
L
WkI
ID
Microelectronic Circuits - Fifth Edition Sedra/Smith 25Copyright 2004 by Oxford University Press, Inc.
Figure 4.17 Large-signal equivalent circuit model of the n-channel MOSFET in saturation, incorporating the output resistance ro. The output resistance models the linear dependence of iD on vDS and is given by Eq. (4.22).
D
Ao I
Vr
2'
2
1tGSnD VV
L
WkI
Microelectronic Circuits - Fifth Edition Sedra/Smith 26Copyright 2004 by Oxford University Press, Inc.
Figure 4.18 (a) Circuit symbol for the p-channel enhancement-type MOSFET. (b) Modified symbol with an arrowhead on the source lead. (c) Simplified circuit symbol for the case where the source is connected to the body. (d) The MOSFET with voltages applied and the directions of current flow indicated. Note that vGS and vDS are negative and iD flows out of the drain terminal.
Daerah Trioda
tSG Vv Syarat1. kanal terbentuk2. Kanal kontinyu tGSDS Vvv
2'
2
1DSDStGSpD vvVv
L
Wki
Persamaan arus-tegangan
oxpp Ck 'dengan
Daerah SaturasiSyarat1. kanal terbentuk2. Pinch-off
Persamaan arus-tegangan
2'
2
1tGSpD Vv
L
Wki
tGSDS Vvv
Microelectronic Circuits - Fifth Edition Sedra/Smith 27Copyright 2004 by Oxford University Press, Inc.
Figure 4.19 The relative levels of the terminal voltages of the enhancement-type PMOS transistor for operation in the triode region and in the saturation region.
Microelectronic Circuits - Fifth Edition Sedra/Smith 28Copyright 2004 by Oxford University Press, Inc.
Figure E4.8
Vt=-1V, kp’=60A/V2, W/L=10, hitung
(a) VG agar FET konduksi
(b) VD untuk triode
(c) VD untuk saturasi
(d) untuk =0, |VOV|, VG dan VD untuk ID=75A
(e) ro untuk =-0,02V-1 dan |VOV| dari (d)
(f) ID untuk =-0,02V-1 dan |VOV| dari (d) pada VD=+3V
dan VD=0V, lalu hitung ro dan bandingkan dengan (e)
tSGtSG VVVVv (a) Syarat VVG 415
(b) Syarat tGDtGSDS VVVVvv 1 GD VV
(c) Syarat tGDtGSDS VVVVvv 1 GD VV
Microelectronic Circuits - Fifth Edition Sedra/Smith 29Copyright 2004 by Oxford University Press, Inc.
Figure E4.8
(d) Asumsi saturasi
LW
k
IVV
L
WkI
p
DOVOVnD
'
2'
212
1 VVOV 5,0
106021
75
tOVSGtSGOV VVVVVV
SGSGGSSG VVVVVV
VVSG 5,115,0
VVSG 5,35,15
tGDtGSDS VVVVVV VVD 5,4)1(5,3
MI
rD
o 667,07502,0
11
(e)
(f) 2' 12
1OVDSpD Vv
L
Wki 751 DSD vi Untuk ini
VVD 3 AiD 78755302,01
VVD 0 AiD 5,82755002,01
MMII
VVr
DD
DSDSo 667,0
5,8278
52
21
21 sama!
Microelectronic Circuits - Fifth Edition Sedra/Smith 30Copyright 2004 by Oxford University Press, Inc.
Table 4.1
Microelectronic Circuits - Fifth Edition Sedra/Smith 31Copyright 2004 by Oxford University Press, Inc.
Body Effect pada tegangan threshold
fSBftt VVV 220
ox
sA
C
qN
2
Microelectronic Circuits - Fifth Edition Sedra/Smith 32Copyright 2004 by Oxford University Press, Inc.
Figure 4.20 Circuit for Example 4.2.
ID diinginkan 400A, VD =0,5V, RD dan RS?
Vt=0,7V, nCox=100A/V2, L=1m, dan W=32m
Langkah:1. Cek konduksi? Cek saturasi atau triode?2. Hitung VOV
3. Hitung VGS
4. Hitung VS
Microelectronic Circuits - Fifth Edition Sedra/Smith 33Copyright 2004 by Oxford University Press, Inc.
Figure 4.21 Circuit for Example 4.3.
ID diinginkan 80A, R?
Vt=0,6V, nCox=200A/V2, L=0,8m, dan W=4m
22
2
1
2
1OVoxntGSoxnD V
L
WCVv
L
WCi
MOSFET dalam keadaan saturasi (mengapa?)
V
LW
C
IV
oxn
DOV 4,0
8,04
200
8022
VVVV tOVGS 16,04,0 VVV GSD 1
kI
VVR
D
DDD 2580
13
Microelectronic Circuits - Fifth Edition Sedra/Smith 34Copyright 2004 by Oxford University Press, Inc.
Figure E4.12
Rangkaian pada cabang kanan idem rangkaian sebelumnya,berapa arus pada R=20k? Berapa tegangan drain?FET Q2 dan Q1 identik
Anggap saturasi, VOV pada kedua rangkaian sama,maka arus sama, yaitu 80A
VkRIVV DDDD 4,1208032
Tegangan VDS=VD>VOV maka FET Q2 dalam keadaan saturasi (anggapan benar)
Microelectronic Circuits - Fifth Edition Sedra/Smith 35Copyright 2004 by Oxford University Press, Inc.
Figure 4.22 Circuit for Example 4.4.
Rancang agar VD = 0,1V (atau RD?)
Vt=1V, kn’W/L=1mA/V2
FET dalam keadaan trioda, karena
2'
2
1DSDStGSnD vvVv
L
Wki
sehingga
mAID 395,01,02
11,0151 2
kmI
VVR
D
DDD 4,12395
1,05
Mengikuti nilai resistor baku yang tersedia untukToleransi 5% dapat digunakan 12k
Microelectronic Circuits - Fifth Edition Sedra/Smith 36Copyright 2004 by Oxford University Press, Inc.
Figure 4.23 (a) Circuit for Example 4.5. (b) The circuit with some of the analysis details shown.
Microelectronic Circuits - Fifth Edition Sedra/Smith 37Copyright 2004 by Oxford University Press, Inc.
Figure 4.24 Circuit for Example 4.6.
Microelectronic Circuits - Fifth Edition Sedra/Smith 38Copyright 2004 by Oxford University Press, Inc.
Figure 4.25 Circuits for Example 4.7.
Microelectronic Circuits - Fifth Edition Sedra/Smith 39Copyright 2004 by Oxford University Press, Inc.
Figure E4.16
Microelectronic Circuits - Fifth Edition Sedra/Smith 40Copyright 2004 by Oxford University Press, Inc.
Figure 4.26 (a) Basic structure of the common-source amplifier. (b) Graphical construction to determine the transfer characteristic of the amplifier in (a).
DSDD
DDD v
RR
Vi
1
DDDDDSO iRVvv
Fungsi R?
Microelectronic Circuits - Fifth Edition Sedra/Smith 41Copyright 2004 by Oxford University Press, Inc.
Figure 4.26 (Continued) (c) Transfer characteristic showing operation as an amplifier biased at point Q.
Microelectronic Circuits - Fifth Edition Sedra/Smith 42Copyright 2004 by Oxford University Press, Inc.
Figure 4.27 Two load lines and corresponding bias points. Bias point Q1 does not leave sufficient room for positive signal swing at the drain (too close to VDD). Bias point Q2 is too close to the boundary of the triode region and might not allow for sufficient negative signal swing.
Microelectronic Circuits - Fifth Edition Sedra/Smith 43Copyright 2004 by Oxford University Press, Inc.
22
1tIoxnD Vv
L
WCi
DDDDO iRVv
22
1tIoxnDDDO Vv
L
WCRVv
IQI VvI
Ov dv
dvA
tIQoxnDv VVL
WCRA
MOSFET saturasi
OV
RD
OV
OQDDv V
V
V
VVA
22
OQO VvI
Ov dv
dvA
tIBOB VVV
tIQOV VVV
Microelectronic Circuits - Fifth Edition Sedra/Smith 44Copyright 2004 by Oxford University Press, Inc.
2
2
1OOtIoxnD vvVv
L
WCi
DDDDO iRVv
OtIoxnDDDO vVvL
WCRVv
MOSFET triode
tIoxnD
DDO
VvL
WCR
Vv
1
tIoxn
DS
VvL
WC
r
1
DDS
DSDDO Rr
rVv
atau dengan
untuk makaDDS Rr D
DSDDO R
rVv
Microelectronic Circuits - Fifth Edition Sedra/Smith 45Copyright 2004 by Oxford University Press, Inc.
Contoh Numerik
kn’(W/L)=1mA/V2 Vt=1V RD=18kVDD=10V
Letak X
Letak A
Letak B
22
1tIoxnDDDO Vv
L
WCRVv
21182
110 OBOB VV
0109 2 OBOB VV
0)1)(109( OBOB VV
VvI 0 VVv DDO 10
VVv tI 1 VVv DDO 10
1 OBtOBIBI VVVVv
VVOB 1
22
1tIBoxnDDDOB VV
L
WCRVV
VVIB 2
1101
11
tIoxn
DS
VvL
WC
r
Letak C
VRr
rVV
DDS
DSDDOC 061,0
1891
91
10
Microelectronic Circuits - Fifth Edition Sedra/Smith 46Copyright 2004 by Oxford University Press, Inc.
Contoh Numerik
10V
2V
5,5V
Letak Q
Q dapat dipilih tepat diantara jangkauantegangan output atau 5,5V namun untukmendapat gain yang lebih besar dipilihpada tegangan output 4V
VVOQ 4
mAkR
VVI
D
OQDDD 3
1
18
410
2'
2
1OVnD V
L
WkI
V
LW
k
IV
n
DOV 816,0
1
3/122
'
VVVVV tOVGSQIQ 816,11816,0
VVVVL
WCRA tIQoxnDv /7,141816,1118
4V
Microelectronic Circuits - Fifth Edition Sedra/Smith 47Copyright 2004 by Oxford University Press, Inc.
Figure 4.28 Example 4.8.
Contoh Numerik
Tegangan input
Microelectronic Circuits - Fifth Edition Sedra/Smith 48Copyright 2004 by Oxford University Press, Inc.
1,741 0,275 5,05
1,816 0,333 4,00
1,891 0,397 2,85Figure 4.28 (Continued)
GSI vv 2'
2
1tGSnD Vv
L
Wki DDDDO RiVv
][V ][mA ][VDi1810 21
2
1GSv
Microelectronic Circuits - Fifth Edition Sedra/Smith 49Copyright 2004 by Oxford University Press, Inc.
Contoh dengan SPICE
Rangkaian Amplifier Sederhana dengan MOSFET Example 4.8** Rangkaiannya** FETnya FET drain gate source body nama_model*M1 out in 0 0 NMOS1 L=1u W=1u** Resistor drain RD=18k*R1 vdd out 18k** Power Supply VDD=10V*VDD vdd 0 10** Tegangan Input Sinusoidal DC 1.816V Amplitude AC 77mV Frekuensi 10KHz* Alternatif untuk sinyal seperti dalam teks menggunakan PWL**VS in 0 SIN(1.816 0.075 10k 0 0)VS in 0 PWL(0 1.816 50us 1.741 150us 1.891 250us 1.741 350us 1.891 450us 1.741 500us 1.816) *.MODEL NMOS1 NMOS KP=1e-3 VTO=1 .end.controltran 5us 0.5msplot in outplot out vs in.end
Microelectronic Circuits - Fifth Edition Sedra/Smith 50Copyright 2004 by Oxford University Press, Inc.
Contoh dengan SPICE
Microelectronic Circuits - Fifth Edition Sedra/Smith 51Copyright 2004 by Oxford University Press, Inc.
Figure 4.29 The use of fixed bias (constant VGS) can result in a large variability in the value of ID. Devices 1 and 2 represent extremes among units of the same type.
Pemberian Bias Penguat MOSFET
Cara paling “sederhana” dengan memberikantegangan tetap (DC) langsung antara terminalgate dan source VGS
Cara ini kurang tepat mengingat mobilitaspembawa muatan dan tegangan threshold fungsi (kuat) temperatur sehingga dapatmemberikan arus drain yang berbeda pula seperti ditunjukkan pda kurva ini
22
1tGSoxnD Vv
L
WCi
2
2
1DSDStGSoxnD vvVv
L
WCi
Microelectronic Circuits - Fifth Edition Sedra/Smith 52Copyright 2004 by Oxford University Press, Inc.
Figure 4.30 Biasing using a fixed voltage at the gate, VG, and a resistance in the source lead, RS: (a) basic
arrangement; (b) reduced variability in ID; (c) practical implementation using a single supply; (d) coupling of a signal source to the gate using a capacitor CC1; (e) practical implementation using two supplies.
DSGSG IRVV
Microelectronic Circuits - Fifth Edition Sedra/Smith 53Copyright 2004 by Oxford University Press, Inc.
Figure 4.31 Circuit for Example 4.9.
Contoh
1
kn’(W/L)=1mA/V2 Vt=1V VDD=15V
Hitung (rancang) nilai resistansi yang diperlukan untuk ID=0,5mA
1
1. Gunakan thumb rule untuk menen-tukan tegangan drain-source
2. Hitung resistor di source dan drain
3. Hitung tegangan overdrive yang diperlukan
DDDS VV3
1
DDS VV3
1 DDDDD VVV
3
1
Apayang terjadi bila Vt naik menjadi 1,5V?
VVS 5153
1 VVD 515
3
1
2
2
kmI
VR
D
SS 10
5,0
5
kmI
VVR
D
DDDD 10
5,0
1015
V
LW
k
IV
n
DOV 1
1
5,022
'
3
Microelectronic Circuits - Fifth Edition Sedra/Smith 54Copyright 2004 by Oxford University Press, Inc.
Contoh
1
1
2
2
VVVV tOVGS 211
4. Hitung tegangan gate-source
43
5
5. Hitung tegangan gate
VVVV SGSG 752
6. Hitung (pilih) resistor pembagi tegangan gate
AB
BDDG RR
RVV
AB
B
RR
R
157
MRB 7 MRA 8
6
6
Microelectronic Circuits - Fifth Edition Sedra/Smith 55Copyright 2004 by Oxford University Press, Inc.
Contoh
Tegangan threshold naik menjadi 1,5V
1
1. Tegangan gate tetap
2. Gunakan rangkaian di source untuk menentukan tegangan gate-source
3. Gunakan persamaan arus-tegangan FET untuk menentukan arus drain
VVG 7
DSGSG IRVV
DGS IV 107
2'
2
1tGSnD VV
L
WkI
25,12
1 GSD VI
DGS IV 107
25,11072
1 DD II
0125,155450 2 DD II mAID 455,0
Perubahan arus drain mAIII DDD 045,05,0455,021
atau %9%1005,0
045,0
D
D
I
I
2
3
Microelectronic Circuits - Fifth Edition Sedra/Smith 56Copyright 2004 by Oxford University Press, Inc.
Figure 4.32 Biasing the MOSFET using a large drain-to-gate feedback resistance, RG.
DDDDDSGS IRVVV
DDGSDD IRVV
Microelectronic Circuits - Fifth Edition Sedra/Smith 57Copyright 2004 by Oxford University Press, Inc.
Figure 4.33 (a) Biasing the MOSFET using a constant-current source I. (b) Implementation of the constant-current source I using a current mirror.
21
1 2
1tGSoxnD VV
L
WCI
R
VVVII GSSSDD
REFD
1
1
22 /
/
LW
LWII REFD
22
2 2
1tGSoxnD VV
L
WCI
Microelectronic Circuits - Fifth Edition Sedra/Smith 58Copyright 2004 by Oxford University Press, Inc.
Figure 4.34 Conceptual circuit utilized to study the operation of the MOSFET as a small-signal amplifier.
gsGSGS vVv
2'
2
1tGSnD Vv
L
Wki
D
DDDD R
vVi
saturasi tGD Vvv
2'
2
1tgsGSnD VvV
L
Wki
2''2'
2
1
2
1gsngstGSntGSn v
L
WkvVV
L
WkVV
L
Wk
OVgs
tGSgs
gstGSngsn
Vv
VVv
vVVL
Wkv
L
Wk
2
22
1 '2'
Untuk
atau
atau
gstGSnDD vVVL
WkIi '
Untuk sinyal kecil dDD iIi sehingga gstGSnd vVVL
Wki '
gsmd vgi dapat ditulis
dengan tGSnm VVL
Wkg ' atau OVnm V
L
Wkg '
Microelectronic Circuits - Fifth Edition Sedra/Smith 59Copyright 2004 by Oxford University Press, Inc.
Figure 4.35 Small-signal operation of the enhancement MOSFET amplifier.
22
1tGSoxnD Vv
L
WCi
tGSnm VVL
Wkg '
GSGS VvGS
Dm v
ig
2'
2
1OVnD V
L
WkI
Microelectronic Circuits - Fifth Edition Sedra/Smith 60Copyright 2004 by Oxford University Press, Inc.
Figure 4.36 Total instantaneous voltages vGS and vD for the circuit in Fig. 4.34.
dDD iIi
DDDDD iRvv
dDDDDD iIRvv
dDDDDDD iRIRvv
dDDD iRVv
Untuk sinyal kecil dDD vVv
DgsmdDd RvgiRv
Dmgs
dv Rg
v
vA
Penguatan tegangan
Microelectronic Circuits - Fifth Edition Sedra/Smith 61Copyright 2004 by Oxford University Press, Inc.
Figure 4.37 Small-signal models for the MOSFET: (a) neglecting the dependence of iD on vDS in saturation (the channel-length modulation effect); and (b) including the effect of channel-length modulation, modeled by output resistance ro = |VA| /ID.
tGSnm VVL
Wkg '
GSGS VvGS
Dm v
ig
Do I
r
1
D
Ao I
Vr
2'
2
1tGSnD VV
L
WkI 2'
2
1OVnD V
L
WkI
OVnm VL
Wkg '
1
tetapvDS
Do
GSv
ir
Dmv RgA oDmv rRgA //Penguatan tegangan Penguatan tegangan
Dnm IL
Wkg '2
OV
D
tGS
Dm V
I
VV
Ig
22
Microelectronic Circuits - Fifth Edition Sedra/Smith 62Copyright 2004 by Oxford University Press, Inc.
Figure 4.38 Example 4.10: (a) amplifier circuit; (b) equivalent-circuit model.
Kapasitor kopling untuk memisahkan tegangan DC
dt
dvi CC
Langkah analisis1. Tentukan titik kerja DC (quotient)2. Hitung parameter model ekivalen
rangkaian sinyal kecil3. Susun rangkaian ekivalen sinyal
kecil4. Lakukan analisis rangkaian
kn’(W/L)=0,25mA/V2 Vt=1,5V VA=50V
1 Menentukan titik kerjaarus drain untuk MOSFET saturasi
tegangan drain
hubungan tegangan drain dan gate
sehingga
dan dapat diperoleh
22' 5,125,02
1
2
1 GStGSnD VVV
L
WkI
DDDDDD IIRVV 1015
DSGS VV
25,11015125,0 DD II
mAID 06,1 VVD 4,4
DG VV
Microelectronic Circuits - Fifth Edition Sedra/Smith 63Copyright 2004 by Oxford University Press, Inc.
Langkah analisis1. Tentukan titik kerja DC (quotient)2. Hitung parameter model ekivalen
rangkaian sinyal kecil3. Susun rangkaian ekivalen sinyal
kecil4. Lakukan analisis rangkaian
kn’(W/L)=0,25mA/V2 Vt=1,5V VA=50V
2 Menghitung parameter model rangkaian ekivalen
tGSnm VVL
Wkg '
D
Ao I
Vr
VmAgm /725,05.14,425,0
km
ro 4706,1
50
mAID 06,1 VVD 4,4
Microelectronic Circuits - Fifth Edition Sedra/Smith 64Copyright 2004 by Oxford University Press, Inc.
Langkah analisis1. Tentukan titik kerja DC (quotient)2. Hitung parameter model ekivalen
rangkaian sinyal kecil3. Susun rangkaian ekivalen sinyal
kecil4. Lakukan analisis rangkaian
kn’(W/L)=0,25mA/V2 Vt=1,5V VA=50V
VmAgm /725,0 kro 47
mAID 06,1 VVD 4,4
3 Menyusun rangkaian ekivalen sinyal kecilSumber tegangan DC menjadi hubung singkatKapasitor (tak hingga!) menjadi hubung singkat
Microelectronic Circuits - Fifth Edition Sedra/Smith 65Copyright 2004 by Oxford University Press, Inc.
kn’(W/L)=0,25mA/V2 Vt=1,5V VA=50V
VmAgm /725,0 kro 47
mAID 06,1 VVD 4,44 Melakukan analisis rangkaian
tegangan output dengan pengaruh RG diabaikan
penguatan tegangan
oLDgsmo rRRvgv ////
gs
oLDgsm
i
ov v
rRRvg
v
vA
////
kkk
mAv
471
101
101
1725,0
VVAv /3,3
G
i
G
i
i
o
G
i
G
oii R
v
R
v
v
v
R
v
R
vvi 3,43,311
MMR
R
vv
i
vR G
G
i
i
i
iin 33,2
33,4
10
33,433,4
Microelectronic Circuits - Fifth Edition Sedra/Smith 66Copyright 2004 by Oxford University Press, Inc.
Figure 4.39 Development of the T equivalent-circuit model for the MOSFET. For simplicity, ro has been omitted but can be added between D and S in the T model of (d).
Microelectronic Circuits - Fifth Edition Sedra/Smith 67Copyright 2004 by Oxford University Press, Inc.
Figure 4.40 (a) The T model of the MOSFET augmented with the drain-to-source resistance ro. (b) An alternative representation of the T model.
Model T MOSFET
Microelectronic Circuits - Fifth Edition Sedra/Smith 68Copyright 2004 by Oxford University Press, Inc.
Figure 4.41 Small-signal equivalent-circuit model of a MOSFET in which the source is not connected to the body.
Microelectronic Circuits - Fifth Edition Sedra/Smith 69Copyright 2004 by Oxford University Press, Inc.
Table 4.2
Microelectronic Circuits - Fifth Edition Sedra/Smith 70Copyright 2004 by Oxford University Press, Inc.
Figure 4.42 Basic structure of the circuit used to realize single-stage discrete-circuit MOS amplifier configurations.
Rangkaian dasar (DC) penguatdengan MOSFET
Microelectronic Circuits - Fifth Edition Sedra/Smith 71Copyright 2004 by Oxford University Press, Inc.
Figure E4.30
Microelectronic Circuits - Fifth Edition Sedra/Smith 72Copyright 2004 by Oxford University Press, Inc.
Table 4.3
Definisi model “makro” penguat
Penguatan teganganbeban terbuka
LRi
ovo v
vA
i
oi i
iA
Penguatan tegangani
ov v
vA
Penguatan arusbeban hubung singkat
0
LRi
ois i
iA
Penguatan arus
Penguatan tegangankeseluruhan bebanterbuka
LRsig
ovo v
vG
Penguatan tegangankeseluruhan sig
ov v
vG
Microelectronic Circuits - Fifth Edition Sedra/Smith 73Copyright 2004 by Oxford University Press, Inc.
Table 4.3
Definisi model “makro” penguat
Resistansi inputtanpa beban
LRi
ii i
vR
0
ivx
xo i
vR
Resistansi output“riil”
Resistansi output0
sigvx
xout i
vR
0
LRi
om v
iG
Resistansi inputi
iin i
vR
Transkonduktansihubung singkat
Microelectronic Circuits - Fifth Edition Sedra/Smith 74Copyright 2004 by Oxford University Press, Inc.
Table 4.3
Definisi model “makro” penguat
sigin
in
sig
i
RR
R
v
v
oL
Lvov RR
RAA
omvo RGA
oL
Lvo
sigin
inv RR
RA
RR
RG
vosigi
ivo A
RR
RG
oL
Lvov RR
RGG
Microelectronic Circuits - Fifth Edition Sedra/Smith 75Copyright 2004 by Oxford University Press, Inc.
Figure 4.43 (a) Common-source amplifier based on the circuit of Fig. 4.42. (b) Equivalent circuit of the amplifier for small-signal analysis. (c) Small-signal analysis performed directly on the amplifier circuit with the MOSFET model implicitly utilized.
Microelectronic Circuits - Fifth Edition Sedra/Smith 76Copyright 2004 by Oxford University Press, Inc.
Figure 4.44 (a) Common-source amplifier with a resistance RS in the source lead. (b) Small-signal equivalent circuit with ro neglected.
Microelectronic Circuits - Fifth Edition Sedra/Smith 77Copyright 2004 by Oxford University Press, Inc.
Figure 4.45 (a) A common-gate amplifier based on the circuit of Fig. 4.42. (b) A small-signal equivalent circuit of the amplifier in (a). (c) The common-gate amplifier fed with a current-signal input.
Microelectronic Circuits - Fifth Edition Sedra/Smith 78Copyright 2004 by Oxford University Press, Inc.
Figure 4.46 (a) A common-drain or source-follower amplifier. (b) Small-signal equivalent-circuit model. (c) Small-signal analysis performed directly on the circuit. (d) Circuit for determining the output resistance Rout of the source follower.
Microelectronic Circuits - Fifth Edition Sedra/Smith 79Copyright 2004 by Oxford University Press, Inc.
Table 4.4
Microelectronic Circuits - Fifth Edition Sedra/Smith 80Copyright 2004 by Oxford University Press, Inc.
Table 4.4 (Continued)
Microelectronic Circuits - Fifth Edition Sedra/Smith 81Copyright 2004 by Oxford University Press, Inc.
Figure 4.47 (a) High-frequency equivalent circuit model for the MOSFET. (b) The equivalent circuit for the case in which the source is connected to the substrate (body). (c) The equivalent circuit model of (b) with Cdb neglected (to simplify analysis).
Microelectronic Circuits - Fifth Edition Sedra/Smith 82Copyright 2004 by Oxford University Press, Inc.
Figure 4.48 Determining the short-circuit current gain Io /Ii.
Microelectronic Circuits - Fifth Edition Sedra/Smith 83Copyright 2004 by Oxford University Press, Inc.
Table 4.5
Microelectronic Circuits - Fifth Edition Sedra/Smith 84Copyright 2004 by Oxford University Press, Inc.
Figure 4.49 (a) Capacitively coupled common-source amplifier. (b) A sketch of the frequency response of the amplifier in (a) delineating the three frequency bands of interest.
Microelectronic Circuits - Fifth Edition Sedra/Smith 85Copyright 2004 by Oxford University Press, Inc.
Figure 4.50 Determining the high-frequency response of the CS amplifier: (a) equivalent circuit; (b) the circuit of (a) simplified at the input and the output;
Microelectronic Circuits - Fifth Edition Sedra/Smith 86Copyright 2004 by Oxford University Press, Inc.
Figure 4.50 (Continued) (c) the equivalent circuit with Cgd replaced at the input side with the equivalent capacitance Ceq; (d) the frequency response plot, which is that of a low-pass single-time-constant circuit.
Microelectronic Circuits - Fifth Edition Sedra/Smith 87Copyright 2004 by Oxford University Press, Inc.
Figure 4.51 Analysis of the CS amplifier to determine its low-frequency transfer function. For simplicity, ro is neglected.
Microelectronic Circuits - Fifth Edition Sedra/Smith 88Copyright 2004 by Oxford University Press, Inc.
Figure 4.52 Sketch of the low-frequency magnitude response of a CS amplifier for which the three break frequencies are sufficiently separated for their effects to appear distinct.
Microelectronic Circuits - Fifth Edition Sedra/Smith 89Copyright 2004 by Oxford University Press, Inc.
Figure 4.53 The CMOS inverter.
Microelectronic Circuits - Fifth Edition Sedra/Smith 90Copyright 2004 by Oxford University Press, Inc.
Figure 4.54 Operation of the CMOS inverter when vI is high: (a) circuit with vI = VDD (logic-1 level, or VOH); (b) graphical construction to determine the operating point; (c) equivalent circuit.
Microelectronic Circuits - Fifth Edition Sedra/Smith 91Copyright 2004 by Oxford University Press, Inc.
Figure 4.55 Operation of the CMOS inverter when vI is low: (a) circuit with vI = 0 V (logic-0 level, or VOL); (b) graphical construction to determine the operating point; (c) equivalent circuit.
Microelectronic Circuits - Fifth Edition Sedra/Smith 92Copyright 2004 by Oxford University Press, Inc.
Figure 4.56 The voltage transfer characteristic of the CMOS inverter.
Microelectronic Circuits - Fifth Edition Sedra/Smith 93Copyright 2004 by Oxford University Press, Inc.
Figure 4.57 Dynamic operation of a capacitively loaded CMOS inverter: (a) circuit; (b) input and output waveforms; (c) trajectory of the operating point as the input goes high and C discharges through QN; (d) equivalent circuit during the capacitor discharge.
Microelectronic Circuits - Fifth Edition Sedra/Smith 94Copyright 2004 by Oxford University Press, Inc.
Figure 4.58 The current in the CMOS inverter versus the input voltage.
Microelectronic Circuits - Fifth Edition Sedra/Smith 95Copyright 2004 by Oxford University Press, Inc.
Figure 4.59 (a) Circuit symbol for the n-channel depletion-type MOSFET. (b) Simplified circuit symbol applicable for the case the substrate (B) is connected to the source (S).
Microelectronic Circuits - Fifth Edition Sedra/Smith 96Copyright 2004 by Oxford University Press, Inc.
Figure 4.60 The current-voltage characteristics of a depletion-type n-channel MOSFET for which Vt = –4 V and kn(W/L) = 2 mA/V2: (a) transistor with current and voltage polarities indicated; (b) the iD–vDS characteristics; (c) the iD–vGS characteristic in saturation.
Microelectronic Circuits - Fifth Edition Sedra/Smith 97Copyright 2004 by Oxford University Press, Inc.
Figure 4.61 The relative levels of terminal voltages of a depletion-type NMOS transistor for operation in the triode and the saturation regions. The case shown is for operation in the enhancement mode (vGS is positive).
Microelectronic Circuits - Fifth Edition Sedra/Smith 98Copyright 2004 by Oxford University Press, Inc.
Figure 4.62 Sketches of the iD–vGS characteristics for MOSFETs of enhancement and depletion types, of both polarities (operating in saturation). Note that the characteristic curves intersect the vGS axis at Vt. Also note that for generality somewhat different values of |Vt| are shown for n-channel and p-channel devices.
Microelectronic Circuits - Fifth Edition Sedra/Smith 99Copyright 2004 by Oxford University Press, Inc.
Figure E4.51
Microelectronic Circuits - Fifth Edition Sedra/Smith 100Copyright 2004 by Oxford University Press, Inc.
Figure E4.52
Microelectronic Circuits - Fifth Edition Sedra/Smith 101Copyright 2004 by Oxford University Press, Inc.
Figure 4.63 Capture schematic of the CS amplifier in Example 4.14.
Microelectronic Circuits - Fifth Edition Sedra/Smith 102Copyright 2004 by Oxford University Press, Inc.
Figure 4.64 Frequency response of the CS amplifier in Example 4.14 with CS = 10 F and CS = 0 (i.e., CS removed).
Microelectronic Circuits - Fifth Edition Sedra/Smith 103Copyright 2004 by Oxford University Press, Inc.
Figure P4.18
Microelectronic Circuits - Fifth Edition Sedra/Smith 104Copyright 2004 by Oxford University Press, Inc.
Figure P4.33
Microelectronic Circuits - Fifth Edition Sedra/Smith 105Copyright 2004 by Oxford University Press, Inc.
Figure P4.36
Microelectronic Circuits - Fifth Edition Sedra/Smith 106Copyright 2004 by Oxford University Press, Inc.
Figure P4.37
Microelectronic Circuits - Fifth Edition Sedra/Smith 107Copyright 2004 by Oxford University Press, Inc.
Figure P4.38
Microelectronic Circuits - Fifth Edition Sedra/Smith 108Copyright 2004 by Oxford University Press, Inc.
Figure P4.41
Microelectronic Circuits - Fifth Edition Sedra/Smith 109Copyright 2004 by Oxford University Press, Inc.
Figure P4.42
Microelectronic Circuits - Fifth Edition Sedra/Smith 110Copyright 2004 by Oxford University Press, Inc.
Figure P4.43
Microelectronic Circuits - Fifth Edition Sedra/Smith 111Copyright 2004 by Oxford University Press, Inc.
Figure P4.44
Microelectronic Circuits - Fifth Edition Sedra/Smith 112Copyright 2004 by Oxford University Press, Inc.
Figure P4.45
Microelectronic Circuits - Fifth Edition Sedra/Smith 113Copyright 2004 by Oxford University Press, Inc.
Figure P4.46
Microelectronic Circuits - Fifth Edition Sedra/Smith 114Copyright 2004 by Oxford University Press, Inc.
Figure P4.47
Microelectronic Circuits - Fifth Edition Sedra/Smith 115Copyright 2004 by Oxford University Press, Inc.
Figure P4.48
Microelectronic Circuits - Fifth Edition Sedra/Smith 116Copyright 2004 by Oxford University Press, Inc.
Figure P4.54
Microelectronic Circuits - Fifth Edition Sedra/Smith 117Copyright 2004 by Oxford University Press, Inc.
Figure P4.61
Microelectronic Circuits - Fifth Edition Sedra/Smith 118Copyright 2004 by Oxford University Press, Inc.
Figure P4.66
Microelectronic Circuits - Fifth Edition Sedra/Smith 119Copyright 2004 by Oxford University Press, Inc.
Figure P4.74
Microelectronic Circuits - Fifth Edition Sedra/Smith 120Copyright 2004 by Oxford University Press, Inc.
Figure P4.75
Microelectronic Circuits - Fifth Edition Sedra/Smith 121Copyright 2004 by Oxford University Press, Inc.
Figure P4.77
Microelectronic Circuits - Fifth Edition Sedra/Smith 122Copyright 2004 by Oxford University Press, Inc.
Figure P4.86
Microelectronic Circuits - Fifth Edition Sedra/Smith 123Copyright 2004 by Oxford University Press, Inc.
Figure P4.87
Microelectronic Circuits - Fifth Edition Sedra/Smith 124Copyright 2004 by Oxford University Press, Inc.
Figure P4.88
Microelectronic Circuits - Fifth Edition Sedra/Smith 125Copyright 2004 by Oxford University Press, Inc.
Figure P4.97
Microelectronic Circuits - Fifth Edition Sedra/Smith 126Copyright 2004 by Oxford University Press, Inc.
Figure P4.99
Microelectronic Circuits - Fifth Edition Sedra/Smith 127Copyright 2004 by Oxford University Press, Inc.
Figure P4.101
Microelectronic Circuits - Fifth Edition Sedra/Smith 128Copyright 2004 by Oxford University Press, Inc.
Figure P4.104
Microelectronic Circuits - Fifth Edition Sedra/Smith 129Copyright 2004 by Oxford University Press, Inc.
Figure P4.117
Microelectronic Circuits - Fifth Edition Sedra/Smith 130Copyright 2004 by Oxford University Press, Inc.
Figure P4.120
Microelectronic Circuits - Fifth Edition Sedra/Smith 131Copyright 2004 by Oxford University Press, Inc.
Figure P4.121
Microelectronic Circuits - Fifth Edition Sedra/Smith 132Copyright 2004 by Oxford University Press, Inc.
Figure P4.123
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