View
4
Download
0
Category
Preview:
Citation preview
copy2017 Micron Technology Inc All rights reserved Information products andor specifications are subject to change without notice All information is provided on an ldquoAS ISrdquo basis without warranties of any kind Statements regarding products including regarding their features availability functionality or compatibility are provided for informational purposes only and do not modify the warranty if any applicable to any product Drawings may not be to scale Micron the Micron logo and all other Micron trademarks are the property of Micron Technology Inc All other trademarks are the property of their respective owners
New Memory Choices for the New iMX8 Processors
Jim Cooke JCookeMicroncom
iMX8 Quad Max iMX8 Quad X Plus iMX8 M
copy 2017 Micron Technology Inc
Abstract We will discuss the new memories supported on the latest iMX8 processors
NXPrsquos latest and most powerful Microprocessor requires the latest and fastest memories to keep it running efficiently As a system designer your memory choices can impact the performance size cost power reliability and longevity of your end product
During this session we will discuss the new memories supported on the new iMX8 processor family For DRAM this will include DDR4 and Low Power DDR4 (LPDDR4) For non-volatile memory this will include Octal SPI NOR (XccelaTM Flash) which offers up to 400MBs as well as the latest eMMC 5X devices that also support high speeds These devices are offered with Commercial Industrial or Automotive temperature and quality ratings
This year we will provide additional information on LPDDR4X (X=lower power IO) as well as eMMC 51 high performance features including command queueing and several new Cache operations
This session will provide designers with the tools necessary to create state-of-the-art iMX8 systems
June 15 2018
copy 2017 Micron Technology Inc
Micronrsquos Segment Product Focus
| June 15 20183
Auto
Consumer
Connected Home
Industrial
Mobile Embedded Storage Compute ampNetworking
Business Units
NOR Flashbull Parallel NORbull Serial (Q-SPI Twin Quad XccelaTM Octal SPI)
DRAMbull SDRDDR (DDR2 3 4)bull LPSDRLPDDR (LPDDR2 LPDDR4)
NAND Flashbull SLC NAND MLC NAND
eMMCtrade 45 50 51
SSD SATA PCIeNVMe
MCP
Compatibility Guideshttpswwwmicroncomsolutionsmicron-valued-partner-programchipset-partnernxp
copy 2017 Micron Technology Inc
Compatibility Guides (Pages 1 amp 2 of 8)
| June 15 20185
copy 2017 Micron Technology Inc
Compatibility Guides (Pages 3 amp 4 of 8)
| June 15 20186
copy 2017 Micron Technology Inc
Compatibility Guides (Pages 5 amp 6 of 8)
| June 15 20187
copy 2017 Micron Technology Inc
Compatibility Guides (Pages 7 amp 8 of 8)
| June 15 20188
copy 2017 Micron Technology Inc
iMX8 Quad Max
| June 15 20189
iMX8 QM Features Micronrsquos bull LPDDR4 (up to 8GB)bull XccelaTM Octal Flash Q-SPIbull 32GB eMMC50 (back side)
Board photo of released MX8 Quad Max
copy 2017 Micron Technology Inc
iMX8 Quad X Plus
| June 15 201810
iMX8 QXP Features Micronrsquos bull LPDDR4 (up to 8GB)bull XccelaTM Octal Flash Q-SPIbull 32GB eMMC50 (back side)
Board photo of released MX8 Quad X Plus
copy 2017 Micron Technology Inc
iMX8 M
| June 15 201811 | Micron Confidential
iMX8 M has validated Micronrsquos bull 3GB LPDDR4bull 256MbQuad SPIbull 16GB eMMC50
Quad SPI FlashMT25QL256ABA1EW9-0SIT
3GB LPDDR4 MT53B768M32D4NQ-062 WTB
16GB eMMCMTFC16GAKAECN-2M WT
Board photo of released MX8 M
DRAM Flash Market Section
copy 2017 Micron Technology Inc
DRAM Market Trends General Market vs Automotive Adoption
| June 15 201813
General Market
ndash DDR is the dominant interface for devices without batteries
ndash Increased LPDRAM adoption outside of mobile handsets driven by Tablets amp other Client apps
ndash DDR5LPDDR5 adoption projected to start in late CYrsquo19
Automotive
ndash Continued need for legacy support
ndash DDR3 is the primary choice for current gen low cost Infotainment and Cluster applications
ndash LPDDR4 will be the primary choice for next gen ADAS and high-end Infotainment applications
DDR2DDR3
DDR4
DDR5
LPDDR2LPDDR3
LPDDR4
LPDDR5GDDR55X GDDR6OtherLegacy
0
10
20
30
40
50
60
70
80
90
100
Source Micron Market Models
copy 2017 Micron Technology Inc
DRAM Market Trends General Market vs IMM
| June 15 201814
General Marketndash DDR is the dominant interface for devices
without batteries
ndash Increased LPDRAM adoption outside of mobile handsets driven by Tablets amp other Client apps
ndash DDR5LPDDR5 adoption projected to start in late CYrsquo19
Industrial Multi-Market (IMM)ndash Continued need for legacy support in both
DRAM and LPDRAM with a wide mix of technologies
ndash DRAM modules in Industrial Automation drive bulk of DDR4 adoption
ndash Strong LP adoption for battery driven applications LPDDR4 is gaining traction
in
1G
b eq
uiva
lent
s
DDR4
DDR3
LPDDR5
GDDR
DDR2
LPDDR2
General MarketOther
LPDDR4xLPDDR3
DDR5
Source Micron Marketing (Marchrsquo17)
DDR2DDR3
DDR4
DDR5
LPDDR2LPDDR3
LPDDR4
LPDDR5GDDR55X GDDR6OtherLegacy
0
10
20
30
40
50
60
70
80
90
100
Source Micron Market Models
copy 2017 Micron Technology Inc
Broad NVM Market Growth Dynamics
15
Continued strong deployment of eMMC ndash Broader embedded markets
UFS driven by mobilendash Higher performance density
Strong market momentum for PCIe ndash Essential performance driven applications
Source Micron market models
Managed NAND TAM Units ()
0
20
40
60
80
100
CY2017 CY2018 CY2019 CY2020
eMMC
UFS
PCIe
Others
copy 2017 Micron Technology Inc
Explosive Demand for Memory with Autonomous Driving
16
L5 expected to need gt1TB storage
Includes IVI Cluster Central amp Boot storage for autonomous Black Box Recording Source Micron Marketing
Density
0
500
1000
1500
2000
L1L2 L3 L4 L5
eMMC
UFS 21
UFS 30PCIe Gen 3 x2
PCIe x4
Storage Density Progression
eMMC
3000MBs
1600MBs
Seq Reads
800MBs
320MBs
Technical Details
copy 2017 Micron Technology Inc
LPDDRx and DDRx SDRAM Feature Comparison
| June 15 201818
Type LPDDR2 LPDDR3 LPDDR44X DDR2 DDR3DDR3L DDR4Die Density Up to 8Gb Up to 32Gb Up to 32Gb Up to 2Gb Up to 8Gb Up to 16Gb (128Gb 8H)
Core Voltage (Vdd) 12V 18V WL supply req
12V18V WL supply req
11V10V18V WL supply req
18V155V 15V135V
12VSeparate WL supply
25VIO Voltage 12V 12V 11V (4X = 06V) Same as VDD Same as VDD Same as VDD
Max Clock Freq Data rate 533MHzDDR1066 800MHzDDR1600 2133MHzDDR4267 533MHzDDR1066 1066MHzDDR2100 1600MHz+DDR3200+
Burst Lengths 4 8 16 8 16 32 4 8 BC4 8 BC4 8Configurations x16 x32 x16 x32 2Ch x16 x4 x8 x16 x4 x8 x16 x4 x8 x16
Address Command Signals
14 pins(Muxrsquod command
address)
14 pins(Muxrsquod command
address)
10 pins per channel(Muxrsquod command
Address)25 pins 27 pins 29 pins
(partial muxrsquod)
Address Command Data Rate
DDR(both rising and
falling edges of clock)
DDR (both rising and
falling edges of clock)
SDR(rising edge of clock
only)
SDR(rising edge of clock
only)
SDR(rising edge of
clock only)
SDR (rising edge of clock
only)
On Die Temperature Sensor Yes Yes Yes No OptionalRS Yes
DPD (Deep power-down mode) Yes Yes No No No No
Package Options POP MCP discrete POP MCP discrete PoP MCP discrete Discrete Discrete Discrete
ProductTemp Grades CT IT AIT AT AAT CT IT AIT AT AATWT (-25rsquo to 85rsquoC)
AAT (-40C to 105C)AUT (-40rsquoC to 125rsquoC)
CT IT AIT AT AAT CT IT AIT AT AAT AUT CT IT AIT AT AAT AUT
copy 2017 Micron Technology Inc | June 15 201819
Standard DRAM LPDRAM Form Factor Center bond pads for highest performance and lowest
costEdge bond pads allow for stacked die for MCP and PoP
packaging enabling compact form factors
Performance x4 x8 x16 is lower cost and supports higher density configurations
x32 allows system to support high bandwidthin point-to-point applications
DRAMpower
IDD specifications are geared towards moderate stand-by power providing the highest yields and lowest cost
Ultra low standby power enabled by on-die power management and long refresh rates
Systempower
Additional Delay Locked Loop (DLL) circuitry required for high performance which inhibits system power
savings
Lack of DLL circuitry allows for improved system power management System can enterexit power-down modes
as well as throttle or stop the clock
Key Takeaway
Optimized for cost and performancecost is primary feature
Optimized for battery life and portability low power amp smallest possible footprint are primary features
LPDD
R4 S
peci
fic In
foG
ener
al LP
vs
DD
R Co
mpa
rison
LPDRAM offers additional value over standard DRAM
Standard DRAM amp LPDRAM Trade Offs
copy 2017 Micron Technology Inc20
DRAM Performance Improvements Over Time (IO x16)
0
5
10
15
20
25
30
35
40
45
50
55
2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016 2017
Gbs
DDR2
DDR2-53385 Gbs
DDR2-667106 Gbs
DDR2-800128 Gbs
DDR3-106617 Gbs
DDR3-1333213 Gbs
DDR3-1600256 Gbs
DDR3-186630 Gbs
DDR4-213334 Gbs
DDR4-2400384 Gbs
DDR4-2666427 Gbs
DDR4-3200512 Gbs
DDR3
DDR4
June 15 2018
copy 2017 Micron Technology Inc21
0
20
40
60
80
100
120
140
160
2010 2011 2012 2013 2014 2015 2016 2017 2018
LPDDR2-800256 Gbs
LPDDR2-10663411 Gbs
LPDDR2LPDDR3-1600
512 Gbs
LPDDR3-1866 59712 Gbs
LPDDR3
LPDDR4-37331194 Gbs
LPDDR4-426613651 Gbs
LPDDR4
LPDDR4-32001024 Gbs
Gbs
LPDDR Performance Improvements Over Time (IO x32)
LPDDR4-32001024 Gbs
June 15 2018
Non-Volatile Details
copy 2017 Micron Technology Inc | June 15 201823
Xccelatrade Flash Best of Parallel and Serial NOR Flash
Compared to Page Mode Parallel NOR
5X THE PERFORMANCE 4X FEWER PINS 3X LESS ENERGY AND 2X SMALLER PACKAGE
512MbParallel NOR
MT28EW
512MbQuad-SPIMT25Q
512MbTwin-Quad
MT25T
512MbXccela Flash
MT35X
Bandwidth 80MBs(Page mode async x16)
90MBs(90MHz DDR mode)
180MBs(90MHz DDR mode)
400MBs(200MHz DDR mode)
Initial WordAccess Time 95ns (x16) 139ns (18V 4-bit)
157ns (18V 16-bits)139ns (18V 8-bit)145ns (18V 16-bit)
85ns (18V 8-bit)875ns (18V 16-bit)
Subsequent Word Access
20ns (16-bits)(95ns across 32B page)
6ns (4-bits)24ns (16-bits)
6ns (8-bits)12ns (16-bits)
25ns (8-bits)5ns (16-bits)
Package and Pins 64-TBGA (11x13mm)50 Active Pins
24-BGA (6x8mm)6 Active Pins
24-BGA (6x8mm)11 Active Pins
24-BGA (6x8mm)11 Active Pins
Energy Per Bit 101 pJbit 41 pJbit 41 pJbit 28 pJbit
Xccelatrade Flash(MT35X)
Parallel NOR FlashHigh performance
Fast bootReliability
Serial NOR FlashReduced pin countsSimple PCB design
ReliabilityNeed more
performance with same package
Want reduced pin countpackage size
Source Micron datasheets
copy 2017 Micron Technology Inc
MT35X (Octal) aka
24
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc
The Evolution of SPI
25
SPI Dual-SPI Quad-SPI Twin Quad Octal of Signals 6 6 6 10-12 11
Clock (max) 75MHz 75MHz 180MHz SDR (90MHz DDR) 180MHz SDR (90MHz DDR) 166MHz SDR (200MHz DDR)
Bandwidth (max) 9MBs 18MBs 90MBs 180MBs 400MBs
0 MBs
50 MBs
100 MBs
150 MBs
200 MBs
250 MBs
300 MBs
350 MBs
400 MBs
450 MBs
500 MBs
1997 2006 2016
SPI Interface Bandwidth
Dual-IO18MBs
Quad (SDR)40MBs
Twin-Quad 180MBs
Octal 400MBs
Quad (DDR) 90MBs
125MBs 9MBs
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc26
Micron Read Performance Comparisons
0
50
100
150
200
250
300
350
400
450
1 2 4 8 16 32 64 128 256 512 1k 2k 4k 8k 16k 32k 64k 128k 256k 512k 1M 2M
Tran
sfer
Rat
e (M
Byt
ess
ec)
Bytes per Fetch
NOR and NAND Performance Comparisons Random Read Access Performance vs Data Size
x8 200MHz DDR Octal NOR (MT35X)
x8 166MHz SDR Twin Quad Serial NOR (MT25T)
x4 166MHz SDR 83MHz DDR Serial NOR (MT25Q) 18V
x4 133MHz SPI NAND
x8 NAND ONFI 30
x8 eMMC 45
x8 eMMC 50
+
+
CacheLine Fills
BOOT or Read time at 400MBsBit density 512Mb 1Gb 2GbByte density 64MB 128MB 256MBTime to read 16 sec 32 sec 64 sec
Graphic image read 2Bytes (65K colors)Pixel Size 1K x 1K 4K x 4KByte density 2MB 34MBTime to read 52ms 88ms
Xccelatrade FlashHighest Performance
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc
eMMC Fully Managed NANDPROVIDES REDUCED DESIGN EFFORT FOR MINIMAL COST
NAND
Wear leveling
ECC
Driver
NAND Controller
Raw NAND
ONFI NAND bus
CommandBlock Management
Low-level Driver
NAND Controller
Fully Managed NAND (eMMC)
MMC SATA or USB bus
NAND
Wear leveling CMDBlock
Mgmt NAND Error Mgmt
Controller
eMMC eUSBSATA amp CF
Cost amp Price
Ease of design amp Validation
27 June 15 2018
copy 2017 Micron Technology Inc
eMMC
28 June 15 2018
copy 2017 Micron Technology Inc
Enjoy Micron Automotive eMMC comprehensive Product Portfolio
PCIe NVMeUFS 2x
June 15 2018
copy 2017 Micron Technology Inc
New Features in eMMC 51
| June 15 201830
copy 2017 Micron Technology Inc
SSD Form FactorsEXISTING AND FUTURE DIRECTIONS
FORM FACTORSndash 25rdquo
ndash mSATA
ndash M2
ndash uBGA (Future)
INTERFACESndash SATA III
ndash PCIe
YEARLY FIRMWARE UPDATES
| June 15 201831
Parameter 25rdquo mSATA M2Capacities (GB) 60120240 60120240 120240
Specification EIA-720 MO-300B variation A PCIe M2 Spec Rev 10Dimensions (L) 10045mm
(W) 6985mm (H) 7mm
(L) 5080mm(W) 2985mm(H) 375mm
(L) 60 mm(W) 22 mm(H) 15 mm
Weight lt 70g lt 10g lt 10 g
Packaging MCP (Multi Chip Package)PoP (Package on Package)
copy 2017 Micron Technology Inc
What is an eMCPePoP
Benefits includehellipndash Board space savings through vertical stacking of several memory chips
ndash Minimize bill of materials for simplified manufacturing and cost savings
ndash High density low power consumption shortest interconnections possible
ndash Accelerated time to market through rapid integration of modules
ApplicationProcessor -Driver
MLC NAND
eMMC
PCB
LPDRAM
Controller
POP
Application Processor -Driver
SLC NAND
NAND MCP
LPDRAM
Printed Circuit Board (PCB)
ApplicationProcessor -Driver
eMMCePOPLPDRAM
ApplicationProcessor -Driver
eMMC
eMCP
LPDRAM
PCBPCB
eMCP is a Multi Chip Package including eMMC and LPDDRx
ePoP is an eMCP in a PoP (Package on Package) design
June 15 2018
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Power Calculatorshttpswwwmicroncomsupporttools-and-utilitiespower-calc
| June 15 201834
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Technical Notesndash httpswwwmicroncomadvanced
searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=ampshow=10ampfamily=2dd96f4ee22e4de7b7027e6dd6a2718campnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201835
copy 2017 Micron Technology Inc
Links to Micronrsquos NOR Flash Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=1f8cfba0d95c4ea9a6c99e3272fd0e39ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201836
copy 2017 Micron Technology Inc
Link to Micronrsquos eMMC Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=ff04c268087d4d33a126d6a5a59ccebdamptechnology=9b8d2c45520a422c8f635832d3a2b0eaampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201837
copy 2017 Micron Technology Inc
Link to Micronrsquos SSD Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=59b6cc75486a4bca80f5b1b8a2086740ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201838
copy 2017 Micron Technology Inc
Abstract We will discuss the new memories supported on the latest iMX8 processors
NXPrsquos latest and most powerful Microprocessor requires the latest and fastest memories to keep it running efficiently As a system designer your memory choices can impact the performance size cost power reliability and longevity of your end product
During this session we will discuss the new memories supported on the new iMX8 processor family For DRAM this will include DDR4 and Low Power DDR4 (LPDDR4) For non-volatile memory this will include Octal SPI NOR (XccelaTM Flash) which offers up to 400MBs as well as the latest eMMC 5X devices that also support high speeds These devices are offered with Commercial Industrial or Automotive temperature and quality ratings
This year we will provide additional information on LPDDR4X (X=lower power IO) as well as eMMC 51 high performance features including command queueing and several new Cache operations
This session will provide designers with the tools necessary to create state-of-the-art iMX8 systems
June 15 2018
copy 2017 Micron Technology Inc
Micronrsquos Segment Product Focus
| June 15 20183
Auto
Consumer
Connected Home
Industrial
Mobile Embedded Storage Compute ampNetworking
Business Units
NOR Flashbull Parallel NORbull Serial (Q-SPI Twin Quad XccelaTM Octal SPI)
DRAMbull SDRDDR (DDR2 3 4)bull LPSDRLPDDR (LPDDR2 LPDDR4)
NAND Flashbull SLC NAND MLC NAND
eMMCtrade 45 50 51
SSD SATA PCIeNVMe
MCP
Compatibility Guideshttpswwwmicroncomsolutionsmicron-valued-partner-programchipset-partnernxp
copy 2017 Micron Technology Inc
Compatibility Guides (Pages 1 amp 2 of 8)
| June 15 20185
copy 2017 Micron Technology Inc
Compatibility Guides (Pages 3 amp 4 of 8)
| June 15 20186
copy 2017 Micron Technology Inc
Compatibility Guides (Pages 5 amp 6 of 8)
| June 15 20187
copy 2017 Micron Technology Inc
Compatibility Guides (Pages 7 amp 8 of 8)
| June 15 20188
copy 2017 Micron Technology Inc
iMX8 Quad Max
| June 15 20189
iMX8 QM Features Micronrsquos bull LPDDR4 (up to 8GB)bull XccelaTM Octal Flash Q-SPIbull 32GB eMMC50 (back side)
Board photo of released MX8 Quad Max
copy 2017 Micron Technology Inc
iMX8 Quad X Plus
| June 15 201810
iMX8 QXP Features Micronrsquos bull LPDDR4 (up to 8GB)bull XccelaTM Octal Flash Q-SPIbull 32GB eMMC50 (back side)
Board photo of released MX8 Quad X Plus
copy 2017 Micron Technology Inc
iMX8 M
| June 15 201811 | Micron Confidential
iMX8 M has validated Micronrsquos bull 3GB LPDDR4bull 256MbQuad SPIbull 16GB eMMC50
Quad SPI FlashMT25QL256ABA1EW9-0SIT
3GB LPDDR4 MT53B768M32D4NQ-062 WTB
16GB eMMCMTFC16GAKAECN-2M WT
Board photo of released MX8 M
DRAM Flash Market Section
copy 2017 Micron Technology Inc
DRAM Market Trends General Market vs Automotive Adoption
| June 15 201813
General Market
ndash DDR is the dominant interface for devices without batteries
ndash Increased LPDRAM adoption outside of mobile handsets driven by Tablets amp other Client apps
ndash DDR5LPDDR5 adoption projected to start in late CYrsquo19
Automotive
ndash Continued need for legacy support
ndash DDR3 is the primary choice for current gen low cost Infotainment and Cluster applications
ndash LPDDR4 will be the primary choice for next gen ADAS and high-end Infotainment applications
DDR2DDR3
DDR4
DDR5
LPDDR2LPDDR3
LPDDR4
LPDDR5GDDR55X GDDR6OtherLegacy
0
10
20
30
40
50
60
70
80
90
100
Source Micron Market Models
copy 2017 Micron Technology Inc
DRAM Market Trends General Market vs IMM
| June 15 201814
General Marketndash DDR is the dominant interface for devices
without batteries
ndash Increased LPDRAM adoption outside of mobile handsets driven by Tablets amp other Client apps
ndash DDR5LPDDR5 adoption projected to start in late CYrsquo19
Industrial Multi-Market (IMM)ndash Continued need for legacy support in both
DRAM and LPDRAM with a wide mix of technologies
ndash DRAM modules in Industrial Automation drive bulk of DDR4 adoption
ndash Strong LP adoption for battery driven applications LPDDR4 is gaining traction
in
1G
b eq
uiva
lent
s
DDR4
DDR3
LPDDR5
GDDR
DDR2
LPDDR2
General MarketOther
LPDDR4xLPDDR3
DDR5
Source Micron Marketing (Marchrsquo17)
DDR2DDR3
DDR4
DDR5
LPDDR2LPDDR3
LPDDR4
LPDDR5GDDR55X GDDR6OtherLegacy
0
10
20
30
40
50
60
70
80
90
100
Source Micron Market Models
copy 2017 Micron Technology Inc
Broad NVM Market Growth Dynamics
15
Continued strong deployment of eMMC ndash Broader embedded markets
UFS driven by mobilendash Higher performance density
Strong market momentum for PCIe ndash Essential performance driven applications
Source Micron market models
Managed NAND TAM Units ()
0
20
40
60
80
100
CY2017 CY2018 CY2019 CY2020
eMMC
UFS
PCIe
Others
copy 2017 Micron Technology Inc
Explosive Demand for Memory with Autonomous Driving
16
L5 expected to need gt1TB storage
Includes IVI Cluster Central amp Boot storage for autonomous Black Box Recording Source Micron Marketing
Density
0
500
1000
1500
2000
L1L2 L3 L4 L5
eMMC
UFS 21
UFS 30PCIe Gen 3 x2
PCIe x4
Storage Density Progression
eMMC
3000MBs
1600MBs
Seq Reads
800MBs
320MBs
Technical Details
copy 2017 Micron Technology Inc
LPDDRx and DDRx SDRAM Feature Comparison
| June 15 201818
Type LPDDR2 LPDDR3 LPDDR44X DDR2 DDR3DDR3L DDR4Die Density Up to 8Gb Up to 32Gb Up to 32Gb Up to 2Gb Up to 8Gb Up to 16Gb (128Gb 8H)
Core Voltage (Vdd) 12V 18V WL supply req
12V18V WL supply req
11V10V18V WL supply req
18V155V 15V135V
12VSeparate WL supply
25VIO Voltage 12V 12V 11V (4X = 06V) Same as VDD Same as VDD Same as VDD
Max Clock Freq Data rate 533MHzDDR1066 800MHzDDR1600 2133MHzDDR4267 533MHzDDR1066 1066MHzDDR2100 1600MHz+DDR3200+
Burst Lengths 4 8 16 8 16 32 4 8 BC4 8 BC4 8Configurations x16 x32 x16 x32 2Ch x16 x4 x8 x16 x4 x8 x16 x4 x8 x16
Address Command Signals
14 pins(Muxrsquod command
address)
14 pins(Muxrsquod command
address)
10 pins per channel(Muxrsquod command
Address)25 pins 27 pins 29 pins
(partial muxrsquod)
Address Command Data Rate
DDR(both rising and
falling edges of clock)
DDR (both rising and
falling edges of clock)
SDR(rising edge of clock
only)
SDR(rising edge of clock
only)
SDR(rising edge of
clock only)
SDR (rising edge of clock
only)
On Die Temperature Sensor Yes Yes Yes No OptionalRS Yes
DPD (Deep power-down mode) Yes Yes No No No No
Package Options POP MCP discrete POP MCP discrete PoP MCP discrete Discrete Discrete Discrete
ProductTemp Grades CT IT AIT AT AAT CT IT AIT AT AATWT (-25rsquo to 85rsquoC)
AAT (-40C to 105C)AUT (-40rsquoC to 125rsquoC)
CT IT AIT AT AAT CT IT AIT AT AAT AUT CT IT AIT AT AAT AUT
copy 2017 Micron Technology Inc | June 15 201819
Standard DRAM LPDRAM Form Factor Center bond pads for highest performance and lowest
costEdge bond pads allow for stacked die for MCP and PoP
packaging enabling compact form factors
Performance x4 x8 x16 is lower cost and supports higher density configurations
x32 allows system to support high bandwidthin point-to-point applications
DRAMpower
IDD specifications are geared towards moderate stand-by power providing the highest yields and lowest cost
Ultra low standby power enabled by on-die power management and long refresh rates
Systempower
Additional Delay Locked Loop (DLL) circuitry required for high performance which inhibits system power
savings
Lack of DLL circuitry allows for improved system power management System can enterexit power-down modes
as well as throttle or stop the clock
Key Takeaway
Optimized for cost and performancecost is primary feature
Optimized for battery life and portability low power amp smallest possible footprint are primary features
LPDD
R4 S
peci
fic In
foG
ener
al LP
vs
DD
R Co
mpa
rison
LPDRAM offers additional value over standard DRAM
Standard DRAM amp LPDRAM Trade Offs
copy 2017 Micron Technology Inc20
DRAM Performance Improvements Over Time (IO x16)
0
5
10
15
20
25
30
35
40
45
50
55
2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016 2017
Gbs
DDR2
DDR2-53385 Gbs
DDR2-667106 Gbs
DDR2-800128 Gbs
DDR3-106617 Gbs
DDR3-1333213 Gbs
DDR3-1600256 Gbs
DDR3-186630 Gbs
DDR4-213334 Gbs
DDR4-2400384 Gbs
DDR4-2666427 Gbs
DDR4-3200512 Gbs
DDR3
DDR4
June 15 2018
copy 2017 Micron Technology Inc21
0
20
40
60
80
100
120
140
160
2010 2011 2012 2013 2014 2015 2016 2017 2018
LPDDR2-800256 Gbs
LPDDR2-10663411 Gbs
LPDDR2LPDDR3-1600
512 Gbs
LPDDR3-1866 59712 Gbs
LPDDR3
LPDDR4-37331194 Gbs
LPDDR4-426613651 Gbs
LPDDR4
LPDDR4-32001024 Gbs
Gbs
LPDDR Performance Improvements Over Time (IO x32)
LPDDR4-32001024 Gbs
June 15 2018
Non-Volatile Details
copy 2017 Micron Technology Inc | June 15 201823
Xccelatrade Flash Best of Parallel and Serial NOR Flash
Compared to Page Mode Parallel NOR
5X THE PERFORMANCE 4X FEWER PINS 3X LESS ENERGY AND 2X SMALLER PACKAGE
512MbParallel NOR
MT28EW
512MbQuad-SPIMT25Q
512MbTwin-Quad
MT25T
512MbXccela Flash
MT35X
Bandwidth 80MBs(Page mode async x16)
90MBs(90MHz DDR mode)
180MBs(90MHz DDR mode)
400MBs(200MHz DDR mode)
Initial WordAccess Time 95ns (x16) 139ns (18V 4-bit)
157ns (18V 16-bits)139ns (18V 8-bit)145ns (18V 16-bit)
85ns (18V 8-bit)875ns (18V 16-bit)
Subsequent Word Access
20ns (16-bits)(95ns across 32B page)
6ns (4-bits)24ns (16-bits)
6ns (8-bits)12ns (16-bits)
25ns (8-bits)5ns (16-bits)
Package and Pins 64-TBGA (11x13mm)50 Active Pins
24-BGA (6x8mm)6 Active Pins
24-BGA (6x8mm)11 Active Pins
24-BGA (6x8mm)11 Active Pins
Energy Per Bit 101 pJbit 41 pJbit 41 pJbit 28 pJbit
Xccelatrade Flash(MT35X)
Parallel NOR FlashHigh performance
Fast bootReliability
Serial NOR FlashReduced pin countsSimple PCB design
ReliabilityNeed more
performance with same package
Want reduced pin countpackage size
Source Micron datasheets
copy 2017 Micron Technology Inc
MT35X (Octal) aka
24
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc
The Evolution of SPI
25
SPI Dual-SPI Quad-SPI Twin Quad Octal of Signals 6 6 6 10-12 11
Clock (max) 75MHz 75MHz 180MHz SDR (90MHz DDR) 180MHz SDR (90MHz DDR) 166MHz SDR (200MHz DDR)
Bandwidth (max) 9MBs 18MBs 90MBs 180MBs 400MBs
0 MBs
50 MBs
100 MBs
150 MBs
200 MBs
250 MBs
300 MBs
350 MBs
400 MBs
450 MBs
500 MBs
1997 2006 2016
SPI Interface Bandwidth
Dual-IO18MBs
Quad (SDR)40MBs
Twin-Quad 180MBs
Octal 400MBs
Quad (DDR) 90MBs
125MBs 9MBs
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc26
Micron Read Performance Comparisons
0
50
100
150
200
250
300
350
400
450
1 2 4 8 16 32 64 128 256 512 1k 2k 4k 8k 16k 32k 64k 128k 256k 512k 1M 2M
Tran
sfer
Rat
e (M
Byt
ess
ec)
Bytes per Fetch
NOR and NAND Performance Comparisons Random Read Access Performance vs Data Size
x8 200MHz DDR Octal NOR (MT35X)
x8 166MHz SDR Twin Quad Serial NOR (MT25T)
x4 166MHz SDR 83MHz DDR Serial NOR (MT25Q) 18V
x4 133MHz SPI NAND
x8 NAND ONFI 30
x8 eMMC 45
x8 eMMC 50
+
+
CacheLine Fills
BOOT or Read time at 400MBsBit density 512Mb 1Gb 2GbByte density 64MB 128MB 256MBTime to read 16 sec 32 sec 64 sec
Graphic image read 2Bytes (65K colors)Pixel Size 1K x 1K 4K x 4KByte density 2MB 34MBTime to read 52ms 88ms
Xccelatrade FlashHighest Performance
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc
eMMC Fully Managed NANDPROVIDES REDUCED DESIGN EFFORT FOR MINIMAL COST
NAND
Wear leveling
ECC
Driver
NAND Controller
Raw NAND
ONFI NAND bus
CommandBlock Management
Low-level Driver
NAND Controller
Fully Managed NAND (eMMC)
MMC SATA or USB bus
NAND
Wear leveling CMDBlock
Mgmt NAND Error Mgmt
Controller
eMMC eUSBSATA amp CF
Cost amp Price
Ease of design amp Validation
27 June 15 2018
copy 2017 Micron Technology Inc
eMMC
28 June 15 2018
copy 2017 Micron Technology Inc
Enjoy Micron Automotive eMMC comprehensive Product Portfolio
PCIe NVMeUFS 2x
June 15 2018
copy 2017 Micron Technology Inc
New Features in eMMC 51
| June 15 201830
copy 2017 Micron Technology Inc
SSD Form FactorsEXISTING AND FUTURE DIRECTIONS
FORM FACTORSndash 25rdquo
ndash mSATA
ndash M2
ndash uBGA (Future)
INTERFACESndash SATA III
ndash PCIe
YEARLY FIRMWARE UPDATES
| June 15 201831
Parameter 25rdquo mSATA M2Capacities (GB) 60120240 60120240 120240
Specification EIA-720 MO-300B variation A PCIe M2 Spec Rev 10Dimensions (L) 10045mm
(W) 6985mm (H) 7mm
(L) 5080mm(W) 2985mm(H) 375mm
(L) 60 mm(W) 22 mm(H) 15 mm
Weight lt 70g lt 10g lt 10 g
Packaging MCP (Multi Chip Package)PoP (Package on Package)
copy 2017 Micron Technology Inc
What is an eMCPePoP
Benefits includehellipndash Board space savings through vertical stacking of several memory chips
ndash Minimize bill of materials for simplified manufacturing and cost savings
ndash High density low power consumption shortest interconnections possible
ndash Accelerated time to market through rapid integration of modules
ApplicationProcessor -Driver
MLC NAND
eMMC
PCB
LPDRAM
Controller
POP
Application Processor -Driver
SLC NAND
NAND MCP
LPDRAM
Printed Circuit Board (PCB)
ApplicationProcessor -Driver
eMMCePOPLPDRAM
ApplicationProcessor -Driver
eMMC
eMCP
LPDRAM
PCBPCB
eMCP is a Multi Chip Package including eMMC and LPDDRx
ePoP is an eMCP in a PoP (Package on Package) design
June 15 2018
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Power Calculatorshttpswwwmicroncomsupporttools-and-utilitiespower-calc
| June 15 201834
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Technical Notesndash httpswwwmicroncomadvanced
searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=ampshow=10ampfamily=2dd96f4ee22e4de7b7027e6dd6a2718campnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201835
copy 2017 Micron Technology Inc
Links to Micronrsquos NOR Flash Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=1f8cfba0d95c4ea9a6c99e3272fd0e39ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201836
copy 2017 Micron Technology Inc
Link to Micronrsquos eMMC Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=ff04c268087d4d33a126d6a5a59ccebdamptechnology=9b8d2c45520a422c8f635832d3a2b0eaampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201837
copy 2017 Micron Technology Inc
Link to Micronrsquos SSD Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=59b6cc75486a4bca80f5b1b8a2086740ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201838
copy 2017 Micron Technology Inc
Micronrsquos Segment Product Focus
| June 15 20183
Auto
Consumer
Connected Home
Industrial
Mobile Embedded Storage Compute ampNetworking
Business Units
NOR Flashbull Parallel NORbull Serial (Q-SPI Twin Quad XccelaTM Octal SPI)
DRAMbull SDRDDR (DDR2 3 4)bull LPSDRLPDDR (LPDDR2 LPDDR4)
NAND Flashbull SLC NAND MLC NAND
eMMCtrade 45 50 51
SSD SATA PCIeNVMe
MCP
Compatibility Guideshttpswwwmicroncomsolutionsmicron-valued-partner-programchipset-partnernxp
copy 2017 Micron Technology Inc
Compatibility Guides (Pages 1 amp 2 of 8)
| June 15 20185
copy 2017 Micron Technology Inc
Compatibility Guides (Pages 3 amp 4 of 8)
| June 15 20186
copy 2017 Micron Technology Inc
Compatibility Guides (Pages 5 amp 6 of 8)
| June 15 20187
copy 2017 Micron Technology Inc
Compatibility Guides (Pages 7 amp 8 of 8)
| June 15 20188
copy 2017 Micron Technology Inc
iMX8 Quad Max
| June 15 20189
iMX8 QM Features Micronrsquos bull LPDDR4 (up to 8GB)bull XccelaTM Octal Flash Q-SPIbull 32GB eMMC50 (back side)
Board photo of released MX8 Quad Max
copy 2017 Micron Technology Inc
iMX8 Quad X Plus
| June 15 201810
iMX8 QXP Features Micronrsquos bull LPDDR4 (up to 8GB)bull XccelaTM Octal Flash Q-SPIbull 32GB eMMC50 (back side)
Board photo of released MX8 Quad X Plus
copy 2017 Micron Technology Inc
iMX8 M
| June 15 201811 | Micron Confidential
iMX8 M has validated Micronrsquos bull 3GB LPDDR4bull 256MbQuad SPIbull 16GB eMMC50
Quad SPI FlashMT25QL256ABA1EW9-0SIT
3GB LPDDR4 MT53B768M32D4NQ-062 WTB
16GB eMMCMTFC16GAKAECN-2M WT
Board photo of released MX8 M
DRAM Flash Market Section
copy 2017 Micron Technology Inc
DRAM Market Trends General Market vs Automotive Adoption
| June 15 201813
General Market
ndash DDR is the dominant interface for devices without batteries
ndash Increased LPDRAM adoption outside of mobile handsets driven by Tablets amp other Client apps
ndash DDR5LPDDR5 adoption projected to start in late CYrsquo19
Automotive
ndash Continued need for legacy support
ndash DDR3 is the primary choice for current gen low cost Infotainment and Cluster applications
ndash LPDDR4 will be the primary choice for next gen ADAS and high-end Infotainment applications
DDR2DDR3
DDR4
DDR5
LPDDR2LPDDR3
LPDDR4
LPDDR5GDDR55X GDDR6OtherLegacy
0
10
20
30
40
50
60
70
80
90
100
Source Micron Market Models
copy 2017 Micron Technology Inc
DRAM Market Trends General Market vs IMM
| June 15 201814
General Marketndash DDR is the dominant interface for devices
without batteries
ndash Increased LPDRAM adoption outside of mobile handsets driven by Tablets amp other Client apps
ndash DDR5LPDDR5 adoption projected to start in late CYrsquo19
Industrial Multi-Market (IMM)ndash Continued need for legacy support in both
DRAM and LPDRAM with a wide mix of technologies
ndash DRAM modules in Industrial Automation drive bulk of DDR4 adoption
ndash Strong LP adoption for battery driven applications LPDDR4 is gaining traction
in
1G
b eq
uiva
lent
s
DDR4
DDR3
LPDDR5
GDDR
DDR2
LPDDR2
General MarketOther
LPDDR4xLPDDR3
DDR5
Source Micron Marketing (Marchrsquo17)
DDR2DDR3
DDR4
DDR5
LPDDR2LPDDR3
LPDDR4
LPDDR5GDDR55X GDDR6OtherLegacy
0
10
20
30
40
50
60
70
80
90
100
Source Micron Market Models
copy 2017 Micron Technology Inc
Broad NVM Market Growth Dynamics
15
Continued strong deployment of eMMC ndash Broader embedded markets
UFS driven by mobilendash Higher performance density
Strong market momentum for PCIe ndash Essential performance driven applications
Source Micron market models
Managed NAND TAM Units ()
0
20
40
60
80
100
CY2017 CY2018 CY2019 CY2020
eMMC
UFS
PCIe
Others
copy 2017 Micron Technology Inc
Explosive Demand for Memory with Autonomous Driving
16
L5 expected to need gt1TB storage
Includes IVI Cluster Central amp Boot storage for autonomous Black Box Recording Source Micron Marketing
Density
0
500
1000
1500
2000
L1L2 L3 L4 L5
eMMC
UFS 21
UFS 30PCIe Gen 3 x2
PCIe x4
Storage Density Progression
eMMC
3000MBs
1600MBs
Seq Reads
800MBs
320MBs
Technical Details
copy 2017 Micron Technology Inc
LPDDRx and DDRx SDRAM Feature Comparison
| June 15 201818
Type LPDDR2 LPDDR3 LPDDR44X DDR2 DDR3DDR3L DDR4Die Density Up to 8Gb Up to 32Gb Up to 32Gb Up to 2Gb Up to 8Gb Up to 16Gb (128Gb 8H)
Core Voltage (Vdd) 12V 18V WL supply req
12V18V WL supply req
11V10V18V WL supply req
18V155V 15V135V
12VSeparate WL supply
25VIO Voltage 12V 12V 11V (4X = 06V) Same as VDD Same as VDD Same as VDD
Max Clock Freq Data rate 533MHzDDR1066 800MHzDDR1600 2133MHzDDR4267 533MHzDDR1066 1066MHzDDR2100 1600MHz+DDR3200+
Burst Lengths 4 8 16 8 16 32 4 8 BC4 8 BC4 8Configurations x16 x32 x16 x32 2Ch x16 x4 x8 x16 x4 x8 x16 x4 x8 x16
Address Command Signals
14 pins(Muxrsquod command
address)
14 pins(Muxrsquod command
address)
10 pins per channel(Muxrsquod command
Address)25 pins 27 pins 29 pins
(partial muxrsquod)
Address Command Data Rate
DDR(both rising and
falling edges of clock)
DDR (both rising and
falling edges of clock)
SDR(rising edge of clock
only)
SDR(rising edge of clock
only)
SDR(rising edge of
clock only)
SDR (rising edge of clock
only)
On Die Temperature Sensor Yes Yes Yes No OptionalRS Yes
DPD (Deep power-down mode) Yes Yes No No No No
Package Options POP MCP discrete POP MCP discrete PoP MCP discrete Discrete Discrete Discrete
ProductTemp Grades CT IT AIT AT AAT CT IT AIT AT AATWT (-25rsquo to 85rsquoC)
AAT (-40C to 105C)AUT (-40rsquoC to 125rsquoC)
CT IT AIT AT AAT CT IT AIT AT AAT AUT CT IT AIT AT AAT AUT
copy 2017 Micron Technology Inc | June 15 201819
Standard DRAM LPDRAM Form Factor Center bond pads for highest performance and lowest
costEdge bond pads allow for stacked die for MCP and PoP
packaging enabling compact form factors
Performance x4 x8 x16 is lower cost and supports higher density configurations
x32 allows system to support high bandwidthin point-to-point applications
DRAMpower
IDD specifications are geared towards moderate stand-by power providing the highest yields and lowest cost
Ultra low standby power enabled by on-die power management and long refresh rates
Systempower
Additional Delay Locked Loop (DLL) circuitry required for high performance which inhibits system power
savings
Lack of DLL circuitry allows for improved system power management System can enterexit power-down modes
as well as throttle or stop the clock
Key Takeaway
Optimized for cost and performancecost is primary feature
Optimized for battery life and portability low power amp smallest possible footprint are primary features
LPDD
R4 S
peci
fic In
foG
ener
al LP
vs
DD
R Co
mpa
rison
LPDRAM offers additional value over standard DRAM
Standard DRAM amp LPDRAM Trade Offs
copy 2017 Micron Technology Inc20
DRAM Performance Improvements Over Time (IO x16)
0
5
10
15
20
25
30
35
40
45
50
55
2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016 2017
Gbs
DDR2
DDR2-53385 Gbs
DDR2-667106 Gbs
DDR2-800128 Gbs
DDR3-106617 Gbs
DDR3-1333213 Gbs
DDR3-1600256 Gbs
DDR3-186630 Gbs
DDR4-213334 Gbs
DDR4-2400384 Gbs
DDR4-2666427 Gbs
DDR4-3200512 Gbs
DDR3
DDR4
June 15 2018
copy 2017 Micron Technology Inc21
0
20
40
60
80
100
120
140
160
2010 2011 2012 2013 2014 2015 2016 2017 2018
LPDDR2-800256 Gbs
LPDDR2-10663411 Gbs
LPDDR2LPDDR3-1600
512 Gbs
LPDDR3-1866 59712 Gbs
LPDDR3
LPDDR4-37331194 Gbs
LPDDR4-426613651 Gbs
LPDDR4
LPDDR4-32001024 Gbs
Gbs
LPDDR Performance Improvements Over Time (IO x32)
LPDDR4-32001024 Gbs
June 15 2018
Non-Volatile Details
copy 2017 Micron Technology Inc | June 15 201823
Xccelatrade Flash Best of Parallel and Serial NOR Flash
Compared to Page Mode Parallel NOR
5X THE PERFORMANCE 4X FEWER PINS 3X LESS ENERGY AND 2X SMALLER PACKAGE
512MbParallel NOR
MT28EW
512MbQuad-SPIMT25Q
512MbTwin-Quad
MT25T
512MbXccela Flash
MT35X
Bandwidth 80MBs(Page mode async x16)
90MBs(90MHz DDR mode)
180MBs(90MHz DDR mode)
400MBs(200MHz DDR mode)
Initial WordAccess Time 95ns (x16) 139ns (18V 4-bit)
157ns (18V 16-bits)139ns (18V 8-bit)145ns (18V 16-bit)
85ns (18V 8-bit)875ns (18V 16-bit)
Subsequent Word Access
20ns (16-bits)(95ns across 32B page)
6ns (4-bits)24ns (16-bits)
6ns (8-bits)12ns (16-bits)
25ns (8-bits)5ns (16-bits)
Package and Pins 64-TBGA (11x13mm)50 Active Pins
24-BGA (6x8mm)6 Active Pins
24-BGA (6x8mm)11 Active Pins
24-BGA (6x8mm)11 Active Pins
Energy Per Bit 101 pJbit 41 pJbit 41 pJbit 28 pJbit
Xccelatrade Flash(MT35X)
Parallel NOR FlashHigh performance
Fast bootReliability
Serial NOR FlashReduced pin countsSimple PCB design
ReliabilityNeed more
performance with same package
Want reduced pin countpackage size
Source Micron datasheets
copy 2017 Micron Technology Inc
MT35X (Octal) aka
24
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc
The Evolution of SPI
25
SPI Dual-SPI Quad-SPI Twin Quad Octal of Signals 6 6 6 10-12 11
Clock (max) 75MHz 75MHz 180MHz SDR (90MHz DDR) 180MHz SDR (90MHz DDR) 166MHz SDR (200MHz DDR)
Bandwidth (max) 9MBs 18MBs 90MBs 180MBs 400MBs
0 MBs
50 MBs
100 MBs
150 MBs
200 MBs
250 MBs
300 MBs
350 MBs
400 MBs
450 MBs
500 MBs
1997 2006 2016
SPI Interface Bandwidth
Dual-IO18MBs
Quad (SDR)40MBs
Twin-Quad 180MBs
Octal 400MBs
Quad (DDR) 90MBs
125MBs 9MBs
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc26
Micron Read Performance Comparisons
0
50
100
150
200
250
300
350
400
450
1 2 4 8 16 32 64 128 256 512 1k 2k 4k 8k 16k 32k 64k 128k 256k 512k 1M 2M
Tran
sfer
Rat
e (M
Byt
ess
ec)
Bytes per Fetch
NOR and NAND Performance Comparisons Random Read Access Performance vs Data Size
x8 200MHz DDR Octal NOR (MT35X)
x8 166MHz SDR Twin Quad Serial NOR (MT25T)
x4 166MHz SDR 83MHz DDR Serial NOR (MT25Q) 18V
x4 133MHz SPI NAND
x8 NAND ONFI 30
x8 eMMC 45
x8 eMMC 50
+
+
CacheLine Fills
BOOT or Read time at 400MBsBit density 512Mb 1Gb 2GbByte density 64MB 128MB 256MBTime to read 16 sec 32 sec 64 sec
Graphic image read 2Bytes (65K colors)Pixel Size 1K x 1K 4K x 4KByte density 2MB 34MBTime to read 52ms 88ms
Xccelatrade FlashHighest Performance
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc
eMMC Fully Managed NANDPROVIDES REDUCED DESIGN EFFORT FOR MINIMAL COST
NAND
Wear leveling
ECC
Driver
NAND Controller
Raw NAND
ONFI NAND bus
CommandBlock Management
Low-level Driver
NAND Controller
Fully Managed NAND (eMMC)
MMC SATA or USB bus
NAND
Wear leveling CMDBlock
Mgmt NAND Error Mgmt
Controller
eMMC eUSBSATA amp CF
Cost amp Price
Ease of design amp Validation
27 June 15 2018
copy 2017 Micron Technology Inc
eMMC
28 June 15 2018
copy 2017 Micron Technology Inc
Enjoy Micron Automotive eMMC comprehensive Product Portfolio
PCIe NVMeUFS 2x
June 15 2018
copy 2017 Micron Technology Inc
New Features in eMMC 51
| June 15 201830
copy 2017 Micron Technology Inc
SSD Form FactorsEXISTING AND FUTURE DIRECTIONS
FORM FACTORSndash 25rdquo
ndash mSATA
ndash M2
ndash uBGA (Future)
INTERFACESndash SATA III
ndash PCIe
YEARLY FIRMWARE UPDATES
| June 15 201831
Parameter 25rdquo mSATA M2Capacities (GB) 60120240 60120240 120240
Specification EIA-720 MO-300B variation A PCIe M2 Spec Rev 10Dimensions (L) 10045mm
(W) 6985mm (H) 7mm
(L) 5080mm(W) 2985mm(H) 375mm
(L) 60 mm(W) 22 mm(H) 15 mm
Weight lt 70g lt 10g lt 10 g
Packaging MCP (Multi Chip Package)PoP (Package on Package)
copy 2017 Micron Technology Inc
What is an eMCPePoP
Benefits includehellipndash Board space savings through vertical stacking of several memory chips
ndash Minimize bill of materials for simplified manufacturing and cost savings
ndash High density low power consumption shortest interconnections possible
ndash Accelerated time to market through rapid integration of modules
ApplicationProcessor -Driver
MLC NAND
eMMC
PCB
LPDRAM
Controller
POP
Application Processor -Driver
SLC NAND
NAND MCP
LPDRAM
Printed Circuit Board (PCB)
ApplicationProcessor -Driver
eMMCePOPLPDRAM
ApplicationProcessor -Driver
eMMC
eMCP
LPDRAM
PCBPCB
eMCP is a Multi Chip Package including eMMC and LPDDRx
ePoP is an eMCP in a PoP (Package on Package) design
June 15 2018
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Power Calculatorshttpswwwmicroncomsupporttools-and-utilitiespower-calc
| June 15 201834
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Technical Notesndash httpswwwmicroncomadvanced
searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=ampshow=10ampfamily=2dd96f4ee22e4de7b7027e6dd6a2718campnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201835
copy 2017 Micron Technology Inc
Links to Micronrsquos NOR Flash Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=1f8cfba0d95c4ea9a6c99e3272fd0e39ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201836
copy 2017 Micron Technology Inc
Link to Micronrsquos eMMC Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=ff04c268087d4d33a126d6a5a59ccebdamptechnology=9b8d2c45520a422c8f635832d3a2b0eaampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201837
copy 2017 Micron Technology Inc
Link to Micronrsquos SSD Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=59b6cc75486a4bca80f5b1b8a2086740ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201838
Compatibility Guideshttpswwwmicroncomsolutionsmicron-valued-partner-programchipset-partnernxp
copy 2017 Micron Technology Inc
Compatibility Guides (Pages 1 amp 2 of 8)
| June 15 20185
copy 2017 Micron Technology Inc
Compatibility Guides (Pages 3 amp 4 of 8)
| June 15 20186
copy 2017 Micron Technology Inc
Compatibility Guides (Pages 5 amp 6 of 8)
| June 15 20187
copy 2017 Micron Technology Inc
Compatibility Guides (Pages 7 amp 8 of 8)
| June 15 20188
copy 2017 Micron Technology Inc
iMX8 Quad Max
| June 15 20189
iMX8 QM Features Micronrsquos bull LPDDR4 (up to 8GB)bull XccelaTM Octal Flash Q-SPIbull 32GB eMMC50 (back side)
Board photo of released MX8 Quad Max
copy 2017 Micron Technology Inc
iMX8 Quad X Plus
| June 15 201810
iMX8 QXP Features Micronrsquos bull LPDDR4 (up to 8GB)bull XccelaTM Octal Flash Q-SPIbull 32GB eMMC50 (back side)
Board photo of released MX8 Quad X Plus
copy 2017 Micron Technology Inc
iMX8 M
| June 15 201811 | Micron Confidential
iMX8 M has validated Micronrsquos bull 3GB LPDDR4bull 256MbQuad SPIbull 16GB eMMC50
Quad SPI FlashMT25QL256ABA1EW9-0SIT
3GB LPDDR4 MT53B768M32D4NQ-062 WTB
16GB eMMCMTFC16GAKAECN-2M WT
Board photo of released MX8 M
DRAM Flash Market Section
copy 2017 Micron Technology Inc
DRAM Market Trends General Market vs Automotive Adoption
| June 15 201813
General Market
ndash DDR is the dominant interface for devices without batteries
ndash Increased LPDRAM adoption outside of mobile handsets driven by Tablets amp other Client apps
ndash DDR5LPDDR5 adoption projected to start in late CYrsquo19
Automotive
ndash Continued need for legacy support
ndash DDR3 is the primary choice for current gen low cost Infotainment and Cluster applications
ndash LPDDR4 will be the primary choice for next gen ADAS and high-end Infotainment applications
DDR2DDR3
DDR4
DDR5
LPDDR2LPDDR3
LPDDR4
LPDDR5GDDR55X GDDR6OtherLegacy
0
10
20
30
40
50
60
70
80
90
100
Source Micron Market Models
copy 2017 Micron Technology Inc
DRAM Market Trends General Market vs IMM
| June 15 201814
General Marketndash DDR is the dominant interface for devices
without batteries
ndash Increased LPDRAM adoption outside of mobile handsets driven by Tablets amp other Client apps
ndash DDR5LPDDR5 adoption projected to start in late CYrsquo19
Industrial Multi-Market (IMM)ndash Continued need for legacy support in both
DRAM and LPDRAM with a wide mix of technologies
ndash DRAM modules in Industrial Automation drive bulk of DDR4 adoption
ndash Strong LP adoption for battery driven applications LPDDR4 is gaining traction
in
1G
b eq
uiva
lent
s
DDR4
DDR3
LPDDR5
GDDR
DDR2
LPDDR2
General MarketOther
LPDDR4xLPDDR3
DDR5
Source Micron Marketing (Marchrsquo17)
DDR2DDR3
DDR4
DDR5
LPDDR2LPDDR3
LPDDR4
LPDDR5GDDR55X GDDR6OtherLegacy
0
10
20
30
40
50
60
70
80
90
100
Source Micron Market Models
copy 2017 Micron Technology Inc
Broad NVM Market Growth Dynamics
15
Continued strong deployment of eMMC ndash Broader embedded markets
UFS driven by mobilendash Higher performance density
Strong market momentum for PCIe ndash Essential performance driven applications
Source Micron market models
Managed NAND TAM Units ()
0
20
40
60
80
100
CY2017 CY2018 CY2019 CY2020
eMMC
UFS
PCIe
Others
copy 2017 Micron Technology Inc
Explosive Demand for Memory with Autonomous Driving
16
L5 expected to need gt1TB storage
Includes IVI Cluster Central amp Boot storage for autonomous Black Box Recording Source Micron Marketing
Density
0
500
1000
1500
2000
L1L2 L3 L4 L5
eMMC
UFS 21
UFS 30PCIe Gen 3 x2
PCIe x4
Storage Density Progression
eMMC
3000MBs
1600MBs
Seq Reads
800MBs
320MBs
Technical Details
copy 2017 Micron Technology Inc
LPDDRx and DDRx SDRAM Feature Comparison
| June 15 201818
Type LPDDR2 LPDDR3 LPDDR44X DDR2 DDR3DDR3L DDR4Die Density Up to 8Gb Up to 32Gb Up to 32Gb Up to 2Gb Up to 8Gb Up to 16Gb (128Gb 8H)
Core Voltage (Vdd) 12V 18V WL supply req
12V18V WL supply req
11V10V18V WL supply req
18V155V 15V135V
12VSeparate WL supply
25VIO Voltage 12V 12V 11V (4X = 06V) Same as VDD Same as VDD Same as VDD
Max Clock Freq Data rate 533MHzDDR1066 800MHzDDR1600 2133MHzDDR4267 533MHzDDR1066 1066MHzDDR2100 1600MHz+DDR3200+
Burst Lengths 4 8 16 8 16 32 4 8 BC4 8 BC4 8Configurations x16 x32 x16 x32 2Ch x16 x4 x8 x16 x4 x8 x16 x4 x8 x16
Address Command Signals
14 pins(Muxrsquod command
address)
14 pins(Muxrsquod command
address)
10 pins per channel(Muxrsquod command
Address)25 pins 27 pins 29 pins
(partial muxrsquod)
Address Command Data Rate
DDR(both rising and
falling edges of clock)
DDR (both rising and
falling edges of clock)
SDR(rising edge of clock
only)
SDR(rising edge of clock
only)
SDR(rising edge of
clock only)
SDR (rising edge of clock
only)
On Die Temperature Sensor Yes Yes Yes No OptionalRS Yes
DPD (Deep power-down mode) Yes Yes No No No No
Package Options POP MCP discrete POP MCP discrete PoP MCP discrete Discrete Discrete Discrete
ProductTemp Grades CT IT AIT AT AAT CT IT AIT AT AATWT (-25rsquo to 85rsquoC)
AAT (-40C to 105C)AUT (-40rsquoC to 125rsquoC)
CT IT AIT AT AAT CT IT AIT AT AAT AUT CT IT AIT AT AAT AUT
copy 2017 Micron Technology Inc | June 15 201819
Standard DRAM LPDRAM Form Factor Center bond pads for highest performance and lowest
costEdge bond pads allow for stacked die for MCP and PoP
packaging enabling compact form factors
Performance x4 x8 x16 is lower cost and supports higher density configurations
x32 allows system to support high bandwidthin point-to-point applications
DRAMpower
IDD specifications are geared towards moderate stand-by power providing the highest yields and lowest cost
Ultra low standby power enabled by on-die power management and long refresh rates
Systempower
Additional Delay Locked Loop (DLL) circuitry required for high performance which inhibits system power
savings
Lack of DLL circuitry allows for improved system power management System can enterexit power-down modes
as well as throttle or stop the clock
Key Takeaway
Optimized for cost and performancecost is primary feature
Optimized for battery life and portability low power amp smallest possible footprint are primary features
LPDD
R4 S
peci
fic In
foG
ener
al LP
vs
DD
R Co
mpa
rison
LPDRAM offers additional value over standard DRAM
Standard DRAM amp LPDRAM Trade Offs
copy 2017 Micron Technology Inc20
DRAM Performance Improvements Over Time (IO x16)
0
5
10
15
20
25
30
35
40
45
50
55
2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016 2017
Gbs
DDR2
DDR2-53385 Gbs
DDR2-667106 Gbs
DDR2-800128 Gbs
DDR3-106617 Gbs
DDR3-1333213 Gbs
DDR3-1600256 Gbs
DDR3-186630 Gbs
DDR4-213334 Gbs
DDR4-2400384 Gbs
DDR4-2666427 Gbs
DDR4-3200512 Gbs
DDR3
DDR4
June 15 2018
copy 2017 Micron Technology Inc21
0
20
40
60
80
100
120
140
160
2010 2011 2012 2013 2014 2015 2016 2017 2018
LPDDR2-800256 Gbs
LPDDR2-10663411 Gbs
LPDDR2LPDDR3-1600
512 Gbs
LPDDR3-1866 59712 Gbs
LPDDR3
LPDDR4-37331194 Gbs
LPDDR4-426613651 Gbs
LPDDR4
LPDDR4-32001024 Gbs
Gbs
LPDDR Performance Improvements Over Time (IO x32)
LPDDR4-32001024 Gbs
June 15 2018
Non-Volatile Details
copy 2017 Micron Technology Inc | June 15 201823
Xccelatrade Flash Best of Parallel and Serial NOR Flash
Compared to Page Mode Parallel NOR
5X THE PERFORMANCE 4X FEWER PINS 3X LESS ENERGY AND 2X SMALLER PACKAGE
512MbParallel NOR
MT28EW
512MbQuad-SPIMT25Q
512MbTwin-Quad
MT25T
512MbXccela Flash
MT35X
Bandwidth 80MBs(Page mode async x16)
90MBs(90MHz DDR mode)
180MBs(90MHz DDR mode)
400MBs(200MHz DDR mode)
Initial WordAccess Time 95ns (x16) 139ns (18V 4-bit)
157ns (18V 16-bits)139ns (18V 8-bit)145ns (18V 16-bit)
85ns (18V 8-bit)875ns (18V 16-bit)
Subsequent Word Access
20ns (16-bits)(95ns across 32B page)
6ns (4-bits)24ns (16-bits)
6ns (8-bits)12ns (16-bits)
25ns (8-bits)5ns (16-bits)
Package and Pins 64-TBGA (11x13mm)50 Active Pins
24-BGA (6x8mm)6 Active Pins
24-BGA (6x8mm)11 Active Pins
24-BGA (6x8mm)11 Active Pins
Energy Per Bit 101 pJbit 41 pJbit 41 pJbit 28 pJbit
Xccelatrade Flash(MT35X)
Parallel NOR FlashHigh performance
Fast bootReliability
Serial NOR FlashReduced pin countsSimple PCB design
ReliabilityNeed more
performance with same package
Want reduced pin countpackage size
Source Micron datasheets
copy 2017 Micron Technology Inc
MT35X (Octal) aka
24
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc
The Evolution of SPI
25
SPI Dual-SPI Quad-SPI Twin Quad Octal of Signals 6 6 6 10-12 11
Clock (max) 75MHz 75MHz 180MHz SDR (90MHz DDR) 180MHz SDR (90MHz DDR) 166MHz SDR (200MHz DDR)
Bandwidth (max) 9MBs 18MBs 90MBs 180MBs 400MBs
0 MBs
50 MBs
100 MBs
150 MBs
200 MBs
250 MBs
300 MBs
350 MBs
400 MBs
450 MBs
500 MBs
1997 2006 2016
SPI Interface Bandwidth
Dual-IO18MBs
Quad (SDR)40MBs
Twin-Quad 180MBs
Octal 400MBs
Quad (DDR) 90MBs
125MBs 9MBs
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc26
Micron Read Performance Comparisons
0
50
100
150
200
250
300
350
400
450
1 2 4 8 16 32 64 128 256 512 1k 2k 4k 8k 16k 32k 64k 128k 256k 512k 1M 2M
Tran
sfer
Rat
e (M
Byt
ess
ec)
Bytes per Fetch
NOR and NAND Performance Comparisons Random Read Access Performance vs Data Size
x8 200MHz DDR Octal NOR (MT35X)
x8 166MHz SDR Twin Quad Serial NOR (MT25T)
x4 166MHz SDR 83MHz DDR Serial NOR (MT25Q) 18V
x4 133MHz SPI NAND
x8 NAND ONFI 30
x8 eMMC 45
x8 eMMC 50
+
+
CacheLine Fills
BOOT or Read time at 400MBsBit density 512Mb 1Gb 2GbByte density 64MB 128MB 256MBTime to read 16 sec 32 sec 64 sec
Graphic image read 2Bytes (65K colors)Pixel Size 1K x 1K 4K x 4KByte density 2MB 34MBTime to read 52ms 88ms
Xccelatrade FlashHighest Performance
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc
eMMC Fully Managed NANDPROVIDES REDUCED DESIGN EFFORT FOR MINIMAL COST
NAND
Wear leveling
ECC
Driver
NAND Controller
Raw NAND
ONFI NAND bus
CommandBlock Management
Low-level Driver
NAND Controller
Fully Managed NAND (eMMC)
MMC SATA or USB bus
NAND
Wear leveling CMDBlock
Mgmt NAND Error Mgmt
Controller
eMMC eUSBSATA amp CF
Cost amp Price
Ease of design amp Validation
27 June 15 2018
copy 2017 Micron Technology Inc
eMMC
28 June 15 2018
copy 2017 Micron Technology Inc
Enjoy Micron Automotive eMMC comprehensive Product Portfolio
PCIe NVMeUFS 2x
June 15 2018
copy 2017 Micron Technology Inc
New Features in eMMC 51
| June 15 201830
copy 2017 Micron Technology Inc
SSD Form FactorsEXISTING AND FUTURE DIRECTIONS
FORM FACTORSndash 25rdquo
ndash mSATA
ndash M2
ndash uBGA (Future)
INTERFACESndash SATA III
ndash PCIe
YEARLY FIRMWARE UPDATES
| June 15 201831
Parameter 25rdquo mSATA M2Capacities (GB) 60120240 60120240 120240
Specification EIA-720 MO-300B variation A PCIe M2 Spec Rev 10Dimensions (L) 10045mm
(W) 6985mm (H) 7mm
(L) 5080mm(W) 2985mm(H) 375mm
(L) 60 mm(W) 22 mm(H) 15 mm
Weight lt 70g lt 10g lt 10 g
Packaging MCP (Multi Chip Package)PoP (Package on Package)
copy 2017 Micron Technology Inc
What is an eMCPePoP
Benefits includehellipndash Board space savings through vertical stacking of several memory chips
ndash Minimize bill of materials for simplified manufacturing and cost savings
ndash High density low power consumption shortest interconnections possible
ndash Accelerated time to market through rapid integration of modules
ApplicationProcessor -Driver
MLC NAND
eMMC
PCB
LPDRAM
Controller
POP
Application Processor -Driver
SLC NAND
NAND MCP
LPDRAM
Printed Circuit Board (PCB)
ApplicationProcessor -Driver
eMMCePOPLPDRAM
ApplicationProcessor -Driver
eMMC
eMCP
LPDRAM
PCBPCB
eMCP is a Multi Chip Package including eMMC and LPDDRx
ePoP is an eMCP in a PoP (Package on Package) design
June 15 2018
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Power Calculatorshttpswwwmicroncomsupporttools-and-utilitiespower-calc
| June 15 201834
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Technical Notesndash httpswwwmicroncomadvanced
searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=ampshow=10ampfamily=2dd96f4ee22e4de7b7027e6dd6a2718campnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201835
copy 2017 Micron Technology Inc
Links to Micronrsquos NOR Flash Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=1f8cfba0d95c4ea9a6c99e3272fd0e39ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201836
copy 2017 Micron Technology Inc
Link to Micronrsquos eMMC Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=ff04c268087d4d33a126d6a5a59ccebdamptechnology=9b8d2c45520a422c8f635832d3a2b0eaampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201837
copy 2017 Micron Technology Inc
Link to Micronrsquos SSD Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=59b6cc75486a4bca80f5b1b8a2086740ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201838
copy 2017 Micron Technology Inc
Compatibility Guides (Pages 1 amp 2 of 8)
| June 15 20185
copy 2017 Micron Technology Inc
Compatibility Guides (Pages 3 amp 4 of 8)
| June 15 20186
copy 2017 Micron Technology Inc
Compatibility Guides (Pages 5 amp 6 of 8)
| June 15 20187
copy 2017 Micron Technology Inc
Compatibility Guides (Pages 7 amp 8 of 8)
| June 15 20188
copy 2017 Micron Technology Inc
iMX8 Quad Max
| June 15 20189
iMX8 QM Features Micronrsquos bull LPDDR4 (up to 8GB)bull XccelaTM Octal Flash Q-SPIbull 32GB eMMC50 (back side)
Board photo of released MX8 Quad Max
copy 2017 Micron Technology Inc
iMX8 Quad X Plus
| June 15 201810
iMX8 QXP Features Micronrsquos bull LPDDR4 (up to 8GB)bull XccelaTM Octal Flash Q-SPIbull 32GB eMMC50 (back side)
Board photo of released MX8 Quad X Plus
copy 2017 Micron Technology Inc
iMX8 M
| June 15 201811 | Micron Confidential
iMX8 M has validated Micronrsquos bull 3GB LPDDR4bull 256MbQuad SPIbull 16GB eMMC50
Quad SPI FlashMT25QL256ABA1EW9-0SIT
3GB LPDDR4 MT53B768M32D4NQ-062 WTB
16GB eMMCMTFC16GAKAECN-2M WT
Board photo of released MX8 M
DRAM Flash Market Section
copy 2017 Micron Technology Inc
DRAM Market Trends General Market vs Automotive Adoption
| June 15 201813
General Market
ndash DDR is the dominant interface for devices without batteries
ndash Increased LPDRAM adoption outside of mobile handsets driven by Tablets amp other Client apps
ndash DDR5LPDDR5 adoption projected to start in late CYrsquo19
Automotive
ndash Continued need for legacy support
ndash DDR3 is the primary choice for current gen low cost Infotainment and Cluster applications
ndash LPDDR4 will be the primary choice for next gen ADAS and high-end Infotainment applications
DDR2DDR3
DDR4
DDR5
LPDDR2LPDDR3
LPDDR4
LPDDR5GDDR55X GDDR6OtherLegacy
0
10
20
30
40
50
60
70
80
90
100
Source Micron Market Models
copy 2017 Micron Technology Inc
DRAM Market Trends General Market vs IMM
| June 15 201814
General Marketndash DDR is the dominant interface for devices
without batteries
ndash Increased LPDRAM adoption outside of mobile handsets driven by Tablets amp other Client apps
ndash DDR5LPDDR5 adoption projected to start in late CYrsquo19
Industrial Multi-Market (IMM)ndash Continued need for legacy support in both
DRAM and LPDRAM with a wide mix of technologies
ndash DRAM modules in Industrial Automation drive bulk of DDR4 adoption
ndash Strong LP adoption for battery driven applications LPDDR4 is gaining traction
in
1G
b eq
uiva
lent
s
DDR4
DDR3
LPDDR5
GDDR
DDR2
LPDDR2
General MarketOther
LPDDR4xLPDDR3
DDR5
Source Micron Marketing (Marchrsquo17)
DDR2DDR3
DDR4
DDR5
LPDDR2LPDDR3
LPDDR4
LPDDR5GDDR55X GDDR6OtherLegacy
0
10
20
30
40
50
60
70
80
90
100
Source Micron Market Models
copy 2017 Micron Technology Inc
Broad NVM Market Growth Dynamics
15
Continued strong deployment of eMMC ndash Broader embedded markets
UFS driven by mobilendash Higher performance density
Strong market momentum for PCIe ndash Essential performance driven applications
Source Micron market models
Managed NAND TAM Units ()
0
20
40
60
80
100
CY2017 CY2018 CY2019 CY2020
eMMC
UFS
PCIe
Others
copy 2017 Micron Technology Inc
Explosive Demand for Memory with Autonomous Driving
16
L5 expected to need gt1TB storage
Includes IVI Cluster Central amp Boot storage for autonomous Black Box Recording Source Micron Marketing
Density
0
500
1000
1500
2000
L1L2 L3 L4 L5
eMMC
UFS 21
UFS 30PCIe Gen 3 x2
PCIe x4
Storage Density Progression
eMMC
3000MBs
1600MBs
Seq Reads
800MBs
320MBs
Technical Details
copy 2017 Micron Technology Inc
LPDDRx and DDRx SDRAM Feature Comparison
| June 15 201818
Type LPDDR2 LPDDR3 LPDDR44X DDR2 DDR3DDR3L DDR4Die Density Up to 8Gb Up to 32Gb Up to 32Gb Up to 2Gb Up to 8Gb Up to 16Gb (128Gb 8H)
Core Voltage (Vdd) 12V 18V WL supply req
12V18V WL supply req
11V10V18V WL supply req
18V155V 15V135V
12VSeparate WL supply
25VIO Voltage 12V 12V 11V (4X = 06V) Same as VDD Same as VDD Same as VDD
Max Clock Freq Data rate 533MHzDDR1066 800MHzDDR1600 2133MHzDDR4267 533MHzDDR1066 1066MHzDDR2100 1600MHz+DDR3200+
Burst Lengths 4 8 16 8 16 32 4 8 BC4 8 BC4 8Configurations x16 x32 x16 x32 2Ch x16 x4 x8 x16 x4 x8 x16 x4 x8 x16
Address Command Signals
14 pins(Muxrsquod command
address)
14 pins(Muxrsquod command
address)
10 pins per channel(Muxrsquod command
Address)25 pins 27 pins 29 pins
(partial muxrsquod)
Address Command Data Rate
DDR(both rising and
falling edges of clock)
DDR (both rising and
falling edges of clock)
SDR(rising edge of clock
only)
SDR(rising edge of clock
only)
SDR(rising edge of
clock only)
SDR (rising edge of clock
only)
On Die Temperature Sensor Yes Yes Yes No OptionalRS Yes
DPD (Deep power-down mode) Yes Yes No No No No
Package Options POP MCP discrete POP MCP discrete PoP MCP discrete Discrete Discrete Discrete
ProductTemp Grades CT IT AIT AT AAT CT IT AIT AT AATWT (-25rsquo to 85rsquoC)
AAT (-40C to 105C)AUT (-40rsquoC to 125rsquoC)
CT IT AIT AT AAT CT IT AIT AT AAT AUT CT IT AIT AT AAT AUT
copy 2017 Micron Technology Inc | June 15 201819
Standard DRAM LPDRAM Form Factor Center bond pads for highest performance and lowest
costEdge bond pads allow for stacked die for MCP and PoP
packaging enabling compact form factors
Performance x4 x8 x16 is lower cost and supports higher density configurations
x32 allows system to support high bandwidthin point-to-point applications
DRAMpower
IDD specifications are geared towards moderate stand-by power providing the highest yields and lowest cost
Ultra low standby power enabled by on-die power management and long refresh rates
Systempower
Additional Delay Locked Loop (DLL) circuitry required for high performance which inhibits system power
savings
Lack of DLL circuitry allows for improved system power management System can enterexit power-down modes
as well as throttle or stop the clock
Key Takeaway
Optimized for cost and performancecost is primary feature
Optimized for battery life and portability low power amp smallest possible footprint are primary features
LPDD
R4 S
peci
fic In
foG
ener
al LP
vs
DD
R Co
mpa
rison
LPDRAM offers additional value over standard DRAM
Standard DRAM amp LPDRAM Trade Offs
copy 2017 Micron Technology Inc20
DRAM Performance Improvements Over Time (IO x16)
0
5
10
15
20
25
30
35
40
45
50
55
2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016 2017
Gbs
DDR2
DDR2-53385 Gbs
DDR2-667106 Gbs
DDR2-800128 Gbs
DDR3-106617 Gbs
DDR3-1333213 Gbs
DDR3-1600256 Gbs
DDR3-186630 Gbs
DDR4-213334 Gbs
DDR4-2400384 Gbs
DDR4-2666427 Gbs
DDR4-3200512 Gbs
DDR3
DDR4
June 15 2018
copy 2017 Micron Technology Inc21
0
20
40
60
80
100
120
140
160
2010 2011 2012 2013 2014 2015 2016 2017 2018
LPDDR2-800256 Gbs
LPDDR2-10663411 Gbs
LPDDR2LPDDR3-1600
512 Gbs
LPDDR3-1866 59712 Gbs
LPDDR3
LPDDR4-37331194 Gbs
LPDDR4-426613651 Gbs
LPDDR4
LPDDR4-32001024 Gbs
Gbs
LPDDR Performance Improvements Over Time (IO x32)
LPDDR4-32001024 Gbs
June 15 2018
Non-Volatile Details
copy 2017 Micron Technology Inc | June 15 201823
Xccelatrade Flash Best of Parallel and Serial NOR Flash
Compared to Page Mode Parallel NOR
5X THE PERFORMANCE 4X FEWER PINS 3X LESS ENERGY AND 2X SMALLER PACKAGE
512MbParallel NOR
MT28EW
512MbQuad-SPIMT25Q
512MbTwin-Quad
MT25T
512MbXccela Flash
MT35X
Bandwidth 80MBs(Page mode async x16)
90MBs(90MHz DDR mode)
180MBs(90MHz DDR mode)
400MBs(200MHz DDR mode)
Initial WordAccess Time 95ns (x16) 139ns (18V 4-bit)
157ns (18V 16-bits)139ns (18V 8-bit)145ns (18V 16-bit)
85ns (18V 8-bit)875ns (18V 16-bit)
Subsequent Word Access
20ns (16-bits)(95ns across 32B page)
6ns (4-bits)24ns (16-bits)
6ns (8-bits)12ns (16-bits)
25ns (8-bits)5ns (16-bits)
Package and Pins 64-TBGA (11x13mm)50 Active Pins
24-BGA (6x8mm)6 Active Pins
24-BGA (6x8mm)11 Active Pins
24-BGA (6x8mm)11 Active Pins
Energy Per Bit 101 pJbit 41 pJbit 41 pJbit 28 pJbit
Xccelatrade Flash(MT35X)
Parallel NOR FlashHigh performance
Fast bootReliability
Serial NOR FlashReduced pin countsSimple PCB design
ReliabilityNeed more
performance with same package
Want reduced pin countpackage size
Source Micron datasheets
copy 2017 Micron Technology Inc
MT35X (Octal) aka
24
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc
The Evolution of SPI
25
SPI Dual-SPI Quad-SPI Twin Quad Octal of Signals 6 6 6 10-12 11
Clock (max) 75MHz 75MHz 180MHz SDR (90MHz DDR) 180MHz SDR (90MHz DDR) 166MHz SDR (200MHz DDR)
Bandwidth (max) 9MBs 18MBs 90MBs 180MBs 400MBs
0 MBs
50 MBs
100 MBs
150 MBs
200 MBs
250 MBs
300 MBs
350 MBs
400 MBs
450 MBs
500 MBs
1997 2006 2016
SPI Interface Bandwidth
Dual-IO18MBs
Quad (SDR)40MBs
Twin-Quad 180MBs
Octal 400MBs
Quad (DDR) 90MBs
125MBs 9MBs
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc26
Micron Read Performance Comparisons
0
50
100
150
200
250
300
350
400
450
1 2 4 8 16 32 64 128 256 512 1k 2k 4k 8k 16k 32k 64k 128k 256k 512k 1M 2M
Tran
sfer
Rat
e (M
Byt
ess
ec)
Bytes per Fetch
NOR and NAND Performance Comparisons Random Read Access Performance vs Data Size
x8 200MHz DDR Octal NOR (MT35X)
x8 166MHz SDR Twin Quad Serial NOR (MT25T)
x4 166MHz SDR 83MHz DDR Serial NOR (MT25Q) 18V
x4 133MHz SPI NAND
x8 NAND ONFI 30
x8 eMMC 45
x8 eMMC 50
+
+
CacheLine Fills
BOOT or Read time at 400MBsBit density 512Mb 1Gb 2GbByte density 64MB 128MB 256MBTime to read 16 sec 32 sec 64 sec
Graphic image read 2Bytes (65K colors)Pixel Size 1K x 1K 4K x 4KByte density 2MB 34MBTime to read 52ms 88ms
Xccelatrade FlashHighest Performance
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc
eMMC Fully Managed NANDPROVIDES REDUCED DESIGN EFFORT FOR MINIMAL COST
NAND
Wear leveling
ECC
Driver
NAND Controller
Raw NAND
ONFI NAND bus
CommandBlock Management
Low-level Driver
NAND Controller
Fully Managed NAND (eMMC)
MMC SATA or USB bus
NAND
Wear leveling CMDBlock
Mgmt NAND Error Mgmt
Controller
eMMC eUSBSATA amp CF
Cost amp Price
Ease of design amp Validation
27 June 15 2018
copy 2017 Micron Technology Inc
eMMC
28 June 15 2018
copy 2017 Micron Technology Inc
Enjoy Micron Automotive eMMC comprehensive Product Portfolio
PCIe NVMeUFS 2x
June 15 2018
copy 2017 Micron Technology Inc
New Features in eMMC 51
| June 15 201830
copy 2017 Micron Technology Inc
SSD Form FactorsEXISTING AND FUTURE DIRECTIONS
FORM FACTORSndash 25rdquo
ndash mSATA
ndash M2
ndash uBGA (Future)
INTERFACESndash SATA III
ndash PCIe
YEARLY FIRMWARE UPDATES
| June 15 201831
Parameter 25rdquo mSATA M2Capacities (GB) 60120240 60120240 120240
Specification EIA-720 MO-300B variation A PCIe M2 Spec Rev 10Dimensions (L) 10045mm
(W) 6985mm (H) 7mm
(L) 5080mm(W) 2985mm(H) 375mm
(L) 60 mm(W) 22 mm(H) 15 mm
Weight lt 70g lt 10g lt 10 g
Packaging MCP (Multi Chip Package)PoP (Package on Package)
copy 2017 Micron Technology Inc
What is an eMCPePoP
Benefits includehellipndash Board space savings through vertical stacking of several memory chips
ndash Minimize bill of materials for simplified manufacturing and cost savings
ndash High density low power consumption shortest interconnections possible
ndash Accelerated time to market through rapid integration of modules
ApplicationProcessor -Driver
MLC NAND
eMMC
PCB
LPDRAM
Controller
POP
Application Processor -Driver
SLC NAND
NAND MCP
LPDRAM
Printed Circuit Board (PCB)
ApplicationProcessor -Driver
eMMCePOPLPDRAM
ApplicationProcessor -Driver
eMMC
eMCP
LPDRAM
PCBPCB
eMCP is a Multi Chip Package including eMMC and LPDDRx
ePoP is an eMCP in a PoP (Package on Package) design
June 15 2018
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Power Calculatorshttpswwwmicroncomsupporttools-and-utilitiespower-calc
| June 15 201834
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Technical Notesndash httpswwwmicroncomadvanced
searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=ampshow=10ampfamily=2dd96f4ee22e4de7b7027e6dd6a2718campnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201835
copy 2017 Micron Technology Inc
Links to Micronrsquos NOR Flash Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=1f8cfba0d95c4ea9a6c99e3272fd0e39ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201836
copy 2017 Micron Technology Inc
Link to Micronrsquos eMMC Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=ff04c268087d4d33a126d6a5a59ccebdamptechnology=9b8d2c45520a422c8f635832d3a2b0eaampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201837
copy 2017 Micron Technology Inc
Link to Micronrsquos SSD Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=59b6cc75486a4bca80f5b1b8a2086740ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201838
copy 2017 Micron Technology Inc
Compatibility Guides (Pages 3 amp 4 of 8)
| June 15 20186
copy 2017 Micron Technology Inc
Compatibility Guides (Pages 5 amp 6 of 8)
| June 15 20187
copy 2017 Micron Technology Inc
Compatibility Guides (Pages 7 amp 8 of 8)
| June 15 20188
copy 2017 Micron Technology Inc
iMX8 Quad Max
| June 15 20189
iMX8 QM Features Micronrsquos bull LPDDR4 (up to 8GB)bull XccelaTM Octal Flash Q-SPIbull 32GB eMMC50 (back side)
Board photo of released MX8 Quad Max
copy 2017 Micron Technology Inc
iMX8 Quad X Plus
| June 15 201810
iMX8 QXP Features Micronrsquos bull LPDDR4 (up to 8GB)bull XccelaTM Octal Flash Q-SPIbull 32GB eMMC50 (back side)
Board photo of released MX8 Quad X Plus
copy 2017 Micron Technology Inc
iMX8 M
| June 15 201811 | Micron Confidential
iMX8 M has validated Micronrsquos bull 3GB LPDDR4bull 256MbQuad SPIbull 16GB eMMC50
Quad SPI FlashMT25QL256ABA1EW9-0SIT
3GB LPDDR4 MT53B768M32D4NQ-062 WTB
16GB eMMCMTFC16GAKAECN-2M WT
Board photo of released MX8 M
DRAM Flash Market Section
copy 2017 Micron Technology Inc
DRAM Market Trends General Market vs Automotive Adoption
| June 15 201813
General Market
ndash DDR is the dominant interface for devices without batteries
ndash Increased LPDRAM adoption outside of mobile handsets driven by Tablets amp other Client apps
ndash DDR5LPDDR5 adoption projected to start in late CYrsquo19
Automotive
ndash Continued need for legacy support
ndash DDR3 is the primary choice for current gen low cost Infotainment and Cluster applications
ndash LPDDR4 will be the primary choice for next gen ADAS and high-end Infotainment applications
DDR2DDR3
DDR4
DDR5
LPDDR2LPDDR3
LPDDR4
LPDDR5GDDR55X GDDR6OtherLegacy
0
10
20
30
40
50
60
70
80
90
100
Source Micron Market Models
copy 2017 Micron Technology Inc
DRAM Market Trends General Market vs IMM
| June 15 201814
General Marketndash DDR is the dominant interface for devices
without batteries
ndash Increased LPDRAM adoption outside of mobile handsets driven by Tablets amp other Client apps
ndash DDR5LPDDR5 adoption projected to start in late CYrsquo19
Industrial Multi-Market (IMM)ndash Continued need for legacy support in both
DRAM and LPDRAM with a wide mix of technologies
ndash DRAM modules in Industrial Automation drive bulk of DDR4 adoption
ndash Strong LP adoption for battery driven applications LPDDR4 is gaining traction
in
1G
b eq
uiva
lent
s
DDR4
DDR3
LPDDR5
GDDR
DDR2
LPDDR2
General MarketOther
LPDDR4xLPDDR3
DDR5
Source Micron Marketing (Marchrsquo17)
DDR2DDR3
DDR4
DDR5
LPDDR2LPDDR3
LPDDR4
LPDDR5GDDR55X GDDR6OtherLegacy
0
10
20
30
40
50
60
70
80
90
100
Source Micron Market Models
copy 2017 Micron Technology Inc
Broad NVM Market Growth Dynamics
15
Continued strong deployment of eMMC ndash Broader embedded markets
UFS driven by mobilendash Higher performance density
Strong market momentum for PCIe ndash Essential performance driven applications
Source Micron market models
Managed NAND TAM Units ()
0
20
40
60
80
100
CY2017 CY2018 CY2019 CY2020
eMMC
UFS
PCIe
Others
copy 2017 Micron Technology Inc
Explosive Demand for Memory with Autonomous Driving
16
L5 expected to need gt1TB storage
Includes IVI Cluster Central amp Boot storage for autonomous Black Box Recording Source Micron Marketing
Density
0
500
1000
1500
2000
L1L2 L3 L4 L5
eMMC
UFS 21
UFS 30PCIe Gen 3 x2
PCIe x4
Storage Density Progression
eMMC
3000MBs
1600MBs
Seq Reads
800MBs
320MBs
Technical Details
copy 2017 Micron Technology Inc
LPDDRx and DDRx SDRAM Feature Comparison
| June 15 201818
Type LPDDR2 LPDDR3 LPDDR44X DDR2 DDR3DDR3L DDR4Die Density Up to 8Gb Up to 32Gb Up to 32Gb Up to 2Gb Up to 8Gb Up to 16Gb (128Gb 8H)
Core Voltage (Vdd) 12V 18V WL supply req
12V18V WL supply req
11V10V18V WL supply req
18V155V 15V135V
12VSeparate WL supply
25VIO Voltage 12V 12V 11V (4X = 06V) Same as VDD Same as VDD Same as VDD
Max Clock Freq Data rate 533MHzDDR1066 800MHzDDR1600 2133MHzDDR4267 533MHzDDR1066 1066MHzDDR2100 1600MHz+DDR3200+
Burst Lengths 4 8 16 8 16 32 4 8 BC4 8 BC4 8Configurations x16 x32 x16 x32 2Ch x16 x4 x8 x16 x4 x8 x16 x4 x8 x16
Address Command Signals
14 pins(Muxrsquod command
address)
14 pins(Muxrsquod command
address)
10 pins per channel(Muxrsquod command
Address)25 pins 27 pins 29 pins
(partial muxrsquod)
Address Command Data Rate
DDR(both rising and
falling edges of clock)
DDR (both rising and
falling edges of clock)
SDR(rising edge of clock
only)
SDR(rising edge of clock
only)
SDR(rising edge of
clock only)
SDR (rising edge of clock
only)
On Die Temperature Sensor Yes Yes Yes No OptionalRS Yes
DPD (Deep power-down mode) Yes Yes No No No No
Package Options POP MCP discrete POP MCP discrete PoP MCP discrete Discrete Discrete Discrete
ProductTemp Grades CT IT AIT AT AAT CT IT AIT AT AATWT (-25rsquo to 85rsquoC)
AAT (-40C to 105C)AUT (-40rsquoC to 125rsquoC)
CT IT AIT AT AAT CT IT AIT AT AAT AUT CT IT AIT AT AAT AUT
copy 2017 Micron Technology Inc | June 15 201819
Standard DRAM LPDRAM Form Factor Center bond pads for highest performance and lowest
costEdge bond pads allow for stacked die for MCP and PoP
packaging enabling compact form factors
Performance x4 x8 x16 is lower cost and supports higher density configurations
x32 allows system to support high bandwidthin point-to-point applications
DRAMpower
IDD specifications are geared towards moderate stand-by power providing the highest yields and lowest cost
Ultra low standby power enabled by on-die power management and long refresh rates
Systempower
Additional Delay Locked Loop (DLL) circuitry required for high performance which inhibits system power
savings
Lack of DLL circuitry allows for improved system power management System can enterexit power-down modes
as well as throttle or stop the clock
Key Takeaway
Optimized for cost and performancecost is primary feature
Optimized for battery life and portability low power amp smallest possible footprint are primary features
LPDD
R4 S
peci
fic In
foG
ener
al LP
vs
DD
R Co
mpa
rison
LPDRAM offers additional value over standard DRAM
Standard DRAM amp LPDRAM Trade Offs
copy 2017 Micron Technology Inc20
DRAM Performance Improvements Over Time (IO x16)
0
5
10
15
20
25
30
35
40
45
50
55
2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016 2017
Gbs
DDR2
DDR2-53385 Gbs
DDR2-667106 Gbs
DDR2-800128 Gbs
DDR3-106617 Gbs
DDR3-1333213 Gbs
DDR3-1600256 Gbs
DDR3-186630 Gbs
DDR4-213334 Gbs
DDR4-2400384 Gbs
DDR4-2666427 Gbs
DDR4-3200512 Gbs
DDR3
DDR4
June 15 2018
copy 2017 Micron Technology Inc21
0
20
40
60
80
100
120
140
160
2010 2011 2012 2013 2014 2015 2016 2017 2018
LPDDR2-800256 Gbs
LPDDR2-10663411 Gbs
LPDDR2LPDDR3-1600
512 Gbs
LPDDR3-1866 59712 Gbs
LPDDR3
LPDDR4-37331194 Gbs
LPDDR4-426613651 Gbs
LPDDR4
LPDDR4-32001024 Gbs
Gbs
LPDDR Performance Improvements Over Time (IO x32)
LPDDR4-32001024 Gbs
June 15 2018
Non-Volatile Details
copy 2017 Micron Technology Inc | June 15 201823
Xccelatrade Flash Best of Parallel and Serial NOR Flash
Compared to Page Mode Parallel NOR
5X THE PERFORMANCE 4X FEWER PINS 3X LESS ENERGY AND 2X SMALLER PACKAGE
512MbParallel NOR
MT28EW
512MbQuad-SPIMT25Q
512MbTwin-Quad
MT25T
512MbXccela Flash
MT35X
Bandwidth 80MBs(Page mode async x16)
90MBs(90MHz DDR mode)
180MBs(90MHz DDR mode)
400MBs(200MHz DDR mode)
Initial WordAccess Time 95ns (x16) 139ns (18V 4-bit)
157ns (18V 16-bits)139ns (18V 8-bit)145ns (18V 16-bit)
85ns (18V 8-bit)875ns (18V 16-bit)
Subsequent Word Access
20ns (16-bits)(95ns across 32B page)
6ns (4-bits)24ns (16-bits)
6ns (8-bits)12ns (16-bits)
25ns (8-bits)5ns (16-bits)
Package and Pins 64-TBGA (11x13mm)50 Active Pins
24-BGA (6x8mm)6 Active Pins
24-BGA (6x8mm)11 Active Pins
24-BGA (6x8mm)11 Active Pins
Energy Per Bit 101 pJbit 41 pJbit 41 pJbit 28 pJbit
Xccelatrade Flash(MT35X)
Parallel NOR FlashHigh performance
Fast bootReliability
Serial NOR FlashReduced pin countsSimple PCB design
ReliabilityNeed more
performance with same package
Want reduced pin countpackage size
Source Micron datasheets
copy 2017 Micron Technology Inc
MT35X (Octal) aka
24
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc
The Evolution of SPI
25
SPI Dual-SPI Quad-SPI Twin Quad Octal of Signals 6 6 6 10-12 11
Clock (max) 75MHz 75MHz 180MHz SDR (90MHz DDR) 180MHz SDR (90MHz DDR) 166MHz SDR (200MHz DDR)
Bandwidth (max) 9MBs 18MBs 90MBs 180MBs 400MBs
0 MBs
50 MBs
100 MBs
150 MBs
200 MBs
250 MBs
300 MBs
350 MBs
400 MBs
450 MBs
500 MBs
1997 2006 2016
SPI Interface Bandwidth
Dual-IO18MBs
Quad (SDR)40MBs
Twin-Quad 180MBs
Octal 400MBs
Quad (DDR) 90MBs
125MBs 9MBs
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc26
Micron Read Performance Comparisons
0
50
100
150
200
250
300
350
400
450
1 2 4 8 16 32 64 128 256 512 1k 2k 4k 8k 16k 32k 64k 128k 256k 512k 1M 2M
Tran
sfer
Rat
e (M
Byt
ess
ec)
Bytes per Fetch
NOR and NAND Performance Comparisons Random Read Access Performance vs Data Size
x8 200MHz DDR Octal NOR (MT35X)
x8 166MHz SDR Twin Quad Serial NOR (MT25T)
x4 166MHz SDR 83MHz DDR Serial NOR (MT25Q) 18V
x4 133MHz SPI NAND
x8 NAND ONFI 30
x8 eMMC 45
x8 eMMC 50
+
+
CacheLine Fills
BOOT or Read time at 400MBsBit density 512Mb 1Gb 2GbByte density 64MB 128MB 256MBTime to read 16 sec 32 sec 64 sec
Graphic image read 2Bytes (65K colors)Pixel Size 1K x 1K 4K x 4KByte density 2MB 34MBTime to read 52ms 88ms
Xccelatrade FlashHighest Performance
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc
eMMC Fully Managed NANDPROVIDES REDUCED DESIGN EFFORT FOR MINIMAL COST
NAND
Wear leveling
ECC
Driver
NAND Controller
Raw NAND
ONFI NAND bus
CommandBlock Management
Low-level Driver
NAND Controller
Fully Managed NAND (eMMC)
MMC SATA or USB bus
NAND
Wear leveling CMDBlock
Mgmt NAND Error Mgmt
Controller
eMMC eUSBSATA amp CF
Cost amp Price
Ease of design amp Validation
27 June 15 2018
copy 2017 Micron Technology Inc
eMMC
28 June 15 2018
copy 2017 Micron Technology Inc
Enjoy Micron Automotive eMMC comprehensive Product Portfolio
PCIe NVMeUFS 2x
June 15 2018
copy 2017 Micron Technology Inc
New Features in eMMC 51
| June 15 201830
copy 2017 Micron Technology Inc
SSD Form FactorsEXISTING AND FUTURE DIRECTIONS
FORM FACTORSndash 25rdquo
ndash mSATA
ndash M2
ndash uBGA (Future)
INTERFACESndash SATA III
ndash PCIe
YEARLY FIRMWARE UPDATES
| June 15 201831
Parameter 25rdquo mSATA M2Capacities (GB) 60120240 60120240 120240
Specification EIA-720 MO-300B variation A PCIe M2 Spec Rev 10Dimensions (L) 10045mm
(W) 6985mm (H) 7mm
(L) 5080mm(W) 2985mm(H) 375mm
(L) 60 mm(W) 22 mm(H) 15 mm
Weight lt 70g lt 10g lt 10 g
Packaging MCP (Multi Chip Package)PoP (Package on Package)
copy 2017 Micron Technology Inc
What is an eMCPePoP
Benefits includehellipndash Board space savings through vertical stacking of several memory chips
ndash Minimize bill of materials for simplified manufacturing and cost savings
ndash High density low power consumption shortest interconnections possible
ndash Accelerated time to market through rapid integration of modules
ApplicationProcessor -Driver
MLC NAND
eMMC
PCB
LPDRAM
Controller
POP
Application Processor -Driver
SLC NAND
NAND MCP
LPDRAM
Printed Circuit Board (PCB)
ApplicationProcessor -Driver
eMMCePOPLPDRAM
ApplicationProcessor -Driver
eMMC
eMCP
LPDRAM
PCBPCB
eMCP is a Multi Chip Package including eMMC and LPDDRx
ePoP is an eMCP in a PoP (Package on Package) design
June 15 2018
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Power Calculatorshttpswwwmicroncomsupporttools-and-utilitiespower-calc
| June 15 201834
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Technical Notesndash httpswwwmicroncomadvanced
searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=ampshow=10ampfamily=2dd96f4ee22e4de7b7027e6dd6a2718campnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201835
copy 2017 Micron Technology Inc
Links to Micronrsquos NOR Flash Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=1f8cfba0d95c4ea9a6c99e3272fd0e39ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201836
copy 2017 Micron Technology Inc
Link to Micronrsquos eMMC Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=ff04c268087d4d33a126d6a5a59ccebdamptechnology=9b8d2c45520a422c8f635832d3a2b0eaampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201837
copy 2017 Micron Technology Inc
Link to Micronrsquos SSD Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=59b6cc75486a4bca80f5b1b8a2086740ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201838
copy 2017 Micron Technology Inc
Compatibility Guides (Pages 5 amp 6 of 8)
| June 15 20187
copy 2017 Micron Technology Inc
Compatibility Guides (Pages 7 amp 8 of 8)
| June 15 20188
copy 2017 Micron Technology Inc
iMX8 Quad Max
| June 15 20189
iMX8 QM Features Micronrsquos bull LPDDR4 (up to 8GB)bull XccelaTM Octal Flash Q-SPIbull 32GB eMMC50 (back side)
Board photo of released MX8 Quad Max
copy 2017 Micron Technology Inc
iMX8 Quad X Plus
| June 15 201810
iMX8 QXP Features Micronrsquos bull LPDDR4 (up to 8GB)bull XccelaTM Octal Flash Q-SPIbull 32GB eMMC50 (back side)
Board photo of released MX8 Quad X Plus
copy 2017 Micron Technology Inc
iMX8 M
| June 15 201811 | Micron Confidential
iMX8 M has validated Micronrsquos bull 3GB LPDDR4bull 256MbQuad SPIbull 16GB eMMC50
Quad SPI FlashMT25QL256ABA1EW9-0SIT
3GB LPDDR4 MT53B768M32D4NQ-062 WTB
16GB eMMCMTFC16GAKAECN-2M WT
Board photo of released MX8 M
DRAM Flash Market Section
copy 2017 Micron Technology Inc
DRAM Market Trends General Market vs Automotive Adoption
| June 15 201813
General Market
ndash DDR is the dominant interface for devices without batteries
ndash Increased LPDRAM adoption outside of mobile handsets driven by Tablets amp other Client apps
ndash DDR5LPDDR5 adoption projected to start in late CYrsquo19
Automotive
ndash Continued need for legacy support
ndash DDR3 is the primary choice for current gen low cost Infotainment and Cluster applications
ndash LPDDR4 will be the primary choice for next gen ADAS and high-end Infotainment applications
DDR2DDR3
DDR4
DDR5
LPDDR2LPDDR3
LPDDR4
LPDDR5GDDR55X GDDR6OtherLegacy
0
10
20
30
40
50
60
70
80
90
100
Source Micron Market Models
copy 2017 Micron Technology Inc
DRAM Market Trends General Market vs IMM
| June 15 201814
General Marketndash DDR is the dominant interface for devices
without batteries
ndash Increased LPDRAM adoption outside of mobile handsets driven by Tablets amp other Client apps
ndash DDR5LPDDR5 adoption projected to start in late CYrsquo19
Industrial Multi-Market (IMM)ndash Continued need for legacy support in both
DRAM and LPDRAM with a wide mix of technologies
ndash DRAM modules in Industrial Automation drive bulk of DDR4 adoption
ndash Strong LP adoption for battery driven applications LPDDR4 is gaining traction
in
1G
b eq
uiva
lent
s
DDR4
DDR3
LPDDR5
GDDR
DDR2
LPDDR2
General MarketOther
LPDDR4xLPDDR3
DDR5
Source Micron Marketing (Marchrsquo17)
DDR2DDR3
DDR4
DDR5
LPDDR2LPDDR3
LPDDR4
LPDDR5GDDR55X GDDR6OtherLegacy
0
10
20
30
40
50
60
70
80
90
100
Source Micron Market Models
copy 2017 Micron Technology Inc
Broad NVM Market Growth Dynamics
15
Continued strong deployment of eMMC ndash Broader embedded markets
UFS driven by mobilendash Higher performance density
Strong market momentum for PCIe ndash Essential performance driven applications
Source Micron market models
Managed NAND TAM Units ()
0
20
40
60
80
100
CY2017 CY2018 CY2019 CY2020
eMMC
UFS
PCIe
Others
copy 2017 Micron Technology Inc
Explosive Demand for Memory with Autonomous Driving
16
L5 expected to need gt1TB storage
Includes IVI Cluster Central amp Boot storage for autonomous Black Box Recording Source Micron Marketing
Density
0
500
1000
1500
2000
L1L2 L3 L4 L5
eMMC
UFS 21
UFS 30PCIe Gen 3 x2
PCIe x4
Storage Density Progression
eMMC
3000MBs
1600MBs
Seq Reads
800MBs
320MBs
Technical Details
copy 2017 Micron Technology Inc
LPDDRx and DDRx SDRAM Feature Comparison
| June 15 201818
Type LPDDR2 LPDDR3 LPDDR44X DDR2 DDR3DDR3L DDR4Die Density Up to 8Gb Up to 32Gb Up to 32Gb Up to 2Gb Up to 8Gb Up to 16Gb (128Gb 8H)
Core Voltage (Vdd) 12V 18V WL supply req
12V18V WL supply req
11V10V18V WL supply req
18V155V 15V135V
12VSeparate WL supply
25VIO Voltage 12V 12V 11V (4X = 06V) Same as VDD Same as VDD Same as VDD
Max Clock Freq Data rate 533MHzDDR1066 800MHzDDR1600 2133MHzDDR4267 533MHzDDR1066 1066MHzDDR2100 1600MHz+DDR3200+
Burst Lengths 4 8 16 8 16 32 4 8 BC4 8 BC4 8Configurations x16 x32 x16 x32 2Ch x16 x4 x8 x16 x4 x8 x16 x4 x8 x16
Address Command Signals
14 pins(Muxrsquod command
address)
14 pins(Muxrsquod command
address)
10 pins per channel(Muxrsquod command
Address)25 pins 27 pins 29 pins
(partial muxrsquod)
Address Command Data Rate
DDR(both rising and
falling edges of clock)
DDR (both rising and
falling edges of clock)
SDR(rising edge of clock
only)
SDR(rising edge of clock
only)
SDR(rising edge of
clock only)
SDR (rising edge of clock
only)
On Die Temperature Sensor Yes Yes Yes No OptionalRS Yes
DPD (Deep power-down mode) Yes Yes No No No No
Package Options POP MCP discrete POP MCP discrete PoP MCP discrete Discrete Discrete Discrete
ProductTemp Grades CT IT AIT AT AAT CT IT AIT AT AATWT (-25rsquo to 85rsquoC)
AAT (-40C to 105C)AUT (-40rsquoC to 125rsquoC)
CT IT AIT AT AAT CT IT AIT AT AAT AUT CT IT AIT AT AAT AUT
copy 2017 Micron Technology Inc | June 15 201819
Standard DRAM LPDRAM Form Factor Center bond pads for highest performance and lowest
costEdge bond pads allow for stacked die for MCP and PoP
packaging enabling compact form factors
Performance x4 x8 x16 is lower cost and supports higher density configurations
x32 allows system to support high bandwidthin point-to-point applications
DRAMpower
IDD specifications are geared towards moderate stand-by power providing the highest yields and lowest cost
Ultra low standby power enabled by on-die power management and long refresh rates
Systempower
Additional Delay Locked Loop (DLL) circuitry required for high performance which inhibits system power
savings
Lack of DLL circuitry allows for improved system power management System can enterexit power-down modes
as well as throttle or stop the clock
Key Takeaway
Optimized for cost and performancecost is primary feature
Optimized for battery life and portability low power amp smallest possible footprint are primary features
LPDD
R4 S
peci
fic In
foG
ener
al LP
vs
DD
R Co
mpa
rison
LPDRAM offers additional value over standard DRAM
Standard DRAM amp LPDRAM Trade Offs
copy 2017 Micron Technology Inc20
DRAM Performance Improvements Over Time (IO x16)
0
5
10
15
20
25
30
35
40
45
50
55
2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016 2017
Gbs
DDR2
DDR2-53385 Gbs
DDR2-667106 Gbs
DDR2-800128 Gbs
DDR3-106617 Gbs
DDR3-1333213 Gbs
DDR3-1600256 Gbs
DDR3-186630 Gbs
DDR4-213334 Gbs
DDR4-2400384 Gbs
DDR4-2666427 Gbs
DDR4-3200512 Gbs
DDR3
DDR4
June 15 2018
copy 2017 Micron Technology Inc21
0
20
40
60
80
100
120
140
160
2010 2011 2012 2013 2014 2015 2016 2017 2018
LPDDR2-800256 Gbs
LPDDR2-10663411 Gbs
LPDDR2LPDDR3-1600
512 Gbs
LPDDR3-1866 59712 Gbs
LPDDR3
LPDDR4-37331194 Gbs
LPDDR4-426613651 Gbs
LPDDR4
LPDDR4-32001024 Gbs
Gbs
LPDDR Performance Improvements Over Time (IO x32)
LPDDR4-32001024 Gbs
June 15 2018
Non-Volatile Details
copy 2017 Micron Technology Inc | June 15 201823
Xccelatrade Flash Best of Parallel and Serial NOR Flash
Compared to Page Mode Parallel NOR
5X THE PERFORMANCE 4X FEWER PINS 3X LESS ENERGY AND 2X SMALLER PACKAGE
512MbParallel NOR
MT28EW
512MbQuad-SPIMT25Q
512MbTwin-Quad
MT25T
512MbXccela Flash
MT35X
Bandwidth 80MBs(Page mode async x16)
90MBs(90MHz DDR mode)
180MBs(90MHz DDR mode)
400MBs(200MHz DDR mode)
Initial WordAccess Time 95ns (x16) 139ns (18V 4-bit)
157ns (18V 16-bits)139ns (18V 8-bit)145ns (18V 16-bit)
85ns (18V 8-bit)875ns (18V 16-bit)
Subsequent Word Access
20ns (16-bits)(95ns across 32B page)
6ns (4-bits)24ns (16-bits)
6ns (8-bits)12ns (16-bits)
25ns (8-bits)5ns (16-bits)
Package and Pins 64-TBGA (11x13mm)50 Active Pins
24-BGA (6x8mm)6 Active Pins
24-BGA (6x8mm)11 Active Pins
24-BGA (6x8mm)11 Active Pins
Energy Per Bit 101 pJbit 41 pJbit 41 pJbit 28 pJbit
Xccelatrade Flash(MT35X)
Parallel NOR FlashHigh performance
Fast bootReliability
Serial NOR FlashReduced pin countsSimple PCB design
ReliabilityNeed more
performance with same package
Want reduced pin countpackage size
Source Micron datasheets
copy 2017 Micron Technology Inc
MT35X (Octal) aka
24
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc
The Evolution of SPI
25
SPI Dual-SPI Quad-SPI Twin Quad Octal of Signals 6 6 6 10-12 11
Clock (max) 75MHz 75MHz 180MHz SDR (90MHz DDR) 180MHz SDR (90MHz DDR) 166MHz SDR (200MHz DDR)
Bandwidth (max) 9MBs 18MBs 90MBs 180MBs 400MBs
0 MBs
50 MBs
100 MBs
150 MBs
200 MBs
250 MBs
300 MBs
350 MBs
400 MBs
450 MBs
500 MBs
1997 2006 2016
SPI Interface Bandwidth
Dual-IO18MBs
Quad (SDR)40MBs
Twin-Quad 180MBs
Octal 400MBs
Quad (DDR) 90MBs
125MBs 9MBs
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc26
Micron Read Performance Comparisons
0
50
100
150
200
250
300
350
400
450
1 2 4 8 16 32 64 128 256 512 1k 2k 4k 8k 16k 32k 64k 128k 256k 512k 1M 2M
Tran
sfer
Rat
e (M
Byt
ess
ec)
Bytes per Fetch
NOR and NAND Performance Comparisons Random Read Access Performance vs Data Size
x8 200MHz DDR Octal NOR (MT35X)
x8 166MHz SDR Twin Quad Serial NOR (MT25T)
x4 166MHz SDR 83MHz DDR Serial NOR (MT25Q) 18V
x4 133MHz SPI NAND
x8 NAND ONFI 30
x8 eMMC 45
x8 eMMC 50
+
+
CacheLine Fills
BOOT or Read time at 400MBsBit density 512Mb 1Gb 2GbByte density 64MB 128MB 256MBTime to read 16 sec 32 sec 64 sec
Graphic image read 2Bytes (65K colors)Pixel Size 1K x 1K 4K x 4KByte density 2MB 34MBTime to read 52ms 88ms
Xccelatrade FlashHighest Performance
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc
eMMC Fully Managed NANDPROVIDES REDUCED DESIGN EFFORT FOR MINIMAL COST
NAND
Wear leveling
ECC
Driver
NAND Controller
Raw NAND
ONFI NAND bus
CommandBlock Management
Low-level Driver
NAND Controller
Fully Managed NAND (eMMC)
MMC SATA or USB bus
NAND
Wear leveling CMDBlock
Mgmt NAND Error Mgmt
Controller
eMMC eUSBSATA amp CF
Cost amp Price
Ease of design amp Validation
27 June 15 2018
copy 2017 Micron Technology Inc
eMMC
28 June 15 2018
copy 2017 Micron Technology Inc
Enjoy Micron Automotive eMMC comprehensive Product Portfolio
PCIe NVMeUFS 2x
June 15 2018
copy 2017 Micron Technology Inc
New Features in eMMC 51
| June 15 201830
copy 2017 Micron Technology Inc
SSD Form FactorsEXISTING AND FUTURE DIRECTIONS
FORM FACTORSndash 25rdquo
ndash mSATA
ndash M2
ndash uBGA (Future)
INTERFACESndash SATA III
ndash PCIe
YEARLY FIRMWARE UPDATES
| June 15 201831
Parameter 25rdquo mSATA M2Capacities (GB) 60120240 60120240 120240
Specification EIA-720 MO-300B variation A PCIe M2 Spec Rev 10Dimensions (L) 10045mm
(W) 6985mm (H) 7mm
(L) 5080mm(W) 2985mm(H) 375mm
(L) 60 mm(W) 22 mm(H) 15 mm
Weight lt 70g lt 10g lt 10 g
Packaging MCP (Multi Chip Package)PoP (Package on Package)
copy 2017 Micron Technology Inc
What is an eMCPePoP
Benefits includehellipndash Board space savings through vertical stacking of several memory chips
ndash Minimize bill of materials for simplified manufacturing and cost savings
ndash High density low power consumption shortest interconnections possible
ndash Accelerated time to market through rapid integration of modules
ApplicationProcessor -Driver
MLC NAND
eMMC
PCB
LPDRAM
Controller
POP
Application Processor -Driver
SLC NAND
NAND MCP
LPDRAM
Printed Circuit Board (PCB)
ApplicationProcessor -Driver
eMMCePOPLPDRAM
ApplicationProcessor -Driver
eMMC
eMCP
LPDRAM
PCBPCB
eMCP is a Multi Chip Package including eMMC and LPDDRx
ePoP is an eMCP in a PoP (Package on Package) design
June 15 2018
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Power Calculatorshttpswwwmicroncomsupporttools-and-utilitiespower-calc
| June 15 201834
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Technical Notesndash httpswwwmicroncomadvanced
searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=ampshow=10ampfamily=2dd96f4ee22e4de7b7027e6dd6a2718campnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201835
copy 2017 Micron Technology Inc
Links to Micronrsquos NOR Flash Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=1f8cfba0d95c4ea9a6c99e3272fd0e39ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201836
copy 2017 Micron Technology Inc
Link to Micronrsquos eMMC Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=ff04c268087d4d33a126d6a5a59ccebdamptechnology=9b8d2c45520a422c8f635832d3a2b0eaampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201837
copy 2017 Micron Technology Inc
Link to Micronrsquos SSD Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=59b6cc75486a4bca80f5b1b8a2086740ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201838
copy 2017 Micron Technology Inc
Compatibility Guides (Pages 7 amp 8 of 8)
| June 15 20188
copy 2017 Micron Technology Inc
iMX8 Quad Max
| June 15 20189
iMX8 QM Features Micronrsquos bull LPDDR4 (up to 8GB)bull XccelaTM Octal Flash Q-SPIbull 32GB eMMC50 (back side)
Board photo of released MX8 Quad Max
copy 2017 Micron Technology Inc
iMX8 Quad X Plus
| June 15 201810
iMX8 QXP Features Micronrsquos bull LPDDR4 (up to 8GB)bull XccelaTM Octal Flash Q-SPIbull 32GB eMMC50 (back side)
Board photo of released MX8 Quad X Plus
copy 2017 Micron Technology Inc
iMX8 M
| June 15 201811 | Micron Confidential
iMX8 M has validated Micronrsquos bull 3GB LPDDR4bull 256MbQuad SPIbull 16GB eMMC50
Quad SPI FlashMT25QL256ABA1EW9-0SIT
3GB LPDDR4 MT53B768M32D4NQ-062 WTB
16GB eMMCMTFC16GAKAECN-2M WT
Board photo of released MX8 M
DRAM Flash Market Section
copy 2017 Micron Technology Inc
DRAM Market Trends General Market vs Automotive Adoption
| June 15 201813
General Market
ndash DDR is the dominant interface for devices without batteries
ndash Increased LPDRAM adoption outside of mobile handsets driven by Tablets amp other Client apps
ndash DDR5LPDDR5 adoption projected to start in late CYrsquo19
Automotive
ndash Continued need for legacy support
ndash DDR3 is the primary choice for current gen low cost Infotainment and Cluster applications
ndash LPDDR4 will be the primary choice for next gen ADAS and high-end Infotainment applications
DDR2DDR3
DDR4
DDR5
LPDDR2LPDDR3
LPDDR4
LPDDR5GDDR55X GDDR6OtherLegacy
0
10
20
30
40
50
60
70
80
90
100
Source Micron Market Models
copy 2017 Micron Technology Inc
DRAM Market Trends General Market vs IMM
| June 15 201814
General Marketndash DDR is the dominant interface for devices
without batteries
ndash Increased LPDRAM adoption outside of mobile handsets driven by Tablets amp other Client apps
ndash DDR5LPDDR5 adoption projected to start in late CYrsquo19
Industrial Multi-Market (IMM)ndash Continued need for legacy support in both
DRAM and LPDRAM with a wide mix of technologies
ndash DRAM modules in Industrial Automation drive bulk of DDR4 adoption
ndash Strong LP adoption for battery driven applications LPDDR4 is gaining traction
in
1G
b eq
uiva
lent
s
DDR4
DDR3
LPDDR5
GDDR
DDR2
LPDDR2
General MarketOther
LPDDR4xLPDDR3
DDR5
Source Micron Marketing (Marchrsquo17)
DDR2DDR3
DDR4
DDR5
LPDDR2LPDDR3
LPDDR4
LPDDR5GDDR55X GDDR6OtherLegacy
0
10
20
30
40
50
60
70
80
90
100
Source Micron Market Models
copy 2017 Micron Technology Inc
Broad NVM Market Growth Dynamics
15
Continued strong deployment of eMMC ndash Broader embedded markets
UFS driven by mobilendash Higher performance density
Strong market momentum for PCIe ndash Essential performance driven applications
Source Micron market models
Managed NAND TAM Units ()
0
20
40
60
80
100
CY2017 CY2018 CY2019 CY2020
eMMC
UFS
PCIe
Others
copy 2017 Micron Technology Inc
Explosive Demand for Memory with Autonomous Driving
16
L5 expected to need gt1TB storage
Includes IVI Cluster Central amp Boot storage for autonomous Black Box Recording Source Micron Marketing
Density
0
500
1000
1500
2000
L1L2 L3 L4 L5
eMMC
UFS 21
UFS 30PCIe Gen 3 x2
PCIe x4
Storage Density Progression
eMMC
3000MBs
1600MBs
Seq Reads
800MBs
320MBs
Technical Details
copy 2017 Micron Technology Inc
LPDDRx and DDRx SDRAM Feature Comparison
| June 15 201818
Type LPDDR2 LPDDR3 LPDDR44X DDR2 DDR3DDR3L DDR4Die Density Up to 8Gb Up to 32Gb Up to 32Gb Up to 2Gb Up to 8Gb Up to 16Gb (128Gb 8H)
Core Voltage (Vdd) 12V 18V WL supply req
12V18V WL supply req
11V10V18V WL supply req
18V155V 15V135V
12VSeparate WL supply
25VIO Voltage 12V 12V 11V (4X = 06V) Same as VDD Same as VDD Same as VDD
Max Clock Freq Data rate 533MHzDDR1066 800MHzDDR1600 2133MHzDDR4267 533MHzDDR1066 1066MHzDDR2100 1600MHz+DDR3200+
Burst Lengths 4 8 16 8 16 32 4 8 BC4 8 BC4 8Configurations x16 x32 x16 x32 2Ch x16 x4 x8 x16 x4 x8 x16 x4 x8 x16
Address Command Signals
14 pins(Muxrsquod command
address)
14 pins(Muxrsquod command
address)
10 pins per channel(Muxrsquod command
Address)25 pins 27 pins 29 pins
(partial muxrsquod)
Address Command Data Rate
DDR(both rising and
falling edges of clock)
DDR (both rising and
falling edges of clock)
SDR(rising edge of clock
only)
SDR(rising edge of clock
only)
SDR(rising edge of
clock only)
SDR (rising edge of clock
only)
On Die Temperature Sensor Yes Yes Yes No OptionalRS Yes
DPD (Deep power-down mode) Yes Yes No No No No
Package Options POP MCP discrete POP MCP discrete PoP MCP discrete Discrete Discrete Discrete
ProductTemp Grades CT IT AIT AT AAT CT IT AIT AT AATWT (-25rsquo to 85rsquoC)
AAT (-40C to 105C)AUT (-40rsquoC to 125rsquoC)
CT IT AIT AT AAT CT IT AIT AT AAT AUT CT IT AIT AT AAT AUT
copy 2017 Micron Technology Inc | June 15 201819
Standard DRAM LPDRAM Form Factor Center bond pads for highest performance and lowest
costEdge bond pads allow for stacked die for MCP and PoP
packaging enabling compact form factors
Performance x4 x8 x16 is lower cost and supports higher density configurations
x32 allows system to support high bandwidthin point-to-point applications
DRAMpower
IDD specifications are geared towards moderate stand-by power providing the highest yields and lowest cost
Ultra low standby power enabled by on-die power management and long refresh rates
Systempower
Additional Delay Locked Loop (DLL) circuitry required for high performance which inhibits system power
savings
Lack of DLL circuitry allows for improved system power management System can enterexit power-down modes
as well as throttle or stop the clock
Key Takeaway
Optimized for cost and performancecost is primary feature
Optimized for battery life and portability low power amp smallest possible footprint are primary features
LPDD
R4 S
peci
fic In
foG
ener
al LP
vs
DD
R Co
mpa
rison
LPDRAM offers additional value over standard DRAM
Standard DRAM amp LPDRAM Trade Offs
copy 2017 Micron Technology Inc20
DRAM Performance Improvements Over Time (IO x16)
0
5
10
15
20
25
30
35
40
45
50
55
2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016 2017
Gbs
DDR2
DDR2-53385 Gbs
DDR2-667106 Gbs
DDR2-800128 Gbs
DDR3-106617 Gbs
DDR3-1333213 Gbs
DDR3-1600256 Gbs
DDR3-186630 Gbs
DDR4-213334 Gbs
DDR4-2400384 Gbs
DDR4-2666427 Gbs
DDR4-3200512 Gbs
DDR3
DDR4
June 15 2018
copy 2017 Micron Technology Inc21
0
20
40
60
80
100
120
140
160
2010 2011 2012 2013 2014 2015 2016 2017 2018
LPDDR2-800256 Gbs
LPDDR2-10663411 Gbs
LPDDR2LPDDR3-1600
512 Gbs
LPDDR3-1866 59712 Gbs
LPDDR3
LPDDR4-37331194 Gbs
LPDDR4-426613651 Gbs
LPDDR4
LPDDR4-32001024 Gbs
Gbs
LPDDR Performance Improvements Over Time (IO x32)
LPDDR4-32001024 Gbs
June 15 2018
Non-Volatile Details
copy 2017 Micron Technology Inc | June 15 201823
Xccelatrade Flash Best of Parallel and Serial NOR Flash
Compared to Page Mode Parallel NOR
5X THE PERFORMANCE 4X FEWER PINS 3X LESS ENERGY AND 2X SMALLER PACKAGE
512MbParallel NOR
MT28EW
512MbQuad-SPIMT25Q
512MbTwin-Quad
MT25T
512MbXccela Flash
MT35X
Bandwidth 80MBs(Page mode async x16)
90MBs(90MHz DDR mode)
180MBs(90MHz DDR mode)
400MBs(200MHz DDR mode)
Initial WordAccess Time 95ns (x16) 139ns (18V 4-bit)
157ns (18V 16-bits)139ns (18V 8-bit)145ns (18V 16-bit)
85ns (18V 8-bit)875ns (18V 16-bit)
Subsequent Word Access
20ns (16-bits)(95ns across 32B page)
6ns (4-bits)24ns (16-bits)
6ns (8-bits)12ns (16-bits)
25ns (8-bits)5ns (16-bits)
Package and Pins 64-TBGA (11x13mm)50 Active Pins
24-BGA (6x8mm)6 Active Pins
24-BGA (6x8mm)11 Active Pins
24-BGA (6x8mm)11 Active Pins
Energy Per Bit 101 pJbit 41 pJbit 41 pJbit 28 pJbit
Xccelatrade Flash(MT35X)
Parallel NOR FlashHigh performance
Fast bootReliability
Serial NOR FlashReduced pin countsSimple PCB design
ReliabilityNeed more
performance with same package
Want reduced pin countpackage size
Source Micron datasheets
copy 2017 Micron Technology Inc
MT35X (Octal) aka
24
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc
The Evolution of SPI
25
SPI Dual-SPI Quad-SPI Twin Quad Octal of Signals 6 6 6 10-12 11
Clock (max) 75MHz 75MHz 180MHz SDR (90MHz DDR) 180MHz SDR (90MHz DDR) 166MHz SDR (200MHz DDR)
Bandwidth (max) 9MBs 18MBs 90MBs 180MBs 400MBs
0 MBs
50 MBs
100 MBs
150 MBs
200 MBs
250 MBs
300 MBs
350 MBs
400 MBs
450 MBs
500 MBs
1997 2006 2016
SPI Interface Bandwidth
Dual-IO18MBs
Quad (SDR)40MBs
Twin-Quad 180MBs
Octal 400MBs
Quad (DDR) 90MBs
125MBs 9MBs
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc26
Micron Read Performance Comparisons
0
50
100
150
200
250
300
350
400
450
1 2 4 8 16 32 64 128 256 512 1k 2k 4k 8k 16k 32k 64k 128k 256k 512k 1M 2M
Tran
sfer
Rat
e (M
Byt
ess
ec)
Bytes per Fetch
NOR and NAND Performance Comparisons Random Read Access Performance vs Data Size
x8 200MHz DDR Octal NOR (MT35X)
x8 166MHz SDR Twin Quad Serial NOR (MT25T)
x4 166MHz SDR 83MHz DDR Serial NOR (MT25Q) 18V
x4 133MHz SPI NAND
x8 NAND ONFI 30
x8 eMMC 45
x8 eMMC 50
+
+
CacheLine Fills
BOOT or Read time at 400MBsBit density 512Mb 1Gb 2GbByte density 64MB 128MB 256MBTime to read 16 sec 32 sec 64 sec
Graphic image read 2Bytes (65K colors)Pixel Size 1K x 1K 4K x 4KByte density 2MB 34MBTime to read 52ms 88ms
Xccelatrade FlashHighest Performance
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc
eMMC Fully Managed NANDPROVIDES REDUCED DESIGN EFFORT FOR MINIMAL COST
NAND
Wear leveling
ECC
Driver
NAND Controller
Raw NAND
ONFI NAND bus
CommandBlock Management
Low-level Driver
NAND Controller
Fully Managed NAND (eMMC)
MMC SATA or USB bus
NAND
Wear leveling CMDBlock
Mgmt NAND Error Mgmt
Controller
eMMC eUSBSATA amp CF
Cost amp Price
Ease of design amp Validation
27 June 15 2018
copy 2017 Micron Technology Inc
eMMC
28 June 15 2018
copy 2017 Micron Technology Inc
Enjoy Micron Automotive eMMC comprehensive Product Portfolio
PCIe NVMeUFS 2x
June 15 2018
copy 2017 Micron Technology Inc
New Features in eMMC 51
| June 15 201830
copy 2017 Micron Technology Inc
SSD Form FactorsEXISTING AND FUTURE DIRECTIONS
FORM FACTORSndash 25rdquo
ndash mSATA
ndash M2
ndash uBGA (Future)
INTERFACESndash SATA III
ndash PCIe
YEARLY FIRMWARE UPDATES
| June 15 201831
Parameter 25rdquo mSATA M2Capacities (GB) 60120240 60120240 120240
Specification EIA-720 MO-300B variation A PCIe M2 Spec Rev 10Dimensions (L) 10045mm
(W) 6985mm (H) 7mm
(L) 5080mm(W) 2985mm(H) 375mm
(L) 60 mm(W) 22 mm(H) 15 mm
Weight lt 70g lt 10g lt 10 g
Packaging MCP (Multi Chip Package)PoP (Package on Package)
copy 2017 Micron Technology Inc
What is an eMCPePoP
Benefits includehellipndash Board space savings through vertical stacking of several memory chips
ndash Minimize bill of materials for simplified manufacturing and cost savings
ndash High density low power consumption shortest interconnections possible
ndash Accelerated time to market through rapid integration of modules
ApplicationProcessor -Driver
MLC NAND
eMMC
PCB
LPDRAM
Controller
POP
Application Processor -Driver
SLC NAND
NAND MCP
LPDRAM
Printed Circuit Board (PCB)
ApplicationProcessor -Driver
eMMCePOPLPDRAM
ApplicationProcessor -Driver
eMMC
eMCP
LPDRAM
PCBPCB
eMCP is a Multi Chip Package including eMMC and LPDDRx
ePoP is an eMCP in a PoP (Package on Package) design
June 15 2018
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Power Calculatorshttpswwwmicroncomsupporttools-and-utilitiespower-calc
| June 15 201834
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Technical Notesndash httpswwwmicroncomadvanced
searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=ampshow=10ampfamily=2dd96f4ee22e4de7b7027e6dd6a2718campnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201835
copy 2017 Micron Technology Inc
Links to Micronrsquos NOR Flash Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=1f8cfba0d95c4ea9a6c99e3272fd0e39ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201836
copy 2017 Micron Technology Inc
Link to Micronrsquos eMMC Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=ff04c268087d4d33a126d6a5a59ccebdamptechnology=9b8d2c45520a422c8f635832d3a2b0eaampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201837
copy 2017 Micron Technology Inc
Link to Micronrsquos SSD Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=59b6cc75486a4bca80f5b1b8a2086740ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201838
copy 2017 Micron Technology Inc
iMX8 Quad Max
| June 15 20189
iMX8 QM Features Micronrsquos bull LPDDR4 (up to 8GB)bull XccelaTM Octal Flash Q-SPIbull 32GB eMMC50 (back side)
Board photo of released MX8 Quad Max
copy 2017 Micron Technology Inc
iMX8 Quad X Plus
| June 15 201810
iMX8 QXP Features Micronrsquos bull LPDDR4 (up to 8GB)bull XccelaTM Octal Flash Q-SPIbull 32GB eMMC50 (back side)
Board photo of released MX8 Quad X Plus
copy 2017 Micron Technology Inc
iMX8 M
| June 15 201811 | Micron Confidential
iMX8 M has validated Micronrsquos bull 3GB LPDDR4bull 256MbQuad SPIbull 16GB eMMC50
Quad SPI FlashMT25QL256ABA1EW9-0SIT
3GB LPDDR4 MT53B768M32D4NQ-062 WTB
16GB eMMCMTFC16GAKAECN-2M WT
Board photo of released MX8 M
DRAM Flash Market Section
copy 2017 Micron Technology Inc
DRAM Market Trends General Market vs Automotive Adoption
| June 15 201813
General Market
ndash DDR is the dominant interface for devices without batteries
ndash Increased LPDRAM adoption outside of mobile handsets driven by Tablets amp other Client apps
ndash DDR5LPDDR5 adoption projected to start in late CYrsquo19
Automotive
ndash Continued need for legacy support
ndash DDR3 is the primary choice for current gen low cost Infotainment and Cluster applications
ndash LPDDR4 will be the primary choice for next gen ADAS and high-end Infotainment applications
DDR2DDR3
DDR4
DDR5
LPDDR2LPDDR3
LPDDR4
LPDDR5GDDR55X GDDR6OtherLegacy
0
10
20
30
40
50
60
70
80
90
100
Source Micron Market Models
copy 2017 Micron Technology Inc
DRAM Market Trends General Market vs IMM
| June 15 201814
General Marketndash DDR is the dominant interface for devices
without batteries
ndash Increased LPDRAM adoption outside of mobile handsets driven by Tablets amp other Client apps
ndash DDR5LPDDR5 adoption projected to start in late CYrsquo19
Industrial Multi-Market (IMM)ndash Continued need for legacy support in both
DRAM and LPDRAM with a wide mix of technologies
ndash DRAM modules in Industrial Automation drive bulk of DDR4 adoption
ndash Strong LP adoption for battery driven applications LPDDR4 is gaining traction
in
1G
b eq
uiva
lent
s
DDR4
DDR3
LPDDR5
GDDR
DDR2
LPDDR2
General MarketOther
LPDDR4xLPDDR3
DDR5
Source Micron Marketing (Marchrsquo17)
DDR2DDR3
DDR4
DDR5
LPDDR2LPDDR3
LPDDR4
LPDDR5GDDR55X GDDR6OtherLegacy
0
10
20
30
40
50
60
70
80
90
100
Source Micron Market Models
copy 2017 Micron Technology Inc
Broad NVM Market Growth Dynamics
15
Continued strong deployment of eMMC ndash Broader embedded markets
UFS driven by mobilendash Higher performance density
Strong market momentum for PCIe ndash Essential performance driven applications
Source Micron market models
Managed NAND TAM Units ()
0
20
40
60
80
100
CY2017 CY2018 CY2019 CY2020
eMMC
UFS
PCIe
Others
copy 2017 Micron Technology Inc
Explosive Demand for Memory with Autonomous Driving
16
L5 expected to need gt1TB storage
Includes IVI Cluster Central amp Boot storage for autonomous Black Box Recording Source Micron Marketing
Density
0
500
1000
1500
2000
L1L2 L3 L4 L5
eMMC
UFS 21
UFS 30PCIe Gen 3 x2
PCIe x4
Storage Density Progression
eMMC
3000MBs
1600MBs
Seq Reads
800MBs
320MBs
Technical Details
copy 2017 Micron Technology Inc
LPDDRx and DDRx SDRAM Feature Comparison
| June 15 201818
Type LPDDR2 LPDDR3 LPDDR44X DDR2 DDR3DDR3L DDR4Die Density Up to 8Gb Up to 32Gb Up to 32Gb Up to 2Gb Up to 8Gb Up to 16Gb (128Gb 8H)
Core Voltage (Vdd) 12V 18V WL supply req
12V18V WL supply req
11V10V18V WL supply req
18V155V 15V135V
12VSeparate WL supply
25VIO Voltage 12V 12V 11V (4X = 06V) Same as VDD Same as VDD Same as VDD
Max Clock Freq Data rate 533MHzDDR1066 800MHzDDR1600 2133MHzDDR4267 533MHzDDR1066 1066MHzDDR2100 1600MHz+DDR3200+
Burst Lengths 4 8 16 8 16 32 4 8 BC4 8 BC4 8Configurations x16 x32 x16 x32 2Ch x16 x4 x8 x16 x4 x8 x16 x4 x8 x16
Address Command Signals
14 pins(Muxrsquod command
address)
14 pins(Muxrsquod command
address)
10 pins per channel(Muxrsquod command
Address)25 pins 27 pins 29 pins
(partial muxrsquod)
Address Command Data Rate
DDR(both rising and
falling edges of clock)
DDR (both rising and
falling edges of clock)
SDR(rising edge of clock
only)
SDR(rising edge of clock
only)
SDR(rising edge of
clock only)
SDR (rising edge of clock
only)
On Die Temperature Sensor Yes Yes Yes No OptionalRS Yes
DPD (Deep power-down mode) Yes Yes No No No No
Package Options POP MCP discrete POP MCP discrete PoP MCP discrete Discrete Discrete Discrete
ProductTemp Grades CT IT AIT AT AAT CT IT AIT AT AATWT (-25rsquo to 85rsquoC)
AAT (-40C to 105C)AUT (-40rsquoC to 125rsquoC)
CT IT AIT AT AAT CT IT AIT AT AAT AUT CT IT AIT AT AAT AUT
copy 2017 Micron Technology Inc | June 15 201819
Standard DRAM LPDRAM Form Factor Center bond pads for highest performance and lowest
costEdge bond pads allow for stacked die for MCP and PoP
packaging enabling compact form factors
Performance x4 x8 x16 is lower cost and supports higher density configurations
x32 allows system to support high bandwidthin point-to-point applications
DRAMpower
IDD specifications are geared towards moderate stand-by power providing the highest yields and lowest cost
Ultra low standby power enabled by on-die power management and long refresh rates
Systempower
Additional Delay Locked Loop (DLL) circuitry required for high performance which inhibits system power
savings
Lack of DLL circuitry allows for improved system power management System can enterexit power-down modes
as well as throttle or stop the clock
Key Takeaway
Optimized for cost and performancecost is primary feature
Optimized for battery life and portability low power amp smallest possible footprint are primary features
LPDD
R4 S
peci
fic In
foG
ener
al LP
vs
DD
R Co
mpa
rison
LPDRAM offers additional value over standard DRAM
Standard DRAM amp LPDRAM Trade Offs
copy 2017 Micron Technology Inc20
DRAM Performance Improvements Over Time (IO x16)
0
5
10
15
20
25
30
35
40
45
50
55
2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016 2017
Gbs
DDR2
DDR2-53385 Gbs
DDR2-667106 Gbs
DDR2-800128 Gbs
DDR3-106617 Gbs
DDR3-1333213 Gbs
DDR3-1600256 Gbs
DDR3-186630 Gbs
DDR4-213334 Gbs
DDR4-2400384 Gbs
DDR4-2666427 Gbs
DDR4-3200512 Gbs
DDR3
DDR4
June 15 2018
copy 2017 Micron Technology Inc21
0
20
40
60
80
100
120
140
160
2010 2011 2012 2013 2014 2015 2016 2017 2018
LPDDR2-800256 Gbs
LPDDR2-10663411 Gbs
LPDDR2LPDDR3-1600
512 Gbs
LPDDR3-1866 59712 Gbs
LPDDR3
LPDDR4-37331194 Gbs
LPDDR4-426613651 Gbs
LPDDR4
LPDDR4-32001024 Gbs
Gbs
LPDDR Performance Improvements Over Time (IO x32)
LPDDR4-32001024 Gbs
June 15 2018
Non-Volatile Details
copy 2017 Micron Technology Inc | June 15 201823
Xccelatrade Flash Best of Parallel and Serial NOR Flash
Compared to Page Mode Parallel NOR
5X THE PERFORMANCE 4X FEWER PINS 3X LESS ENERGY AND 2X SMALLER PACKAGE
512MbParallel NOR
MT28EW
512MbQuad-SPIMT25Q
512MbTwin-Quad
MT25T
512MbXccela Flash
MT35X
Bandwidth 80MBs(Page mode async x16)
90MBs(90MHz DDR mode)
180MBs(90MHz DDR mode)
400MBs(200MHz DDR mode)
Initial WordAccess Time 95ns (x16) 139ns (18V 4-bit)
157ns (18V 16-bits)139ns (18V 8-bit)145ns (18V 16-bit)
85ns (18V 8-bit)875ns (18V 16-bit)
Subsequent Word Access
20ns (16-bits)(95ns across 32B page)
6ns (4-bits)24ns (16-bits)
6ns (8-bits)12ns (16-bits)
25ns (8-bits)5ns (16-bits)
Package and Pins 64-TBGA (11x13mm)50 Active Pins
24-BGA (6x8mm)6 Active Pins
24-BGA (6x8mm)11 Active Pins
24-BGA (6x8mm)11 Active Pins
Energy Per Bit 101 pJbit 41 pJbit 41 pJbit 28 pJbit
Xccelatrade Flash(MT35X)
Parallel NOR FlashHigh performance
Fast bootReliability
Serial NOR FlashReduced pin countsSimple PCB design
ReliabilityNeed more
performance with same package
Want reduced pin countpackage size
Source Micron datasheets
copy 2017 Micron Technology Inc
MT35X (Octal) aka
24
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc
The Evolution of SPI
25
SPI Dual-SPI Quad-SPI Twin Quad Octal of Signals 6 6 6 10-12 11
Clock (max) 75MHz 75MHz 180MHz SDR (90MHz DDR) 180MHz SDR (90MHz DDR) 166MHz SDR (200MHz DDR)
Bandwidth (max) 9MBs 18MBs 90MBs 180MBs 400MBs
0 MBs
50 MBs
100 MBs
150 MBs
200 MBs
250 MBs
300 MBs
350 MBs
400 MBs
450 MBs
500 MBs
1997 2006 2016
SPI Interface Bandwidth
Dual-IO18MBs
Quad (SDR)40MBs
Twin-Quad 180MBs
Octal 400MBs
Quad (DDR) 90MBs
125MBs 9MBs
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc26
Micron Read Performance Comparisons
0
50
100
150
200
250
300
350
400
450
1 2 4 8 16 32 64 128 256 512 1k 2k 4k 8k 16k 32k 64k 128k 256k 512k 1M 2M
Tran
sfer
Rat
e (M
Byt
ess
ec)
Bytes per Fetch
NOR and NAND Performance Comparisons Random Read Access Performance vs Data Size
x8 200MHz DDR Octal NOR (MT35X)
x8 166MHz SDR Twin Quad Serial NOR (MT25T)
x4 166MHz SDR 83MHz DDR Serial NOR (MT25Q) 18V
x4 133MHz SPI NAND
x8 NAND ONFI 30
x8 eMMC 45
x8 eMMC 50
+
+
CacheLine Fills
BOOT or Read time at 400MBsBit density 512Mb 1Gb 2GbByte density 64MB 128MB 256MBTime to read 16 sec 32 sec 64 sec
Graphic image read 2Bytes (65K colors)Pixel Size 1K x 1K 4K x 4KByte density 2MB 34MBTime to read 52ms 88ms
Xccelatrade FlashHighest Performance
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc
eMMC Fully Managed NANDPROVIDES REDUCED DESIGN EFFORT FOR MINIMAL COST
NAND
Wear leveling
ECC
Driver
NAND Controller
Raw NAND
ONFI NAND bus
CommandBlock Management
Low-level Driver
NAND Controller
Fully Managed NAND (eMMC)
MMC SATA or USB bus
NAND
Wear leveling CMDBlock
Mgmt NAND Error Mgmt
Controller
eMMC eUSBSATA amp CF
Cost amp Price
Ease of design amp Validation
27 June 15 2018
copy 2017 Micron Technology Inc
eMMC
28 June 15 2018
copy 2017 Micron Technology Inc
Enjoy Micron Automotive eMMC comprehensive Product Portfolio
PCIe NVMeUFS 2x
June 15 2018
copy 2017 Micron Technology Inc
New Features in eMMC 51
| June 15 201830
copy 2017 Micron Technology Inc
SSD Form FactorsEXISTING AND FUTURE DIRECTIONS
FORM FACTORSndash 25rdquo
ndash mSATA
ndash M2
ndash uBGA (Future)
INTERFACESndash SATA III
ndash PCIe
YEARLY FIRMWARE UPDATES
| June 15 201831
Parameter 25rdquo mSATA M2Capacities (GB) 60120240 60120240 120240
Specification EIA-720 MO-300B variation A PCIe M2 Spec Rev 10Dimensions (L) 10045mm
(W) 6985mm (H) 7mm
(L) 5080mm(W) 2985mm(H) 375mm
(L) 60 mm(W) 22 mm(H) 15 mm
Weight lt 70g lt 10g lt 10 g
Packaging MCP (Multi Chip Package)PoP (Package on Package)
copy 2017 Micron Technology Inc
What is an eMCPePoP
Benefits includehellipndash Board space savings through vertical stacking of several memory chips
ndash Minimize bill of materials for simplified manufacturing and cost savings
ndash High density low power consumption shortest interconnections possible
ndash Accelerated time to market through rapid integration of modules
ApplicationProcessor -Driver
MLC NAND
eMMC
PCB
LPDRAM
Controller
POP
Application Processor -Driver
SLC NAND
NAND MCP
LPDRAM
Printed Circuit Board (PCB)
ApplicationProcessor -Driver
eMMCePOPLPDRAM
ApplicationProcessor -Driver
eMMC
eMCP
LPDRAM
PCBPCB
eMCP is a Multi Chip Package including eMMC and LPDDRx
ePoP is an eMCP in a PoP (Package on Package) design
June 15 2018
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Power Calculatorshttpswwwmicroncomsupporttools-and-utilitiespower-calc
| June 15 201834
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Technical Notesndash httpswwwmicroncomadvanced
searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=ampshow=10ampfamily=2dd96f4ee22e4de7b7027e6dd6a2718campnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201835
copy 2017 Micron Technology Inc
Links to Micronrsquos NOR Flash Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=1f8cfba0d95c4ea9a6c99e3272fd0e39ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201836
copy 2017 Micron Technology Inc
Link to Micronrsquos eMMC Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=ff04c268087d4d33a126d6a5a59ccebdamptechnology=9b8d2c45520a422c8f635832d3a2b0eaampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201837
copy 2017 Micron Technology Inc
Link to Micronrsquos SSD Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=59b6cc75486a4bca80f5b1b8a2086740ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201838
copy 2017 Micron Technology Inc
iMX8 Quad X Plus
| June 15 201810
iMX8 QXP Features Micronrsquos bull LPDDR4 (up to 8GB)bull XccelaTM Octal Flash Q-SPIbull 32GB eMMC50 (back side)
Board photo of released MX8 Quad X Plus
copy 2017 Micron Technology Inc
iMX8 M
| June 15 201811 | Micron Confidential
iMX8 M has validated Micronrsquos bull 3GB LPDDR4bull 256MbQuad SPIbull 16GB eMMC50
Quad SPI FlashMT25QL256ABA1EW9-0SIT
3GB LPDDR4 MT53B768M32D4NQ-062 WTB
16GB eMMCMTFC16GAKAECN-2M WT
Board photo of released MX8 M
DRAM Flash Market Section
copy 2017 Micron Technology Inc
DRAM Market Trends General Market vs Automotive Adoption
| June 15 201813
General Market
ndash DDR is the dominant interface for devices without batteries
ndash Increased LPDRAM adoption outside of mobile handsets driven by Tablets amp other Client apps
ndash DDR5LPDDR5 adoption projected to start in late CYrsquo19
Automotive
ndash Continued need for legacy support
ndash DDR3 is the primary choice for current gen low cost Infotainment and Cluster applications
ndash LPDDR4 will be the primary choice for next gen ADAS and high-end Infotainment applications
DDR2DDR3
DDR4
DDR5
LPDDR2LPDDR3
LPDDR4
LPDDR5GDDR55X GDDR6OtherLegacy
0
10
20
30
40
50
60
70
80
90
100
Source Micron Market Models
copy 2017 Micron Technology Inc
DRAM Market Trends General Market vs IMM
| June 15 201814
General Marketndash DDR is the dominant interface for devices
without batteries
ndash Increased LPDRAM adoption outside of mobile handsets driven by Tablets amp other Client apps
ndash DDR5LPDDR5 adoption projected to start in late CYrsquo19
Industrial Multi-Market (IMM)ndash Continued need for legacy support in both
DRAM and LPDRAM with a wide mix of technologies
ndash DRAM modules in Industrial Automation drive bulk of DDR4 adoption
ndash Strong LP adoption for battery driven applications LPDDR4 is gaining traction
in
1G
b eq
uiva
lent
s
DDR4
DDR3
LPDDR5
GDDR
DDR2
LPDDR2
General MarketOther
LPDDR4xLPDDR3
DDR5
Source Micron Marketing (Marchrsquo17)
DDR2DDR3
DDR4
DDR5
LPDDR2LPDDR3
LPDDR4
LPDDR5GDDR55X GDDR6OtherLegacy
0
10
20
30
40
50
60
70
80
90
100
Source Micron Market Models
copy 2017 Micron Technology Inc
Broad NVM Market Growth Dynamics
15
Continued strong deployment of eMMC ndash Broader embedded markets
UFS driven by mobilendash Higher performance density
Strong market momentum for PCIe ndash Essential performance driven applications
Source Micron market models
Managed NAND TAM Units ()
0
20
40
60
80
100
CY2017 CY2018 CY2019 CY2020
eMMC
UFS
PCIe
Others
copy 2017 Micron Technology Inc
Explosive Demand for Memory with Autonomous Driving
16
L5 expected to need gt1TB storage
Includes IVI Cluster Central amp Boot storage for autonomous Black Box Recording Source Micron Marketing
Density
0
500
1000
1500
2000
L1L2 L3 L4 L5
eMMC
UFS 21
UFS 30PCIe Gen 3 x2
PCIe x4
Storage Density Progression
eMMC
3000MBs
1600MBs
Seq Reads
800MBs
320MBs
Technical Details
copy 2017 Micron Technology Inc
LPDDRx and DDRx SDRAM Feature Comparison
| June 15 201818
Type LPDDR2 LPDDR3 LPDDR44X DDR2 DDR3DDR3L DDR4Die Density Up to 8Gb Up to 32Gb Up to 32Gb Up to 2Gb Up to 8Gb Up to 16Gb (128Gb 8H)
Core Voltage (Vdd) 12V 18V WL supply req
12V18V WL supply req
11V10V18V WL supply req
18V155V 15V135V
12VSeparate WL supply
25VIO Voltage 12V 12V 11V (4X = 06V) Same as VDD Same as VDD Same as VDD
Max Clock Freq Data rate 533MHzDDR1066 800MHzDDR1600 2133MHzDDR4267 533MHzDDR1066 1066MHzDDR2100 1600MHz+DDR3200+
Burst Lengths 4 8 16 8 16 32 4 8 BC4 8 BC4 8Configurations x16 x32 x16 x32 2Ch x16 x4 x8 x16 x4 x8 x16 x4 x8 x16
Address Command Signals
14 pins(Muxrsquod command
address)
14 pins(Muxrsquod command
address)
10 pins per channel(Muxrsquod command
Address)25 pins 27 pins 29 pins
(partial muxrsquod)
Address Command Data Rate
DDR(both rising and
falling edges of clock)
DDR (both rising and
falling edges of clock)
SDR(rising edge of clock
only)
SDR(rising edge of clock
only)
SDR(rising edge of
clock only)
SDR (rising edge of clock
only)
On Die Temperature Sensor Yes Yes Yes No OptionalRS Yes
DPD (Deep power-down mode) Yes Yes No No No No
Package Options POP MCP discrete POP MCP discrete PoP MCP discrete Discrete Discrete Discrete
ProductTemp Grades CT IT AIT AT AAT CT IT AIT AT AATWT (-25rsquo to 85rsquoC)
AAT (-40C to 105C)AUT (-40rsquoC to 125rsquoC)
CT IT AIT AT AAT CT IT AIT AT AAT AUT CT IT AIT AT AAT AUT
copy 2017 Micron Technology Inc | June 15 201819
Standard DRAM LPDRAM Form Factor Center bond pads for highest performance and lowest
costEdge bond pads allow for stacked die for MCP and PoP
packaging enabling compact form factors
Performance x4 x8 x16 is lower cost and supports higher density configurations
x32 allows system to support high bandwidthin point-to-point applications
DRAMpower
IDD specifications are geared towards moderate stand-by power providing the highest yields and lowest cost
Ultra low standby power enabled by on-die power management and long refresh rates
Systempower
Additional Delay Locked Loop (DLL) circuitry required for high performance which inhibits system power
savings
Lack of DLL circuitry allows for improved system power management System can enterexit power-down modes
as well as throttle or stop the clock
Key Takeaway
Optimized for cost and performancecost is primary feature
Optimized for battery life and portability low power amp smallest possible footprint are primary features
LPDD
R4 S
peci
fic In
foG
ener
al LP
vs
DD
R Co
mpa
rison
LPDRAM offers additional value over standard DRAM
Standard DRAM amp LPDRAM Trade Offs
copy 2017 Micron Technology Inc20
DRAM Performance Improvements Over Time (IO x16)
0
5
10
15
20
25
30
35
40
45
50
55
2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016 2017
Gbs
DDR2
DDR2-53385 Gbs
DDR2-667106 Gbs
DDR2-800128 Gbs
DDR3-106617 Gbs
DDR3-1333213 Gbs
DDR3-1600256 Gbs
DDR3-186630 Gbs
DDR4-213334 Gbs
DDR4-2400384 Gbs
DDR4-2666427 Gbs
DDR4-3200512 Gbs
DDR3
DDR4
June 15 2018
copy 2017 Micron Technology Inc21
0
20
40
60
80
100
120
140
160
2010 2011 2012 2013 2014 2015 2016 2017 2018
LPDDR2-800256 Gbs
LPDDR2-10663411 Gbs
LPDDR2LPDDR3-1600
512 Gbs
LPDDR3-1866 59712 Gbs
LPDDR3
LPDDR4-37331194 Gbs
LPDDR4-426613651 Gbs
LPDDR4
LPDDR4-32001024 Gbs
Gbs
LPDDR Performance Improvements Over Time (IO x32)
LPDDR4-32001024 Gbs
June 15 2018
Non-Volatile Details
copy 2017 Micron Technology Inc | June 15 201823
Xccelatrade Flash Best of Parallel and Serial NOR Flash
Compared to Page Mode Parallel NOR
5X THE PERFORMANCE 4X FEWER PINS 3X LESS ENERGY AND 2X SMALLER PACKAGE
512MbParallel NOR
MT28EW
512MbQuad-SPIMT25Q
512MbTwin-Quad
MT25T
512MbXccela Flash
MT35X
Bandwidth 80MBs(Page mode async x16)
90MBs(90MHz DDR mode)
180MBs(90MHz DDR mode)
400MBs(200MHz DDR mode)
Initial WordAccess Time 95ns (x16) 139ns (18V 4-bit)
157ns (18V 16-bits)139ns (18V 8-bit)145ns (18V 16-bit)
85ns (18V 8-bit)875ns (18V 16-bit)
Subsequent Word Access
20ns (16-bits)(95ns across 32B page)
6ns (4-bits)24ns (16-bits)
6ns (8-bits)12ns (16-bits)
25ns (8-bits)5ns (16-bits)
Package and Pins 64-TBGA (11x13mm)50 Active Pins
24-BGA (6x8mm)6 Active Pins
24-BGA (6x8mm)11 Active Pins
24-BGA (6x8mm)11 Active Pins
Energy Per Bit 101 pJbit 41 pJbit 41 pJbit 28 pJbit
Xccelatrade Flash(MT35X)
Parallel NOR FlashHigh performance
Fast bootReliability
Serial NOR FlashReduced pin countsSimple PCB design
ReliabilityNeed more
performance with same package
Want reduced pin countpackage size
Source Micron datasheets
copy 2017 Micron Technology Inc
MT35X (Octal) aka
24
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc
The Evolution of SPI
25
SPI Dual-SPI Quad-SPI Twin Quad Octal of Signals 6 6 6 10-12 11
Clock (max) 75MHz 75MHz 180MHz SDR (90MHz DDR) 180MHz SDR (90MHz DDR) 166MHz SDR (200MHz DDR)
Bandwidth (max) 9MBs 18MBs 90MBs 180MBs 400MBs
0 MBs
50 MBs
100 MBs
150 MBs
200 MBs
250 MBs
300 MBs
350 MBs
400 MBs
450 MBs
500 MBs
1997 2006 2016
SPI Interface Bandwidth
Dual-IO18MBs
Quad (SDR)40MBs
Twin-Quad 180MBs
Octal 400MBs
Quad (DDR) 90MBs
125MBs 9MBs
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc26
Micron Read Performance Comparisons
0
50
100
150
200
250
300
350
400
450
1 2 4 8 16 32 64 128 256 512 1k 2k 4k 8k 16k 32k 64k 128k 256k 512k 1M 2M
Tran
sfer
Rat
e (M
Byt
ess
ec)
Bytes per Fetch
NOR and NAND Performance Comparisons Random Read Access Performance vs Data Size
x8 200MHz DDR Octal NOR (MT35X)
x8 166MHz SDR Twin Quad Serial NOR (MT25T)
x4 166MHz SDR 83MHz DDR Serial NOR (MT25Q) 18V
x4 133MHz SPI NAND
x8 NAND ONFI 30
x8 eMMC 45
x8 eMMC 50
+
+
CacheLine Fills
BOOT or Read time at 400MBsBit density 512Mb 1Gb 2GbByte density 64MB 128MB 256MBTime to read 16 sec 32 sec 64 sec
Graphic image read 2Bytes (65K colors)Pixel Size 1K x 1K 4K x 4KByte density 2MB 34MBTime to read 52ms 88ms
Xccelatrade FlashHighest Performance
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc
eMMC Fully Managed NANDPROVIDES REDUCED DESIGN EFFORT FOR MINIMAL COST
NAND
Wear leveling
ECC
Driver
NAND Controller
Raw NAND
ONFI NAND bus
CommandBlock Management
Low-level Driver
NAND Controller
Fully Managed NAND (eMMC)
MMC SATA or USB bus
NAND
Wear leveling CMDBlock
Mgmt NAND Error Mgmt
Controller
eMMC eUSBSATA amp CF
Cost amp Price
Ease of design amp Validation
27 June 15 2018
copy 2017 Micron Technology Inc
eMMC
28 June 15 2018
copy 2017 Micron Technology Inc
Enjoy Micron Automotive eMMC comprehensive Product Portfolio
PCIe NVMeUFS 2x
June 15 2018
copy 2017 Micron Technology Inc
New Features in eMMC 51
| June 15 201830
copy 2017 Micron Technology Inc
SSD Form FactorsEXISTING AND FUTURE DIRECTIONS
FORM FACTORSndash 25rdquo
ndash mSATA
ndash M2
ndash uBGA (Future)
INTERFACESndash SATA III
ndash PCIe
YEARLY FIRMWARE UPDATES
| June 15 201831
Parameter 25rdquo mSATA M2Capacities (GB) 60120240 60120240 120240
Specification EIA-720 MO-300B variation A PCIe M2 Spec Rev 10Dimensions (L) 10045mm
(W) 6985mm (H) 7mm
(L) 5080mm(W) 2985mm(H) 375mm
(L) 60 mm(W) 22 mm(H) 15 mm
Weight lt 70g lt 10g lt 10 g
Packaging MCP (Multi Chip Package)PoP (Package on Package)
copy 2017 Micron Technology Inc
What is an eMCPePoP
Benefits includehellipndash Board space savings through vertical stacking of several memory chips
ndash Minimize bill of materials for simplified manufacturing and cost savings
ndash High density low power consumption shortest interconnections possible
ndash Accelerated time to market through rapid integration of modules
ApplicationProcessor -Driver
MLC NAND
eMMC
PCB
LPDRAM
Controller
POP
Application Processor -Driver
SLC NAND
NAND MCP
LPDRAM
Printed Circuit Board (PCB)
ApplicationProcessor -Driver
eMMCePOPLPDRAM
ApplicationProcessor -Driver
eMMC
eMCP
LPDRAM
PCBPCB
eMCP is a Multi Chip Package including eMMC and LPDDRx
ePoP is an eMCP in a PoP (Package on Package) design
June 15 2018
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Power Calculatorshttpswwwmicroncomsupporttools-and-utilitiespower-calc
| June 15 201834
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Technical Notesndash httpswwwmicroncomadvanced
searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=ampshow=10ampfamily=2dd96f4ee22e4de7b7027e6dd6a2718campnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201835
copy 2017 Micron Technology Inc
Links to Micronrsquos NOR Flash Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=1f8cfba0d95c4ea9a6c99e3272fd0e39ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201836
copy 2017 Micron Technology Inc
Link to Micronrsquos eMMC Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=ff04c268087d4d33a126d6a5a59ccebdamptechnology=9b8d2c45520a422c8f635832d3a2b0eaampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201837
copy 2017 Micron Technology Inc
Link to Micronrsquos SSD Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=59b6cc75486a4bca80f5b1b8a2086740ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201838
copy 2017 Micron Technology Inc
iMX8 M
| June 15 201811 | Micron Confidential
iMX8 M has validated Micronrsquos bull 3GB LPDDR4bull 256MbQuad SPIbull 16GB eMMC50
Quad SPI FlashMT25QL256ABA1EW9-0SIT
3GB LPDDR4 MT53B768M32D4NQ-062 WTB
16GB eMMCMTFC16GAKAECN-2M WT
Board photo of released MX8 M
DRAM Flash Market Section
copy 2017 Micron Technology Inc
DRAM Market Trends General Market vs Automotive Adoption
| June 15 201813
General Market
ndash DDR is the dominant interface for devices without batteries
ndash Increased LPDRAM adoption outside of mobile handsets driven by Tablets amp other Client apps
ndash DDR5LPDDR5 adoption projected to start in late CYrsquo19
Automotive
ndash Continued need for legacy support
ndash DDR3 is the primary choice for current gen low cost Infotainment and Cluster applications
ndash LPDDR4 will be the primary choice for next gen ADAS and high-end Infotainment applications
DDR2DDR3
DDR4
DDR5
LPDDR2LPDDR3
LPDDR4
LPDDR5GDDR55X GDDR6OtherLegacy
0
10
20
30
40
50
60
70
80
90
100
Source Micron Market Models
copy 2017 Micron Technology Inc
DRAM Market Trends General Market vs IMM
| June 15 201814
General Marketndash DDR is the dominant interface for devices
without batteries
ndash Increased LPDRAM adoption outside of mobile handsets driven by Tablets amp other Client apps
ndash DDR5LPDDR5 adoption projected to start in late CYrsquo19
Industrial Multi-Market (IMM)ndash Continued need for legacy support in both
DRAM and LPDRAM with a wide mix of technologies
ndash DRAM modules in Industrial Automation drive bulk of DDR4 adoption
ndash Strong LP adoption for battery driven applications LPDDR4 is gaining traction
in
1G
b eq
uiva
lent
s
DDR4
DDR3
LPDDR5
GDDR
DDR2
LPDDR2
General MarketOther
LPDDR4xLPDDR3
DDR5
Source Micron Marketing (Marchrsquo17)
DDR2DDR3
DDR4
DDR5
LPDDR2LPDDR3
LPDDR4
LPDDR5GDDR55X GDDR6OtherLegacy
0
10
20
30
40
50
60
70
80
90
100
Source Micron Market Models
copy 2017 Micron Technology Inc
Broad NVM Market Growth Dynamics
15
Continued strong deployment of eMMC ndash Broader embedded markets
UFS driven by mobilendash Higher performance density
Strong market momentum for PCIe ndash Essential performance driven applications
Source Micron market models
Managed NAND TAM Units ()
0
20
40
60
80
100
CY2017 CY2018 CY2019 CY2020
eMMC
UFS
PCIe
Others
copy 2017 Micron Technology Inc
Explosive Demand for Memory with Autonomous Driving
16
L5 expected to need gt1TB storage
Includes IVI Cluster Central amp Boot storage for autonomous Black Box Recording Source Micron Marketing
Density
0
500
1000
1500
2000
L1L2 L3 L4 L5
eMMC
UFS 21
UFS 30PCIe Gen 3 x2
PCIe x4
Storage Density Progression
eMMC
3000MBs
1600MBs
Seq Reads
800MBs
320MBs
Technical Details
copy 2017 Micron Technology Inc
LPDDRx and DDRx SDRAM Feature Comparison
| June 15 201818
Type LPDDR2 LPDDR3 LPDDR44X DDR2 DDR3DDR3L DDR4Die Density Up to 8Gb Up to 32Gb Up to 32Gb Up to 2Gb Up to 8Gb Up to 16Gb (128Gb 8H)
Core Voltage (Vdd) 12V 18V WL supply req
12V18V WL supply req
11V10V18V WL supply req
18V155V 15V135V
12VSeparate WL supply
25VIO Voltage 12V 12V 11V (4X = 06V) Same as VDD Same as VDD Same as VDD
Max Clock Freq Data rate 533MHzDDR1066 800MHzDDR1600 2133MHzDDR4267 533MHzDDR1066 1066MHzDDR2100 1600MHz+DDR3200+
Burst Lengths 4 8 16 8 16 32 4 8 BC4 8 BC4 8Configurations x16 x32 x16 x32 2Ch x16 x4 x8 x16 x4 x8 x16 x4 x8 x16
Address Command Signals
14 pins(Muxrsquod command
address)
14 pins(Muxrsquod command
address)
10 pins per channel(Muxrsquod command
Address)25 pins 27 pins 29 pins
(partial muxrsquod)
Address Command Data Rate
DDR(both rising and
falling edges of clock)
DDR (both rising and
falling edges of clock)
SDR(rising edge of clock
only)
SDR(rising edge of clock
only)
SDR(rising edge of
clock only)
SDR (rising edge of clock
only)
On Die Temperature Sensor Yes Yes Yes No OptionalRS Yes
DPD (Deep power-down mode) Yes Yes No No No No
Package Options POP MCP discrete POP MCP discrete PoP MCP discrete Discrete Discrete Discrete
ProductTemp Grades CT IT AIT AT AAT CT IT AIT AT AATWT (-25rsquo to 85rsquoC)
AAT (-40C to 105C)AUT (-40rsquoC to 125rsquoC)
CT IT AIT AT AAT CT IT AIT AT AAT AUT CT IT AIT AT AAT AUT
copy 2017 Micron Technology Inc | June 15 201819
Standard DRAM LPDRAM Form Factor Center bond pads for highest performance and lowest
costEdge bond pads allow for stacked die for MCP and PoP
packaging enabling compact form factors
Performance x4 x8 x16 is lower cost and supports higher density configurations
x32 allows system to support high bandwidthin point-to-point applications
DRAMpower
IDD specifications are geared towards moderate stand-by power providing the highest yields and lowest cost
Ultra low standby power enabled by on-die power management and long refresh rates
Systempower
Additional Delay Locked Loop (DLL) circuitry required for high performance which inhibits system power
savings
Lack of DLL circuitry allows for improved system power management System can enterexit power-down modes
as well as throttle or stop the clock
Key Takeaway
Optimized for cost and performancecost is primary feature
Optimized for battery life and portability low power amp smallest possible footprint are primary features
LPDD
R4 S
peci
fic In
foG
ener
al LP
vs
DD
R Co
mpa
rison
LPDRAM offers additional value over standard DRAM
Standard DRAM amp LPDRAM Trade Offs
copy 2017 Micron Technology Inc20
DRAM Performance Improvements Over Time (IO x16)
0
5
10
15
20
25
30
35
40
45
50
55
2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016 2017
Gbs
DDR2
DDR2-53385 Gbs
DDR2-667106 Gbs
DDR2-800128 Gbs
DDR3-106617 Gbs
DDR3-1333213 Gbs
DDR3-1600256 Gbs
DDR3-186630 Gbs
DDR4-213334 Gbs
DDR4-2400384 Gbs
DDR4-2666427 Gbs
DDR4-3200512 Gbs
DDR3
DDR4
June 15 2018
copy 2017 Micron Technology Inc21
0
20
40
60
80
100
120
140
160
2010 2011 2012 2013 2014 2015 2016 2017 2018
LPDDR2-800256 Gbs
LPDDR2-10663411 Gbs
LPDDR2LPDDR3-1600
512 Gbs
LPDDR3-1866 59712 Gbs
LPDDR3
LPDDR4-37331194 Gbs
LPDDR4-426613651 Gbs
LPDDR4
LPDDR4-32001024 Gbs
Gbs
LPDDR Performance Improvements Over Time (IO x32)
LPDDR4-32001024 Gbs
June 15 2018
Non-Volatile Details
copy 2017 Micron Technology Inc | June 15 201823
Xccelatrade Flash Best of Parallel and Serial NOR Flash
Compared to Page Mode Parallel NOR
5X THE PERFORMANCE 4X FEWER PINS 3X LESS ENERGY AND 2X SMALLER PACKAGE
512MbParallel NOR
MT28EW
512MbQuad-SPIMT25Q
512MbTwin-Quad
MT25T
512MbXccela Flash
MT35X
Bandwidth 80MBs(Page mode async x16)
90MBs(90MHz DDR mode)
180MBs(90MHz DDR mode)
400MBs(200MHz DDR mode)
Initial WordAccess Time 95ns (x16) 139ns (18V 4-bit)
157ns (18V 16-bits)139ns (18V 8-bit)145ns (18V 16-bit)
85ns (18V 8-bit)875ns (18V 16-bit)
Subsequent Word Access
20ns (16-bits)(95ns across 32B page)
6ns (4-bits)24ns (16-bits)
6ns (8-bits)12ns (16-bits)
25ns (8-bits)5ns (16-bits)
Package and Pins 64-TBGA (11x13mm)50 Active Pins
24-BGA (6x8mm)6 Active Pins
24-BGA (6x8mm)11 Active Pins
24-BGA (6x8mm)11 Active Pins
Energy Per Bit 101 pJbit 41 pJbit 41 pJbit 28 pJbit
Xccelatrade Flash(MT35X)
Parallel NOR FlashHigh performance
Fast bootReliability
Serial NOR FlashReduced pin countsSimple PCB design
ReliabilityNeed more
performance with same package
Want reduced pin countpackage size
Source Micron datasheets
copy 2017 Micron Technology Inc
MT35X (Octal) aka
24
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc
The Evolution of SPI
25
SPI Dual-SPI Quad-SPI Twin Quad Octal of Signals 6 6 6 10-12 11
Clock (max) 75MHz 75MHz 180MHz SDR (90MHz DDR) 180MHz SDR (90MHz DDR) 166MHz SDR (200MHz DDR)
Bandwidth (max) 9MBs 18MBs 90MBs 180MBs 400MBs
0 MBs
50 MBs
100 MBs
150 MBs
200 MBs
250 MBs
300 MBs
350 MBs
400 MBs
450 MBs
500 MBs
1997 2006 2016
SPI Interface Bandwidth
Dual-IO18MBs
Quad (SDR)40MBs
Twin-Quad 180MBs
Octal 400MBs
Quad (DDR) 90MBs
125MBs 9MBs
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc26
Micron Read Performance Comparisons
0
50
100
150
200
250
300
350
400
450
1 2 4 8 16 32 64 128 256 512 1k 2k 4k 8k 16k 32k 64k 128k 256k 512k 1M 2M
Tran
sfer
Rat
e (M
Byt
ess
ec)
Bytes per Fetch
NOR and NAND Performance Comparisons Random Read Access Performance vs Data Size
x8 200MHz DDR Octal NOR (MT35X)
x8 166MHz SDR Twin Quad Serial NOR (MT25T)
x4 166MHz SDR 83MHz DDR Serial NOR (MT25Q) 18V
x4 133MHz SPI NAND
x8 NAND ONFI 30
x8 eMMC 45
x8 eMMC 50
+
+
CacheLine Fills
BOOT or Read time at 400MBsBit density 512Mb 1Gb 2GbByte density 64MB 128MB 256MBTime to read 16 sec 32 sec 64 sec
Graphic image read 2Bytes (65K colors)Pixel Size 1K x 1K 4K x 4KByte density 2MB 34MBTime to read 52ms 88ms
Xccelatrade FlashHighest Performance
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc
eMMC Fully Managed NANDPROVIDES REDUCED DESIGN EFFORT FOR MINIMAL COST
NAND
Wear leveling
ECC
Driver
NAND Controller
Raw NAND
ONFI NAND bus
CommandBlock Management
Low-level Driver
NAND Controller
Fully Managed NAND (eMMC)
MMC SATA or USB bus
NAND
Wear leveling CMDBlock
Mgmt NAND Error Mgmt
Controller
eMMC eUSBSATA amp CF
Cost amp Price
Ease of design amp Validation
27 June 15 2018
copy 2017 Micron Technology Inc
eMMC
28 June 15 2018
copy 2017 Micron Technology Inc
Enjoy Micron Automotive eMMC comprehensive Product Portfolio
PCIe NVMeUFS 2x
June 15 2018
copy 2017 Micron Technology Inc
New Features in eMMC 51
| June 15 201830
copy 2017 Micron Technology Inc
SSD Form FactorsEXISTING AND FUTURE DIRECTIONS
FORM FACTORSndash 25rdquo
ndash mSATA
ndash M2
ndash uBGA (Future)
INTERFACESndash SATA III
ndash PCIe
YEARLY FIRMWARE UPDATES
| June 15 201831
Parameter 25rdquo mSATA M2Capacities (GB) 60120240 60120240 120240
Specification EIA-720 MO-300B variation A PCIe M2 Spec Rev 10Dimensions (L) 10045mm
(W) 6985mm (H) 7mm
(L) 5080mm(W) 2985mm(H) 375mm
(L) 60 mm(W) 22 mm(H) 15 mm
Weight lt 70g lt 10g lt 10 g
Packaging MCP (Multi Chip Package)PoP (Package on Package)
copy 2017 Micron Technology Inc
What is an eMCPePoP
Benefits includehellipndash Board space savings through vertical stacking of several memory chips
ndash Minimize bill of materials for simplified manufacturing and cost savings
ndash High density low power consumption shortest interconnections possible
ndash Accelerated time to market through rapid integration of modules
ApplicationProcessor -Driver
MLC NAND
eMMC
PCB
LPDRAM
Controller
POP
Application Processor -Driver
SLC NAND
NAND MCP
LPDRAM
Printed Circuit Board (PCB)
ApplicationProcessor -Driver
eMMCePOPLPDRAM
ApplicationProcessor -Driver
eMMC
eMCP
LPDRAM
PCBPCB
eMCP is a Multi Chip Package including eMMC and LPDDRx
ePoP is an eMCP in a PoP (Package on Package) design
June 15 2018
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Power Calculatorshttpswwwmicroncomsupporttools-and-utilitiespower-calc
| June 15 201834
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Technical Notesndash httpswwwmicroncomadvanced
searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=ampshow=10ampfamily=2dd96f4ee22e4de7b7027e6dd6a2718campnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201835
copy 2017 Micron Technology Inc
Links to Micronrsquos NOR Flash Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=1f8cfba0d95c4ea9a6c99e3272fd0e39ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201836
copy 2017 Micron Technology Inc
Link to Micronrsquos eMMC Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=ff04c268087d4d33a126d6a5a59ccebdamptechnology=9b8d2c45520a422c8f635832d3a2b0eaampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201837
copy 2017 Micron Technology Inc
Link to Micronrsquos SSD Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=59b6cc75486a4bca80f5b1b8a2086740ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201838
DRAM Flash Market Section
copy 2017 Micron Technology Inc
DRAM Market Trends General Market vs Automotive Adoption
| June 15 201813
General Market
ndash DDR is the dominant interface for devices without batteries
ndash Increased LPDRAM adoption outside of mobile handsets driven by Tablets amp other Client apps
ndash DDR5LPDDR5 adoption projected to start in late CYrsquo19
Automotive
ndash Continued need for legacy support
ndash DDR3 is the primary choice for current gen low cost Infotainment and Cluster applications
ndash LPDDR4 will be the primary choice for next gen ADAS and high-end Infotainment applications
DDR2DDR3
DDR4
DDR5
LPDDR2LPDDR3
LPDDR4
LPDDR5GDDR55X GDDR6OtherLegacy
0
10
20
30
40
50
60
70
80
90
100
Source Micron Market Models
copy 2017 Micron Technology Inc
DRAM Market Trends General Market vs IMM
| June 15 201814
General Marketndash DDR is the dominant interface for devices
without batteries
ndash Increased LPDRAM adoption outside of mobile handsets driven by Tablets amp other Client apps
ndash DDR5LPDDR5 adoption projected to start in late CYrsquo19
Industrial Multi-Market (IMM)ndash Continued need for legacy support in both
DRAM and LPDRAM with a wide mix of technologies
ndash DRAM modules in Industrial Automation drive bulk of DDR4 adoption
ndash Strong LP adoption for battery driven applications LPDDR4 is gaining traction
in
1G
b eq
uiva
lent
s
DDR4
DDR3
LPDDR5
GDDR
DDR2
LPDDR2
General MarketOther
LPDDR4xLPDDR3
DDR5
Source Micron Marketing (Marchrsquo17)
DDR2DDR3
DDR4
DDR5
LPDDR2LPDDR3
LPDDR4
LPDDR5GDDR55X GDDR6OtherLegacy
0
10
20
30
40
50
60
70
80
90
100
Source Micron Market Models
copy 2017 Micron Technology Inc
Broad NVM Market Growth Dynamics
15
Continued strong deployment of eMMC ndash Broader embedded markets
UFS driven by mobilendash Higher performance density
Strong market momentum for PCIe ndash Essential performance driven applications
Source Micron market models
Managed NAND TAM Units ()
0
20
40
60
80
100
CY2017 CY2018 CY2019 CY2020
eMMC
UFS
PCIe
Others
copy 2017 Micron Technology Inc
Explosive Demand for Memory with Autonomous Driving
16
L5 expected to need gt1TB storage
Includes IVI Cluster Central amp Boot storage for autonomous Black Box Recording Source Micron Marketing
Density
0
500
1000
1500
2000
L1L2 L3 L4 L5
eMMC
UFS 21
UFS 30PCIe Gen 3 x2
PCIe x4
Storage Density Progression
eMMC
3000MBs
1600MBs
Seq Reads
800MBs
320MBs
Technical Details
copy 2017 Micron Technology Inc
LPDDRx and DDRx SDRAM Feature Comparison
| June 15 201818
Type LPDDR2 LPDDR3 LPDDR44X DDR2 DDR3DDR3L DDR4Die Density Up to 8Gb Up to 32Gb Up to 32Gb Up to 2Gb Up to 8Gb Up to 16Gb (128Gb 8H)
Core Voltage (Vdd) 12V 18V WL supply req
12V18V WL supply req
11V10V18V WL supply req
18V155V 15V135V
12VSeparate WL supply
25VIO Voltage 12V 12V 11V (4X = 06V) Same as VDD Same as VDD Same as VDD
Max Clock Freq Data rate 533MHzDDR1066 800MHzDDR1600 2133MHzDDR4267 533MHzDDR1066 1066MHzDDR2100 1600MHz+DDR3200+
Burst Lengths 4 8 16 8 16 32 4 8 BC4 8 BC4 8Configurations x16 x32 x16 x32 2Ch x16 x4 x8 x16 x4 x8 x16 x4 x8 x16
Address Command Signals
14 pins(Muxrsquod command
address)
14 pins(Muxrsquod command
address)
10 pins per channel(Muxrsquod command
Address)25 pins 27 pins 29 pins
(partial muxrsquod)
Address Command Data Rate
DDR(both rising and
falling edges of clock)
DDR (both rising and
falling edges of clock)
SDR(rising edge of clock
only)
SDR(rising edge of clock
only)
SDR(rising edge of
clock only)
SDR (rising edge of clock
only)
On Die Temperature Sensor Yes Yes Yes No OptionalRS Yes
DPD (Deep power-down mode) Yes Yes No No No No
Package Options POP MCP discrete POP MCP discrete PoP MCP discrete Discrete Discrete Discrete
ProductTemp Grades CT IT AIT AT AAT CT IT AIT AT AATWT (-25rsquo to 85rsquoC)
AAT (-40C to 105C)AUT (-40rsquoC to 125rsquoC)
CT IT AIT AT AAT CT IT AIT AT AAT AUT CT IT AIT AT AAT AUT
copy 2017 Micron Technology Inc | June 15 201819
Standard DRAM LPDRAM Form Factor Center bond pads for highest performance and lowest
costEdge bond pads allow for stacked die for MCP and PoP
packaging enabling compact form factors
Performance x4 x8 x16 is lower cost and supports higher density configurations
x32 allows system to support high bandwidthin point-to-point applications
DRAMpower
IDD specifications are geared towards moderate stand-by power providing the highest yields and lowest cost
Ultra low standby power enabled by on-die power management and long refresh rates
Systempower
Additional Delay Locked Loop (DLL) circuitry required for high performance which inhibits system power
savings
Lack of DLL circuitry allows for improved system power management System can enterexit power-down modes
as well as throttle or stop the clock
Key Takeaway
Optimized for cost and performancecost is primary feature
Optimized for battery life and portability low power amp smallest possible footprint are primary features
LPDD
R4 S
peci
fic In
foG
ener
al LP
vs
DD
R Co
mpa
rison
LPDRAM offers additional value over standard DRAM
Standard DRAM amp LPDRAM Trade Offs
copy 2017 Micron Technology Inc20
DRAM Performance Improvements Over Time (IO x16)
0
5
10
15
20
25
30
35
40
45
50
55
2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016 2017
Gbs
DDR2
DDR2-53385 Gbs
DDR2-667106 Gbs
DDR2-800128 Gbs
DDR3-106617 Gbs
DDR3-1333213 Gbs
DDR3-1600256 Gbs
DDR3-186630 Gbs
DDR4-213334 Gbs
DDR4-2400384 Gbs
DDR4-2666427 Gbs
DDR4-3200512 Gbs
DDR3
DDR4
June 15 2018
copy 2017 Micron Technology Inc21
0
20
40
60
80
100
120
140
160
2010 2011 2012 2013 2014 2015 2016 2017 2018
LPDDR2-800256 Gbs
LPDDR2-10663411 Gbs
LPDDR2LPDDR3-1600
512 Gbs
LPDDR3-1866 59712 Gbs
LPDDR3
LPDDR4-37331194 Gbs
LPDDR4-426613651 Gbs
LPDDR4
LPDDR4-32001024 Gbs
Gbs
LPDDR Performance Improvements Over Time (IO x32)
LPDDR4-32001024 Gbs
June 15 2018
Non-Volatile Details
copy 2017 Micron Technology Inc | June 15 201823
Xccelatrade Flash Best of Parallel and Serial NOR Flash
Compared to Page Mode Parallel NOR
5X THE PERFORMANCE 4X FEWER PINS 3X LESS ENERGY AND 2X SMALLER PACKAGE
512MbParallel NOR
MT28EW
512MbQuad-SPIMT25Q
512MbTwin-Quad
MT25T
512MbXccela Flash
MT35X
Bandwidth 80MBs(Page mode async x16)
90MBs(90MHz DDR mode)
180MBs(90MHz DDR mode)
400MBs(200MHz DDR mode)
Initial WordAccess Time 95ns (x16) 139ns (18V 4-bit)
157ns (18V 16-bits)139ns (18V 8-bit)145ns (18V 16-bit)
85ns (18V 8-bit)875ns (18V 16-bit)
Subsequent Word Access
20ns (16-bits)(95ns across 32B page)
6ns (4-bits)24ns (16-bits)
6ns (8-bits)12ns (16-bits)
25ns (8-bits)5ns (16-bits)
Package and Pins 64-TBGA (11x13mm)50 Active Pins
24-BGA (6x8mm)6 Active Pins
24-BGA (6x8mm)11 Active Pins
24-BGA (6x8mm)11 Active Pins
Energy Per Bit 101 pJbit 41 pJbit 41 pJbit 28 pJbit
Xccelatrade Flash(MT35X)
Parallel NOR FlashHigh performance
Fast bootReliability
Serial NOR FlashReduced pin countsSimple PCB design
ReliabilityNeed more
performance with same package
Want reduced pin countpackage size
Source Micron datasheets
copy 2017 Micron Technology Inc
MT35X (Octal) aka
24
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc
The Evolution of SPI
25
SPI Dual-SPI Quad-SPI Twin Quad Octal of Signals 6 6 6 10-12 11
Clock (max) 75MHz 75MHz 180MHz SDR (90MHz DDR) 180MHz SDR (90MHz DDR) 166MHz SDR (200MHz DDR)
Bandwidth (max) 9MBs 18MBs 90MBs 180MBs 400MBs
0 MBs
50 MBs
100 MBs
150 MBs
200 MBs
250 MBs
300 MBs
350 MBs
400 MBs
450 MBs
500 MBs
1997 2006 2016
SPI Interface Bandwidth
Dual-IO18MBs
Quad (SDR)40MBs
Twin-Quad 180MBs
Octal 400MBs
Quad (DDR) 90MBs
125MBs 9MBs
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc26
Micron Read Performance Comparisons
0
50
100
150
200
250
300
350
400
450
1 2 4 8 16 32 64 128 256 512 1k 2k 4k 8k 16k 32k 64k 128k 256k 512k 1M 2M
Tran
sfer
Rat
e (M
Byt
ess
ec)
Bytes per Fetch
NOR and NAND Performance Comparisons Random Read Access Performance vs Data Size
x8 200MHz DDR Octal NOR (MT35X)
x8 166MHz SDR Twin Quad Serial NOR (MT25T)
x4 166MHz SDR 83MHz DDR Serial NOR (MT25Q) 18V
x4 133MHz SPI NAND
x8 NAND ONFI 30
x8 eMMC 45
x8 eMMC 50
+
+
CacheLine Fills
BOOT or Read time at 400MBsBit density 512Mb 1Gb 2GbByte density 64MB 128MB 256MBTime to read 16 sec 32 sec 64 sec
Graphic image read 2Bytes (65K colors)Pixel Size 1K x 1K 4K x 4KByte density 2MB 34MBTime to read 52ms 88ms
Xccelatrade FlashHighest Performance
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc
eMMC Fully Managed NANDPROVIDES REDUCED DESIGN EFFORT FOR MINIMAL COST
NAND
Wear leveling
ECC
Driver
NAND Controller
Raw NAND
ONFI NAND bus
CommandBlock Management
Low-level Driver
NAND Controller
Fully Managed NAND (eMMC)
MMC SATA or USB bus
NAND
Wear leveling CMDBlock
Mgmt NAND Error Mgmt
Controller
eMMC eUSBSATA amp CF
Cost amp Price
Ease of design amp Validation
27 June 15 2018
copy 2017 Micron Technology Inc
eMMC
28 June 15 2018
copy 2017 Micron Technology Inc
Enjoy Micron Automotive eMMC comprehensive Product Portfolio
PCIe NVMeUFS 2x
June 15 2018
copy 2017 Micron Technology Inc
New Features in eMMC 51
| June 15 201830
copy 2017 Micron Technology Inc
SSD Form FactorsEXISTING AND FUTURE DIRECTIONS
FORM FACTORSndash 25rdquo
ndash mSATA
ndash M2
ndash uBGA (Future)
INTERFACESndash SATA III
ndash PCIe
YEARLY FIRMWARE UPDATES
| June 15 201831
Parameter 25rdquo mSATA M2Capacities (GB) 60120240 60120240 120240
Specification EIA-720 MO-300B variation A PCIe M2 Spec Rev 10Dimensions (L) 10045mm
(W) 6985mm (H) 7mm
(L) 5080mm(W) 2985mm(H) 375mm
(L) 60 mm(W) 22 mm(H) 15 mm
Weight lt 70g lt 10g lt 10 g
Packaging MCP (Multi Chip Package)PoP (Package on Package)
copy 2017 Micron Technology Inc
What is an eMCPePoP
Benefits includehellipndash Board space savings through vertical stacking of several memory chips
ndash Minimize bill of materials for simplified manufacturing and cost savings
ndash High density low power consumption shortest interconnections possible
ndash Accelerated time to market through rapid integration of modules
ApplicationProcessor -Driver
MLC NAND
eMMC
PCB
LPDRAM
Controller
POP
Application Processor -Driver
SLC NAND
NAND MCP
LPDRAM
Printed Circuit Board (PCB)
ApplicationProcessor -Driver
eMMCePOPLPDRAM
ApplicationProcessor -Driver
eMMC
eMCP
LPDRAM
PCBPCB
eMCP is a Multi Chip Package including eMMC and LPDDRx
ePoP is an eMCP in a PoP (Package on Package) design
June 15 2018
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Power Calculatorshttpswwwmicroncomsupporttools-and-utilitiespower-calc
| June 15 201834
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Technical Notesndash httpswwwmicroncomadvanced
searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=ampshow=10ampfamily=2dd96f4ee22e4de7b7027e6dd6a2718campnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201835
copy 2017 Micron Technology Inc
Links to Micronrsquos NOR Flash Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=1f8cfba0d95c4ea9a6c99e3272fd0e39ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201836
copy 2017 Micron Technology Inc
Link to Micronrsquos eMMC Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=ff04c268087d4d33a126d6a5a59ccebdamptechnology=9b8d2c45520a422c8f635832d3a2b0eaampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201837
copy 2017 Micron Technology Inc
Link to Micronrsquos SSD Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=59b6cc75486a4bca80f5b1b8a2086740ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201838
copy 2017 Micron Technology Inc
DRAM Market Trends General Market vs Automotive Adoption
| June 15 201813
General Market
ndash DDR is the dominant interface for devices without batteries
ndash Increased LPDRAM adoption outside of mobile handsets driven by Tablets amp other Client apps
ndash DDR5LPDDR5 adoption projected to start in late CYrsquo19
Automotive
ndash Continued need for legacy support
ndash DDR3 is the primary choice for current gen low cost Infotainment and Cluster applications
ndash LPDDR4 will be the primary choice for next gen ADAS and high-end Infotainment applications
DDR2DDR3
DDR4
DDR5
LPDDR2LPDDR3
LPDDR4
LPDDR5GDDR55X GDDR6OtherLegacy
0
10
20
30
40
50
60
70
80
90
100
Source Micron Market Models
copy 2017 Micron Technology Inc
DRAM Market Trends General Market vs IMM
| June 15 201814
General Marketndash DDR is the dominant interface for devices
without batteries
ndash Increased LPDRAM adoption outside of mobile handsets driven by Tablets amp other Client apps
ndash DDR5LPDDR5 adoption projected to start in late CYrsquo19
Industrial Multi-Market (IMM)ndash Continued need for legacy support in both
DRAM and LPDRAM with a wide mix of technologies
ndash DRAM modules in Industrial Automation drive bulk of DDR4 adoption
ndash Strong LP adoption for battery driven applications LPDDR4 is gaining traction
in
1G
b eq
uiva
lent
s
DDR4
DDR3
LPDDR5
GDDR
DDR2
LPDDR2
General MarketOther
LPDDR4xLPDDR3
DDR5
Source Micron Marketing (Marchrsquo17)
DDR2DDR3
DDR4
DDR5
LPDDR2LPDDR3
LPDDR4
LPDDR5GDDR55X GDDR6OtherLegacy
0
10
20
30
40
50
60
70
80
90
100
Source Micron Market Models
copy 2017 Micron Technology Inc
Broad NVM Market Growth Dynamics
15
Continued strong deployment of eMMC ndash Broader embedded markets
UFS driven by mobilendash Higher performance density
Strong market momentum for PCIe ndash Essential performance driven applications
Source Micron market models
Managed NAND TAM Units ()
0
20
40
60
80
100
CY2017 CY2018 CY2019 CY2020
eMMC
UFS
PCIe
Others
copy 2017 Micron Technology Inc
Explosive Demand for Memory with Autonomous Driving
16
L5 expected to need gt1TB storage
Includes IVI Cluster Central amp Boot storage for autonomous Black Box Recording Source Micron Marketing
Density
0
500
1000
1500
2000
L1L2 L3 L4 L5
eMMC
UFS 21
UFS 30PCIe Gen 3 x2
PCIe x4
Storage Density Progression
eMMC
3000MBs
1600MBs
Seq Reads
800MBs
320MBs
Technical Details
copy 2017 Micron Technology Inc
LPDDRx and DDRx SDRAM Feature Comparison
| June 15 201818
Type LPDDR2 LPDDR3 LPDDR44X DDR2 DDR3DDR3L DDR4Die Density Up to 8Gb Up to 32Gb Up to 32Gb Up to 2Gb Up to 8Gb Up to 16Gb (128Gb 8H)
Core Voltage (Vdd) 12V 18V WL supply req
12V18V WL supply req
11V10V18V WL supply req
18V155V 15V135V
12VSeparate WL supply
25VIO Voltage 12V 12V 11V (4X = 06V) Same as VDD Same as VDD Same as VDD
Max Clock Freq Data rate 533MHzDDR1066 800MHzDDR1600 2133MHzDDR4267 533MHzDDR1066 1066MHzDDR2100 1600MHz+DDR3200+
Burst Lengths 4 8 16 8 16 32 4 8 BC4 8 BC4 8Configurations x16 x32 x16 x32 2Ch x16 x4 x8 x16 x4 x8 x16 x4 x8 x16
Address Command Signals
14 pins(Muxrsquod command
address)
14 pins(Muxrsquod command
address)
10 pins per channel(Muxrsquod command
Address)25 pins 27 pins 29 pins
(partial muxrsquod)
Address Command Data Rate
DDR(both rising and
falling edges of clock)
DDR (both rising and
falling edges of clock)
SDR(rising edge of clock
only)
SDR(rising edge of clock
only)
SDR(rising edge of
clock only)
SDR (rising edge of clock
only)
On Die Temperature Sensor Yes Yes Yes No OptionalRS Yes
DPD (Deep power-down mode) Yes Yes No No No No
Package Options POP MCP discrete POP MCP discrete PoP MCP discrete Discrete Discrete Discrete
ProductTemp Grades CT IT AIT AT AAT CT IT AIT AT AATWT (-25rsquo to 85rsquoC)
AAT (-40C to 105C)AUT (-40rsquoC to 125rsquoC)
CT IT AIT AT AAT CT IT AIT AT AAT AUT CT IT AIT AT AAT AUT
copy 2017 Micron Technology Inc | June 15 201819
Standard DRAM LPDRAM Form Factor Center bond pads for highest performance and lowest
costEdge bond pads allow for stacked die for MCP and PoP
packaging enabling compact form factors
Performance x4 x8 x16 is lower cost and supports higher density configurations
x32 allows system to support high bandwidthin point-to-point applications
DRAMpower
IDD specifications are geared towards moderate stand-by power providing the highest yields and lowest cost
Ultra low standby power enabled by on-die power management and long refresh rates
Systempower
Additional Delay Locked Loop (DLL) circuitry required for high performance which inhibits system power
savings
Lack of DLL circuitry allows for improved system power management System can enterexit power-down modes
as well as throttle or stop the clock
Key Takeaway
Optimized for cost and performancecost is primary feature
Optimized for battery life and portability low power amp smallest possible footprint are primary features
LPDD
R4 S
peci
fic In
foG
ener
al LP
vs
DD
R Co
mpa
rison
LPDRAM offers additional value over standard DRAM
Standard DRAM amp LPDRAM Trade Offs
copy 2017 Micron Technology Inc20
DRAM Performance Improvements Over Time (IO x16)
0
5
10
15
20
25
30
35
40
45
50
55
2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016 2017
Gbs
DDR2
DDR2-53385 Gbs
DDR2-667106 Gbs
DDR2-800128 Gbs
DDR3-106617 Gbs
DDR3-1333213 Gbs
DDR3-1600256 Gbs
DDR3-186630 Gbs
DDR4-213334 Gbs
DDR4-2400384 Gbs
DDR4-2666427 Gbs
DDR4-3200512 Gbs
DDR3
DDR4
June 15 2018
copy 2017 Micron Technology Inc21
0
20
40
60
80
100
120
140
160
2010 2011 2012 2013 2014 2015 2016 2017 2018
LPDDR2-800256 Gbs
LPDDR2-10663411 Gbs
LPDDR2LPDDR3-1600
512 Gbs
LPDDR3-1866 59712 Gbs
LPDDR3
LPDDR4-37331194 Gbs
LPDDR4-426613651 Gbs
LPDDR4
LPDDR4-32001024 Gbs
Gbs
LPDDR Performance Improvements Over Time (IO x32)
LPDDR4-32001024 Gbs
June 15 2018
Non-Volatile Details
copy 2017 Micron Technology Inc | June 15 201823
Xccelatrade Flash Best of Parallel and Serial NOR Flash
Compared to Page Mode Parallel NOR
5X THE PERFORMANCE 4X FEWER PINS 3X LESS ENERGY AND 2X SMALLER PACKAGE
512MbParallel NOR
MT28EW
512MbQuad-SPIMT25Q
512MbTwin-Quad
MT25T
512MbXccela Flash
MT35X
Bandwidth 80MBs(Page mode async x16)
90MBs(90MHz DDR mode)
180MBs(90MHz DDR mode)
400MBs(200MHz DDR mode)
Initial WordAccess Time 95ns (x16) 139ns (18V 4-bit)
157ns (18V 16-bits)139ns (18V 8-bit)145ns (18V 16-bit)
85ns (18V 8-bit)875ns (18V 16-bit)
Subsequent Word Access
20ns (16-bits)(95ns across 32B page)
6ns (4-bits)24ns (16-bits)
6ns (8-bits)12ns (16-bits)
25ns (8-bits)5ns (16-bits)
Package and Pins 64-TBGA (11x13mm)50 Active Pins
24-BGA (6x8mm)6 Active Pins
24-BGA (6x8mm)11 Active Pins
24-BGA (6x8mm)11 Active Pins
Energy Per Bit 101 pJbit 41 pJbit 41 pJbit 28 pJbit
Xccelatrade Flash(MT35X)
Parallel NOR FlashHigh performance
Fast bootReliability
Serial NOR FlashReduced pin countsSimple PCB design
ReliabilityNeed more
performance with same package
Want reduced pin countpackage size
Source Micron datasheets
copy 2017 Micron Technology Inc
MT35X (Octal) aka
24
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc
The Evolution of SPI
25
SPI Dual-SPI Quad-SPI Twin Quad Octal of Signals 6 6 6 10-12 11
Clock (max) 75MHz 75MHz 180MHz SDR (90MHz DDR) 180MHz SDR (90MHz DDR) 166MHz SDR (200MHz DDR)
Bandwidth (max) 9MBs 18MBs 90MBs 180MBs 400MBs
0 MBs
50 MBs
100 MBs
150 MBs
200 MBs
250 MBs
300 MBs
350 MBs
400 MBs
450 MBs
500 MBs
1997 2006 2016
SPI Interface Bandwidth
Dual-IO18MBs
Quad (SDR)40MBs
Twin-Quad 180MBs
Octal 400MBs
Quad (DDR) 90MBs
125MBs 9MBs
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc26
Micron Read Performance Comparisons
0
50
100
150
200
250
300
350
400
450
1 2 4 8 16 32 64 128 256 512 1k 2k 4k 8k 16k 32k 64k 128k 256k 512k 1M 2M
Tran
sfer
Rat
e (M
Byt
ess
ec)
Bytes per Fetch
NOR and NAND Performance Comparisons Random Read Access Performance vs Data Size
x8 200MHz DDR Octal NOR (MT35X)
x8 166MHz SDR Twin Quad Serial NOR (MT25T)
x4 166MHz SDR 83MHz DDR Serial NOR (MT25Q) 18V
x4 133MHz SPI NAND
x8 NAND ONFI 30
x8 eMMC 45
x8 eMMC 50
+
+
CacheLine Fills
BOOT or Read time at 400MBsBit density 512Mb 1Gb 2GbByte density 64MB 128MB 256MBTime to read 16 sec 32 sec 64 sec
Graphic image read 2Bytes (65K colors)Pixel Size 1K x 1K 4K x 4KByte density 2MB 34MBTime to read 52ms 88ms
Xccelatrade FlashHighest Performance
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc
eMMC Fully Managed NANDPROVIDES REDUCED DESIGN EFFORT FOR MINIMAL COST
NAND
Wear leveling
ECC
Driver
NAND Controller
Raw NAND
ONFI NAND bus
CommandBlock Management
Low-level Driver
NAND Controller
Fully Managed NAND (eMMC)
MMC SATA or USB bus
NAND
Wear leveling CMDBlock
Mgmt NAND Error Mgmt
Controller
eMMC eUSBSATA amp CF
Cost amp Price
Ease of design amp Validation
27 June 15 2018
copy 2017 Micron Technology Inc
eMMC
28 June 15 2018
copy 2017 Micron Technology Inc
Enjoy Micron Automotive eMMC comprehensive Product Portfolio
PCIe NVMeUFS 2x
June 15 2018
copy 2017 Micron Technology Inc
New Features in eMMC 51
| June 15 201830
copy 2017 Micron Technology Inc
SSD Form FactorsEXISTING AND FUTURE DIRECTIONS
FORM FACTORSndash 25rdquo
ndash mSATA
ndash M2
ndash uBGA (Future)
INTERFACESndash SATA III
ndash PCIe
YEARLY FIRMWARE UPDATES
| June 15 201831
Parameter 25rdquo mSATA M2Capacities (GB) 60120240 60120240 120240
Specification EIA-720 MO-300B variation A PCIe M2 Spec Rev 10Dimensions (L) 10045mm
(W) 6985mm (H) 7mm
(L) 5080mm(W) 2985mm(H) 375mm
(L) 60 mm(W) 22 mm(H) 15 mm
Weight lt 70g lt 10g lt 10 g
Packaging MCP (Multi Chip Package)PoP (Package on Package)
copy 2017 Micron Technology Inc
What is an eMCPePoP
Benefits includehellipndash Board space savings through vertical stacking of several memory chips
ndash Minimize bill of materials for simplified manufacturing and cost savings
ndash High density low power consumption shortest interconnections possible
ndash Accelerated time to market through rapid integration of modules
ApplicationProcessor -Driver
MLC NAND
eMMC
PCB
LPDRAM
Controller
POP
Application Processor -Driver
SLC NAND
NAND MCP
LPDRAM
Printed Circuit Board (PCB)
ApplicationProcessor -Driver
eMMCePOPLPDRAM
ApplicationProcessor -Driver
eMMC
eMCP
LPDRAM
PCBPCB
eMCP is a Multi Chip Package including eMMC and LPDDRx
ePoP is an eMCP in a PoP (Package on Package) design
June 15 2018
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Power Calculatorshttpswwwmicroncomsupporttools-and-utilitiespower-calc
| June 15 201834
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Technical Notesndash httpswwwmicroncomadvanced
searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=ampshow=10ampfamily=2dd96f4ee22e4de7b7027e6dd6a2718campnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201835
copy 2017 Micron Technology Inc
Links to Micronrsquos NOR Flash Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=1f8cfba0d95c4ea9a6c99e3272fd0e39ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201836
copy 2017 Micron Technology Inc
Link to Micronrsquos eMMC Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=ff04c268087d4d33a126d6a5a59ccebdamptechnology=9b8d2c45520a422c8f635832d3a2b0eaampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201837
copy 2017 Micron Technology Inc
Link to Micronrsquos SSD Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=59b6cc75486a4bca80f5b1b8a2086740ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201838
copy 2017 Micron Technology Inc
DRAM Market Trends General Market vs IMM
| June 15 201814
General Marketndash DDR is the dominant interface for devices
without batteries
ndash Increased LPDRAM adoption outside of mobile handsets driven by Tablets amp other Client apps
ndash DDR5LPDDR5 adoption projected to start in late CYrsquo19
Industrial Multi-Market (IMM)ndash Continued need for legacy support in both
DRAM and LPDRAM with a wide mix of technologies
ndash DRAM modules in Industrial Automation drive bulk of DDR4 adoption
ndash Strong LP adoption for battery driven applications LPDDR4 is gaining traction
in
1G
b eq
uiva
lent
s
DDR4
DDR3
LPDDR5
GDDR
DDR2
LPDDR2
General MarketOther
LPDDR4xLPDDR3
DDR5
Source Micron Marketing (Marchrsquo17)
DDR2DDR3
DDR4
DDR5
LPDDR2LPDDR3
LPDDR4
LPDDR5GDDR55X GDDR6OtherLegacy
0
10
20
30
40
50
60
70
80
90
100
Source Micron Market Models
copy 2017 Micron Technology Inc
Broad NVM Market Growth Dynamics
15
Continued strong deployment of eMMC ndash Broader embedded markets
UFS driven by mobilendash Higher performance density
Strong market momentum for PCIe ndash Essential performance driven applications
Source Micron market models
Managed NAND TAM Units ()
0
20
40
60
80
100
CY2017 CY2018 CY2019 CY2020
eMMC
UFS
PCIe
Others
copy 2017 Micron Technology Inc
Explosive Demand for Memory with Autonomous Driving
16
L5 expected to need gt1TB storage
Includes IVI Cluster Central amp Boot storage for autonomous Black Box Recording Source Micron Marketing
Density
0
500
1000
1500
2000
L1L2 L3 L4 L5
eMMC
UFS 21
UFS 30PCIe Gen 3 x2
PCIe x4
Storage Density Progression
eMMC
3000MBs
1600MBs
Seq Reads
800MBs
320MBs
Technical Details
copy 2017 Micron Technology Inc
LPDDRx and DDRx SDRAM Feature Comparison
| June 15 201818
Type LPDDR2 LPDDR3 LPDDR44X DDR2 DDR3DDR3L DDR4Die Density Up to 8Gb Up to 32Gb Up to 32Gb Up to 2Gb Up to 8Gb Up to 16Gb (128Gb 8H)
Core Voltage (Vdd) 12V 18V WL supply req
12V18V WL supply req
11V10V18V WL supply req
18V155V 15V135V
12VSeparate WL supply
25VIO Voltage 12V 12V 11V (4X = 06V) Same as VDD Same as VDD Same as VDD
Max Clock Freq Data rate 533MHzDDR1066 800MHzDDR1600 2133MHzDDR4267 533MHzDDR1066 1066MHzDDR2100 1600MHz+DDR3200+
Burst Lengths 4 8 16 8 16 32 4 8 BC4 8 BC4 8Configurations x16 x32 x16 x32 2Ch x16 x4 x8 x16 x4 x8 x16 x4 x8 x16
Address Command Signals
14 pins(Muxrsquod command
address)
14 pins(Muxrsquod command
address)
10 pins per channel(Muxrsquod command
Address)25 pins 27 pins 29 pins
(partial muxrsquod)
Address Command Data Rate
DDR(both rising and
falling edges of clock)
DDR (both rising and
falling edges of clock)
SDR(rising edge of clock
only)
SDR(rising edge of clock
only)
SDR(rising edge of
clock only)
SDR (rising edge of clock
only)
On Die Temperature Sensor Yes Yes Yes No OptionalRS Yes
DPD (Deep power-down mode) Yes Yes No No No No
Package Options POP MCP discrete POP MCP discrete PoP MCP discrete Discrete Discrete Discrete
ProductTemp Grades CT IT AIT AT AAT CT IT AIT AT AATWT (-25rsquo to 85rsquoC)
AAT (-40C to 105C)AUT (-40rsquoC to 125rsquoC)
CT IT AIT AT AAT CT IT AIT AT AAT AUT CT IT AIT AT AAT AUT
copy 2017 Micron Technology Inc | June 15 201819
Standard DRAM LPDRAM Form Factor Center bond pads for highest performance and lowest
costEdge bond pads allow for stacked die for MCP and PoP
packaging enabling compact form factors
Performance x4 x8 x16 is lower cost and supports higher density configurations
x32 allows system to support high bandwidthin point-to-point applications
DRAMpower
IDD specifications are geared towards moderate stand-by power providing the highest yields and lowest cost
Ultra low standby power enabled by on-die power management and long refresh rates
Systempower
Additional Delay Locked Loop (DLL) circuitry required for high performance which inhibits system power
savings
Lack of DLL circuitry allows for improved system power management System can enterexit power-down modes
as well as throttle or stop the clock
Key Takeaway
Optimized for cost and performancecost is primary feature
Optimized for battery life and portability low power amp smallest possible footprint are primary features
LPDD
R4 S
peci
fic In
foG
ener
al LP
vs
DD
R Co
mpa
rison
LPDRAM offers additional value over standard DRAM
Standard DRAM amp LPDRAM Trade Offs
copy 2017 Micron Technology Inc20
DRAM Performance Improvements Over Time (IO x16)
0
5
10
15
20
25
30
35
40
45
50
55
2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016 2017
Gbs
DDR2
DDR2-53385 Gbs
DDR2-667106 Gbs
DDR2-800128 Gbs
DDR3-106617 Gbs
DDR3-1333213 Gbs
DDR3-1600256 Gbs
DDR3-186630 Gbs
DDR4-213334 Gbs
DDR4-2400384 Gbs
DDR4-2666427 Gbs
DDR4-3200512 Gbs
DDR3
DDR4
June 15 2018
copy 2017 Micron Technology Inc21
0
20
40
60
80
100
120
140
160
2010 2011 2012 2013 2014 2015 2016 2017 2018
LPDDR2-800256 Gbs
LPDDR2-10663411 Gbs
LPDDR2LPDDR3-1600
512 Gbs
LPDDR3-1866 59712 Gbs
LPDDR3
LPDDR4-37331194 Gbs
LPDDR4-426613651 Gbs
LPDDR4
LPDDR4-32001024 Gbs
Gbs
LPDDR Performance Improvements Over Time (IO x32)
LPDDR4-32001024 Gbs
June 15 2018
Non-Volatile Details
copy 2017 Micron Technology Inc | June 15 201823
Xccelatrade Flash Best of Parallel and Serial NOR Flash
Compared to Page Mode Parallel NOR
5X THE PERFORMANCE 4X FEWER PINS 3X LESS ENERGY AND 2X SMALLER PACKAGE
512MbParallel NOR
MT28EW
512MbQuad-SPIMT25Q
512MbTwin-Quad
MT25T
512MbXccela Flash
MT35X
Bandwidth 80MBs(Page mode async x16)
90MBs(90MHz DDR mode)
180MBs(90MHz DDR mode)
400MBs(200MHz DDR mode)
Initial WordAccess Time 95ns (x16) 139ns (18V 4-bit)
157ns (18V 16-bits)139ns (18V 8-bit)145ns (18V 16-bit)
85ns (18V 8-bit)875ns (18V 16-bit)
Subsequent Word Access
20ns (16-bits)(95ns across 32B page)
6ns (4-bits)24ns (16-bits)
6ns (8-bits)12ns (16-bits)
25ns (8-bits)5ns (16-bits)
Package and Pins 64-TBGA (11x13mm)50 Active Pins
24-BGA (6x8mm)6 Active Pins
24-BGA (6x8mm)11 Active Pins
24-BGA (6x8mm)11 Active Pins
Energy Per Bit 101 pJbit 41 pJbit 41 pJbit 28 pJbit
Xccelatrade Flash(MT35X)
Parallel NOR FlashHigh performance
Fast bootReliability
Serial NOR FlashReduced pin countsSimple PCB design
ReliabilityNeed more
performance with same package
Want reduced pin countpackage size
Source Micron datasheets
copy 2017 Micron Technology Inc
MT35X (Octal) aka
24
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc
The Evolution of SPI
25
SPI Dual-SPI Quad-SPI Twin Quad Octal of Signals 6 6 6 10-12 11
Clock (max) 75MHz 75MHz 180MHz SDR (90MHz DDR) 180MHz SDR (90MHz DDR) 166MHz SDR (200MHz DDR)
Bandwidth (max) 9MBs 18MBs 90MBs 180MBs 400MBs
0 MBs
50 MBs
100 MBs
150 MBs
200 MBs
250 MBs
300 MBs
350 MBs
400 MBs
450 MBs
500 MBs
1997 2006 2016
SPI Interface Bandwidth
Dual-IO18MBs
Quad (SDR)40MBs
Twin-Quad 180MBs
Octal 400MBs
Quad (DDR) 90MBs
125MBs 9MBs
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc26
Micron Read Performance Comparisons
0
50
100
150
200
250
300
350
400
450
1 2 4 8 16 32 64 128 256 512 1k 2k 4k 8k 16k 32k 64k 128k 256k 512k 1M 2M
Tran
sfer
Rat
e (M
Byt
ess
ec)
Bytes per Fetch
NOR and NAND Performance Comparisons Random Read Access Performance vs Data Size
x8 200MHz DDR Octal NOR (MT35X)
x8 166MHz SDR Twin Quad Serial NOR (MT25T)
x4 166MHz SDR 83MHz DDR Serial NOR (MT25Q) 18V
x4 133MHz SPI NAND
x8 NAND ONFI 30
x8 eMMC 45
x8 eMMC 50
+
+
CacheLine Fills
BOOT or Read time at 400MBsBit density 512Mb 1Gb 2GbByte density 64MB 128MB 256MBTime to read 16 sec 32 sec 64 sec
Graphic image read 2Bytes (65K colors)Pixel Size 1K x 1K 4K x 4KByte density 2MB 34MBTime to read 52ms 88ms
Xccelatrade FlashHighest Performance
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc
eMMC Fully Managed NANDPROVIDES REDUCED DESIGN EFFORT FOR MINIMAL COST
NAND
Wear leveling
ECC
Driver
NAND Controller
Raw NAND
ONFI NAND bus
CommandBlock Management
Low-level Driver
NAND Controller
Fully Managed NAND (eMMC)
MMC SATA or USB bus
NAND
Wear leveling CMDBlock
Mgmt NAND Error Mgmt
Controller
eMMC eUSBSATA amp CF
Cost amp Price
Ease of design amp Validation
27 June 15 2018
copy 2017 Micron Technology Inc
eMMC
28 June 15 2018
copy 2017 Micron Technology Inc
Enjoy Micron Automotive eMMC comprehensive Product Portfolio
PCIe NVMeUFS 2x
June 15 2018
copy 2017 Micron Technology Inc
New Features in eMMC 51
| June 15 201830
copy 2017 Micron Technology Inc
SSD Form FactorsEXISTING AND FUTURE DIRECTIONS
FORM FACTORSndash 25rdquo
ndash mSATA
ndash M2
ndash uBGA (Future)
INTERFACESndash SATA III
ndash PCIe
YEARLY FIRMWARE UPDATES
| June 15 201831
Parameter 25rdquo mSATA M2Capacities (GB) 60120240 60120240 120240
Specification EIA-720 MO-300B variation A PCIe M2 Spec Rev 10Dimensions (L) 10045mm
(W) 6985mm (H) 7mm
(L) 5080mm(W) 2985mm(H) 375mm
(L) 60 mm(W) 22 mm(H) 15 mm
Weight lt 70g lt 10g lt 10 g
Packaging MCP (Multi Chip Package)PoP (Package on Package)
copy 2017 Micron Technology Inc
What is an eMCPePoP
Benefits includehellipndash Board space savings through vertical stacking of several memory chips
ndash Minimize bill of materials for simplified manufacturing and cost savings
ndash High density low power consumption shortest interconnections possible
ndash Accelerated time to market through rapid integration of modules
ApplicationProcessor -Driver
MLC NAND
eMMC
PCB
LPDRAM
Controller
POP
Application Processor -Driver
SLC NAND
NAND MCP
LPDRAM
Printed Circuit Board (PCB)
ApplicationProcessor -Driver
eMMCePOPLPDRAM
ApplicationProcessor -Driver
eMMC
eMCP
LPDRAM
PCBPCB
eMCP is a Multi Chip Package including eMMC and LPDDRx
ePoP is an eMCP in a PoP (Package on Package) design
June 15 2018
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Power Calculatorshttpswwwmicroncomsupporttools-and-utilitiespower-calc
| June 15 201834
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Technical Notesndash httpswwwmicroncomadvanced
searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=ampshow=10ampfamily=2dd96f4ee22e4de7b7027e6dd6a2718campnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201835
copy 2017 Micron Technology Inc
Links to Micronrsquos NOR Flash Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=1f8cfba0d95c4ea9a6c99e3272fd0e39ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201836
copy 2017 Micron Technology Inc
Link to Micronrsquos eMMC Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=ff04c268087d4d33a126d6a5a59ccebdamptechnology=9b8d2c45520a422c8f635832d3a2b0eaampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201837
copy 2017 Micron Technology Inc
Link to Micronrsquos SSD Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=59b6cc75486a4bca80f5b1b8a2086740ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201838
copy 2017 Micron Technology Inc
Broad NVM Market Growth Dynamics
15
Continued strong deployment of eMMC ndash Broader embedded markets
UFS driven by mobilendash Higher performance density
Strong market momentum for PCIe ndash Essential performance driven applications
Source Micron market models
Managed NAND TAM Units ()
0
20
40
60
80
100
CY2017 CY2018 CY2019 CY2020
eMMC
UFS
PCIe
Others
copy 2017 Micron Technology Inc
Explosive Demand for Memory with Autonomous Driving
16
L5 expected to need gt1TB storage
Includes IVI Cluster Central amp Boot storage for autonomous Black Box Recording Source Micron Marketing
Density
0
500
1000
1500
2000
L1L2 L3 L4 L5
eMMC
UFS 21
UFS 30PCIe Gen 3 x2
PCIe x4
Storage Density Progression
eMMC
3000MBs
1600MBs
Seq Reads
800MBs
320MBs
Technical Details
copy 2017 Micron Technology Inc
LPDDRx and DDRx SDRAM Feature Comparison
| June 15 201818
Type LPDDR2 LPDDR3 LPDDR44X DDR2 DDR3DDR3L DDR4Die Density Up to 8Gb Up to 32Gb Up to 32Gb Up to 2Gb Up to 8Gb Up to 16Gb (128Gb 8H)
Core Voltage (Vdd) 12V 18V WL supply req
12V18V WL supply req
11V10V18V WL supply req
18V155V 15V135V
12VSeparate WL supply
25VIO Voltage 12V 12V 11V (4X = 06V) Same as VDD Same as VDD Same as VDD
Max Clock Freq Data rate 533MHzDDR1066 800MHzDDR1600 2133MHzDDR4267 533MHzDDR1066 1066MHzDDR2100 1600MHz+DDR3200+
Burst Lengths 4 8 16 8 16 32 4 8 BC4 8 BC4 8Configurations x16 x32 x16 x32 2Ch x16 x4 x8 x16 x4 x8 x16 x4 x8 x16
Address Command Signals
14 pins(Muxrsquod command
address)
14 pins(Muxrsquod command
address)
10 pins per channel(Muxrsquod command
Address)25 pins 27 pins 29 pins
(partial muxrsquod)
Address Command Data Rate
DDR(both rising and
falling edges of clock)
DDR (both rising and
falling edges of clock)
SDR(rising edge of clock
only)
SDR(rising edge of clock
only)
SDR(rising edge of
clock only)
SDR (rising edge of clock
only)
On Die Temperature Sensor Yes Yes Yes No OptionalRS Yes
DPD (Deep power-down mode) Yes Yes No No No No
Package Options POP MCP discrete POP MCP discrete PoP MCP discrete Discrete Discrete Discrete
ProductTemp Grades CT IT AIT AT AAT CT IT AIT AT AATWT (-25rsquo to 85rsquoC)
AAT (-40C to 105C)AUT (-40rsquoC to 125rsquoC)
CT IT AIT AT AAT CT IT AIT AT AAT AUT CT IT AIT AT AAT AUT
copy 2017 Micron Technology Inc | June 15 201819
Standard DRAM LPDRAM Form Factor Center bond pads for highest performance and lowest
costEdge bond pads allow for stacked die for MCP and PoP
packaging enabling compact form factors
Performance x4 x8 x16 is lower cost and supports higher density configurations
x32 allows system to support high bandwidthin point-to-point applications
DRAMpower
IDD specifications are geared towards moderate stand-by power providing the highest yields and lowest cost
Ultra low standby power enabled by on-die power management and long refresh rates
Systempower
Additional Delay Locked Loop (DLL) circuitry required for high performance which inhibits system power
savings
Lack of DLL circuitry allows for improved system power management System can enterexit power-down modes
as well as throttle or stop the clock
Key Takeaway
Optimized for cost and performancecost is primary feature
Optimized for battery life and portability low power amp smallest possible footprint are primary features
LPDD
R4 S
peci
fic In
foG
ener
al LP
vs
DD
R Co
mpa
rison
LPDRAM offers additional value over standard DRAM
Standard DRAM amp LPDRAM Trade Offs
copy 2017 Micron Technology Inc20
DRAM Performance Improvements Over Time (IO x16)
0
5
10
15
20
25
30
35
40
45
50
55
2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016 2017
Gbs
DDR2
DDR2-53385 Gbs
DDR2-667106 Gbs
DDR2-800128 Gbs
DDR3-106617 Gbs
DDR3-1333213 Gbs
DDR3-1600256 Gbs
DDR3-186630 Gbs
DDR4-213334 Gbs
DDR4-2400384 Gbs
DDR4-2666427 Gbs
DDR4-3200512 Gbs
DDR3
DDR4
June 15 2018
copy 2017 Micron Technology Inc21
0
20
40
60
80
100
120
140
160
2010 2011 2012 2013 2014 2015 2016 2017 2018
LPDDR2-800256 Gbs
LPDDR2-10663411 Gbs
LPDDR2LPDDR3-1600
512 Gbs
LPDDR3-1866 59712 Gbs
LPDDR3
LPDDR4-37331194 Gbs
LPDDR4-426613651 Gbs
LPDDR4
LPDDR4-32001024 Gbs
Gbs
LPDDR Performance Improvements Over Time (IO x32)
LPDDR4-32001024 Gbs
June 15 2018
Non-Volatile Details
copy 2017 Micron Technology Inc | June 15 201823
Xccelatrade Flash Best of Parallel and Serial NOR Flash
Compared to Page Mode Parallel NOR
5X THE PERFORMANCE 4X FEWER PINS 3X LESS ENERGY AND 2X SMALLER PACKAGE
512MbParallel NOR
MT28EW
512MbQuad-SPIMT25Q
512MbTwin-Quad
MT25T
512MbXccela Flash
MT35X
Bandwidth 80MBs(Page mode async x16)
90MBs(90MHz DDR mode)
180MBs(90MHz DDR mode)
400MBs(200MHz DDR mode)
Initial WordAccess Time 95ns (x16) 139ns (18V 4-bit)
157ns (18V 16-bits)139ns (18V 8-bit)145ns (18V 16-bit)
85ns (18V 8-bit)875ns (18V 16-bit)
Subsequent Word Access
20ns (16-bits)(95ns across 32B page)
6ns (4-bits)24ns (16-bits)
6ns (8-bits)12ns (16-bits)
25ns (8-bits)5ns (16-bits)
Package and Pins 64-TBGA (11x13mm)50 Active Pins
24-BGA (6x8mm)6 Active Pins
24-BGA (6x8mm)11 Active Pins
24-BGA (6x8mm)11 Active Pins
Energy Per Bit 101 pJbit 41 pJbit 41 pJbit 28 pJbit
Xccelatrade Flash(MT35X)
Parallel NOR FlashHigh performance
Fast bootReliability
Serial NOR FlashReduced pin countsSimple PCB design
ReliabilityNeed more
performance with same package
Want reduced pin countpackage size
Source Micron datasheets
copy 2017 Micron Technology Inc
MT35X (Octal) aka
24
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc
The Evolution of SPI
25
SPI Dual-SPI Quad-SPI Twin Quad Octal of Signals 6 6 6 10-12 11
Clock (max) 75MHz 75MHz 180MHz SDR (90MHz DDR) 180MHz SDR (90MHz DDR) 166MHz SDR (200MHz DDR)
Bandwidth (max) 9MBs 18MBs 90MBs 180MBs 400MBs
0 MBs
50 MBs
100 MBs
150 MBs
200 MBs
250 MBs
300 MBs
350 MBs
400 MBs
450 MBs
500 MBs
1997 2006 2016
SPI Interface Bandwidth
Dual-IO18MBs
Quad (SDR)40MBs
Twin-Quad 180MBs
Octal 400MBs
Quad (DDR) 90MBs
125MBs 9MBs
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc26
Micron Read Performance Comparisons
0
50
100
150
200
250
300
350
400
450
1 2 4 8 16 32 64 128 256 512 1k 2k 4k 8k 16k 32k 64k 128k 256k 512k 1M 2M
Tran
sfer
Rat
e (M
Byt
ess
ec)
Bytes per Fetch
NOR and NAND Performance Comparisons Random Read Access Performance vs Data Size
x8 200MHz DDR Octal NOR (MT35X)
x8 166MHz SDR Twin Quad Serial NOR (MT25T)
x4 166MHz SDR 83MHz DDR Serial NOR (MT25Q) 18V
x4 133MHz SPI NAND
x8 NAND ONFI 30
x8 eMMC 45
x8 eMMC 50
+
+
CacheLine Fills
BOOT or Read time at 400MBsBit density 512Mb 1Gb 2GbByte density 64MB 128MB 256MBTime to read 16 sec 32 sec 64 sec
Graphic image read 2Bytes (65K colors)Pixel Size 1K x 1K 4K x 4KByte density 2MB 34MBTime to read 52ms 88ms
Xccelatrade FlashHighest Performance
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc
eMMC Fully Managed NANDPROVIDES REDUCED DESIGN EFFORT FOR MINIMAL COST
NAND
Wear leveling
ECC
Driver
NAND Controller
Raw NAND
ONFI NAND bus
CommandBlock Management
Low-level Driver
NAND Controller
Fully Managed NAND (eMMC)
MMC SATA or USB bus
NAND
Wear leveling CMDBlock
Mgmt NAND Error Mgmt
Controller
eMMC eUSBSATA amp CF
Cost amp Price
Ease of design amp Validation
27 June 15 2018
copy 2017 Micron Technology Inc
eMMC
28 June 15 2018
copy 2017 Micron Technology Inc
Enjoy Micron Automotive eMMC comprehensive Product Portfolio
PCIe NVMeUFS 2x
June 15 2018
copy 2017 Micron Technology Inc
New Features in eMMC 51
| June 15 201830
copy 2017 Micron Technology Inc
SSD Form FactorsEXISTING AND FUTURE DIRECTIONS
FORM FACTORSndash 25rdquo
ndash mSATA
ndash M2
ndash uBGA (Future)
INTERFACESndash SATA III
ndash PCIe
YEARLY FIRMWARE UPDATES
| June 15 201831
Parameter 25rdquo mSATA M2Capacities (GB) 60120240 60120240 120240
Specification EIA-720 MO-300B variation A PCIe M2 Spec Rev 10Dimensions (L) 10045mm
(W) 6985mm (H) 7mm
(L) 5080mm(W) 2985mm(H) 375mm
(L) 60 mm(W) 22 mm(H) 15 mm
Weight lt 70g lt 10g lt 10 g
Packaging MCP (Multi Chip Package)PoP (Package on Package)
copy 2017 Micron Technology Inc
What is an eMCPePoP
Benefits includehellipndash Board space savings through vertical stacking of several memory chips
ndash Minimize bill of materials for simplified manufacturing and cost savings
ndash High density low power consumption shortest interconnections possible
ndash Accelerated time to market through rapid integration of modules
ApplicationProcessor -Driver
MLC NAND
eMMC
PCB
LPDRAM
Controller
POP
Application Processor -Driver
SLC NAND
NAND MCP
LPDRAM
Printed Circuit Board (PCB)
ApplicationProcessor -Driver
eMMCePOPLPDRAM
ApplicationProcessor -Driver
eMMC
eMCP
LPDRAM
PCBPCB
eMCP is a Multi Chip Package including eMMC and LPDDRx
ePoP is an eMCP in a PoP (Package on Package) design
June 15 2018
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Power Calculatorshttpswwwmicroncomsupporttools-and-utilitiespower-calc
| June 15 201834
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Technical Notesndash httpswwwmicroncomadvanced
searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=ampshow=10ampfamily=2dd96f4ee22e4de7b7027e6dd6a2718campnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201835
copy 2017 Micron Technology Inc
Links to Micronrsquos NOR Flash Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=1f8cfba0d95c4ea9a6c99e3272fd0e39ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201836
copy 2017 Micron Technology Inc
Link to Micronrsquos eMMC Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=ff04c268087d4d33a126d6a5a59ccebdamptechnology=9b8d2c45520a422c8f635832d3a2b0eaampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201837
copy 2017 Micron Technology Inc
Link to Micronrsquos SSD Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=59b6cc75486a4bca80f5b1b8a2086740ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201838
copy 2017 Micron Technology Inc
Explosive Demand for Memory with Autonomous Driving
16
L5 expected to need gt1TB storage
Includes IVI Cluster Central amp Boot storage for autonomous Black Box Recording Source Micron Marketing
Density
0
500
1000
1500
2000
L1L2 L3 L4 L5
eMMC
UFS 21
UFS 30PCIe Gen 3 x2
PCIe x4
Storage Density Progression
eMMC
3000MBs
1600MBs
Seq Reads
800MBs
320MBs
Technical Details
copy 2017 Micron Technology Inc
LPDDRx and DDRx SDRAM Feature Comparison
| June 15 201818
Type LPDDR2 LPDDR3 LPDDR44X DDR2 DDR3DDR3L DDR4Die Density Up to 8Gb Up to 32Gb Up to 32Gb Up to 2Gb Up to 8Gb Up to 16Gb (128Gb 8H)
Core Voltage (Vdd) 12V 18V WL supply req
12V18V WL supply req
11V10V18V WL supply req
18V155V 15V135V
12VSeparate WL supply
25VIO Voltage 12V 12V 11V (4X = 06V) Same as VDD Same as VDD Same as VDD
Max Clock Freq Data rate 533MHzDDR1066 800MHzDDR1600 2133MHzDDR4267 533MHzDDR1066 1066MHzDDR2100 1600MHz+DDR3200+
Burst Lengths 4 8 16 8 16 32 4 8 BC4 8 BC4 8Configurations x16 x32 x16 x32 2Ch x16 x4 x8 x16 x4 x8 x16 x4 x8 x16
Address Command Signals
14 pins(Muxrsquod command
address)
14 pins(Muxrsquod command
address)
10 pins per channel(Muxrsquod command
Address)25 pins 27 pins 29 pins
(partial muxrsquod)
Address Command Data Rate
DDR(both rising and
falling edges of clock)
DDR (both rising and
falling edges of clock)
SDR(rising edge of clock
only)
SDR(rising edge of clock
only)
SDR(rising edge of
clock only)
SDR (rising edge of clock
only)
On Die Temperature Sensor Yes Yes Yes No OptionalRS Yes
DPD (Deep power-down mode) Yes Yes No No No No
Package Options POP MCP discrete POP MCP discrete PoP MCP discrete Discrete Discrete Discrete
ProductTemp Grades CT IT AIT AT AAT CT IT AIT AT AATWT (-25rsquo to 85rsquoC)
AAT (-40C to 105C)AUT (-40rsquoC to 125rsquoC)
CT IT AIT AT AAT CT IT AIT AT AAT AUT CT IT AIT AT AAT AUT
copy 2017 Micron Technology Inc | June 15 201819
Standard DRAM LPDRAM Form Factor Center bond pads for highest performance and lowest
costEdge bond pads allow for stacked die for MCP and PoP
packaging enabling compact form factors
Performance x4 x8 x16 is lower cost and supports higher density configurations
x32 allows system to support high bandwidthin point-to-point applications
DRAMpower
IDD specifications are geared towards moderate stand-by power providing the highest yields and lowest cost
Ultra low standby power enabled by on-die power management and long refresh rates
Systempower
Additional Delay Locked Loop (DLL) circuitry required for high performance which inhibits system power
savings
Lack of DLL circuitry allows for improved system power management System can enterexit power-down modes
as well as throttle or stop the clock
Key Takeaway
Optimized for cost and performancecost is primary feature
Optimized for battery life and portability low power amp smallest possible footprint are primary features
LPDD
R4 S
peci
fic In
foG
ener
al LP
vs
DD
R Co
mpa
rison
LPDRAM offers additional value over standard DRAM
Standard DRAM amp LPDRAM Trade Offs
copy 2017 Micron Technology Inc20
DRAM Performance Improvements Over Time (IO x16)
0
5
10
15
20
25
30
35
40
45
50
55
2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016 2017
Gbs
DDR2
DDR2-53385 Gbs
DDR2-667106 Gbs
DDR2-800128 Gbs
DDR3-106617 Gbs
DDR3-1333213 Gbs
DDR3-1600256 Gbs
DDR3-186630 Gbs
DDR4-213334 Gbs
DDR4-2400384 Gbs
DDR4-2666427 Gbs
DDR4-3200512 Gbs
DDR3
DDR4
June 15 2018
copy 2017 Micron Technology Inc21
0
20
40
60
80
100
120
140
160
2010 2011 2012 2013 2014 2015 2016 2017 2018
LPDDR2-800256 Gbs
LPDDR2-10663411 Gbs
LPDDR2LPDDR3-1600
512 Gbs
LPDDR3-1866 59712 Gbs
LPDDR3
LPDDR4-37331194 Gbs
LPDDR4-426613651 Gbs
LPDDR4
LPDDR4-32001024 Gbs
Gbs
LPDDR Performance Improvements Over Time (IO x32)
LPDDR4-32001024 Gbs
June 15 2018
Non-Volatile Details
copy 2017 Micron Technology Inc | June 15 201823
Xccelatrade Flash Best of Parallel and Serial NOR Flash
Compared to Page Mode Parallel NOR
5X THE PERFORMANCE 4X FEWER PINS 3X LESS ENERGY AND 2X SMALLER PACKAGE
512MbParallel NOR
MT28EW
512MbQuad-SPIMT25Q
512MbTwin-Quad
MT25T
512MbXccela Flash
MT35X
Bandwidth 80MBs(Page mode async x16)
90MBs(90MHz DDR mode)
180MBs(90MHz DDR mode)
400MBs(200MHz DDR mode)
Initial WordAccess Time 95ns (x16) 139ns (18V 4-bit)
157ns (18V 16-bits)139ns (18V 8-bit)145ns (18V 16-bit)
85ns (18V 8-bit)875ns (18V 16-bit)
Subsequent Word Access
20ns (16-bits)(95ns across 32B page)
6ns (4-bits)24ns (16-bits)
6ns (8-bits)12ns (16-bits)
25ns (8-bits)5ns (16-bits)
Package and Pins 64-TBGA (11x13mm)50 Active Pins
24-BGA (6x8mm)6 Active Pins
24-BGA (6x8mm)11 Active Pins
24-BGA (6x8mm)11 Active Pins
Energy Per Bit 101 pJbit 41 pJbit 41 pJbit 28 pJbit
Xccelatrade Flash(MT35X)
Parallel NOR FlashHigh performance
Fast bootReliability
Serial NOR FlashReduced pin countsSimple PCB design
ReliabilityNeed more
performance with same package
Want reduced pin countpackage size
Source Micron datasheets
copy 2017 Micron Technology Inc
MT35X (Octal) aka
24
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc
The Evolution of SPI
25
SPI Dual-SPI Quad-SPI Twin Quad Octal of Signals 6 6 6 10-12 11
Clock (max) 75MHz 75MHz 180MHz SDR (90MHz DDR) 180MHz SDR (90MHz DDR) 166MHz SDR (200MHz DDR)
Bandwidth (max) 9MBs 18MBs 90MBs 180MBs 400MBs
0 MBs
50 MBs
100 MBs
150 MBs
200 MBs
250 MBs
300 MBs
350 MBs
400 MBs
450 MBs
500 MBs
1997 2006 2016
SPI Interface Bandwidth
Dual-IO18MBs
Quad (SDR)40MBs
Twin-Quad 180MBs
Octal 400MBs
Quad (DDR) 90MBs
125MBs 9MBs
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc26
Micron Read Performance Comparisons
0
50
100
150
200
250
300
350
400
450
1 2 4 8 16 32 64 128 256 512 1k 2k 4k 8k 16k 32k 64k 128k 256k 512k 1M 2M
Tran
sfer
Rat
e (M
Byt
ess
ec)
Bytes per Fetch
NOR and NAND Performance Comparisons Random Read Access Performance vs Data Size
x8 200MHz DDR Octal NOR (MT35X)
x8 166MHz SDR Twin Quad Serial NOR (MT25T)
x4 166MHz SDR 83MHz DDR Serial NOR (MT25Q) 18V
x4 133MHz SPI NAND
x8 NAND ONFI 30
x8 eMMC 45
x8 eMMC 50
+
+
CacheLine Fills
BOOT or Read time at 400MBsBit density 512Mb 1Gb 2GbByte density 64MB 128MB 256MBTime to read 16 sec 32 sec 64 sec
Graphic image read 2Bytes (65K colors)Pixel Size 1K x 1K 4K x 4KByte density 2MB 34MBTime to read 52ms 88ms
Xccelatrade FlashHighest Performance
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc
eMMC Fully Managed NANDPROVIDES REDUCED DESIGN EFFORT FOR MINIMAL COST
NAND
Wear leveling
ECC
Driver
NAND Controller
Raw NAND
ONFI NAND bus
CommandBlock Management
Low-level Driver
NAND Controller
Fully Managed NAND (eMMC)
MMC SATA or USB bus
NAND
Wear leveling CMDBlock
Mgmt NAND Error Mgmt
Controller
eMMC eUSBSATA amp CF
Cost amp Price
Ease of design amp Validation
27 June 15 2018
copy 2017 Micron Technology Inc
eMMC
28 June 15 2018
copy 2017 Micron Technology Inc
Enjoy Micron Automotive eMMC comprehensive Product Portfolio
PCIe NVMeUFS 2x
June 15 2018
copy 2017 Micron Technology Inc
New Features in eMMC 51
| June 15 201830
copy 2017 Micron Technology Inc
SSD Form FactorsEXISTING AND FUTURE DIRECTIONS
FORM FACTORSndash 25rdquo
ndash mSATA
ndash M2
ndash uBGA (Future)
INTERFACESndash SATA III
ndash PCIe
YEARLY FIRMWARE UPDATES
| June 15 201831
Parameter 25rdquo mSATA M2Capacities (GB) 60120240 60120240 120240
Specification EIA-720 MO-300B variation A PCIe M2 Spec Rev 10Dimensions (L) 10045mm
(W) 6985mm (H) 7mm
(L) 5080mm(W) 2985mm(H) 375mm
(L) 60 mm(W) 22 mm(H) 15 mm
Weight lt 70g lt 10g lt 10 g
Packaging MCP (Multi Chip Package)PoP (Package on Package)
copy 2017 Micron Technology Inc
What is an eMCPePoP
Benefits includehellipndash Board space savings through vertical stacking of several memory chips
ndash Minimize bill of materials for simplified manufacturing and cost savings
ndash High density low power consumption shortest interconnections possible
ndash Accelerated time to market through rapid integration of modules
ApplicationProcessor -Driver
MLC NAND
eMMC
PCB
LPDRAM
Controller
POP
Application Processor -Driver
SLC NAND
NAND MCP
LPDRAM
Printed Circuit Board (PCB)
ApplicationProcessor -Driver
eMMCePOPLPDRAM
ApplicationProcessor -Driver
eMMC
eMCP
LPDRAM
PCBPCB
eMCP is a Multi Chip Package including eMMC and LPDDRx
ePoP is an eMCP in a PoP (Package on Package) design
June 15 2018
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Power Calculatorshttpswwwmicroncomsupporttools-and-utilitiespower-calc
| June 15 201834
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Technical Notesndash httpswwwmicroncomadvanced
searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=ampshow=10ampfamily=2dd96f4ee22e4de7b7027e6dd6a2718campnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201835
copy 2017 Micron Technology Inc
Links to Micronrsquos NOR Flash Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=1f8cfba0d95c4ea9a6c99e3272fd0e39ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201836
copy 2017 Micron Technology Inc
Link to Micronrsquos eMMC Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=ff04c268087d4d33a126d6a5a59ccebdamptechnology=9b8d2c45520a422c8f635832d3a2b0eaampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201837
copy 2017 Micron Technology Inc
Link to Micronrsquos SSD Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=59b6cc75486a4bca80f5b1b8a2086740ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201838
Technical Details
copy 2017 Micron Technology Inc
LPDDRx and DDRx SDRAM Feature Comparison
| June 15 201818
Type LPDDR2 LPDDR3 LPDDR44X DDR2 DDR3DDR3L DDR4Die Density Up to 8Gb Up to 32Gb Up to 32Gb Up to 2Gb Up to 8Gb Up to 16Gb (128Gb 8H)
Core Voltage (Vdd) 12V 18V WL supply req
12V18V WL supply req
11V10V18V WL supply req
18V155V 15V135V
12VSeparate WL supply
25VIO Voltage 12V 12V 11V (4X = 06V) Same as VDD Same as VDD Same as VDD
Max Clock Freq Data rate 533MHzDDR1066 800MHzDDR1600 2133MHzDDR4267 533MHzDDR1066 1066MHzDDR2100 1600MHz+DDR3200+
Burst Lengths 4 8 16 8 16 32 4 8 BC4 8 BC4 8Configurations x16 x32 x16 x32 2Ch x16 x4 x8 x16 x4 x8 x16 x4 x8 x16
Address Command Signals
14 pins(Muxrsquod command
address)
14 pins(Muxrsquod command
address)
10 pins per channel(Muxrsquod command
Address)25 pins 27 pins 29 pins
(partial muxrsquod)
Address Command Data Rate
DDR(both rising and
falling edges of clock)
DDR (both rising and
falling edges of clock)
SDR(rising edge of clock
only)
SDR(rising edge of clock
only)
SDR(rising edge of
clock only)
SDR (rising edge of clock
only)
On Die Temperature Sensor Yes Yes Yes No OptionalRS Yes
DPD (Deep power-down mode) Yes Yes No No No No
Package Options POP MCP discrete POP MCP discrete PoP MCP discrete Discrete Discrete Discrete
ProductTemp Grades CT IT AIT AT AAT CT IT AIT AT AATWT (-25rsquo to 85rsquoC)
AAT (-40C to 105C)AUT (-40rsquoC to 125rsquoC)
CT IT AIT AT AAT CT IT AIT AT AAT AUT CT IT AIT AT AAT AUT
copy 2017 Micron Technology Inc | June 15 201819
Standard DRAM LPDRAM Form Factor Center bond pads for highest performance and lowest
costEdge bond pads allow for stacked die for MCP and PoP
packaging enabling compact form factors
Performance x4 x8 x16 is lower cost and supports higher density configurations
x32 allows system to support high bandwidthin point-to-point applications
DRAMpower
IDD specifications are geared towards moderate stand-by power providing the highest yields and lowest cost
Ultra low standby power enabled by on-die power management and long refresh rates
Systempower
Additional Delay Locked Loop (DLL) circuitry required for high performance which inhibits system power
savings
Lack of DLL circuitry allows for improved system power management System can enterexit power-down modes
as well as throttle or stop the clock
Key Takeaway
Optimized for cost and performancecost is primary feature
Optimized for battery life and portability low power amp smallest possible footprint are primary features
LPDD
R4 S
peci
fic In
foG
ener
al LP
vs
DD
R Co
mpa
rison
LPDRAM offers additional value over standard DRAM
Standard DRAM amp LPDRAM Trade Offs
copy 2017 Micron Technology Inc20
DRAM Performance Improvements Over Time (IO x16)
0
5
10
15
20
25
30
35
40
45
50
55
2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016 2017
Gbs
DDR2
DDR2-53385 Gbs
DDR2-667106 Gbs
DDR2-800128 Gbs
DDR3-106617 Gbs
DDR3-1333213 Gbs
DDR3-1600256 Gbs
DDR3-186630 Gbs
DDR4-213334 Gbs
DDR4-2400384 Gbs
DDR4-2666427 Gbs
DDR4-3200512 Gbs
DDR3
DDR4
June 15 2018
copy 2017 Micron Technology Inc21
0
20
40
60
80
100
120
140
160
2010 2011 2012 2013 2014 2015 2016 2017 2018
LPDDR2-800256 Gbs
LPDDR2-10663411 Gbs
LPDDR2LPDDR3-1600
512 Gbs
LPDDR3-1866 59712 Gbs
LPDDR3
LPDDR4-37331194 Gbs
LPDDR4-426613651 Gbs
LPDDR4
LPDDR4-32001024 Gbs
Gbs
LPDDR Performance Improvements Over Time (IO x32)
LPDDR4-32001024 Gbs
June 15 2018
Non-Volatile Details
copy 2017 Micron Technology Inc | June 15 201823
Xccelatrade Flash Best of Parallel and Serial NOR Flash
Compared to Page Mode Parallel NOR
5X THE PERFORMANCE 4X FEWER PINS 3X LESS ENERGY AND 2X SMALLER PACKAGE
512MbParallel NOR
MT28EW
512MbQuad-SPIMT25Q
512MbTwin-Quad
MT25T
512MbXccela Flash
MT35X
Bandwidth 80MBs(Page mode async x16)
90MBs(90MHz DDR mode)
180MBs(90MHz DDR mode)
400MBs(200MHz DDR mode)
Initial WordAccess Time 95ns (x16) 139ns (18V 4-bit)
157ns (18V 16-bits)139ns (18V 8-bit)145ns (18V 16-bit)
85ns (18V 8-bit)875ns (18V 16-bit)
Subsequent Word Access
20ns (16-bits)(95ns across 32B page)
6ns (4-bits)24ns (16-bits)
6ns (8-bits)12ns (16-bits)
25ns (8-bits)5ns (16-bits)
Package and Pins 64-TBGA (11x13mm)50 Active Pins
24-BGA (6x8mm)6 Active Pins
24-BGA (6x8mm)11 Active Pins
24-BGA (6x8mm)11 Active Pins
Energy Per Bit 101 pJbit 41 pJbit 41 pJbit 28 pJbit
Xccelatrade Flash(MT35X)
Parallel NOR FlashHigh performance
Fast bootReliability
Serial NOR FlashReduced pin countsSimple PCB design
ReliabilityNeed more
performance with same package
Want reduced pin countpackage size
Source Micron datasheets
copy 2017 Micron Technology Inc
MT35X (Octal) aka
24
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc
The Evolution of SPI
25
SPI Dual-SPI Quad-SPI Twin Quad Octal of Signals 6 6 6 10-12 11
Clock (max) 75MHz 75MHz 180MHz SDR (90MHz DDR) 180MHz SDR (90MHz DDR) 166MHz SDR (200MHz DDR)
Bandwidth (max) 9MBs 18MBs 90MBs 180MBs 400MBs
0 MBs
50 MBs
100 MBs
150 MBs
200 MBs
250 MBs
300 MBs
350 MBs
400 MBs
450 MBs
500 MBs
1997 2006 2016
SPI Interface Bandwidth
Dual-IO18MBs
Quad (SDR)40MBs
Twin-Quad 180MBs
Octal 400MBs
Quad (DDR) 90MBs
125MBs 9MBs
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc26
Micron Read Performance Comparisons
0
50
100
150
200
250
300
350
400
450
1 2 4 8 16 32 64 128 256 512 1k 2k 4k 8k 16k 32k 64k 128k 256k 512k 1M 2M
Tran
sfer
Rat
e (M
Byt
ess
ec)
Bytes per Fetch
NOR and NAND Performance Comparisons Random Read Access Performance vs Data Size
x8 200MHz DDR Octal NOR (MT35X)
x8 166MHz SDR Twin Quad Serial NOR (MT25T)
x4 166MHz SDR 83MHz DDR Serial NOR (MT25Q) 18V
x4 133MHz SPI NAND
x8 NAND ONFI 30
x8 eMMC 45
x8 eMMC 50
+
+
CacheLine Fills
BOOT or Read time at 400MBsBit density 512Mb 1Gb 2GbByte density 64MB 128MB 256MBTime to read 16 sec 32 sec 64 sec
Graphic image read 2Bytes (65K colors)Pixel Size 1K x 1K 4K x 4KByte density 2MB 34MBTime to read 52ms 88ms
Xccelatrade FlashHighest Performance
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc
eMMC Fully Managed NANDPROVIDES REDUCED DESIGN EFFORT FOR MINIMAL COST
NAND
Wear leveling
ECC
Driver
NAND Controller
Raw NAND
ONFI NAND bus
CommandBlock Management
Low-level Driver
NAND Controller
Fully Managed NAND (eMMC)
MMC SATA or USB bus
NAND
Wear leveling CMDBlock
Mgmt NAND Error Mgmt
Controller
eMMC eUSBSATA amp CF
Cost amp Price
Ease of design amp Validation
27 June 15 2018
copy 2017 Micron Technology Inc
eMMC
28 June 15 2018
copy 2017 Micron Technology Inc
Enjoy Micron Automotive eMMC comprehensive Product Portfolio
PCIe NVMeUFS 2x
June 15 2018
copy 2017 Micron Technology Inc
New Features in eMMC 51
| June 15 201830
copy 2017 Micron Technology Inc
SSD Form FactorsEXISTING AND FUTURE DIRECTIONS
FORM FACTORSndash 25rdquo
ndash mSATA
ndash M2
ndash uBGA (Future)
INTERFACESndash SATA III
ndash PCIe
YEARLY FIRMWARE UPDATES
| June 15 201831
Parameter 25rdquo mSATA M2Capacities (GB) 60120240 60120240 120240
Specification EIA-720 MO-300B variation A PCIe M2 Spec Rev 10Dimensions (L) 10045mm
(W) 6985mm (H) 7mm
(L) 5080mm(W) 2985mm(H) 375mm
(L) 60 mm(W) 22 mm(H) 15 mm
Weight lt 70g lt 10g lt 10 g
Packaging MCP (Multi Chip Package)PoP (Package on Package)
copy 2017 Micron Technology Inc
What is an eMCPePoP
Benefits includehellipndash Board space savings through vertical stacking of several memory chips
ndash Minimize bill of materials for simplified manufacturing and cost savings
ndash High density low power consumption shortest interconnections possible
ndash Accelerated time to market through rapid integration of modules
ApplicationProcessor -Driver
MLC NAND
eMMC
PCB
LPDRAM
Controller
POP
Application Processor -Driver
SLC NAND
NAND MCP
LPDRAM
Printed Circuit Board (PCB)
ApplicationProcessor -Driver
eMMCePOPLPDRAM
ApplicationProcessor -Driver
eMMC
eMCP
LPDRAM
PCBPCB
eMCP is a Multi Chip Package including eMMC and LPDDRx
ePoP is an eMCP in a PoP (Package on Package) design
June 15 2018
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Power Calculatorshttpswwwmicroncomsupporttools-and-utilitiespower-calc
| June 15 201834
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Technical Notesndash httpswwwmicroncomadvanced
searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=ampshow=10ampfamily=2dd96f4ee22e4de7b7027e6dd6a2718campnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201835
copy 2017 Micron Technology Inc
Links to Micronrsquos NOR Flash Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=1f8cfba0d95c4ea9a6c99e3272fd0e39ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201836
copy 2017 Micron Technology Inc
Link to Micronrsquos eMMC Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=ff04c268087d4d33a126d6a5a59ccebdamptechnology=9b8d2c45520a422c8f635832d3a2b0eaampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201837
copy 2017 Micron Technology Inc
Link to Micronrsquos SSD Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=59b6cc75486a4bca80f5b1b8a2086740ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201838
copy 2017 Micron Technology Inc
LPDDRx and DDRx SDRAM Feature Comparison
| June 15 201818
Type LPDDR2 LPDDR3 LPDDR44X DDR2 DDR3DDR3L DDR4Die Density Up to 8Gb Up to 32Gb Up to 32Gb Up to 2Gb Up to 8Gb Up to 16Gb (128Gb 8H)
Core Voltage (Vdd) 12V 18V WL supply req
12V18V WL supply req
11V10V18V WL supply req
18V155V 15V135V
12VSeparate WL supply
25VIO Voltage 12V 12V 11V (4X = 06V) Same as VDD Same as VDD Same as VDD
Max Clock Freq Data rate 533MHzDDR1066 800MHzDDR1600 2133MHzDDR4267 533MHzDDR1066 1066MHzDDR2100 1600MHz+DDR3200+
Burst Lengths 4 8 16 8 16 32 4 8 BC4 8 BC4 8Configurations x16 x32 x16 x32 2Ch x16 x4 x8 x16 x4 x8 x16 x4 x8 x16
Address Command Signals
14 pins(Muxrsquod command
address)
14 pins(Muxrsquod command
address)
10 pins per channel(Muxrsquod command
Address)25 pins 27 pins 29 pins
(partial muxrsquod)
Address Command Data Rate
DDR(both rising and
falling edges of clock)
DDR (both rising and
falling edges of clock)
SDR(rising edge of clock
only)
SDR(rising edge of clock
only)
SDR(rising edge of
clock only)
SDR (rising edge of clock
only)
On Die Temperature Sensor Yes Yes Yes No OptionalRS Yes
DPD (Deep power-down mode) Yes Yes No No No No
Package Options POP MCP discrete POP MCP discrete PoP MCP discrete Discrete Discrete Discrete
ProductTemp Grades CT IT AIT AT AAT CT IT AIT AT AATWT (-25rsquo to 85rsquoC)
AAT (-40C to 105C)AUT (-40rsquoC to 125rsquoC)
CT IT AIT AT AAT CT IT AIT AT AAT AUT CT IT AIT AT AAT AUT
copy 2017 Micron Technology Inc | June 15 201819
Standard DRAM LPDRAM Form Factor Center bond pads for highest performance and lowest
costEdge bond pads allow for stacked die for MCP and PoP
packaging enabling compact form factors
Performance x4 x8 x16 is lower cost and supports higher density configurations
x32 allows system to support high bandwidthin point-to-point applications
DRAMpower
IDD specifications are geared towards moderate stand-by power providing the highest yields and lowest cost
Ultra low standby power enabled by on-die power management and long refresh rates
Systempower
Additional Delay Locked Loop (DLL) circuitry required for high performance which inhibits system power
savings
Lack of DLL circuitry allows for improved system power management System can enterexit power-down modes
as well as throttle or stop the clock
Key Takeaway
Optimized for cost and performancecost is primary feature
Optimized for battery life and portability low power amp smallest possible footprint are primary features
LPDD
R4 S
peci
fic In
foG
ener
al LP
vs
DD
R Co
mpa
rison
LPDRAM offers additional value over standard DRAM
Standard DRAM amp LPDRAM Trade Offs
copy 2017 Micron Technology Inc20
DRAM Performance Improvements Over Time (IO x16)
0
5
10
15
20
25
30
35
40
45
50
55
2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016 2017
Gbs
DDR2
DDR2-53385 Gbs
DDR2-667106 Gbs
DDR2-800128 Gbs
DDR3-106617 Gbs
DDR3-1333213 Gbs
DDR3-1600256 Gbs
DDR3-186630 Gbs
DDR4-213334 Gbs
DDR4-2400384 Gbs
DDR4-2666427 Gbs
DDR4-3200512 Gbs
DDR3
DDR4
June 15 2018
copy 2017 Micron Technology Inc21
0
20
40
60
80
100
120
140
160
2010 2011 2012 2013 2014 2015 2016 2017 2018
LPDDR2-800256 Gbs
LPDDR2-10663411 Gbs
LPDDR2LPDDR3-1600
512 Gbs
LPDDR3-1866 59712 Gbs
LPDDR3
LPDDR4-37331194 Gbs
LPDDR4-426613651 Gbs
LPDDR4
LPDDR4-32001024 Gbs
Gbs
LPDDR Performance Improvements Over Time (IO x32)
LPDDR4-32001024 Gbs
June 15 2018
Non-Volatile Details
copy 2017 Micron Technology Inc | June 15 201823
Xccelatrade Flash Best of Parallel and Serial NOR Flash
Compared to Page Mode Parallel NOR
5X THE PERFORMANCE 4X FEWER PINS 3X LESS ENERGY AND 2X SMALLER PACKAGE
512MbParallel NOR
MT28EW
512MbQuad-SPIMT25Q
512MbTwin-Quad
MT25T
512MbXccela Flash
MT35X
Bandwidth 80MBs(Page mode async x16)
90MBs(90MHz DDR mode)
180MBs(90MHz DDR mode)
400MBs(200MHz DDR mode)
Initial WordAccess Time 95ns (x16) 139ns (18V 4-bit)
157ns (18V 16-bits)139ns (18V 8-bit)145ns (18V 16-bit)
85ns (18V 8-bit)875ns (18V 16-bit)
Subsequent Word Access
20ns (16-bits)(95ns across 32B page)
6ns (4-bits)24ns (16-bits)
6ns (8-bits)12ns (16-bits)
25ns (8-bits)5ns (16-bits)
Package and Pins 64-TBGA (11x13mm)50 Active Pins
24-BGA (6x8mm)6 Active Pins
24-BGA (6x8mm)11 Active Pins
24-BGA (6x8mm)11 Active Pins
Energy Per Bit 101 pJbit 41 pJbit 41 pJbit 28 pJbit
Xccelatrade Flash(MT35X)
Parallel NOR FlashHigh performance
Fast bootReliability
Serial NOR FlashReduced pin countsSimple PCB design
ReliabilityNeed more
performance with same package
Want reduced pin countpackage size
Source Micron datasheets
copy 2017 Micron Technology Inc
MT35X (Octal) aka
24
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc
The Evolution of SPI
25
SPI Dual-SPI Quad-SPI Twin Quad Octal of Signals 6 6 6 10-12 11
Clock (max) 75MHz 75MHz 180MHz SDR (90MHz DDR) 180MHz SDR (90MHz DDR) 166MHz SDR (200MHz DDR)
Bandwidth (max) 9MBs 18MBs 90MBs 180MBs 400MBs
0 MBs
50 MBs
100 MBs
150 MBs
200 MBs
250 MBs
300 MBs
350 MBs
400 MBs
450 MBs
500 MBs
1997 2006 2016
SPI Interface Bandwidth
Dual-IO18MBs
Quad (SDR)40MBs
Twin-Quad 180MBs
Octal 400MBs
Quad (DDR) 90MBs
125MBs 9MBs
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc26
Micron Read Performance Comparisons
0
50
100
150
200
250
300
350
400
450
1 2 4 8 16 32 64 128 256 512 1k 2k 4k 8k 16k 32k 64k 128k 256k 512k 1M 2M
Tran
sfer
Rat
e (M
Byt
ess
ec)
Bytes per Fetch
NOR and NAND Performance Comparisons Random Read Access Performance vs Data Size
x8 200MHz DDR Octal NOR (MT35X)
x8 166MHz SDR Twin Quad Serial NOR (MT25T)
x4 166MHz SDR 83MHz DDR Serial NOR (MT25Q) 18V
x4 133MHz SPI NAND
x8 NAND ONFI 30
x8 eMMC 45
x8 eMMC 50
+
+
CacheLine Fills
BOOT or Read time at 400MBsBit density 512Mb 1Gb 2GbByte density 64MB 128MB 256MBTime to read 16 sec 32 sec 64 sec
Graphic image read 2Bytes (65K colors)Pixel Size 1K x 1K 4K x 4KByte density 2MB 34MBTime to read 52ms 88ms
Xccelatrade FlashHighest Performance
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc
eMMC Fully Managed NANDPROVIDES REDUCED DESIGN EFFORT FOR MINIMAL COST
NAND
Wear leveling
ECC
Driver
NAND Controller
Raw NAND
ONFI NAND bus
CommandBlock Management
Low-level Driver
NAND Controller
Fully Managed NAND (eMMC)
MMC SATA or USB bus
NAND
Wear leveling CMDBlock
Mgmt NAND Error Mgmt
Controller
eMMC eUSBSATA amp CF
Cost amp Price
Ease of design amp Validation
27 June 15 2018
copy 2017 Micron Technology Inc
eMMC
28 June 15 2018
copy 2017 Micron Technology Inc
Enjoy Micron Automotive eMMC comprehensive Product Portfolio
PCIe NVMeUFS 2x
June 15 2018
copy 2017 Micron Technology Inc
New Features in eMMC 51
| June 15 201830
copy 2017 Micron Technology Inc
SSD Form FactorsEXISTING AND FUTURE DIRECTIONS
FORM FACTORSndash 25rdquo
ndash mSATA
ndash M2
ndash uBGA (Future)
INTERFACESndash SATA III
ndash PCIe
YEARLY FIRMWARE UPDATES
| June 15 201831
Parameter 25rdquo mSATA M2Capacities (GB) 60120240 60120240 120240
Specification EIA-720 MO-300B variation A PCIe M2 Spec Rev 10Dimensions (L) 10045mm
(W) 6985mm (H) 7mm
(L) 5080mm(W) 2985mm(H) 375mm
(L) 60 mm(W) 22 mm(H) 15 mm
Weight lt 70g lt 10g lt 10 g
Packaging MCP (Multi Chip Package)PoP (Package on Package)
copy 2017 Micron Technology Inc
What is an eMCPePoP
Benefits includehellipndash Board space savings through vertical stacking of several memory chips
ndash Minimize bill of materials for simplified manufacturing and cost savings
ndash High density low power consumption shortest interconnections possible
ndash Accelerated time to market through rapid integration of modules
ApplicationProcessor -Driver
MLC NAND
eMMC
PCB
LPDRAM
Controller
POP
Application Processor -Driver
SLC NAND
NAND MCP
LPDRAM
Printed Circuit Board (PCB)
ApplicationProcessor -Driver
eMMCePOPLPDRAM
ApplicationProcessor -Driver
eMMC
eMCP
LPDRAM
PCBPCB
eMCP is a Multi Chip Package including eMMC and LPDDRx
ePoP is an eMCP in a PoP (Package on Package) design
June 15 2018
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Power Calculatorshttpswwwmicroncomsupporttools-and-utilitiespower-calc
| June 15 201834
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Technical Notesndash httpswwwmicroncomadvanced
searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=ampshow=10ampfamily=2dd96f4ee22e4de7b7027e6dd6a2718campnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201835
copy 2017 Micron Technology Inc
Links to Micronrsquos NOR Flash Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=1f8cfba0d95c4ea9a6c99e3272fd0e39ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201836
copy 2017 Micron Technology Inc
Link to Micronrsquos eMMC Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=ff04c268087d4d33a126d6a5a59ccebdamptechnology=9b8d2c45520a422c8f635832d3a2b0eaampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201837
copy 2017 Micron Technology Inc
Link to Micronrsquos SSD Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=59b6cc75486a4bca80f5b1b8a2086740ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201838
copy 2017 Micron Technology Inc | June 15 201819
Standard DRAM LPDRAM Form Factor Center bond pads for highest performance and lowest
costEdge bond pads allow for stacked die for MCP and PoP
packaging enabling compact form factors
Performance x4 x8 x16 is lower cost and supports higher density configurations
x32 allows system to support high bandwidthin point-to-point applications
DRAMpower
IDD specifications are geared towards moderate stand-by power providing the highest yields and lowest cost
Ultra low standby power enabled by on-die power management and long refresh rates
Systempower
Additional Delay Locked Loop (DLL) circuitry required for high performance which inhibits system power
savings
Lack of DLL circuitry allows for improved system power management System can enterexit power-down modes
as well as throttle or stop the clock
Key Takeaway
Optimized for cost and performancecost is primary feature
Optimized for battery life and portability low power amp smallest possible footprint are primary features
LPDD
R4 S
peci
fic In
foG
ener
al LP
vs
DD
R Co
mpa
rison
LPDRAM offers additional value over standard DRAM
Standard DRAM amp LPDRAM Trade Offs
copy 2017 Micron Technology Inc20
DRAM Performance Improvements Over Time (IO x16)
0
5
10
15
20
25
30
35
40
45
50
55
2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016 2017
Gbs
DDR2
DDR2-53385 Gbs
DDR2-667106 Gbs
DDR2-800128 Gbs
DDR3-106617 Gbs
DDR3-1333213 Gbs
DDR3-1600256 Gbs
DDR3-186630 Gbs
DDR4-213334 Gbs
DDR4-2400384 Gbs
DDR4-2666427 Gbs
DDR4-3200512 Gbs
DDR3
DDR4
June 15 2018
copy 2017 Micron Technology Inc21
0
20
40
60
80
100
120
140
160
2010 2011 2012 2013 2014 2015 2016 2017 2018
LPDDR2-800256 Gbs
LPDDR2-10663411 Gbs
LPDDR2LPDDR3-1600
512 Gbs
LPDDR3-1866 59712 Gbs
LPDDR3
LPDDR4-37331194 Gbs
LPDDR4-426613651 Gbs
LPDDR4
LPDDR4-32001024 Gbs
Gbs
LPDDR Performance Improvements Over Time (IO x32)
LPDDR4-32001024 Gbs
June 15 2018
Non-Volatile Details
copy 2017 Micron Technology Inc | June 15 201823
Xccelatrade Flash Best of Parallel and Serial NOR Flash
Compared to Page Mode Parallel NOR
5X THE PERFORMANCE 4X FEWER PINS 3X LESS ENERGY AND 2X SMALLER PACKAGE
512MbParallel NOR
MT28EW
512MbQuad-SPIMT25Q
512MbTwin-Quad
MT25T
512MbXccela Flash
MT35X
Bandwidth 80MBs(Page mode async x16)
90MBs(90MHz DDR mode)
180MBs(90MHz DDR mode)
400MBs(200MHz DDR mode)
Initial WordAccess Time 95ns (x16) 139ns (18V 4-bit)
157ns (18V 16-bits)139ns (18V 8-bit)145ns (18V 16-bit)
85ns (18V 8-bit)875ns (18V 16-bit)
Subsequent Word Access
20ns (16-bits)(95ns across 32B page)
6ns (4-bits)24ns (16-bits)
6ns (8-bits)12ns (16-bits)
25ns (8-bits)5ns (16-bits)
Package and Pins 64-TBGA (11x13mm)50 Active Pins
24-BGA (6x8mm)6 Active Pins
24-BGA (6x8mm)11 Active Pins
24-BGA (6x8mm)11 Active Pins
Energy Per Bit 101 pJbit 41 pJbit 41 pJbit 28 pJbit
Xccelatrade Flash(MT35X)
Parallel NOR FlashHigh performance
Fast bootReliability
Serial NOR FlashReduced pin countsSimple PCB design
ReliabilityNeed more
performance with same package
Want reduced pin countpackage size
Source Micron datasheets
copy 2017 Micron Technology Inc
MT35X (Octal) aka
24
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc
The Evolution of SPI
25
SPI Dual-SPI Quad-SPI Twin Quad Octal of Signals 6 6 6 10-12 11
Clock (max) 75MHz 75MHz 180MHz SDR (90MHz DDR) 180MHz SDR (90MHz DDR) 166MHz SDR (200MHz DDR)
Bandwidth (max) 9MBs 18MBs 90MBs 180MBs 400MBs
0 MBs
50 MBs
100 MBs
150 MBs
200 MBs
250 MBs
300 MBs
350 MBs
400 MBs
450 MBs
500 MBs
1997 2006 2016
SPI Interface Bandwidth
Dual-IO18MBs
Quad (SDR)40MBs
Twin-Quad 180MBs
Octal 400MBs
Quad (DDR) 90MBs
125MBs 9MBs
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc26
Micron Read Performance Comparisons
0
50
100
150
200
250
300
350
400
450
1 2 4 8 16 32 64 128 256 512 1k 2k 4k 8k 16k 32k 64k 128k 256k 512k 1M 2M
Tran
sfer
Rat
e (M
Byt
ess
ec)
Bytes per Fetch
NOR and NAND Performance Comparisons Random Read Access Performance vs Data Size
x8 200MHz DDR Octal NOR (MT35X)
x8 166MHz SDR Twin Quad Serial NOR (MT25T)
x4 166MHz SDR 83MHz DDR Serial NOR (MT25Q) 18V
x4 133MHz SPI NAND
x8 NAND ONFI 30
x8 eMMC 45
x8 eMMC 50
+
+
CacheLine Fills
BOOT or Read time at 400MBsBit density 512Mb 1Gb 2GbByte density 64MB 128MB 256MBTime to read 16 sec 32 sec 64 sec
Graphic image read 2Bytes (65K colors)Pixel Size 1K x 1K 4K x 4KByte density 2MB 34MBTime to read 52ms 88ms
Xccelatrade FlashHighest Performance
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc
eMMC Fully Managed NANDPROVIDES REDUCED DESIGN EFFORT FOR MINIMAL COST
NAND
Wear leveling
ECC
Driver
NAND Controller
Raw NAND
ONFI NAND bus
CommandBlock Management
Low-level Driver
NAND Controller
Fully Managed NAND (eMMC)
MMC SATA or USB bus
NAND
Wear leveling CMDBlock
Mgmt NAND Error Mgmt
Controller
eMMC eUSBSATA amp CF
Cost amp Price
Ease of design amp Validation
27 June 15 2018
copy 2017 Micron Technology Inc
eMMC
28 June 15 2018
copy 2017 Micron Technology Inc
Enjoy Micron Automotive eMMC comprehensive Product Portfolio
PCIe NVMeUFS 2x
June 15 2018
copy 2017 Micron Technology Inc
New Features in eMMC 51
| June 15 201830
copy 2017 Micron Technology Inc
SSD Form FactorsEXISTING AND FUTURE DIRECTIONS
FORM FACTORSndash 25rdquo
ndash mSATA
ndash M2
ndash uBGA (Future)
INTERFACESndash SATA III
ndash PCIe
YEARLY FIRMWARE UPDATES
| June 15 201831
Parameter 25rdquo mSATA M2Capacities (GB) 60120240 60120240 120240
Specification EIA-720 MO-300B variation A PCIe M2 Spec Rev 10Dimensions (L) 10045mm
(W) 6985mm (H) 7mm
(L) 5080mm(W) 2985mm(H) 375mm
(L) 60 mm(W) 22 mm(H) 15 mm
Weight lt 70g lt 10g lt 10 g
Packaging MCP (Multi Chip Package)PoP (Package on Package)
copy 2017 Micron Technology Inc
What is an eMCPePoP
Benefits includehellipndash Board space savings through vertical stacking of several memory chips
ndash Minimize bill of materials for simplified manufacturing and cost savings
ndash High density low power consumption shortest interconnections possible
ndash Accelerated time to market through rapid integration of modules
ApplicationProcessor -Driver
MLC NAND
eMMC
PCB
LPDRAM
Controller
POP
Application Processor -Driver
SLC NAND
NAND MCP
LPDRAM
Printed Circuit Board (PCB)
ApplicationProcessor -Driver
eMMCePOPLPDRAM
ApplicationProcessor -Driver
eMMC
eMCP
LPDRAM
PCBPCB
eMCP is a Multi Chip Package including eMMC and LPDDRx
ePoP is an eMCP in a PoP (Package on Package) design
June 15 2018
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Power Calculatorshttpswwwmicroncomsupporttools-and-utilitiespower-calc
| June 15 201834
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Technical Notesndash httpswwwmicroncomadvanced
searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=ampshow=10ampfamily=2dd96f4ee22e4de7b7027e6dd6a2718campnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201835
copy 2017 Micron Technology Inc
Links to Micronrsquos NOR Flash Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=1f8cfba0d95c4ea9a6c99e3272fd0e39ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201836
copy 2017 Micron Technology Inc
Link to Micronrsquos eMMC Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=ff04c268087d4d33a126d6a5a59ccebdamptechnology=9b8d2c45520a422c8f635832d3a2b0eaampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201837
copy 2017 Micron Technology Inc
Link to Micronrsquos SSD Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=59b6cc75486a4bca80f5b1b8a2086740ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201838
copy 2017 Micron Technology Inc20
DRAM Performance Improvements Over Time (IO x16)
0
5
10
15
20
25
30
35
40
45
50
55
2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016 2017
Gbs
DDR2
DDR2-53385 Gbs
DDR2-667106 Gbs
DDR2-800128 Gbs
DDR3-106617 Gbs
DDR3-1333213 Gbs
DDR3-1600256 Gbs
DDR3-186630 Gbs
DDR4-213334 Gbs
DDR4-2400384 Gbs
DDR4-2666427 Gbs
DDR4-3200512 Gbs
DDR3
DDR4
June 15 2018
copy 2017 Micron Technology Inc21
0
20
40
60
80
100
120
140
160
2010 2011 2012 2013 2014 2015 2016 2017 2018
LPDDR2-800256 Gbs
LPDDR2-10663411 Gbs
LPDDR2LPDDR3-1600
512 Gbs
LPDDR3-1866 59712 Gbs
LPDDR3
LPDDR4-37331194 Gbs
LPDDR4-426613651 Gbs
LPDDR4
LPDDR4-32001024 Gbs
Gbs
LPDDR Performance Improvements Over Time (IO x32)
LPDDR4-32001024 Gbs
June 15 2018
Non-Volatile Details
copy 2017 Micron Technology Inc | June 15 201823
Xccelatrade Flash Best of Parallel and Serial NOR Flash
Compared to Page Mode Parallel NOR
5X THE PERFORMANCE 4X FEWER PINS 3X LESS ENERGY AND 2X SMALLER PACKAGE
512MbParallel NOR
MT28EW
512MbQuad-SPIMT25Q
512MbTwin-Quad
MT25T
512MbXccela Flash
MT35X
Bandwidth 80MBs(Page mode async x16)
90MBs(90MHz DDR mode)
180MBs(90MHz DDR mode)
400MBs(200MHz DDR mode)
Initial WordAccess Time 95ns (x16) 139ns (18V 4-bit)
157ns (18V 16-bits)139ns (18V 8-bit)145ns (18V 16-bit)
85ns (18V 8-bit)875ns (18V 16-bit)
Subsequent Word Access
20ns (16-bits)(95ns across 32B page)
6ns (4-bits)24ns (16-bits)
6ns (8-bits)12ns (16-bits)
25ns (8-bits)5ns (16-bits)
Package and Pins 64-TBGA (11x13mm)50 Active Pins
24-BGA (6x8mm)6 Active Pins
24-BGA (6x8mm)11 Active Pins
24-BGA (6x8mm)11 Active Pins
Energy Per Bit 101 pJbit 41 pJbit 41 pJbit 28 pJbit
Xccelatrade Flash(MT35X)
Parallel NOR FlashHigh performance
Fast bootReliability
Serial NOR FlashReduced pin countsSimple PCB design
ReliabilityNeed more
performance with same package
Want reduced pin countpackage size
Source Micron datasheets
copy 2017 Micron Technology Inc
MT35X (Octal) aka
24
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc
The Evolution of SPI
25
SPI Dual-SPI Quad-SPI Twin Quad Octal of Signals 6 6 6 10-12 11
Clock (max) 75MHz 75MHz 180MHz SDR (90MHz DDR) 180MHz SDR (90MHz DDR) 166MHz SDR (200MHz DDR)
Bandwidth (max) 9MBs 18MBs 90MBs 180MBs 400MBs
0 MBs
50 MBs
100 MBs
150 MBs
200 MBs
250 MBs
300 MBs
350 MBs
400 MBs
450 MBs
500 MBs
1997 2006 2016
SPI Interface Bandwidth
Dual-IO18MBs
Quad (SDR)40MBs
Twin-Quad 180MBs
Octal 400MBs
Quad (DDR) 90MBs
125MBs 9MBs
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc26
Micron Read Performance Comparisons
0
50
100
150
200
250
300
350
400
450
1 2 4 8 16 32 64 128 256 512 1k 2k 4k 8k 16k 32k 64k 128k 256k 512k 1M 2M
Tran
sfer
Rat
e (M
Byt
ess
ec)
Bytes per Fetch
NOR and NAND Performance Comparisons Random Read Access Performance vs Data Size
x8 200MHz DDR Octal NOR (MT35X)
x8 166MHz SDR Twin Quad Serial NOR (MT25T)
x4 166MHz SDR 83MHz DDR Serial NOR (MT25Q) 18V
x4 133MHz SPI NAND
x8 NAND ONFI 30
x8 eMMC 45
x8 eMMC 50
+
+
CacheLine Fills
BOOT or Read time at 400MBsBit density 512Mb 1Gb 2GbByte density 64MB 128MB 256MBTime to read 16 sec 32 sec 64 sec
Graphic image read 2Bytes (65K colors)Pixel Size 1K x 1K 4K x 4KByte density 2MB 34MBTime to read 52ms 88ms
Xccelatrade FlashHighest Performance
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc
eMMC Fully Managed NANDPROVIDES REDUCED DESIGN EFFORT FOR MINIMAL COST
NAND
Wear leveling
ECC
Driver
NAND Controller
Raw NAND
ONFI NAND bus
CommandBlock Management
Low-level Driver
NAND Controller
Fully Managed NAND (eMMC)
MMC SATA or USB bus
NAND
Wear leveling CMDBlock
Mgmt NAND Error Mgmt
Controller
eMMC eUSBSATA amp CF
Cost amp Price
Ease of design amp Validation
27 June 15 2018
copy 2017 Micron Technology Inc
eMMC
28 June 15 2018
copy 2017 Micron Technology Inc
Enjoy Micron Automotive eMMC comprehensive Product Portfolio
PCIe NVMeUFS 2x
June 15 2018
copy 2017 Micron Technology Inc
New Features in eMMC 51
| June 15 201830
copy 2017 Micron Technology Inc
SSD Form FactorsEXISTING AND FUTURE DIRECTIONS
FORM FACTORSndash 25rdquo
ndash mSATA
ndash M2
ndash uBGA (Future)
INTERFACESndash SATA III
ndash PCIe
YEARLY FIRMWARE UPDATES
| June 15 201831
Parameter 25rdquo mSATA M2Capacities (GB) 60120240 60120240 120240
Specification EIA-720 MO-300B variation A PCIe M2 Spec Rev 10Dimensions (L) 10045mm
(W) 6985mm (H) 7mm
(L) 5080mm(W) 2985mm(H) 375mm
(L) 60 mm(W) 22 mm(H) 15 mm
Weight lt 70g lt 10g lt 10 g
Packaging MCP (Multi Chip Package)PoP (Package on Package)
copy 2017 Micron Technology Inc
What is an eMCPePoP
Benefits includehellipndash Board space savings through vertical stacking of several memory chips
ndash Minimize bill of materials for simplified manufacturing and cost savings
ndash High density low power consumption shortest interconnections possible
ndash Accelerated time to market through rapid integration of modules
ApplicationProcessor -Driver
MLC NAND
eMMC
PCB
LPDRAM
Controller
POP
Application Processor -Driver
SLC NAND
NAND MCP
LPDRAM
Printed Circuit Board (PCB)
ApplicationProcessor -Driver
eMMCePOPLPDRAM
ApplicationProcessor -Driver
eMMC
eMCP
LPDRAM
PCBPCB
eMCP is a Multi Chip Package including eMMC and LPDDRx
ePoP is an eMCP in a PoP (Package on Package) design
June 15 2018
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Power Calculatorshttpswwwmicroncomsupporttools-and-utilitiespower-calc
| June 15 201834
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Technical Notesndash httpswwwmicroncomadvanced
searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=ampshow=10ampfamily=2dd96f4ee22e4de7b7027e6dd6a2718campnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201835
copy 2017 Micron Technology Inc
Links to Micronrsquos NOR Flash Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=1f8cfba0d95c4ea9a6c99e3272fd0e39ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201836
copy 2017 Micron Technology Inc
Link to Micronrsquos eMMC Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=ff04c268087d4d33a126d6a5a59ccebdamptechnology=9b8d2c45520a422c8f635832d3a2b0eaampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201837
copy 2017 Micron Technology Inc
Link to Micronrsquos SSD Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=59b6cc75486a4bca80f5b1b8a2086740ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201838
copy 2017 Micron Technology Inc21
0
20
40
60
80
100
120
140
160
2010 2011 2012 2013 2014 2015 2016 2017 2018
LPDDR2-800256 Gbs
LPDDR2-10663411 Gbs
LPDDR2LPDDR3-1600
512 Gbs
LPDDR3-1866 59712 Gbs
LPDDR3
LPDDR4-37331194 Gbs
LPDDR4-426613651 Gbs
LPDDR4
LPDDR4-32001024 Gbs
Gbs
LPDDR Performance Improvements Over Time (IO x32)
LPDDR4-32001024 Gbs
June 15 2018
Non-Volatile Details
copy 2017 Micron Technology Inc | June 15 201823
Xccelatrade Flash Best of Parallel and Serial NOR Flash
Compared to Page Mode Parallel NOR
5X THE PERFORMANCE 4X FEWER PINS 3X LESS ENERGY AND 2X SMALLER PACKAGE
512MbParallel NOR
MT28EW
512MbQuad-SPIMT25Q
512MbTwin-Quad
MT25T
512MbXccela Flash
MT35X
Bandwidth 80MBs(Page mode async x16)
90MBs(90MHz DDR mode)
180MBs(90MHz DDR mode)
400MBs(200MHz DDR mode)
Initial WordAccess Time 95ns (x16) 139ns (18V 4-bit)
157ns (18V 16-bits)139ns (18V 8-bit)145ns (18V 16-bit)
85ns (18V 8-bit)875ns (18V 16-bit)
Subsequent Word Access
20ns (16-bits)(95ns across 32B page)
6ns (4-bits)24ns (16-bits)
6ns (8-bits)12ns (16-bits)
25ns (8-bits)5ns (16-bits)
Package and Pins 64-TBGA (11x13mm)50 Active Pins
24-BGA (6x8mm)6 Active Pins
24-BGA (6x8mm)11 Active Pins
24-BGA (6x8mm)11 Active Pins
Energy Per Bit 101 pJbit 41 pJbit 41 pJbit 28 pJbit
Xccelatrade Flash(MT35X)
Parallel NOR FlashHigh performance
Fast bootReliability
Serial NOR FlashReduced pin countsSimple PCB design
ReliabilityNeed more
performance with same package
Want reduced pin countpackage size
Source Micron datasheets
copy 2017 Micron Technology Inc
MT35X (Octal) aka
24
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc
The Evolution of SPI
25
SPI Dual-SPI Quad-SPI Twin Quad Octal of Signals 6 6 6 10-12 11
Clock (max) 75MHz 75MHz 180MHz SDR (90MHz DDR) 180MHz SDR (90MHz DDR) 166MHz SDR (200MHz DDR)
Bandwidth (max) 9MBs 18MBs 90MBs 180MBs 400MBs
0 MBs
50 MBs
100 MBs
150 MBs
200 MBs
250 MBs
300 MBs
350 MBs
400 MBs
450 MBs
500 MBs
1997 2006 2016
SPI Interface Bandwidth
Dual-IO18MBs
Quad (SDR)40MBs
Twin-Quad 180MBs
Octal 400MBs
Quad (DDR) 90MBs
125MBs 9MBs
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc26
Micron Read Performance Comparisons
0
50
100
150
200
250
300
350
400
450
1 2 4 8 16 32 64 128 256 512 1k 2k 4k 8k 16k 32k 64k 128k 256k 512k 1M 2M
Tran
sfer
Rat
e (M
Byt
ess
ec)
Bytes per Fetch
NOR and NAND Performance Comparisons Random Read Access Performance vs Data Size
x8 200MHz DDR Octal NOR (MT35X)
x8 166MHz SDR Twin Quad Serial NOR (MT25T)
x4 166MHz SDR 83MHz DDR Serial NOR (MT25Q) 18V
x4 133MHz SPI NAND
x8 NAND ONFI 30
x8 eMMC 45
x8 eMMC 50
+
+
CacheLine Fills
BOOT or Read time at 400MBsBit density 512Mb 1Gb 2GbByte density 64MB 128MB 256MBTime to read 16 sec 32 sec 64 sec
Graphic image read 2Bytes (65K colors)Pixel Size 1K x 1K 4K x 4KByte density 2MB 34MBTime to read 52ms 88ms
Xccelatrade FlashHighest Performance
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc
eMMC Fully Managed NANDPROVIDES REDUCED DESIGN EFFORT FOR MINIMAL COST
NAND
Wear leveling
ECC
Driver
NAND Controller
Raw NAND
ONFI NAND bus
CommandBlock Management
Low-level Driver
NAND Controller
Fully Managed NAND (eMMC)
MMC SATA or USB bus
NAND
Wear leveling CMDBlock
Mgmt NAND Error Mgmt
Controller
eMMC eUSBSATA amp CF
Cost amp Price
Ease of design amp Validation
27 June 15 2018
copy 2017 Micron Technology Inc
eMMC
28 June 15 2018
copy 2017 Micron Technology Inc
Enjoy Micron Automotive eMMC comprehensive Product Portfolio
PCIe NVMeUFS 2x
June 15 2018
copy 2017 Micron Technology Inc
New Features in eMMC 51
| June 15 201830
copy 2017 Micron Technology Inc
SSD Form FactorsEXISTING AND FUTURE DIRECTIONS
FORM FACTORSndash 25rdquo
ndash mSATA
ndash M2
ndash uBGA (Future)
INTERFACESndash SATA III
ndash PCIe
YEARLY FIRMWARE UPDATES
| June 15 201831
Parameter 25rdquo mSATA M2Capacities (GB) 60120240 60120240 120240
Specification EIA-720 MO-300B variation A PCIe M2 Spec Rev 10Dimensions (L) 10045mm
(W) 6985mm (H) 7mm
(L) 5080mm(W) 2985mm(H) 375mm
(L) 60 mm(W) 22 mm(H) 15 mm
Weight lt 70g lt 10g lt 10 g
Packaging MCP (Multi Chip Package)PoP (Package on Package)
copy 2017 Micron Technology Inc
What is an eMCPePoP
Benefits includehellipndash Board space savings through vertical stacking of several memory chips
ndash Minimize bill of materials for simplified manufacturing and cost savings
ndash High density low power consumption shortest interconnections possible
ndash Accelerated time to market through rapid integration of modules
ApplicationProcessor -Driver
MLC NAND
eMMC
PCB
LPDRAM
Controller
POP
Application Processor -Driver
SLC NAND
NAND MCP
LPDRAM
Printed Circuit Board (PCB)
ApplicationProcessor -Driver
eMMCePOPLPDRAM
ApplicationProcessor -Driver
eMMC
eMCP
LPDRAM
PCBPCB
eMCP is a Multi Chip Package including eMMC and LPDDRx
ePoP is an eMCP in a PoP (Package on Package) design
June 15 2018
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Power Calculatorshttpswwwmicroncomsupporttools-and-utilitiespower-calc
| June 15 201834
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Technical Notesndash httpswwwmicroncomadvanced
searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=ampshow=10ampfamily=2dd96f4ee22e4de7b7027e6dd6a2718campnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201835
copy 2017 Micron Technology Inc
Links to Micronrsquos NOR Flash Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=1f8cfba0d95c4ea9a6c99e3272fd0e39ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201836
copy 2017 Micron Technology Inc
Link to Micronrsquos eMMC Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=ff04c268087d4d33a126d6a5a59ccebdamptechnology=9b8d2c45520a422c8f635832d3a2b0eaampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201837
copy 2017 Micron Technology Inc
Link to Micronrsquos SSD Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=59b6cc75486a4bca80f5b1b8a2086740ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201838
Non-Volatile Details
copy 2017 Micron Technology Inc | June 15 201823
Xccelatrade Flash Best of Parallel and Serial NOR Flash
Compared to Page Mode Parallel NOR
5X THE PERFORMANCE 4X FEWER PINS 3X LESS ENERGY AND 2X SMALLER PACKAGE
512MbParallel NOR
MT28EW
512MbQuad-SPIMT25Q
512MbTwin-Quad
MT25T
512MbXccela Flash
MT35X
Bandwidth 80MBs(Page mode async x16)
90MBs(90MHz DDR mode)
180MBs(90MHz DDR mode)
400MBs(200MHz DDR mode)
Initial WordAccess Time 95ns (x16) 139ns (18V 4-bit)
157ns (18V 16-bits)139ns (18V 8-bit)145ns (18V 16-bit)
85ns (18V 8-bit)875ns (18V 16-bit)
Subsequent Word Access
20ns (16-bits)(95ns across 32B page)
6ns (4-bits)24ns (16-bits)
6ns (8-bits)12ns (16-bits)
25ns (8-bits)5ns (16-bits)
Package and Pins 64-TBGA (11x13mm)50 Active Pins
24-BGA (6x8mm)6 Active Pins
24-BGA (6x8mm)11 Active Pins
24-BGA (6x8mm)11 Active Pins
Energy Per Bit 101 pJbit 41 pJbit 41 pJbit 28 pJbit
Xccelatrade Flash(MT35X)
Parallel NOR FlashHigh performance
Fast bootReliability
Serial NOR FlashReduced pin countsSimple PCB design
ReliabilityNeed more
performance with same package
Want reduced pin countpackage size
Source Micron datasheets
copy 2017 Micron Technology Inc
MT35X (Octal) aka
24
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc
The Evolution of SPI
25
SPI Dual-SPI Quad-SPI Twin Quad Octal of Signals 6 6 6 10-12 11
Clock (max) 75MHz 75MHz 180MHz SDR (90MHz DDR) 180MHz SDR (90MHz DDR) 166MHz SDR (200MHz DDR)
Bandwidth (max) 9MBs 18MBs 90MBs 180MBs 400MBs
0 MBs
50 MBs
100 MBs
150 MBs
200 MBs
250 MBs
300 MBs
350 MBs
400 MBs
450 MBs
500 MBs
1997 2006 2016
SPI Interface Bandwidth
Dual-IO18MBs
Quad (SDR)40MBs
Twin-Quad 180MBs
Octal 400MBs
Quad (DDR) 90MBs
125MBs 9MBs
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc26
Micron Read Performance Comparisons
0
50
100
150
200
250
300
350
400
450
1 2 4 8 16 32 64 128 256 512 1k 2k 4k 8k 16k 32k 64k 128k 256k 512k 1M 2M
Tran
sfer
Rat
e (M
Byt
ess
ec)
Bytes per Fetch
NOR and NAND Performance Comparisons Random Read Access Performance vs Data Size
x8 200MHz DDR Octal NOR (MT35X)
x8 166MHz SDR Twin Quad Serial NOR (MT25T)
x4 166MHz SDR 83MHz DDR Serial NOR (MT25Q) 18V
x4 133MHz SPI NAND
x8 NAND ONFI 30
x8 eMMC 45
x8 eMMC 50
+
+
CacheLine Fills
BOOT or Read time at 400MBsBit density 512Mb 1Gb 2GbByte density 64MB 128MB 256MBTime to read 16 sec 32 sec 64 sec
Graphic image read 2Bytes (65K colors)Pixel Size 1K x 1K 4K x 4KByte density 2MB 34MBTime to read 52ms 88ms
Xccelatrade FlashHighest Performance
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc
eMMC Fully Managed NANDPROVIDES REDUCED DESIGN EFFORT FOR MINIMAL COST
NAND
Wear leveling
ECC
Driver
NAND Controller
Raw NAND
ONFI NAND bus
CommandBlock Management
Low-level Driver
NAND Controller
Fully Managed NAND (eMMC)
MMC SATA or USB bus
NAND
Wear leveling CMDBlock
Mgmt NAND Error Mgmt
Controller
eMMC eUSBSATA amp CF
Cost amp Price
Ease of design amp Validation
27 June 15 2018
copy 2017 Micron Technology Inc
eMMC
28 June 15 2018
copy 2017 Micron Technology Inc
Enjoy Micron Automotive eMMC comprehensive Product Portfolio
PCIe NVMeUFS 2x
June 15 2018
copy 2017 Micron Technology Inc
New Features in eMMC 51
| June 15 201830
copy 2017 Micron Technology Inc
SSD Form FactorsEXISTING AND FUTURE DIRECTIONS
FORM FACTORSndash 25rdquo
ndash mSATA
ndash M2
ndash uBGA (Future)
INTERFACESndash SATA III
ndash PCIe
YEARLY FIRMWARE UPDATES
| June 15 201831
Parameter 25rdquo mSATA M2Capacities (GB) 60120240 60120240 120240
Specification EIA-720 MO-300B variation A PCIe M2 Spec Rev 10Dimensions (L) 10045mm
(W) 6985mm (H) 7mm
(L) 5080mm(W) 2985mm(H) 375mm
(L) 60 mm(W) 22 mm(H) 15 mm
Weight lt 70g lt 10g lt 10 g
Packaging MCP (Multi Chip Package)PoP (Package on Package)
copy 2017 Micron Technology Inc
What is an eMCPePoP
Benefits includehellipndash Board space savings through vertical stacking of several memory chips
ndash Minimize bill of materials for simplified manufacturing and cost savings
ndash High density low power consumption shortest interconnections possible
ndash Accelerated time to market through rapid integration of modules
ApplicationProcessor -Driver
MLC NAND
eMMC
PCB
LPDRAM
Controller
POP
Application Processor -Driver
SLC NAND
NAND MCP
LPDRAM
Printed Circuit Board (PCB)
ApplicationProcessor -Driver
eMMCePOPLPDRAM
ApplicationProcessor -Driver
eMMC
eMCP
LPDRAM
PCBPCB
eMCP is a Multi Chip Package including eMMC and LPDDRx
ePoP is an eMCP in a PoP (Package on Package) design
June 15 2018
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Power Calculatorshttpswwwmicroncomsupporttools-and-utilitiespower-calc
| June 15 201834
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Technical Notesndash httpswwwmicroncomadvanced
searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=ampshow=10ampfamily=2dd96f4ee22e4de7b7027e6dd6a2718campnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201835
copy 2017 Micron Technology Inc
Links to Micronrsquos NOR Flash Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=1f8cfba0d95c4ea9a6c99e3272fd0e39ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201836
copy 2017 Micron Technology Inc
Link to Micronrsquos eMMC Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=ff04c268087d4d33a126d6a5a59ccebdamptechnology=9b8d2c45520a422c8f635832d3a2b0eaampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201837
copy 2017 Micron Technology Inc
Link to Micronrsquos SSD Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=59b6cc75486a4bca80f5b1b8a2086740ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201838
copy 2017 Micron Technology Inc | June 15 201823
Xccelatrade Flash Best of Parallel and Serial NOR Flash
Compared to Page Mode Parallel NOR
5X THE PERFORMANCE 4X FEWER PINS 3X LESS ENERGY AND 2X SMALLER PACKAGE
512MbParallel NOR
MT28EW
512MbQuad-SPIMT25Q
512MbTwin-Quad
MT25T
512MbXccela Flash
MT35X
Bandwidth 80MBs(Page mode async x16)
90MBs(90MHz DDR mode)
180MBs(90MHz DDR mode)
400MBs(200MHz DDR mode)
Initial WordAccess Time 95ns (x16) 139ns (18V 4-bit)
157ns (18V 16-bits)139ns (18V 8-bit)145ns (18V 16-bit)
85ns (18V 8-bit)875ns (18V 16-bit)
Subsequent Word Access
20ns (16-bits)(95ns across 32B page)
6ns (4-bits)24ns (16-bits)
6ns (8-bits)12ns (16-bits)
25ns (8-bits)5ns (16-bits)
Package and Pins 64-TBGA (11x13mm)50 Active Pins
24-BGA (6x8mm)6 Active Pins
24-BGA (6x8mm)11 Active Pins
24-BGA (6x8mm)11 Active Pins
Energy Per Bit 101 pJbit 41 pJbit 41 pJbit 28 pJbit
Xccelatrade Flash(MT35X)
Parallel NOR FlashHigh performance
Fast bootReliability
Serial NOR FlashReduced pin countsSimple PCB design
ReliabilityNeed more
performance with same package
Want reduced pin countpackage size
Source Micron datasheets
copy 2017 Micron Technology Inc
MT35X (Octal) aka
24
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc
The Evolution of SPI
25
SPI Dual-SPI Quad-SPI Twin Quad Octal of Signals 6 6 6 10-12 11
Clock (max) 75MHz 75MHz 180MHz SDR (90MHz DDR) 180MHz SDR (90MHz DDR) 166MHz SDR (200MHz DDR)
Bandwidth (max) 9MBs 18MBs 90MBs 180MBs 400MBs
0 MBs
50 MBs
100 MBs
150 MBs
200 MBs
250 MBs
300 MBs
350 MBs
400 MBs
450 MBs
500 MBs
1997 2006 2016
SPI Interface Bandwidth
Dual-IO18MBs
Quad (SDR)40MBs
Twin-Quad 180MBs
Octal 400MBs
Quad (DDR) 90MBs
125MBs 9MBs
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc26
Micron Read Performance Comparisons
0
50
100
150
200
250
300
350
400
450
1 2 4 8 16 32 64 128 256 512 1k 2k 4k 8k 16k 32k 64k 128k 256k 512k 1M 2M
Tran
sfer
Rat
e (M
Byt
ess
ec)
Bytes per Fetch
NOR and NAND Performance Comparisons Random Read Access Performance vs Data Size
x8 200MHz DDR Octal NOR (MT35X)
x8 166MHz SDR Twin Quad Serial NOR (MT25T)
x4 166MHz SDR 83MHz DDR Serial NOR (MT25Q) 18V
x4 133MHz SPI NAND
x8 NAND ONFI 30
x8 eMMC 45
x8 eMMC 50
+
+
CacheLine Fills
BOOT or Read time at 400MBsBit density 512Mb 1Gb 2GbByte density 64MB 128MB 256MBTime to read 16 sec 32 sec 64 sec
Graphic image read 2Bytes (65K colors)Pixel Size 1K x 1K 4K x 4KByte density 2MB 34MBTime to read 52ms 88ms
Xccelatrade FlashHighest Performance
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc
eMMC Fully Managed NANDPROVIDES REDUCED DESIGN EFFORT FOR MINIMAL COST
NAND
Wear leveling
ECC
Driver
NAND Controller
Raw NAND
ONFI NAND bus
CommandBlock Management
Low-level Driver
NAND Controller
Fully Managed NAND (eMMC)
MMC SATA or USB bus
NAND
Wear leveling CMDBlock
Mgmt NAND Error Mgmt
Controller
eMMC eUSBSATA amp CF
Cost amp Price
Ease of design amp Validation
27 June 15 2018
copy 2017 Micron Technology Inc
eMMC
28 June 15 2018
copy 2017 Micron Technology Inc
Enjoy Micron Automotive eMMC comprehensive Product Portfolio
PCIe NVMeUFS 2x
June 15 2018
copy 2017 Micron Technology Inc
New Features in eMMC 51
| June 15 201830
copy 2017 Micron Technology Inc
SSD Form FactorsEXISTING AND FUTURE DIRECTIONS
FORM FACTORSndash 25rdquo
ndash mSATA
ndash M2
ndash uBGA (Future)
INTERFACESndash SATA III
ndash PCIe
YEARLY FIRMWARE UPDATES
| June 15 201831
Parameter 25rdquo mSATA M2Capacities (GB) 60120240 60120240 120240
Specification EIA-720 MO-300B variation A PCIe M2 Spec Rev 10Dimensions (L) 10045mm
(W) 6985mm (H) 7mm
(L) 5080mm(W) 2985mm(H) 375mm
(L) 60 mm(W) 22 mm(H) 15 mm
Weight lt 70g lt 10g lt 10 g
Packaging MCP (Multi Chip Package)PoP (Package on Package)
copy 2017 Micron Technology Inc
What is an eMCPePoP
Benefits includehellipndash Board space savings through vertical stacking of several memory chips
ndash Minimize bill of materials for simplified manufacturing and cost savings
ndash High density low power consumption shortest interconnections possible
ndash Accelerated time to market through rapid integration of modules
ApplicationProcessor -Driver
MLC NAND
eMMC
PCB
LPDRAM
Controller
POP
Application Processor -Driver
SLC NAND
NAND MCP
LPDRAM
Printed Circuit Board (PCB)
ApplicationProcessor -Driver
eMMCePOPLPDRAM
ApplicationProcessor -Driver
eMMC
eMCP
LPDRAM
PCBPCB
eMCP is a Multi Chip Package including eMMC and LPDDRx
ePoP is an eMCP in a PoP (Package on Package) design
June 15 2018
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Power Calculatorshttpswwwmicroncomsupporttools-and-utilitiespower-calc
| June 15 201834
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Technical Notesndash httpswwwmicroncomadvanced
searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=ampshow=10ampfamily=2dd96f4ee22e4de7b7027e6dd6a2718campnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201835
copy 2017 Micron Technology Inc
Links to Micronrsquos NOR Flash Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=1f8cfba0d95c4ea9a6c99e3272fd0e39ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201836
copy 2017 Micron Technology Inc
Link to Micronrsquos eMMC Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=ff04c268087d4d33a126d6a5a59ccebdamptechnology=9b8d2c45520a422c8f635832d3a2b0eaampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201837
copy 2017 Micron Technology Inc
Link to Micronrsquos SSD Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=59b6cc75486a4bca80f5b1b8a2086740ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201838
copy 2017 Micron Technology Inc
MT35X (Octal) aka
24
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc
The Evolution of SPI
25
SPI Dual-SPI Quad-SPI Twin Quad Octal of Signals 6 6 6 10-12 11
Clock (max) 75MHz 75MHz 180MHz SDR (90MHz DDR) 180MHz SDR (90MHz DDR) 166MHz SDR (200MHz DDR)
Bandwidth (max) 9MBs 18MBs 90MBs 180MBs 400MBs
0 MBs
50 MBs
100 MBs
150 MBs
200 MBs
250 MBs
300 MBs
350 MBs
400 MBs
450 MBs
500 MBs
1997 2006 2016
SPI Interface Bandwidth
Dual-IO18MBs
Quad (SDR)40MBs
Twin-Quad 180MBs
Octal 400MBs
Quad (DDR) 90MBs
125MBs 9MBs
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc26
Micron Read Performance Comparisons
0
50
100
150
200
250
300
350
400
450
1 2 4 8 16 32 64 128 256 512 1k 2k 4k 8k 16k 32k 64k 128k 256k 512k 1M 2M
Tran
sfer
Rat
e (M
Byt
ess
ec)
Bytes per Fetch
NOR and NAND Performance Comparisons Random Read Access Performance vs Data Size
x8 200MHz DDR Octal NOR (MT35X)
x8 166MHz SDR Twin Quad Serial NOR (MT25T)
x4 166MHz SDR 83MHz DDR Serial NOR (MT25Q) 18V
x4 133MHz SPI NAND
x8 NAND ONFI 30
x8 eMMC 45
x8 eMMC 50
+
+
CacheLine Fills
BOOT or Read time at 400MBsBit density 512Mb 1Gb 2GbByte density 64MB 128MB 256MBTime to read 16 sec 32 sec 64 sec
Graphic image read 2Bytes (65K colors)Pixel Size 1K x 1K 4K x 4KByte density 2MB 34MBTime to read 52ms 88ms
Xccelatrade FlashHighest Performance
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc
eMMC Fully Managed NANDPROVIDES REDUCED DESIGN EFFORT FOR MINIMAL COST
NAND
Wear leveling
ECC
Driver
NAND Controller
Raw NAND
ONFI NAND bus
CommandBlock Management
Low-level Driver
NAND Controller
Fully Managed NAND (eMMC)
MMC SATA or USB bus
NAND
Wear leveling CMDBlock
Mgmt NAND Error Mgmt
Controller
eMMC eUSBSATA amp CF
Cost amp Price
Ease of design amp Validation
27 June 15 2018
copy 2017 Micron Technology Inc
eMMC
28 June 15 2018
copy 2017 Micron Technology Inc
Enjoy Micron Automotive eMMC comprehensive Product Portfolio
PCIe NVMeUFS 2x
June 15 2018
copy 2017 Micron Technology Inc
New Features in eMMC 51
| June 15 201830
copy 2017 Micron Technology Inc
SSD Form FactorsEXISTING AND FUTURE DIRECTIONS
FORM FACTORSndash 25rdquo
ndash mSATA
ndash M2
ndash uBGA (Future)
INTERFACESndash SATA III
ndash PCIe
YEARLY FIRMWARE UPDATES
| June 15 201831
Parameter 25rdquo mSATA M2Capacities (GB) 60120240 60120240 120240
Specification EIA-720 MO-300B variation A PCIe M2 Spec Rev 10Dimensions (L) 10045mm
(W) 6985mm (H) 7mm
(L) 5080mm(W) 2985mm(H) 375mm
(L) 60 mm(W) 22 mm(H) 15 mm
Weight lt 70g lt 10g lt 10 g
Packaging MCP (Multi Chip Package)PoP (Package on Package)
copy 2017 Micron Technology Inc
What is an eMCPePoP
Benefits includehellipndash Board space savings through vertical stacking of several memory chips
ndash Minimize bill of materials for simplified manufacturing and cost savings
ndash High density low power consumption shortest interconnections possible
ndash Accelerated time to market through rapid integration of modules
ApplicationProcessor -Driver
MLC NAND
eMMC
PCB
LPDRAM
Controller
POP
Application Processor -Driver
SLC NAND
NAND MCP
LPDRAM
Printed Circuit Board (PCB)
ApplicationProcessor -Driver
eMMCePOPLPDRAM
ApplicationProcessor -Driver
eMMC
eMCP
LPDRAM
PCBPCB
eMCP is a Multi Chip Package including eMMC and LPDDRx
ePoP is an eMCP in a PoP (Package on Package) design
June 15 2018
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Power Calculatorshttpswwwmicroncomsupporttools-and-utilitiespower-calc
| June 15 201834
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Technical Notesndash httpswwwmicroncomadvanced
searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=ampshow=10ampfamily=2dd96f4ee22e4de7b7027e6dd6a2718campnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201835
copy 2017 Micron Technology Inc
Links to Micronrsquos NOR Flash Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=1f8cfba0d95c4ea9a6c99e3272fd0e39ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201836
copy 2017 Micron Technology Inc
Link to Micronrsquos eMMC Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=ff04c268087d4d33a126d6a5a59ccebdamptechnology=9b8d2c45520a422c8f635832d3a2b0eaampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201837
copy 2017 Micron Technology Inc
Link to Micronrsquos SSD Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=59b6cc75486a4bca80f5b1b8a2086740ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201838
copy 2017 Micron Technology Inc
The Evolution of SPI
25
SPI Dual-SPI Quad-SPI Twin Quad Octal of Signals 6 6 6 10-12 11
Clock (max) 75MHz 75MHz 180MHz SDR (90MHz DDR) 180MHz SDR (90MHz DDR) 166MHz SDR (200MHz DDR)
Bandwidth (max) 9MBs 18MBs 90MBs 180MBs 400MBs
0 MBs
50 MBs
100 MBs
150 MBs
200 MBs
250 MBs
300 MBs
350 MBs
400 MBs
450 MBs
500 MBs
1997 2006 2016
SPI Interface Bandwidth
Dual-IO18MBs
Quad (SDR)40MBs
Twin-Quad 180MBs
Octal 400MBs
Quad (DDR) 90MBs
125MBs 9MBs
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc26
Micron Read Performance Comparisons
0
50
100
150
200
250
300
350
400
450
1 2 4 8 16 32 64 128 256 512 1k 2k 4k 8k 16k 32k 64k 128k 256k 512k 1M 2M
Tran
sfer
Rat
e (M
Byt
ess
ec)
Bytes per Fetch
NOR and NAND Performance Comparisons Random Read Access Performance vs Data Size
x8 200MHz DDR Octal NOR (MT35X)
x8 166MHz SDR Twin Quad Serial NOR (MT25T)
x4 166MHz SDR 83MHz DDR Serial NOR (MT25Q) 18V
x4 133MHz SPI NAND
x8 NAND ONFI 30
x8 eMMC 45
x8 eMMC 50
+
+
CacheLine Fills
BOOT or Read time at 400MBsBit density 512Mb 1Gb 2GbByte density 64MB 128MB 256MBTime to read 16 sec 32 sec 64 sec
Graphic image read 2Bytes (65K colors)Pixel Size 1K x 1K 4K x 4KByte density 2MB 34MBTime to read 52ms 88ms
Xccelatrade FlashHighest Performance
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc
eMMC Fully Managed NANDPROVIDES REDUCED DESIGN EFFORT FOR MINIMAL COST
NAND
Wear leveling
ECC
Driver
NAND Controller
Raw NAND
ONFI NAND bus
CommandBlock Management
Low-level Driver
NAND Controller
Fully Managed NAND (eMMC)
MMC SATA or USB bus
NAND
Wear leveling CMDBlock
Mgmt NAND Error Mgmt
Controller
eMMC eUSBSATA amp CF
Cost amp Price
Ease of design amp Validation
27 June 15 2018
copy 2017 Micron Technology Inc
eMMC
28 June 15 2018
copy 2017 Micron Technology Inc
Enjoy Micron Automotive eMMC comprehensive Product Portfolio
PCIe NVMeUFS 2x
June 15 2018
copy 2017 Micron Technology Inc
New Features in eMMC 51
| June 15 201830
copy 2017 Micron Technology Inc
SSD Form FactorsEXISTING AND FUTURE DIRECTIONS
FORM FACTORSndash 25rdquo
ndash mSATA
ndash M2
ndash uBGA (Future)
INTERFACESndash SATA III
ndash PCIe
YEARLY FIRMWARE UPDATES
| June 15 201831
Parameter 25rdquo mSATA M2Capacities (GB) 60120240 60120240 120240
Specification EIA-720 MO-300B variation A PCIe M2 Spec Rev 10Dimensions (L) 10045mm
(W) 6985mm (H) 7mm
(L) 5080mm(W) 2985mm(H) 375mm
(L) 60 mm(W) 22 mm(H) 15 mm
Weight lt 70g lt 10g lt 10 g
Packaging MCP (Multi Chip Package)PoP (Package on Package)
copy 2017 Micron Technology Inc
What is an eMCPePoP
Benefits includehellipndash Board space savings through vertical stacking of several memory chips
ndash Minimize bill of materials for simplified manufacturing and cost savings
ndash High density low power consumption shortest interconnections possible
ndash Accelerated time to market through rapid integration of modules
ApplicationProcessor -Driver
MLC NAND
eMMC
PCB
LPDRAM
Controller
POP
Application Processor -Driver
SLC NAND
NAND MCP
LPDRAM
Printed Circuit Board (PCB)
ApplicationProcessor -Driver
eMMCePOPLPDRAM
ApplicationProcessor -Driver
eMMC
eMCP
LPDRAM
PCBPCB
eMCP is a Multi Chip Package including eMMC and LPDDRx
ePoP is an eMCP in a PoP (Package on Package) design
June 15 2018
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Power Calculatorshttpswwwmicroncomsupporttools-and-utilitiespower-calc
| June 15 201834
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Technical Notesndash httpswwwmicroncomadvanced
searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=ampshow=10ampfamily=2dd96f4ee22e4de7b7027e6dd6a2718campnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201835
copy 2017 Micron Technology Inc
Links to Micronrsquos NOR Flash Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=1f8cfba0d95c4ea9a6c99e3272fd0e39ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201836
copy 2017 Micron Technology Inc
Link to Micronrsquos eMMC Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=ff04c268087d4d33a126d6a5a59ccebdamptechnology=9b8d2c45520a422c8f635832d3a2b0eaampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201837
copy 2017 Micron Technology Inc
Link to Micronrsquos SSD Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=59b6cc75486a4bca80f5b1b8a2086740ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201838
copy 2017 Micron Technology Inc26
Micron Read Performance Comparisons
0
50
100
150
200
250
300
350
400
450
1 2 4 8 16 32 64 128 256 512 1k 2k 4k 8k 16k 32k 64k 128k 256k 512k 1M 2M
Tran
sfer
Rat
e (M
Byt
ess
ec)
Bytes per Fetch
NOR and NAND Performance Comparisons Random Read Access Performance vs Data Size
x8 200MHz DDR Octal NOR (MT35X)
x8 166MHz SDR Twin Quad Serial NOR (MT25T)
x4 166MHz SDR 83MHz DDR Serial NOR (MT25Q) 18V
x4 133MHz SPI NAND
x8 NAND ONFI 30
x8 eMMC 45
x8 eMMC 50
+
+
CacheLine Fills
BOOT or Read time at 400MBsBit density 512Mb 1Gb 2GbByte density 64MB 128MB 256MBTime to read 16 sec 32 sec 64 sec
Graphic image read 2Bytes (65K colors)Pixel Size 1K x 1K 4K x 4KByte density 2MB 34MBTime to read 52ms 88ms
Xccelatrade FlashHighest Performance
Xccelatrade Flash
June 15 2018
copy 2017 Micron Technology Inc
eMMC Fully Managed NANDPROVIDES REDUCED DESIGN EFFORT FOR MINIMAL COST
NAND
Wear leveling
ECC
Driver
NAND Controller
Raw NAND
ONFI NAND bus
CommandBlock Management
Low-level Driver
NAND Controller
Fully Managed NAND (eMMC)
MMC SATA or USB bus
NAND
Wear leveling CMDBlock
Mgmt NAND Error Mgmt
Controller
eMMC eUSBSATA amp CF
Cost amp Price
Ease of design amp Validation
27 June 15 2018
copy 2017 Micron Technology Inc
eMMC
28 June 15 2018
copy 2017 Micron Technology Inc
Enjoy Micron Automotive eMMC comprehensive Product Portfolio
PCIe NVMeUFS 2x
June 15 2018
copy 2017 Micron Technology Inc
New Features in eMMC 51
| June 15 201830
copy 2017 Micron Technology Inc
SSD Form FactorsEXISTING AND FUTURE DIRECTIONS
FORM FACTORSndash 25rdquo
ndash mSATA
ndash M2
ndash uBGA (Future)
INTERFACESndash SATA III
ndash PCIe
YEARLY FIRMWARE UPDATES
| June 15 201831
Parameter 25rdquo mSATA M2Capacities (GB) 60120240 60120240 120240
Specification EIA-720 MO-300B variation A PCIe M2 Spec Rev 10Dimensions (L) 10045mm
(W) 6985mm (H) 7mm
(L) 5080mm(W) 2985mm(H) 375mm
(L) 60 mm(W) 22 mm(H) 15 mm
Weight lt 70g lt 10g lt 10 g
Packaging MCP (Multi Chip Package)PoP (Package on Package)
copy 2017 Micron Technology Inc
What is an eMCPePoP
Benefits includehellipndash Board space savings through vertical stacking of several memory chips
ndash Minimize bill of materials for simplified manufacturing and cost savings
ndash High density low power consumption shortest interconnections possible
ndash Accelerated time to market through rapid integration of modules
ApplicationProcessor -Driver
MLC NAND
eMMC
PCB
LPDRAM
Controller
POP
Application Processor -Driver
SLC NAND
NAND MCP
LPDRAM
Printed Circuit Board (PCB)
ApplicationProcessor -Driver
eMMCePOPLPDRAM
ApplicationProcessor -Driver
eMMC
eMCP
LPDRAM
PCBPCB
eMCP is a Multi Chip Package including eMMC and LPDDRx
ePoP is an eMCP in a PoP (Package on Package) design
June 15 2018
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Power Calculatorshttpswwwmicroncomsupporttools-and-utilitiespower-calc
| June 15 201834
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Technical Notesndash httpswwwmicroncomadvanced
searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=ampshow=10ampfamily=2dd96f4ee22e4de7b7027e6dd6a2718campnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201835
copy 2017 Micron Technology Inc
Links to Micronrsquos NOR Flash Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=1f8cfba0d95c4ea9a6c99e3272fd0e39ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201836
copy 2017 Micron Technology Inc
Link to Micronrsquos eMMC Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=ff04c268087d4d33a126d6a5a59ccebdamptechnology=9b8d2c45520a422c8f635832d3a2b0eaampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201837
copy 2017 Micron Technology Inc
Link to Micronrsquos SSD Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=59b6cc75486a4bca80f5b1b8a2086740ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201838
copy 2017 Micron Technology Inc
eMMC Fully Managed NANDPROVIDES REDUCED DESIGN EFFORT FOR MINIMAL COST
NAND
Wear leveling
ECC
Driver
NAND Controller
Raw NAND
ONFI NAND bus
CommandBlock Management
Low-level Driver
NAND Controller
Fully Managed NAND (eMMC)
MMC SATA or USB bus
NAND
Wear leveling CMDBlock
Mgmt NAND Error Mgmt
Controller
eMMC eUSBSATA amp CF
Cost amp Price
Ease of design amp Validation
27 June 15 2018
copy 2017 Micron Technology Inc
eMMC
28 June 15 2018
copy 2017 Micron Technology Inc
Enjoy Micron Automotive eMMC comprehensive Product Portfolio
PCIe NVMeUFS 2x
June 15 2018
copy 2017 Micron Technology Inc
New Features in eMMC 51
| June 15 201830
copy 2017 Micron Technology Inc
SSD Form FactorsEXISTING AND FUTURE DIRECTIONS
FORM FACTORSndash 25rdquo
ndash mSATA
ndash M2
ndash uBGA (Future)
INTERFACESndash SATA III
ndash PCIe
YEARLY FIRMWARE UPDATES
| June 15 201831
Parameter 25rdquo mSATA M2Capacities (GB) 60120240 60120240 120240
Specification EIA-720 MO-300B variation A PCIe M2 Spec Rev 10Dimensions (L) 10045mm
(W) 6985mm (H) 7mm
(L) 5080mm(W) 2985mm(H) 375mm
(L) 60 mm(W) 22 mm(H) 15 mm
Weight lt 70g lt 10g lt 10 g
Packaging MCP (Multi Chip Package)PoP (Package on Package)
copy 2017 Micron Technology Inc
What is an eMCPePoP
Benefits includehellipndash Board space savings through vertical stacking of several memory chips
ndash Minimize bill of materials for simplified manufacturing and cost savings
ndash High density low power consumption shortest interconnections possible
ndash Accelerated time to market through rapid integration of modules
ApplicationProcessor -Driver
MLC NAND
eMMC
PCB
LPDRAM
Controller
POP
Application Processor -Driver
SLC NAND
NAND MCP
LPDRAM
Printed Circuit Board (PCB)
ApplicationProcessor -Driver
eMMCePOPLPDRAM
ApplicationProcessor -Driver
eMMC
eMCP
LPDRAM
PCBPCB
eMCP is a Multi Chip Package including eMMC and LPDDRx
ePoP is an eMCP in a PoP (Package on Package) design
June 15 2018
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Power Calculatorshttpswwwmicroncomsupporttools-and-utilitiespower-calc
| June 15 201834
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Technical Notesndash httpswwwmicroncomadvanced
searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=ampshow=10ampfamily=2dd96f4ee22e4de7b7027e6dd6a2718campnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201835
copy 2017 Micron Technology Inc
Links to Micronrsquos NOR Flash Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=1f8cfba0d95c4ea9a6c99e3272fd0e39ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201836
copy 2017 Micron Technology Inc
Link to Micronrsquos eMMC Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=ff04c268087d4d33a126d6a5a59ccebdamptechnology=9b8d2c45520a422c8f635832d3a2b0eaampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201837
copy 2017 Micron Technology Inc
Link to Micronrsquos SSD Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=59b6cc75486a4bca80f5b1b8a2086740ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201838
copy 2017 Micron Technology Inc
eMMC
28 June 15 2018
copy 2017 Micron Technology Inc
Enjoy Micron Automotive eMMC comprehensive Product Portfolio
PCIe NVMeUFS 2x
June 15 2018
copy 2017 Micron Technology Inc
New Features in eMMC 51
| June 15 201830
copy 2017 Micron Technology Inc
SSD Form FactorsEXISTING AND FUTURE DIRECTIONS
FORM FACTORSndash 25rdquo
ndash mSATA
ndash M2
ndash uBGA (Future)
INTERFACESndash SATA III
ndash PCIe
YEARLY FIRMWARE UPDATES
| June 15 201831
Parameter 25rdquo mSATA M2Capacities (GB) 60120240 60120240 120240
Specification EIA-720 MO-300B variation A PCIe M2 Spec Rev 10Dimensions (L) 10045mm
(W) 6985mm (H) 7mm
(L) 5080mm(W) 2985mm(H) 375mm
(L) 60 mm(W) 22 mm(H) 15 mm
Weight lt 70g lt 10g lt 10 g
Packaging MCP (Multi Chip Package)PoP (Package on Package)
copy 2017 Micron Technology Inc
What is an eMCPePoP
Benefits includehellipndash Board space savings through vertical stacking of several memory chips
ndash Minimize bill of materials for simplified manufacturing and cost savings
ndash High density low power consumption shortest interconnections possible
ndash Accelerated time to market through rapid integration of modules
ApplicationProcessor -Driver
MLC NAND
eMMC
PCB
LPDRAM
Controller
POP
Application Processor -Driver
SLC NAND
NAND MCP
LPDRAM
Printed Circuit Board (PCB)
ApplicationProcessor -Driver
eMMCePOPLPDRAM
ApplicationProcessor -Driver
eMMC
eMCP
LPDRAM
PCBPCB
eMCP is a Multi Chip Package including eMMC and LPDDRx
ePoP is an eMCP in a PoP (Package on Package) design
June 15 2018
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Power Calculatorshttpswwwmicroncomsupporttools-and-utilitiespower-calc
| June 15 201834
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Technical Notesndash httpswwwmicroncomadvanced
searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=ampshow=10ampfamily=2dd96f4ee22e4de7b7027e6dd6a2718campnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201835
copy 2017 Micron Technology Inc
Links to Micronrsquos NOR Flash Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=1f8cfba0d95c4ea9a6c99e3272fd0e39ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201836
copy 2017 Micron Technology Inc
Link to Micronrsquos eMMC Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=ff04c268087d4d33a126d6a5a59ccebdamptechnology=9b8d2c45520a422c8f635832d3a2b0eaampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201837
copy 2017 Micron Technology Inc
Link to Micronrsquos SSD Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=59b6cc75486a4bca80f5b1b8a2086740ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201838
copy 2017 Micron Technology Inc
Enjoy Micron Automotive eMMC comprehensive Product Portfolio
PCIe NVMeUFS 2x
June 15 2018
copy 2017 Micron Technology Inc
New Features in eMMC 51
| June 15 201830
copy 2017 Micron Technology Inc
SSD Form FactorsEXISTING AND FUTURE DIRECTIONS
FORM FACTORSndash 25rdquo
ndash mSATA
ndash M2
ndash uBGA (Future)
INTERFACESndash SATA III
ndash PCIe
YEARLY FIRMWARE UPDATES
| June 15 201831
Parameter 25rdquo mSATA M2Capacities (GB) 60120240 60120240 120240
Specification EIA-720 MO-300B variation A PCIe M2 Spec Rev 10Dimensions (L) 10045mm
(W) 6985mm (H) 7mm
(L) 5080mm(W) 2985mm(H) 375mm
(L) 60 mm(W) 22 mm(H) 15 mm
Weight lt 70g lt 10g lt 10 g
Packaging MCP (Multi Chip Package)PoP (Package on Package)
copy 2017 Micron Technology Inc
What is an eMCPePoP
Benefits includehellipndash Board space savings through vertical stacking of several memory chips
ndash Minimize bill of materials for simplified manufacturing and cost savings
ndash High density low power consumption shortest interconnections possible
ndash Accelerated time to market through rapid integration of modules
ApplicationProcessor -Driver
MLC NAND
eMMC
PCB
LPDRAM
Controller
POP
Application Processor -Driver
SLC NAND
NAND MCP
LPDRAM
Printed Circuit Board (PCB)
ApplicationProcessor -Driver
eMMCePOPLPDRAM
ApplicationProcessor -Driver
eMMC
eMCP
LPDRAM
PCBPCB
eMCP is a Multi Chip Package including eMMC and LPDDRx
ePoP is an eMCP in a PoP (Package on Package) design
June 15 2018
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Power Calculatorshttpswwwmicroncomsupporttools-and-utilitiespower-calc
| June 15 201834
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Technical Notesndash httpswwwmicroncomadvanced
searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=ampshow=10ampfamily=2dd96f4ee22e4de7b7027e6dd6a2718campnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201835
copy 2017 Micron Technology Inc
Links to Micronrsquos NOR Flash Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=1f8cfba0d95c4ea9a6c99e3272fd0e39ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201836
copy 2017 Micron Technology Inc
Link to Micronrsquos eMMC Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=ff04c268087d4d33a126d6a5a59ccebdamptechnology=9b8d2c45520a422c8f635832d3a2b0eaampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201837
copy 2017 Micron Technology Inc
Link to Micronrsquos SSD Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=59b6cc75486a4bca80f5b1b8a2086740ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201838
copy 2017 Micron Technology Inc
New Features in eMMC 51
| June 15 201830
copy 2017 Micron Technology Inc
SSD Form FactorsEXISTING AND FUTURE DIRECTIONS
FORM FACTORSndash 25rdquo
ndash mSATA
ndash M2
ndash uBGA (Future)
INTERFACESndash SATA III
ndash PCIe
YEARLY FIRMWARE UPDATES
| June 15 201831
Parameter 25rdquo mSATA M2Capacities (GB) 60120240 60120240 120240
Specification EIA-720 MO-300B variation A PCIe M2 Spec Rev 10Dimensions (L) 10045mm
(W) 6985mm (H) 7mm
(L) 5080mm(W) 2985mm(H) 375mm
(L) 60 mm(W) 22 mm(H) 15 mm
Weight lt 70g lt 10g lt 10 g
Packaging MCP (Multi Chip Package)PoP (Package on Package)
copy 2017 Micron Technology Inc
What is an eMCPePoP
Benefits includehellipndash Board space savings through vertical stacking of several memory chips
ndash Minimize bill of materials for simplified manufacturing and cost savings
ndash High density low power consumption shortest interconnections possible
ndash Accelerated time to market through rapid integration of modules
ApplicationProcessor -Driver
MLC NAND
eMMC
PCB
LPDRAM
Controller
POP
Application Processor -Driver
SLC NAND
NAND MCP
LPDRAM
Printed Circuit Board (PCB)
ApplicationProcessor -Driver
eMMCePOPLPDRAM
ApplicationProcessor -Driver
eMMC
eMCP
LPDRAM
PCBPCB
eMCP is a Multi Chip Package including eMMC and LPDDRx
ePoP is an eMCP in a PoP (Package on Package) design
June 15 2018
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Power Calculatorshttpswwwmicroncomsupporttools-and-utilitiespower-calc
| June 15 201834
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Technical Notesndash httpswwwmicroncomadvanced
searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=ampshow=10ampfamily=2dd96f4ee22e4de7b7027e6dd6a2718campnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201835
copy 2017 Micron Technology Inc
Links to Micronrsquos NOR Flash Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=1f8cfba0d95c4ea9a6c99e3272fd0e39ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201836
copy 2017 Micron Technology Inc
Link to Micronrsquos eMMC Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=ff04c268087d4d33a126d6a5a59ccebdamptechnology=9b8d2c45520a422c8f635832d3a2b0eaampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201837
copy 2017 Micron Technology Inc
Link to Micronrsquos SSD Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=59b6cc75486a4bca80f5b1b8a2086740ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201838
copy 2017 Micron Technology Inc
SSD Form FactorsEXISTING AND FUTURE DIRECTIONS
FORM FACTORSndash 25rdquo
ndash mSATA
ndash M2
ndash uBGA (Future)
INTERFACESndash SATA III
ndash PCIe
YEARLY FIRMWARE UPDATES
| June 15 201831
Parameter 25rdquo mSATA M2Capacities (GB) 60120240 60120240 120240
Specification EIA-720 MO-300B variation A PCIe M2 Spec Rev 10Dimensions (L) 10045mm
(W) 6985mm (H) 7mm
(L) 5080mm(W) 2985mm(H) 375mm
(L) 60 mm(W) 22 mm(H) 15 mm
Weight lt 70g lt 10g lt 10 g
Packaging MCP (Multi Chip Package)PoP (Package on Package)
copy 2017 Micron Technology Inc
What is an eMCPePoP
Benefits includehellipndash Board space savings through vertical stacking of several memory chips
ndash Minimize bill of materials for simplified manufacturing and cost savings
ndash High density low power consumption shortest interconnections possible
ndash Accelerated time to market through rapid integration of modules
ApplicationProcessor -Driver
MLC NAND
eMMC
PCB
LPDRAM
Controller
POP
Application Processor -Driver
SLC NAND
NAND MCP
LPDRAM
Printed Circuit Board (PCB)
ApplicationProcessor -Driver
eMMCePOPLPDRAM
ApplicationProcessor -Driver
eMMC
eMCP
LPDRAM
PCBPCB
eMCP is a Multi Chip Package including eMMC and LPDDRx
ePoP is an eMCP in a PoP (Package on Package) design
June 15 2018
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Power Calculatorshttpswwwmicroncomsupporttools-and-utilitiespower-calc
| June 15 201834
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Technical Notesndash httpswwwmicroncomadvanced
searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=ampshow=10ampfamily=2dd96f4ee22e4de7b7027e6dd6a2718campnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201835
copy 2017 Micron Technology Inc
Links to Micronrsquos NOR Flash Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=1f8cfba0d95c4ea9a6c99e3272fd0e39ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201836
copy 2017 Micron Technology Inc
Link to Micronrsquos eMMC Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=ff04c268087d4d33a126d6a5a59ccebdamptechnology=9b8d2c45520a422c8f635832d3a2b0eaampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201837
copy 2017 Micron Technology Inc
Link to Micronrsquos SSD Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=59b6cc75486a4bca80f5b1b8a2086740ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201838
Packaging MCP (Multi Chip Package)PoP (Package on Package)
copy 2017 Micron Technology Inc
What is an eMCPePoP
Benefits includehellipndash Board space savings through vertical stacking of several memory chips
ndash Minimize bill of materials for simplified manufacturing and cost savings
ndash High density low power consumption shortest interconnections possible
ndash Accelerated time to market through rapid integration of modules
ApplicationProcessor -Driver
MLC NAND
eMMC
PCB
LPDRAM
Controller
POP
Application Processor -Driver
SLC NAND
NAND MCP
LPDRAM
Printed Circuit Board (PCB)
ApplicationProcessor -Driver
eMMCePOPLPDRAM
ApplicationProcessor -Driver
eMMC
eMCP
LPDRAM
PCBPCB
eMCP is a Multi Chip Package including eMMC and LPDDRx
ePoP is an eMCP in a PoP (Package on Package) design
June 15 2018
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Power Calculatorshttpswwwmicroncomsupporttools-and-utilitiespower-calc
| June 15 201834
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Technical Notesndash httpswwwmicroncomadvanced
searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=ampshow=10ampfamily=2dd96f4ee22e4de7b7027e6dd6a2718campnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201835
copy 2017 Micron Technology Inc
Links to Micronrsquos NOR Flash Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=1f8cfba0d95c4ea9a6c99e3272fd0e39ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201836
copy 2017 Micron Technology Inc
Link to Micronrsquos eMMC Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=ff04c268087d4d33a126d6a5a59ccebdamptechnology=9b8d2c45520a422c8f635832d3a2b0eaampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201837
copy 2017 Micron Technology Inc
Link to Micronrsquos SSD Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=59b6cc75486a4bca80f5b1b8a2086740ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201838
copy 2017 Micron Technology Inc
What is an eMCPePoP
Benefits includehellipndash Board space savings through vertical stacking of several memory chips
ndash Minimize bill of materials for simplified manufacturing and cost savings
ndash High density low power consumption shortest interconnections possible
ndash Accelerated time to market through rapid integration of modules
ApplicationProcessor -Driver
MLC NAND
eMMC
PCB
LPDRAM
Controller
POP
Application Processor -Driver
SLC NAND
NAND MCP
LPDRAM
Printed Circuit Board (PCB)
ApplicationProcessor -Driver
eMMCePOPLPDRAM
ApplicationProcessor -Driver
eMMC
eMCP
LPDRAM
PCBPCB
eMCP is a Multi Chip Package including eMMC and LPDDRx
ePoP is an eMCP in a PoP (Package on Package) design
June 15 2018
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Power Calculatorshttpswwwmicroncomsupporttools-and-utilitiespower-calc
| June 15 201834
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Technical Notesndash httpswwwmicroncomadvanced
searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=ampshow=10ampfamily=2dd96f4ee22e4de7b7027e6dd6a2718campnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201835
copy 2017 Micron Technology Inc
Links to Micronrsquos NOR Flash Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=1f8cfba0d95c4ea9a6c99e3272fd0e39ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201836
copy 2017 Micron Technology Inc
Link to Micronrsquos eMMC Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=ff04c268087d4d33a126d6a5a59ccebdamptechnology=9b8d2c45520a422c8f635832d3a2b0eaampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201837
copy 2017 Micron Technology Inc
Link to Micronrsquos SSD Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=59b6cc75486a4bca80f5b1b8a2086740ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201838
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Power Calculatorshttpswwwmicroncomsupporttools-and-utilitiespower-calc
| June 15 201834
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Technical Notesndash httpswwwmicroncomadvanced
searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=ampshow=10ampfamily=2dd96f4ee22e4de7b7027e6dd6a2718campnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201835
copy 2017 Micron Technology Inc
Links to Micronrsquos NOR Flash Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=1f8cfba0d95c4ea9a6c99e3272fd0e39ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201836
copy 2017 Micron Technology Inc
Link to Micronrsquos eMMC Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=ff04c268087d4d33a126d6a5a59ccebdamptechnology=9b8d2c45520a422c8f635832d3a2b0eaampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201837
copy 2017 Micron Technology Inc
Link to Micronrsquos SSD Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=59b6cc75486a4bca80f5b1b8a2086740ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201838
copy 2017 Micron Technology Inc
Link to Micronrsquos DRAM Technical Notesndash httpswwwmicroncomadvanced
searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=ampshow=10ampfamily=2dd96f4ee22e4de7b7027e6dd6a2718campnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201835
copy 2017 Micron Technology Inc
Links to Micronrsquos NOR Flash Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=1f8cfba0d95c4ea9a6c99e3272fd0e39ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201836
copy 2017 Micron Technology Inc
Link to Micronrsquos eMMC Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=ff04c268087d4d33a126d6a5a59ccebdamptechnology=9b8d2c45520a422c8f635832d3a2b0eaampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201837
copy 2017 Micron Technology Inc
Link to Micronrsquos SSD Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=59b6cc75486a4bca80f5b1b8a2086740ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201838
copy 2017 Micron Technology Inc
Links to Micronrsquos NOR Flash Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=1f8cfba0d95c4ea9a6c99e3272fd0e39ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201836
copy 2017 Micron Technology Inc
Link to Micronrsquos eMMC Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=ff04c268087d4d33a126d6a5a59ccebdamptechnology=9b8d2c45520a422c8f635832d3a2b0eaampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201837
copy 2017 Micron Technology Inc
Link to Micronrsquos SSD Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=59b6cc75486a4bca80f5b1b8a2086740ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201838
copy 2017 Micron Technology Inc
Link to Micronrsquos eMMC Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=ff04c268087d4d33a126d6a5a59ccebdamptechnology=9b8d2c45520a422c8f635832d3a2b0eaampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201837
copy 2017 Micron Technology Inc
Link to Micronrsquos SSD Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=59b6cc75486a4bca80f5b1b8a2086740ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201838
copy 2017 Micron Technology Inc
Link to Micronrsquos SSD Technical Noteshttpswwwmicroncomadvanced-searchq=amppage=1ampsite=0ampwithin=productssupportampdoc=Falseampsec=Falseampincl=Falseampsort=dateampshow=10ampfamily=59b6cc75486a4bca80f5b1b8a2086740ampnew_document_type=5538556ed3e64d7195ce3986f06fbf347C5538556ed3e64d7195ce3986f06fbf34
| June 15 201838
Recommended