Ofdm Block

VHDL SIMULATION & SYNTHESISOF OFDM

TRANSMITTER/RECEIVER

►Multichannel modulation- wideband channel to N non-ISI AWN channels by orthogonal basis functions

►DFT based DMT- wideband channel to N infinite non-ISI AWN channels by orthogonal basis functions

►OFDM- Wireless DMT

Basic Mathematical Principle of analog OFDM System

Product modulator

Contd...

Correlation Receiver

OFDM using DFT

Stje 0w-

.. .

tj Ne 1-- w

=

0,ns

1, -Nns

.. . Parallel to Serial

(P/S) IDFT.. .0,ns

1, -Nns

Basis function

OFDM Spectrum

Features of OFDM Scheme

► Maximum spectral efficiency► Flat fading per carrier and hence high speed

equalization is avoided and only N short equalizers are needed

► N long pulses and hence multi-path has less impact on implementation.

► ISI is comparatively short and narrow band interference has less impact.

► Easy implementation using FFT and hence bank of sub- carrier oscillators and coherent demodulators.

► FDM is achieved by base band processing and not band pass filtering.

► Very sensitive time frequency synchronization

APPLICATIONS OF OFDM

►digital audio broadcasting (DAB)►terrestrial digital video broadcasting

(DVB)►ADSL►WiMAX

OFDM Transceiver Block Diagram

coding

IFFT (Tx)

De-interleaving

QPSKdemapping

Parallel to serial

Serial toparallel

Remove cyclic Extension

Decoding

Interleaving

QPSKmapping

Serial toparallel

Parallel to serial

Add cyclic Extension and windowing

Output of transmitter

Input to receiver

FFT (Rx)

Data input to the transmitter

Data received

Scrambler

AddPilots

Synchronisation

Channel EstimateEqualizer

DeScrambler

convolutional

viterbi

Guard Interval

SCRAMBLER / DESCRAMBLER- to make the input sequence more disperse so that the dependence of input signal’s power spectrum on the actual transmitted data can be eliminated.INTERLEAVER / DE-INTERLEAVER- the in-coming bit stream is re-arranged so that adjacent bits are no more adjacent to each other. ADDITION / REMOVAL OF CYCLIC PREFIX- In order to preserve the sub-carrier orthogonality and the independence of subsequent OFDM symbols, a cyclic guard interval is introduced. Remove ISI, ICI.EQUALIZER- To avoid multi path effects

Scope of the Project

►VHDL programming►ModelSim for Simulation ►Xilinx ISE for Synthesis

Project design flow

Synthesis Process in VHDL Environment

Optimized net list can be programmed directly into a FPGA chip.

challenges

N-1

X(k) = x(n) WN n k

n=0

Here, WN = exp (-j2/N)

Radix-2 Decimation In Time algorithm: n=N/2 –1 n=N/2 –1

X(k)= x(2n)WN/2nk + WN

k x(2n+1)WN/2nk

n=0 n=0

1. FFT/IFFT algorithm implementation

Cooley–Tukey

2. FPGA implementation

These logic will not fit into one FPGA in the boards that we have in our college, we wont be able to implement FPGA hardware. Higher end boards themselves cost more than 50000 which is very expensive.