View
2
Download
0
Category
Preview:
Citation preview
Operating Systems and Computer Networks
Process Scheduling Part 2
Prof. Dr.-Ing. Axel HungerAlexander Maxeiner, M.Sc.
Institute of Computer EngineeringFaculty of Engineering
University Duisburg-Essen
Dr.-Ing. Pascal A. Klein
pascal.klein@uni-due.de
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
2Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
Process Management|
Time Sharing|
Synchronization of Processes
|
Scheduling Classification
|
Scheduling Algorithms
Agenda
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
3Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
A program
• resides in local memory
• partially or entirely transferred to main memory upon execution
The program can be comprised of:
• Programs, sub-routines
• Data
• Instruction pointers
• Stack pointers
• CPU states
• Register contents
Program Execution
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
4Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
Several processes on a single processor
OS needs
• to monitor free resources
• to open tasks
• to allocate CPU time
• change between tasks
What happens if
• another process waits for data (not uses processor power idle)
Process Management
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
5Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
Process Management
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
6Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
Processes are split up into segments
Each segment is given a specific amount of time at the CPU
How much (amount of time) and when (it is given the time) depends on the implemented algorithm
Multitasking: time-multiplexing, only one CPU (or Core) is occupied with several tasks Processor power is allocated within a certain time frame
Time Sharing
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
7Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
Problem 1: How to change between processes?
Problem 2: How to optimize efficiency in the use of CPU?
Time Sharing
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
8Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
Difficult to calculate depends on the situation
• E.g.: 5 processes need 20% of CPU – perfect?
• Who waits, when?
Probabilistic view of CPU Utilization:
CPU utilization = 1 – pn
n – number of processes
pn – probability that all processes wait for I/O (CPU idle time)
Careful: independancy of processes assumed!
CPU Utilization
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
9Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
Time Sharing – Time Wheel Model
P8 P1
P2
P3
P4
P5P6
P7
Context change T
t
P1: Terminal IO (Keyboard or mouse)P2: Account P3: PrintP4..P7
User 1, 2, 3, 4
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
10Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
Time needed to switch can be between μs and ns
Address range of an old process has to be saved and updatedby complex memory management
Process change
tProcess1 OS Process2 OS Process1 OS etc.
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
11Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
When a process/task changes: stack pointer, registers, etc. must be changed
Two methods:
1. Complete set of user data / process data is stored in a private memory space
2. Context change by pointers only
• Program state
• Pointers point to start of memory slot
Process change
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
12Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
Entry in process table
Data structure with information to manage scheduling
Needed for correct and efficient process management
Contains:
• Process identification data (unique identifier)
o e.g.: process id, parent process, user identifier, etc.
• Process state data (status of a process)
o e.g.: content of CPU general-purpose registers, CPU process status, stack and frame pointers, etc.
• Process control data (to manage process itself)
o e.g.: process scheduling state, Process structuring information, Interprocess communication information, Process Privileges, Process Number (PID), Program Counter (PC), CPU Registers, Memory Management Information, etc.
Process Control Block - PCB
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
13Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
Implementation of Time Sharing
Scheduler
I/O-readlines
CPU
Reentrant
Code Computer / OS
PC2
PC1
M2
M1
Peripheral memory
Virtual Machine
(virtual parallel)
Task 1
Task 2
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
14Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
Implementation of Time Sharing
Save PCBof process 1
Load PCBof process 2
Save PCBof process 2
Load PCBof process 1 RUNNING
RUNNING Scheduler or Interrupt
Process 1
READY
Process 2
RUNNING
READY
SCHEDULER OR INTERRUPT
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
15Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
A process queue example
Start
end
PCBi
Register,
etc.
PCBk
Register,
etc.
PCBa
Register,
etc.
CPU-Queue
NIL
Pointer in the Queue
Start
end
Disk QueuePCBb
Register,
etc.
PCBx
Register,
etc.
NIL
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
16Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
When to change between processes?
a) by cyclic flow control (polling), i.e. processes call for data, program-controlled
b) time-controlled in certain given intervals with a real-time clock
c) by request (interrupt) via the technical process event-controlled.
Synchronization of Processes
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
17Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
Drawback: CPU is always busy with polling, though it is often idle due to I/O operations.
Cyclic Flow Control (Polling)
e.g.:
5 processes:
4 idle, 1 busy.
PA
PB
C/D2
C
D
Px : Process looking forData polling
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
18Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
If time intervals too short number of data swapping increases until a process is finished decrease of overall efficiency
If time intervals too long finished process will leave the CPU with idle time
Time-controlled
idle time?Time A
PA
Px : Process execution
Time A
PB
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
19Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
Process requests (triggered by the technical process):
• can be announced at any time
• have high priority (importance) by
opriority in execution and/or
oblocking other requests
also leads to context change
Request (Interrupt)
Interrupt?
Process Scheduling
PA
ExecuteInterrupt
Px : Process execution
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
20Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
A background process is interrupted by two interrupts
Request (Interrupt) – Example
BGP
IRS1
IRS2
IRS1
BGP
Interrupt
BGP: Backgroundprocess
IRSi: Interrupt Subroutine i
Ii: Interrupt i
Priority
Time
I1 I2
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
21Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
Problem: Multiple processes or threads need CPU resources at the same time
OS chooses the next steps for the upcoming queued processes (to be processed)
Three different types of environments
• Batch
• Interactive
• Real time
Why Scheduling?
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
22Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
The scheduler needs to be planned with respect to the following criteria:
• Use/efficiency of CPU-Utilization (40 % - 90 %)
• Throughput (completed processes / time unit)
• Cycle time (time from input to output of the results)
• Waiting time (Waiting in the CPU Waiting Queue)
• Response time (In interactive systems: Time to reaction)
• Turnaround time (The time until a job is finished)
Planning Criteria
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
23Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
Non-Preemptive scheduling:
• process is picked and started until it blocks (either on I/O or waiting state) or voluntarily releases the CPU
• process will not be forcibly suspended until a higher priority interrupt occurs
Preemptive scheduling:
• process starts and runs for a fixed amount of time
• If process still runs at end of time cycle, it is suspended
• requires a clock interrupt occuring at the end of every time interval to give control of CPU back to scheduler
Non-Preemptive vs preemptive Scheduling
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
24Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
Big systems working on steady bulky jobs
Non-preemptive is fine
no users waiting for quick results
Long processing acceptable
Reducing of process switches
Planning in batch systems
Main Memory
CPU
Disk
• Throughput• Turnaround Time• CPU Utilization
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
25Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
PC, Webserver, ATM ...
Preemptive is needed
More than one process running all the time
All users are in big hurry...
Planning in Interactive Systems
• Response Time• Proportionality – meets
users‘ expectations
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
26Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
Systems which keep in real time constraints
immediate action needed
Preemptive handling not needed
• processes need to be securely finished
• processes will not block for long
Only specialized software used
Application runs well-known and specialized programmesstrongly compatible with the application
Real Time Systems
• Meeting Deadlines• Predictability
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
27Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
Scheduling Goals
• Meeting Deadlines• Predictability
• Response Time• Proportionality – meets
users‘ expectations
• Throughput• Turnaround Time• CPU Utilization
• Fairness(fair amount of share
• Policy enforcement(strategy enforcement)
• Balance(all parts of system shouldbe busy)
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
28Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
Depend on certain events:
• scheduler selects next process queue of ready processes from the OS
Scheduling decisions can be made:
• in transition from running to blocked state (waiting for I/O – 4)
• in transition from running to ready state (Interrupt – 2)
• in transition from blocked to ready state (I/O end – 5)
• Upon termination of a process
Scheduler
BlockedRunning
Ready
4
23
5
Existent
1
6When?
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
29Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
Fairness
• Each process needs fair share of CPU time
• comparable processes should get comparable service
Utilization of resources
• keep all parts of the system busy
Algorithm must be executed efficiently
• No wasting of resources
• Minimized overhead
Requirements of Scheduling Algorithms
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
30Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
Static (a priori) Scheduling Algorithms Scheduling decisions take place at a fixed time interval
Process coordination:
• Scheduling is planned before the programs run
• Input of a scheduling algorithm is a set of processes which will be considered for scheduling
• Processes arriving the scheduler during the runtime of a process, stored for next cycle
• Scheduled processes run until all of them are done and/or until the given time is over.
Conditions for static algorithms:
• No dynamic process creation during the program
• Event-driven processes can be incorporated only if the time conditions are schedulable
Classsifications of Scheduling Algorithms
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
31Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
Dynamic Scheduling Algorithms
Coordination of processes takes place while the processes are running
Times of updates:
• at fixed time intervals
• as soon as a new process is created
• as soon as a process ends
Advantages and disadvantages
• event-driven processes must be coordinated
• decision making during scheduler operation costs time
• Lack of efficiency: heuristics are required!
Classsifications of Scheduling Algorithms
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
32Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
Algorithms for complex process models
Complex process models:
• Interruptible, non-interruptible processes
interruptible process at any or only at certain times?
• Cyclic, non-cyclic processes
• Switching to another processor
Classsifications of Scheduling Algorithms
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
33Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
Scheduler Algorithms
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
34Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
First process that arrives the scheduler will be the next in line no Interrupts
Example:
• P1: τ1 = 300 ms waiting period 0 ms
• P2: τ2 = 40 ms waiting period 300 ms
• P3: τ3 = 32 ms waiting period 340 ms
Scheduler: First Come, First Serve
Average Waiting Time:(0 + 300 + 340) / 3
= 640 / 3= 213.3 ms
Min Average Waiting Time:P3, P2, P1 (0 + 32 + 72) / 3 = 104 / 3= 34.67 ms
0
P1 (300ms)
P2(40ms)
300 340 372
P3(32ms)
P1 (300ms)
P2(40ms)
0 3727232
P3(32ms)
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
35Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
First process that arrives the scheduler will be the next in line no Interrupts
Example:
• P1: τ1 = 300 ms waiting period 0 ms
• P2: τ2 = 40 ms waiting period 300 ms
• P3: τ3 = 32 ms waiting period 340 ms
Scheduler: First Come, First Serve
Min Average Turnaround Time:P3, P2, P1 (32 + 72 + 372) / 3 = 476 / 3= 158.67 ms
0
P1 (300ms)
P2(40ms)
300 340 372
P3(32ms)
0
P1 (300ms)
P2(40ms)
3727232
P3(32ms)
Average Turnaround Time:(300 + 340 + 372) / 3
= 1012 / 3= 337.3 ms
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
36Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
At Scheduler Decision (which process is next): Choose the job that needs the least amount of time Interruption possible when shorter job arrives
Provides optimum in terms of waiting time!
In Short-term planning:
• Not applicable, since next block computation time is not known!
Critical process with a long runtime? Stalled until faster processes are computed
Scheduler: Shortest Job First
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
37Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
Scheduler: Shortest Job First
Assumption: Time required for next block is known
P1: τ1 = 8 ms, arrival time: 0ms
P2: τ2 = 4 ms, arrival time: 1ms
P3: τ3 = 9 ms, arrival time: 2ms
P4: τ4 = 5 ms, arrival time: 3ms
Average Waiting Time:[0 + 0 + (5-3) + (10-1) + (17-2)] / 4
= 26 / 4= 6.5 ms
0 5 10 15 20 25 30
Arrival:
0
1
2
3
8
(8)
5
(4)
11
(9)
8
(5)
P1 (1ms) P2 (4ms) P1 (7ms)P4 (5ms) P3 (9ms)
P1
P2
P3
P4
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
38Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
Scheduler: Shortest Job First
Assumption: Time required for next block is known
P1: τ1 = 8 ms, arrival time: 0ms
P2: τ2 = 4 ms, arrival time: 1ms
P3: τ3 = 9 ms, arrival time: 2ms
P4: τ4 = 5 ms, arrival time: 3ms
Average Waiting Time:[0 + 0 + (5-3) + (10-1) + (17-2)] / 4
= 26 / 4= 6.5 ms
Without interruption:SJF: (0 + 7 + 9 + 15) / 4
= 7.75 ms
FCFS: (0 + 7 + 10 + 18) / 4= 8.75 ms
0 5 10 15 20 25 30
Arrival:
0
1
2
3
8
(8)
5
(4)
11
(9)
8
(5)
P1
P2
P3
P4
P1 (8ms) P2 (4ms) P4 (5ms)P3 (9ms)FCFS
P1 (8ms) P2 (4ms) P4 (5ms) P3 (9ms)SJF
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
39Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
Chooses process with highest priority
If another process with higher priority arrives Sending Interrupt active task is replaced by the new one
Problem: Low-priority processes will wait a long time
Solution: Increasing priority of waiting task
Scheduler: Priority Scheduling
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
40Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
Switches between tasks after fixed interval of time New processes are added complete ones are removed Guarantees fair amount of time
Problems: time waste due to change of processes Completion time of long runtime processes (more active tasks, higher completion time)
Scheduler: Round-robin Scheduler (RR)
0 5 10 15 20 25 30
Arrival:
0
1
2
3
8
(8)
5
(4)
11
(9)
8
(5)
P1
P2
P3
P4
P1
P2
P1
P2
P1
P3
P2
P1
P3P4
P2
P1
P3
P4
P1
P3
P4
P1
P3
P4
P1
P3
P4
P3 P3 P3
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
41Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
Time sharing as background job (RR) plus Interrupt on demand based on priorities
Within a priority level, the allocation shall be made according to RR
After an appropriate waiting time processes can move up in priority – Aging
Scheduler: Combination of
several allocation levels
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
42Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
Two Processors: I & II
5 processes have to be handled
Scheduling: Priority Scheduling A running process will be interrupted if another process with higher priority arrives
If one of the CPUs is unoccupied and a higher priority task needs to be scheduled Free Core will be assigned to the task
Priorities and Arrival times for P1..P5:
• Priority 1: P2 (t=0, τ = 7 ms)
• Priority 2: P1 (t=0 , τ = 3 ms), P3 (t=1 , τ = 10 ms)
• Priority 3: P4 (t=5 , τ = 6 ms), P5 (t=6 , τ = 9 ms)
Example
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
43Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
At t=0ms P1, P2 arrive:
• Priority of P1 is higher, both processors are available => Assign P1 -> Processor I
• Assign P2 -> Processor II
Example
Priorities and Arrival times for P1..P5: •Priority 1: P2 (t=0, τ = 7 ms)•Priority 2: P1 (t=0 , τ = 3 ms), P3 (t=1 , τ = 10 ms)•Priority 3: P4 (t=5 , τ = 6 ms), P5 (t=6 , τ = 9 ms)
0 5 10 15 20 25 30
P1
P2
P3
P4
P5
Processor IP1
Processor IIP2
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
44Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
At t=0ms P1, P2 arrive:
• Priority of P1 is higher, both processors are available => Assign P1 -> Processor I
• Assign P2 -> Processor II
At t=1ms P3 arrives:
• Priority P3 > P2
• P2 will be interrupted by P3 (on Processor II)
Example
Priorities and Arrival times for P1..P5: •Priority 1: P2 (t=0, τ = 7 ms)•Priority 2: P1 (t=0 , τ = 3 ms), P3 (t=1 , τ = 10 ms)•Priority 3: P4 (t=5 , τ = 6 ms), P5 (t=6 , τ = 9 ms)
0 5 10 15 20 25 30
P1
P2
P3
P4
P5
Processor IP1
Processor IIP2P3
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
45Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
At t=0ms P1, P2 arrive:
• Priority of P1 is higher, both Processors are available => Assign P1 -> Processor I
• Assign P2 -> Processor II
At t=1ms P3 arrives:
• Priority P3 > P2
• P2 will be interrupted by P3 (on Processor II)
Example
Priorities and Arrival times for P1..P5: •Priority 1: P2 (t=0, τ = 7 ms)•Priority 2: P1 (t=0 , τ = 3 ms), P3 (t=1 , τ = 10 ms)•Priority 3: P4 (t=5 , τ = 6 ms), P5 (t=6 , τ = 9 ms)
0 5 10 15 20 25 30
P1
P2
P3
P4
P5
Processor IP1
Processor IIP2P3
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
46Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
At t=0ms P1, P2 arrive:
• Priority of P1 is higher, both Processors are available => Assign P1 -> Processor I
• Assign P2 -> Processor II
At t=1ms P3 arrives:
• Priority P3 > P2
• P2 will be interrupted by P3 (on Processor II)
• P2 continues (on Processor I) after P1 finished
Example
Priorities and Arrival times for P1..P5: •Priority 1: P2 (t=0, τ = 7 ms)•Priority 2: P1 (t=0 , τ = 3 ms), P3 (t=1 , τ = 10 ms)•Priority 3: P4 (t=5 , τ = 6 ms), P5 (t=6 , τ = 9 ms)
0 5 10 15 20 25 30
P1
P2
P3
P4
P5
Processor IP1P2
Processor IIP2P3
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
47Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
At t=0ms P1, P2 arrive:
• Priority of P1 is higher, both Processors are available => Assign P1 -> Processor I
• Assign P2 -> Processor II
At t=1ms P3 arrives:
• Priority P3 > P2
• P2 will be interrupted by P3 (on Processor II)
• P2 continues (on Processor I) after P1 finished
Example
0 5 10 15 20 25 30
P4
P5
Priorities and Arrival times for P1..P5: •Priority 1: P2 (t=0, τ = 7 ms)•Priority 2: P1 (t=0 , τ = 3 ms), P3 (t=1 , τ = 10 ms)•Priority 3: P4 (t=5 , τ = 6 ms), P5 (t=6 , τ = 9 ms)
P1
P2
P3
Processor IP1P2
Processor IIP2P3
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
48Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
At t=5ms P4 arrives
• Priority P4 > P1 > P2
• Priority P3 > P2
• P2 will be interrupted by P4 (on Processor I)
Example
0 5 10 15 20 25 30
P4
P5
Priorities and Arrival times for P1..P5: •Priority 1: P2 (t=0, τ = 7 ms)•Priority 2: P1 (t=0 , τ = 3 ms), P3 (t=1 , τ = 10 ms)•Priority 3: P4 (t=5 , τ = 6 ms), P5 (t=6 , τ = 9 ms)
P1
P2
P3
Processor IP1P2P4
Processor IIP2P3
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
49Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
At t=6ms P5 arrives
• P4, P5 > P1
• P3 > P2
• P1 > P2
• P3 will interrupted by P5 (on Processor II)
Example
0 5 10 15 20 25 30
P4
P5
Priorities and Arrival times for P1..P5: •Priority 1: P2 (t=0, τ = 7 ms)•Priority 2: P1 (t=0 , τ = 3 ms), P3 (t=1 , τ = 10 ms)•Priority 3: P4 (t=5 , τ = 6 ms), P5 (t=6 , τ = 9 ms)
P1
P2
P3
Processor IP1P2P4
Processor IIP2P3P5
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
50Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
At t=6ms P5 arrives
• P4, P5 > P1
• P3 > P2
• P1 > P2
• P3 will interrupted by P5 (on Processor II)
Example
0 5 10 15 20 25 30
P4
P5
Priorities and Arrival times for P1..P5: •Priority 1: P2 (t=0, τ = 7 ms)•Priority 2: P1 (t=0 , τ = 3 ms), P3 (t=1 , τ = 10 ms)•Priority 3: P4 (t=5 , τ = 6 ms), P5 (t=6 , τ = 9 ms)
P1
P2
P3
Processor IP1P2P4
Processor IIP2P3P5
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
51Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
At t=6ms P5 arrives
• P4, P5 > P1
• P3 > P2
• P1 > P2
• P3 will interrupted by P5 (on Processor II)
Example
0 5 10 15 20 25 30
P4
P5
Priorities and Arrival times for P1..P5: •Priority 1: P2 (t=0, τ = 7 ms)•Priority 2: P1 (t=0 , τ = 3 ms), P3 (t=1 , τ = 10 ms)•Priority 3: P4 (t=5 , τ = 6 ms), P5 (t=6 , τ = 9 ms)
P1
P2
P3
Processor IP1P2P4
Processor IIP2P3P5
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
52Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
At t=6ms P5 arrives
• P4, P5 > P1
• P3 > P2
• P1 > P2
• P3 will interrupted by P5 (on Processor II)
Example
0 5 10 15 20 25 30
P4
P5
Priorities and Arrival times for P1..P5: •Priority 1: P2 (t=0, τ = 7 ms)•Priority 2: P1 (t=0 , τ = 3 ms), P3 (t=1 , τ = 10 ms)•Priority 3: P4 (t=5 , τ = 6 ms), P5 (t=6 , τ = 9 ms)
P1
P2
P3
Processor IP1P2P4
Processor IIP2P3P5
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
53Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
At t=6ms P5 arrives
• P4, P5 > P1
• P3 > P2
• P1 > P2
• P3 will interrupted by P5 (on Processor II)
Example
0 5 10 15 20 25 30
P4
P5
Priorities and Arrival times for P1..P5: •Priority 1: P2 (t=0, τ = 7 ms)•Priority 2: P1 (t=0 , τ = 3 ms), P3 (t=1 , τ = 10 ms)•Priority 3: P4 (t=5 , τ = 6 ms), P5 (t=6 , τ = 9 ms)
P1
P2
P3
Processor IP1P2P4
Processor IIP2P3P5
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
54Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
After P4 finished, P3 will be continued on Processor I
Example
0 5 10 15 20 25 30
P1
P2
P3
P4
P5
Priorities and Arrival times for P1..P5: •Priority 1: P2 (t=0, τ = 7 ms)•Priority 2: P1 (t=0 , τ = 3 ms), P3 (t=1 , τ = 10 ms)•Priority 3: P4 (t=5 , τ = 6 ms), P5 (t=6 , τ = 9 ms)
Processor IP1P2P4P3
Processor IIP2P3P5
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
55Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
After P4 finished, P3 will be continued on Processor I
Example
0 5 10 15 20 25 30
P1
P2
P3
P4
P5
Priorities and Arrival times for P1..P5: •Priority 1: P2 (t=0, τ = 7 ms)•Priority 2: P1 (t=0 , τ = 3 ms), P3 (t=1 , τ = 10 ms)•Priority 3: P4 (t=5 , τ = 6 ms), P5 (t=6 , τ = 9 ms)
Processor IP1P2P4P3
Processor IIP2P3P5
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
56Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
After P4 finished, P3 will be continued on Processor I
Example
0 5 10 15 20 25 30
P1
P2
P3
P4
P5
Priorities and Arrival times for P1..P5: •Priority 1: P2 (t=0, τ = 7 ms)•Priority 2: P1 (t=0 , τ = 3 ms), P3 (t=1 , τ = 10 ms)•Priority 3: P4 (t=5 , τ = 6 ms), P5 (t=6 , τ = 9 ms)
Processor IP1P2P4P3
Processor IIP2P3P5
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
57Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
After P4 finished, P3 will be continued on Processor I
Example
0 5 10 15 20 25 30
P1
P2
P3
P4
P5
Priorities and Arrival times for P1..P5: •Priority 1: P2 (t=0, τ = 7 ms)•Priority 2: P1 (t=0 , τ = 3 ms), P3 (t=1 , τ = 10 ms)•Priority 3: P4 (t=5 , τ = 6 ms), P5 (t=6 , τ = 9 ms)
Processor IP1P2P4P3
Processor IIP2P3P5
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
58Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
After P4 finished, P3 will be continued on Processor I
After P5 finished, P2 will be continued on Processor II
Example
0 5 10 15 20 25 30
P1
P2
P3
P4
P5
Priorities and Arrival times for P1..P5: •Priority 1: P2 (t=0, τ = 7 ms)•Priority 2: P1 (t=0 , τ = 3 ms), P3 (t=1 , τ = 10 ms)•Priority 3: P4 (t=5 , τ = 6 ms), P5 (t=6 , τ = 9 ms)
Processor IP1P2P4P3
Processor IIP2P3P5P2
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
59Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
After P4 finished, P3 will be continued on Processor I
After P5 finished, P2 will be continued on Processor II
P3 finished, Processor I unoccupied
Example
0 5 10 15 20 25 30
P1
P2
P3
P4
P5
Priorities and Arrival times for P1..P5: •Priority 1: P2 (t=0, τ = 7 ms)•Priority 2: P1 (t=0 , τ = 3 ms), P3 (t=1 , τ = 10 ms)•Priority 3: P4 (t=5 , τ = 6 ms), P5 (t=6 , τ = 9 ms)
Processor IP1P2P4P3
Processor IIP2P3P5P2
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
60Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
After P4 finished, P3 will be continued on Processor I
After P5 finished, P2 will be continued on Processor II
P3 finished, Processor I unoccupied
Example
0 5 10 15 20 25 30
P1
P2
P3
P4
P5
Priorities and Arrival times for P1..P5: •Priority 1: P2 (t=0, τ = 7 ms)•Priority 2: P1 (t=0 , τ = 3 ms), P3 (t=1 , τ = 10 ms)•Priority 3: P4 (t=5 , τ = 6 ms), P5 (t=6 , τ = 9 ms)
Processor IP1P2P4P3
Processor IIP2P3P5P2
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
61Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
After P4 finished, P3 will be continued on Processor I
After P5 finished, P2 will be continued on Processor II
P3 finished, Processor I unoccupied
Example
0 5 10 15 20 25 30
P1
P2
P3
P4
P5
Priorities and Arrival times for P1..P5: •Priority 1: P2 (t=0, τ = 7 ms)•Priority 2: P1 (t=0 , τ = 3 ms), P3 (t=1 , τ = 10 ms)•Priority 3: P4 (t=5 , τ = 6 ms), P5 (t=6 , τ = 9 ms)
Processor IP1P2P4P3
Processor IIP2P3P5P2
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
62Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
After P4 finished, P3 will be continued on Processor I
After P5 finished, P2 will be continued on Processor II
P3 finished, Processor I unoccupied
P2 finished, Processor II unoccupied
Example
0 5 10 15 20 25 30
P1
P2
P3
P4
P5
Priorities and Arrival times for P1..P5: •Priority 1: P2 (t=0, τ = 7 ms)•Priority 2: P1 (t=0 , τ = 3 ms), P3 (t=1 , τ = 10 ms)•Priority 3: P4 (t=5 , τ = 6 ms), P5 (t=6 , τ = 9 ms)
Processor IP1P2P4P3
Processor IIP2P3P5P2
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
63Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
Questions?
Dr.-Ing. Pascal A. KleinUniversity Duisburg-Essen
64Prof. Dr.-Ing. Axel HungerInstitute of Computer Engineering OSCN – Process Scheduling
Tanenbaum, Andrew S., “Modern Operating Systems”, 3rd edition, Pearson Education Inc, Amsterdam, Netherlands, 2008.
Tanenbaum, Andrew S., “Moderne Bertriebssysteme”, 3rd edition, Pearson Education Inc, Amsterdam, Netherlands, 2009.
Resources
Recommended