Preliminary - Trenz Electronic TB... · 2012-01-24 · Features Kintex® -7 FPGA Evaluation...

Features

Kintex® -7 FPGA Evaluation platform for 16ch Serdes & DDR3

The TB-7K325T-IMG Kintex-7 FPGA Evaluationboard allows you to test your 12.5 Gbpsserial I/O designs and 64-bit x 1,866Mbps memory interface designs on the world's first 28nm FPGAfrom Xilinx, the Kintex-7. Realize your solution fasterthan ever using our reference designs based onindustry standard high-bandwidth interfaces(created with FMC cards) that take advantage ofthe new memory Kintex-7 memory controller innovations.Connectivity, scalability, and flexibility make this boardyour multi-project, revolutionary innovation platform.

• FPGA ：Kintex ®-7 XC7K325T-3FFG900E• Memory ：DDR3 2Gbit ×4• Configuration : QUAD SPI Flash（128Mbit）• FMC connectorv HPC（High Pin Count）×2v LPC（Low Pin count）×2

• Transceiver ：16ch x 12.5Gbps（GTX)• Clockingv 74.25MHz (via socket）v 135MHz OSCv 200MHz OSCv PLL (user programmable)

• MMCX for Input and Output• XADC Pin headers

Block Diagram

※Names of companies, products and services in this pamphlet are trademarks or registered trademarks of their respective owners. Printed in JAPAN. PN 20100402

PLD Dept. PLD Solution Division1-4,Kinko-cho,Kanagawaku,Yokohama City,Kanagawa 221-0056Japan Tel:+81-45-443-4034 Fax:+81-45-443-4058

URL: http://ppg.teldevice.co.jp/

E-mail: psd-nasales@teldevice.co.jp

Preliminary

Reference Design (Verilog HDL)

Reference design for connection between General IO on boardand PC through UART

※Names of companies, products and services in this dtasheet are the trademarks or registered trademarks of their respective owners. Printed in JAPAN. PN 20100402

Ordering Information

Part number TB-7K325T-IMG

Deliverable

- Kintex carrier card- AC Adapter- Hardware User Guide (via TED Support Web)- Schematic (via TED Support Web)- HDMI Frame Buffer Reference Design (via TED Support Web)

-HDMI interface design with TB-FMCL-HDMI (sold separately)-Memory controller : 1600Mbps, 64bit data width, Generated by Xilinx Memory Interface Generator (MIG)

PLD Dept. PLD Solution Division1-4,Kinko-cho,Kanagawaku,Yokohama City,Kanagawa 221-0056Japan Tel:+81-45-443-4034 Fax:+81-45-443-4058

Kintex® -7 FPGA Evaluation Solutions

HDMI Frame Buffer Reference Design

URL: http://ppg.teldevice.co.jp/

E-mail: psd-nasales@teldevice.co.jp

RS232C

Frame B

HDMI HDMI

Preliminary - Trenz Electronic TB... · 2012-01-24 · Features Kintex® -7 FPGA Evaluation...

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