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Power Matters.TM
SiC MOSFET & Diode RoadmapSeptember 12, 2016p ,DPG-PDM
© 2016 Microsemi Corporation. Company Proprietary 1
SiC Capabilities Vs. Silicon
Power Matters.TM 2© 2016 Microsemi Corporation. Company Proprietary
SiC Epitaxial WaferCross-Polarization History
2007 2008 2009 2010
2011 2012 2013 2014
doping stain
Birefringence induced by lattice strain A perfect crystal will produce a uniform appearance when viewed between crossed polarizers
Power Matters.TM 3© 2016 Microsemi Corporation. Company Proprietary
Birefringence induced by lattice strain. A perfect crystal will produce a uniform appearance when viewed between crossed polarizers, as the polarized light rotation will be the same everywhere. Lattice strain induced by lattice defects, polytype inclusions, compositional in-homogeneities, etc. can all result in regions that induce locally different rotations of the polarized light. The local variations in light rotation are easily imaged with this technique, providing a picture of crystal quality.
Epitaxial Layer Thickness
220-0402 Thickness Target = 12.5um
m]
ss [μ
m
target
1μm
DowG 2
ickn
es
DowGen 2
Gen 2
Denko
Gen2 Thickness Target = 10.5Th9 0 0 0 0 0 0 0 1 1 1 1 1 1 2 2 2 2 2 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 4 4 4 4 4 4 4 4 4
Gen 2 DenkoGen 2
Power Matters.TM 4© 2016 Microsemi Corporation. Company Proprietary
18‐Sep
‐09
29‐Ja
n‐10
22‐Feb
‐10
12‐M
ar‐10
1‐Ap
r‐10
16‐Apr‐10
16‐Ju
n‐10
5‐Au
g‐10
3‐Feb‐1
29‐Apr‐11
26‐M
ay‐11
1‐Au
g‐11
2‐No
v‐11
19‐Dec
‐15‐Jan‐1 2
22‐Feb
‐12
9‐Ap
r‐12
26‐Ju
n‐12
5‐No
v‐12
20‐Feb
‐13
26‐Feb
‐13
13‐M
ar‐13
15‐M
ar‐13
20‐M
ar‐13
1‐Ap
r‐13
19‐Apr‐13
23‐Apr‐13
10‐M
ay‐13
30‐M
ay‐13
28‐Ju
n‐13
19‐Ju
l‐13
2‐Au
g‐13
30‐Aug
‐13
3‐Sep‐13
13‐Sep
‐13
27‐Sep
‐13
17‐Oct‐13
29‐Oct‐13
22‐Nov
‐13
3‐Jan‐14
24‐Ja
n‐14
25‐Ja
n‐14
7‐Feb‐14
31‐M
ar‐14
17‐Apr‐14
9‐May‐14
22‐M
ay‐14
30‐Ju
n‐14
Epitaxial Layer Dopingat
ion
cent
ram
-3]
DowGen 2
DenkoGen 2
DowEarly Gen 2
ng c
on [cm
1015
0402 Doping Target = 5.3E15
Gen 2 Doping Target = 6E15
Dop
in
target
09 10 10 10 ‐10 10 10 10 11 11 11 11 11 ‐11
12 12 ‐12 12 12 13 13 13 13 13 ‐13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 14 14 14 14 14 14 14 14 14
DowGen 2
Power Matters.TM 5© 2016 Microsemi Corporation. Company Proprietary
18‐Sep
‐29
‐Jan‐
22‐Feb
‐12
‐Mar‐
1‐Ap
r ‐16
‐Apr‐
16‐Ju
n‐5‐Au
g‐3‐Feb‐
29‐Apr‐
26‐M
ay‐
1‐Au
g‐2‐No
v‐19
‐Dec
‐5‐Jan‐
22‐Feb
‐9‐Ap
r‐26
‐Jun‐
5‐No
v‐20
‐Feb
‐26
‐Feb
‐13
‐Mar‐
15‐M
ar‐
20‐M
ar‐
1‐Ap
r ‐19
‐Apr‐
23‐Apr‐
10‐M
ay‐
30‐M
ay‐
28‐Ju
n‐19
‐Jul‐
2‐Au
g‐30
‐Aug
‐3‐Sep‐
13‐Sep
‐27
‐Sep
‐17
‐Oct‐
29‐Oct‐
22‐Nov
‐3‐Jan‐
24‐Ja
n‐25
‐Jan‐
7‐Feb‐
31‐M
ar‐
17‐Apr‐
9‐May‐
22‐M
ay‐
30‐Ju
n‐
Epitaxial Layer Surface RoughnessÅ
]ne
ss[Å
Rou
ghn
D krfac
e R
5Å
DenkoGen 2
MS
Sur
RM
… … … … … … …
Power Matters.TM 6© 2016 Microsemi Corporation. Company Proprietary
2‐No
v‐11
19‐Dec
‐11
5‐Jan‐12
22‐Feb
‐12
9‐Ap
r‐12
26‐Ju
n‐12
5‐No
v‐12
20‐Feb
‐13
26‐Feb
‐13
13‐M
ar‐ …
15‐M
ar‐…
20‐M
ar‐…
1‐Ap
r‐13
19‐Apr‐13
23‐Apr‐13
10‐M
ay‐ …
30‐M
ay‐…
28‐Ju
n‐13
19‐Ju
l‐13
2‐Au
g‐13
30‐Aug
‐13
3‐Sep‐13
13‐Sep
‐13
27‐Sep
‐13
17‐Oct‐13
29‐Oct‐13
22‐Nov
‐13
3‐Jan‐14
24‐Ja
n‐14
25‐Ja
n‐14
7‐Feb‐14
31‐M
ar‐ …
17‐Apr‐14
9‐May‐14
22‐M
ay‐ …
30‐Ju
n‐14
Epitaxial Layer Defect Count
fer]
coun
tm
waf
Def
ect
100m
200
D[p
er
Power Matters.TM 7© 2016 Microsemi Corporation. Company Proprietary
Special ProcessingContrast to Silicon TechnologyContrast to Silicon Technology
• Dopant introduction by implant at elevated temperatures• Dopant introduction by implant at elevated temperatures• Dopant activation, implant damage anneal at high temperatures• No diffusion• High temperature gate oxidationHigh temperature gate oxidation• Above translates into all layer removal post dopant introduction forelectrical activation
• Alignment is criticalAlignment is critical
CentroTherm CHV-100P t I l t A li t 1700°C
E220Production Implanter
Hi Temp OxidationSiC MOSFET Gate Oxidation
Power Matters.TM 8© 2016 Microsemi Corporation. Company Proprietary
Post Implant Annealing to 1700°C
SiC MOSFET Transistor X-Section
atio
n [c
m-3
]
Source (N14)# Athena simulation
poly gate
Dop
ing
Con
cent
ra
Vth adjust p-well (Al27)
Voltage blocking p-well (Al27)p-wellsource
Depth [µm]
N- drain epitaxyt
• Simulation-based technology development to cut cycles of learning• Flexibility of design variations for special applications
Thi k Al C t lli ti f i t t d b d d• Thick Al-Cu metallization for interconnect and bond pads• Dual layer metal process integration for maximized packing density• Thick final passivation for maximum reliability
Power Matters.TM 9© 2016 Microsemi Corporation. Company Proprietary
Process Integration
• P-well implants for reduced RDS(ON) contribution from JFET regiono Vth adjustment implanto Voltage blocking implant
• Balance between guard-ring, p-well voltage blocking enables UIS capability• Topology conforming backend metallization for high yield
Mask 1
n-epitaxy
p-well1 p-well1
M1
n-epitaxy
pw1
M2 M2
p-well2 p-well2
pw1
n-substrate n-substrate
(A) (B)
M1M2 M2n+ source
p-well2
n+ source
p-well2
pw1 pw1 pw1n+ source
p-well2
n+ source
p-well2
Mask 3p+ p+pw1
n-epitaxy
pw1n+ source
p-well2
n+ source
p-well2
gate poly
p+ p+pw1 gr
n-epitaxy
n-substrate
n-epitaxy
n-substrate
p y
n-substrate
Power Matters.TM 10© 2016 Microsemi Corporation. Company Proprietary
(C) (D)
Microsemi SiC MOSFETs
Voltage Current RDS(ON) Part Number Package Samples Availability
700V 35A ~100mΩ APT35SM70BAPT35SM70S
TO-247 D3 Mid-August
700V 70A 53 ΩAPT70SM70BAPT70SM70S
TO-247 D3 Mid A t
New
700V 70A 53mΩ APT70SM70SAPT70SM70J
D3SOT-227
Mid-August
700V 130A 33mΩ APT130SM70BAPT130SM70J
TO-247 SOT-227 End-July
N APT130SM70J SOT-227
1200V 25A 140mΩ APT25SM120BAPT25SM120S
TO-247D3 Early-August
New
1200V 40A 80mΩAPT40SM120BAPT40SM120SAPT40SM120J
TO‐247D3SOT‐227
Mid-JunethenEarly-July
APT80SM120B TO 247 Mid J ne1200V 80A 40mΩ
APT80SM120BAPT80SM120SAPT80SM120J
TO-247 D3SOT-227
Mid-JunethenMid-July
1700V 5A 800 Ω APT5SM170B TO-247 E l O t b
Power Matters.TM 12© 2016 Microsemi Corporation. Company Proprietary© 2016 Microsemi Corporation
1700V 5A 800mΩ APT5SM170S D3 Early-October
What Makes A High Speed SwitchTypical Transistor Gain Characteristics
ft Transistor switching speed
f i i mgf fmax Transistor power gain
gdgs
mt CC
gf
tmax Cr
ff
ft
gdg Cr
Power Matters.TM 13© 2016 Microsemi Corporation. Company Proprietary
gm Optimization
10V
@ 1
0A, 1
g m gm’ gm
Rsm
m Rg'g
1
R @ 10A 20V
Rssm
m Rgg
1
• Packing density (without increasing parasitic capacitance)• Source resistance minimized (gm vs. RDS(ON) plot)
Perfection of source contact formation
RDS(ON) @ 10A, 20V
Power Matters.TM 14© 2016 Microsemi Corporation. Company Proprietary
o Perfection of source contact formationo Push the limit on gate/source overlap without trading manufacturability
DC Characteristics Key toDC Characteristics Key to Switching Performance
Best in Class RDS(ON) vs. Temperature
1 92
2.12.2
Competitor 21200V, 30A, 80mΩ
1 61.71.81.9 Competitor 1
1200V, 36A, 80mΩ
ed R
DS(
ON
)
1.31.41.51.6
MicrosemiAPT40SM120B
1200V, 40A, 80mΩ
Nor
mal
ize
0 91
1.11.2N
0.925 50 75 100 125 150 175 200
Tj [°C]
Power Matters.TM 16© 2016 Microsemi Corporation. Company Proprietary
• Lower RDS(ON) at temperature provides higher ceiling for continuous current rating
RG & Dynamic Performance
Turn-On Turn-Off+20V
Gate driver
ONig
+20V
MOSFETGate driver
OFF
RG(MOSFET)
ON
RG(MOSFET)
OFF
Ciss
MOSFET
OFFCiss
ON
ig
V20 V20 MOSFETGdriverG
g RRVti
200
• High gate resistance limits available charging current consequently retards
MOSFETGdriverG
g RRVti
200
Power Matters.TM 17© 2016 Microsemi Corporation. Company Proprietary
High gate resistance limits available charging current, consequently, retards transistor switching performance
Ultra Low Gate Resistance Minimized Switching Energy Loss & Higher Switching Frequency
9
10
g gy g g q y
6
7
8
3
4
5R
G(Ω
)Competition High RG
1
2
3
Microsemi Low RG
00 1 2 3 4 5
M12
0BΩ M12
0BmΩ tit
or 2
titor
1
AP
T50S
M50
m
AP
T40S
M80
m
Com
pet
Com
pet
Oscillation-free with minimal external RG
Power Matters.TM 18© 2016 Microsemi Corporation. Company Proprietary
Microsemi
High Transconductance (gm) Cuts ton
Microsemi
competitor 1
Microsemi
g m[S
]
D[A
]
gI D
† VD=0.1V
• 2× g at the start of the turn on process
VG [V]
Power Matters.TM 19© 2016 Microsemi Corporation. Company Proprietary
• 2× gm at the start of the turn-on process
High Transconductance (gm) Cuts ton
25Microsemi (RG=7Ω)Competitor 1 (RG=0Ω)
Intentionally added external Rg to show case high gm
5
10
15
20p ( G )
VG
1.E+02Microsemi 50mΩ (7Ω)
Microsemi 50mΩ (0)
Comp 1 (0)Microsemi
0
5
506070
VG ID
VD 1 E+00
1.E+01Comp 1 (0)
solid=7Ωdashed=0 Ω
[A]
010203040
1.E-01
1.E+00competitor 1
S b th h ld l
I d[
4 0006,000 8,000
10,000 12,000 Pon
competitor 1 1.E-020 5 10 15 20
Sub-threshold slope: Shallow junction and good interface quality
0 2,000 4,000
-20 -10 0 10 20 30 40 50Time [ns]
Microsemi0 5 10 15 20
Vg [V]
Power Matters.TM 20© 2016 Microsemi Corporation. Company Proprietary
• Superior sub-1A gm jumps start the turn-on process
Maximum Switching Frequency, fmax
1.E+06
Total switching time ≤ 5% switching period
Limitation 1
1.E+05
MicrosemiAPT50SM120B
1200V, 50A, 50mΩ
Thermally limited switching frequency
fmax
[Hz]
Competitor 21200V, 30A, 80mΩf m
ax[H
z]
Thermally limited switching frequency
Limitation 2
1.E+04
MicrosemiAPT40SM120B
1200V, 40A, 80mΩ
1.E+030 10 20 30 40 50 60
ID [A]
† Tj=150°C; Tc=75°C
I [A]
Dynamic performance breakaway enablers:• Superior Eon (ton) due to high gm, ultra low RG
ID [A]ID [A]
Power Matters.TM 21© 2016 Microsemi Corporation. Company Proprietary
• Superior Eoff due to extremely low RG (yet oscillation free with very low external RG)• Low RDS(ON) at high temperatures extends switching frequency and current capability
Superior Short Circuit WithstandCompetitor 1Microsemi
8.5µs
• Microsemi’s 80mΩ SiC MOSFET demonstrates 25% longer• Microsemi s 80mΩ SiC MOSFET demonstrates 25% longershort circuit capability
Power Matters.TM 22© 2016 Microsemi Corporation. Company Proprietary
Superb Avalanche Ruggedness
APT40SM120BVDD
Unclamped inductive load
Max Vd=2225VVg=20V
APT40SM120B(1200V/80mΩ/40A)
Id=20ADUT
dtdiLv
2 3J (20A)gate poly 2.3J (20A)
n-epitaxy
pw1n+ source
p-well2
n+ source
p-well2
p+ p+pw1 gr
n-substrate
• Competitor1 not UIS rated, competitor2 GEN2 1200V/80mΩ/36A Ea=1J (20A)
Power Matters.TM 23© 2016 Microsemi Corporation. Company Proprietary
Competitor1 not UIS rated, competitor2 GEN2 1200V/80mΩ/36A Ea 1J (20A)
SiC MOSFET Technology Reliability Assessment
Field-driven intrinsic
weakness in
Stacking faults growth
in epitaxial
SiC gate oxide,
interfaceGate oxide
lifetimebulk SiC materials
in epitaxial wafers
interface quality
lifetime
High temperature reverse bias
(HTRB)
Body diode forward bias
stress
Positive bias temperature instability
(PBTI)
Negative bias temperature instability
(NBTI)
Time-dependent dielectric
breakdown (TDDB)• 2000hrs VDD=960V
@ 175°C• 100A/cm2 forward current through body diode
• 2000 hrs VG=+20V @ 175°C
• 2000 hrs VG=-20V @ 175°C
(TDDB)• Constant current stress to breakdown
Power Matters.TM 24© 2016 Microsemi Corporation. Company Proprietary
Die Size Scaling
Larger=More capacitance=More Switching Loss?
Difference Between On/OFF(not described by Qg characteristic)(not described by Qg characteristic)
18
20
turn-on† Inductive switching IV
12
14
16
8
10
12
Id [A]
2
4
6
turn-off
00 100 200 300 400 500 600 700
Vd [V]
• Turn-on: An energizing process with transistor gm generator hard at work• Turn-off: Capacitive
Power Matters.TM 26© 2016 Microsemi Corporation. Company Proprietary
p• Area under the dynamic load-line: Eon>Eoff
Gate Charge (Qg) Characteristiclinear saturation
sC
sA
CA < CC SA > Sc
ON
• Plateau voltage: gm (but note: Qg characteristic has no gm action, i.e., high gm does not
OFF450 700
g gm ( g gm , , g gmspeed things up due to the very choked gate current contrast to real switching. Further, more gate charge does not mean higher switching loss necessarily)• Slope of Vg in region A: Capacitance at weak turn-on (CA)• Flatness of V in region B: Degree of saturation• Flatness of Vg in region B: Degree of saturation• Slope of Vg in region C: Capacitance at strong turn-on (CC) No contribution to switching power loss (Vd=0)
CgdCgg
CC
Power Matters.TM 27© 2016 Microsemi Corporation. Company Proprietary Vds=g
10V1kV
Vth
CA
CC
Vgs=d
Low Current Qg @ 10A1E+0325 40A (10A) VG
80A (10A) VG
40A (10A) VD
80A (10A) VD
APT80
Vd
1E 01
1E+02
15
20
V]
APT40(dashed)
APT80(solid)
1E+00
1E+01
10
V D[V
]V g[V
9V
6V
Vg [V]Vd [V]
δ=3V
† Transistor sizeAPT80=2× APT40
1E-010
5
-5 0E-5 0 0E+0 5 0E-5 1 0E-4 1 5E-4 2 0E-4 2 5E-4
6V
1E-02-5
5.0E 5 0.0E+0 5.0E 5 1.0E 4 1.5E 4 2.0E 4 2.5E 4
Time [s]No Eoff APT80
• Apparent: Bigger transistor=More capacitance (V slope duration)• Apparent: Bigger transistor=More capacitance (Vg slope, duration)• Not so obvious: Bigger transistor=Lower Vplateau=Higher gm• Turn-on: gm-dictated process bigger transistor wins• Turn-off: Eoff worse for the bigger transistor (Eoff is purely capacitance)
Power Matters.TM 28© 2016 Microsemi Corporation. Company Proprietary
• Etotal remains constant (current/capacitance scaling) equal for big and small @ low/moderate currents
High Switching Current
160
180+20V +18V
+16V
APT80(1200V/80A)APT40(1200V/40A)
120
140 +20V+18V
+16V
+14V
60
80
100 +14V
+12V
ID [A]
20
40
60
+6V+8V+8V
00 5 10 15
+6V+6V
VDS [V]
ON
OFF450 700
• VG required for a larger transistor to support a given current is lower• @ a given high switching current, VG of a smaller transistor is required to climb to a
f
OFF450 700
Power Matters.TM 29© 2016 Microsemi Corporation. Company Proprietary
higher value to support ID in the turn-on process Lag in VD fall time to complete turn-on Eon ↑
High vs. Low Switching Current Qg(for APT40SM)(for APT40SM)
1E+0325 APT40 (10A) VGAPT40 (60A) VGAPT40 (10A) VDAPT40 (60A) VD
Vd
1E+02
15
20
V]V [V]
60A10A
1E+0110
V D[V
]V g[VVg [V]
60A
Vd [V]
1E+00
0
5
-5 0E-5 0 0E+0 5 0E-5 1 0E-4 1 5E-4
10A
• In contrast to 10Ao 60A pushes the transistor to higher Vg (more saturated) to support current
1E-01-5
5.0E 5 0.0E+0 5.0E 5 1.0E 4 1.5E 4
Time [s]
go Transistor struggles to support the currento Higher Vd is requiredo Lag in Vd fall results
Power Matters.TM 30© 2016 Microsemi Corporation. Company Proprietary
o Note the worse gate voltage slope indicative of higher gate capacitance at higher Vg(no contriution to loss)
High Current Qg @ 60A(APT40 vs APT80)
1E+0325APT40 (60A) VGAPT80 (60A) VGAPT40 (60A) VD
(APT40 vs. APT80)
APT40
Vd
1E+02
15
20
]
( )APT80 (60A) VD(dashed)
APT80(solid)
1E+00
1E+01
10V g
[V
(solid)12.4V
8.15V
Vg [V]Vd [V]δ=4.25V
1E-010
5
5 0E 5 0 0E+0 5 0E 5 1 0E 4 1 5E 4 2 0E 4 2 5E 4
1E-02-5
-5.0E-5 0.0E+0 5.0E-5 1.0E-4 1.5E-4 2.0E-4 2.5E-4
Time [s]No Eoff APT80
• Smaller transistor screaming for gm (requires higher Vg to support high current)• The falling of Vd slows toward the end of Miller plateau onset of saturation for smaller transistor to support current at a higher V
Power Matters.TM 31© 2016 Microsemi Corporation. Company Proprietary
smaller transistor to support current at a higher Vd• Lag in Vd dissipates more power during turn-on
High Current Turn-On Lag
120
140
160
50
60 1200V/40A (dashed)1200V/80A (solid)
Id
Vd/10@ i hi h i hi
80
100
120
30
40
ID[A]
G, VD/
10 [V
]
d• @ a given high switching currentso Smaller transistor lags in gm required to sweep to a higher voltage (Vg, Vd)
S ll t i t t l l d t Vd/1
0 [V
]
I d[A
]40A80A
20
40
60
10
20
VG
Vg
o Smaller transistor turn-on lag leads to higher turn-on switching loss
• A smaller transistor can only support a high
Vg,
00
50000
60000
• A smaller transistor can only support a high switching current at a higher Vds due to saturation, i.e., drain voltage never falls sufficiently leading to the increase of switching/conduction loss
30000
40000
P ON[W
]
the increase of switching/conduction loss conduction loss a bigger transistor is needed
Pon
[V] 40A
80A
10000
20000conduction loss due to saturation
P
Power Matters.TM 32© 2016 Microsemi Corporation. Company Proprietary
01E‐8 1E‐7 1E‐6
Time [s]Time [s]
Transistor Size Scaling Summary
• Larger transistor Lower conduction loss (RDS(ON))
• For a given voltage
• @ low/moderate switching current Equal Etotal performance
• @ high switching current Larger transistor has lower switching loss
• At a switching current where drain voltage fails to complete its fall
Transistor size cannot support the current and a bigger transistor is required
Power Matters.TM 33© 2016 Microsemi Corporation. Company Proprietary
Microsemi 700V SiC MOSFET BenchmarkedMicrosemi 700V SiC MOSFET Benchmarked Against 700V Silicon Superjunction MOSFET
Microsemi SiC MOSFET APT70SM070B: 700V, 53mΩSilicon Superjunction MOSFET IPW65R045C7: 700V, 45mΩ
Thermal Friendly SiC MOSFET
2 32.42.5
Silicon Superjunction
1 92
2.12.22.3 Silicon Superjunction
MOSFET700V/45mΩ
DS(
ON
)
1 51.61.71.81.9
mal
ized
RD
(to 2
5°C
)
1 11.21.31.41.5
SiC MOSFET700V/53mΩN
orm
0.91
1.1
25 50 75 100 125 150 175 200
• For silicon superjunction MOSFET, conduction loss deteriorates rapidly with temperature while SiC MOSFET remains temperature insensitive
Tj [°C]
Power Matters.TM 35© 2016 Microsemi Corporation. Company Proprietary
temperature while SiC MOSFET remains temperature insensitive.• Switching/conduction loss deteriorates at high current/temperature due to saturation
Thermal Friendly SiC MOSFET
2 32.42.5
Silicon Superjunction
1 92
2.12.22.3 Silicon Superjunction
MOSFET700V/45mΩ
DS(
ON
)
1 51.61.71.81.9
mal
ized
RD
(to 2
5°C
)
1 11.21.31.41.5
SiC MOSFET700V/53mΩN
orm
0.91
1.1
25 50 75 100 125 150 175 200
• For silicon superjunction MOSFET, conduction loss deteriorates rapidly with temperature while SiC MOSFET remains temperature insensitive
Tj [°C]
Power Matters.TM 36© 2016 Microsemi Corporation. Company Proprietary
temperature while SiC MOSFET remains temperature insensitive.• Switching/conduction loss deteriorates at high current/temperature due to saturation
Silicon Superjunction MOSFET Qg ~ 1E+3
40
45
50 1.5×Vd
700V/53mΩ SiC MOSFET (dotted)700V/45mΩ superjunction MOSFET (solid) 3E-9
1200V/40A
1E+1
1E+2
25
30
35
Vg [V]Vd [V]
2E-9
Crs
s[F
]
t
1E+0
1E+1
10
15
20Vg
C
Vd [V]
1E-9C turn-on
1E‐1‐5
0
5
0.0E+0 5.0E‐5 1.0E‐4 1.5E‐4 2.0E‐4 2.5E‐4
• Plateau V silicon superjunction MOSFET lower stronger g (μ die size)Time [s]
AB 0E+0
1E-2 1E-1 1E+0 1E+1 1E+2 1E+3
Vds=g [V]Plateau Vg silicon superjunction MOSFET lower stronger gm (μn, die size)
• Slope of Vg in region Ao SiC MOSFET steeper lower input capacitance Ciss in region A (Vth)o SiC breakdown field 7.3× Allows heavier doping for a given breakdown voltage
F i b kd lt d R SiC MOSFET h ll di io For a given breakdown voltage and RDS(ON) SiC MOSFET has a smaller die sizeo Silicon superjunction MOSFET die size 1.67×
• Flatness of Miller plateau (region B)o Flat for silicon superjunction MOSFET More saturation
Power Matters.TM 37© 2016 Microsemi Corporation. Company Proprietary
o Never flat for SiC MOSFET Much less saturation More current capability• Region C slope of Vg post Miller plateau (Cgg of Vg>Vth) No contribution to loss
Qg Characteristic SummaryFeatures in gate
charge characteristic
Switching performance implication SiC MOSFET Silicon superjunction
MOSFET
gm plateau voltage turn-on loss - +(die size, mobility)
Input capacitance slope(Vg) switching loss
+(die size, integration,
layout)-
y )
Miller capacitance
duration of Miller plateau (till Vd
falls sufficiently)switching loss
(+)(die size, integration,
layout)-
Saturation flatness of plateau
switching current, temperature capability + -plateau temperature capability
linear saturation
sC
sA
CA < CC SA > Sc
ON
Power Matters.TM 38© 2016 Microsemi Corporation. Company Proprietary
450 700OFF
SiC MOSFET Module Product Roadmap
The SiC MOSFET Module product range is based upon:
• Two die sizes S5F04 and S5F05Two die sizes S5F04 and S5F05
• Two voltage ratings (700V and 1200V)
• APT70SM70D (700V /53 mOhms typ, 60 mOhms max)APT70SM70D (700V /53 mOhms typ, 60 mOhms max)
• APT40SM120D (1200V/80 mOhms typ, 100 mOhms max)
• APT140SM70D (700V/30 mOhms typ, 35 mOhms max)
Power Matters.TM 39© 2016 Microsemi Corporation. Company Proprietary
• APT80SM120D (1200V/40 mOhms typ, 55 mOhms max)
SiC MOSFET Module Product Roadmap
Electrical configurations
• Boost Chopper
• Buck Chopper
• Single switch• Single switch
• Phase leg
• Full bridge
• Triple phase leg
Power Matters.TM 40© 2016 Microsemi Corporation. Company Proprietary
Packaging and power density
To achieve the best switching performance and highest integration level a custom approach totally dedicated to the application efficiency targeta custom approach totally dedicated to the application efficiency target and mechanical constraints is the ultimate solution
Duplicated +DC terminals
Distributed +DC and –DC terminals for Thermal ceramic capacitors decoupling
G & S
sensor
OUT
Example of a high current, high frequency, high voltage SiC MOSFET Duplicated -DC terminals
Power Matters.TM 41© 2016 Microsemi Corporation. Company Proprietary
phase leg
Packaging and Power Density
Module performance and reliability depend on assembly material h ichoice
Material CTE (ppm/K)
Thermal conductivity
Density (g/cc)
CTE (ppm/K)
Thermal conductivity
(W/m K)Rthjc (K/W)
(pp )(W/m.K)
(g )
BaseCuW 6.5 190 17
AlSiC 7 170 2.9
(W/m.K)
Silicon Die (120 mm2) orSiC Die (40mm2) 4 136
Cu/Al2O3 17/7 390/25 0.35Cu 17 390 8.9
SubstrateAl2O3 7 25 -
AlN 5 170 -
AlSiC/Al2O3 7/7 170/25 0.385Cu/AlN 17/5 390/170 0.28AlSiC/AlN 7/5 170/170 0.31AlSiC/Si3N4 7/3 170/60 0.31
DiceSo ld er Jo intDBC sub s t rate
Base
So ld er
Si3N4 3 60 -
Die Si 4 136 -SiC 2.6 370 -
• AlSiC and Alumina offer best CTE matching
AlN d Si3N4 AlSiC ff
More closely matched TCEs of materials increases module lifetime.
Higher thermal conductivity maximizes thermal performance
Power Matters.TM 42© 2016 Microsemi Corporation. Company Proprietary
• AlN and Si3N4 on AlSiC offer higher thermal performance with good CTE matching
Engineered materials such as AlSiC provide substantial weight reductions (up to 50%) over traditional copper material.
Packaging and Power Density
All full SiC Mosfet modules from Microsemi are built with All full SiC Mosfet modules from Microsemi are built with Aluminium Nitride (AlN) substrate for best thermal performancep
Si3N4 substrates is offered as an option
Any full SiC power module can be converted from a t d d b l t t AlSiC b l t fstandard copper base plate to an AlSiC base plate for
extended operating temperature range and higher temperature cycling capabilityp y g p y
Power Matters.TM 43© 2016 Microsemi Corporation. Company Proprietary
Packaging and Power Density
SiC technology is capable of high temperature operation SiC technology is capable of high temperature operation
All Microsemi SiC MOSFET modules use high temperature All Microsemi SiC MOSFET modules use high temperature solder alloy for die attach as a standard to allow maximum junction temperature operation
As SiC technology will improve, high temperature solder ll ill b li it ti f t j tialloy will become a limitation for extreme junction
temperatures operation
Ag sintering technology is the future for SiC devices assembly
Power Matters.TM 44© 2016 Microsemi Corporation. Company Proprietary
y
Packaging and Power Density
Basic Ag sintering process
As printed After sintering200-300ºC3
Organic cap
Ag Nano particle
During Sintering process solvents and organic cap escape, exposing pure silver core to allow particles to coalesce and
Power Matters.TM 45© 2016 Microsemi Corporation. Company Proprietary
form solid conductive Ag structure
Packaging and Power DensityAg is an ideal Die Attach Material
Melting range Density CTE Tensile
strength Modulus Thermal conductivity
Electricalresistivityrange strength conductivity resistivity
Material °C g/cm3 ppm/°C MPa GPa W/m.K µΩcm
Silver 962 10.5 20 140 76 419 1.6
92.5Pb5Sn2.5Ag 287-296 11 29 29 - 27 8.5
80Au20Sn 280 14.5 16 276 59 57 16
96 5S 3 5A 221 7 4 30 38 50 58 12 5
Ag paste is processed at 250°C – 300°C under pressure to form pure Ag interface
96.5Sn3.5Ag 221 7.4 30 38 50 58 12.5
After processing , Ag paste acts as bulk Ag with a melting point of 962°C Density (85 to 90%)
• Thermal conductivity: 200 – 300 W/m KThermal conductivity: 200 300 W/m.K• Electrical resistivity: 2 – 2.5 µΩcm• No intermettallic phases formed
Power Matters.TM 46© 2016 Microsemi Corporation. Company Proprietary
Ag paste allows highest thermal performance and reliability
Thank You
Microsemi Corporation (MSCC) offers a comprehensive portfolio of semiconductor and system solutions for communications, defense & security, aerospace and industrial markets. Products include high-performance and radiation-, y, p g phardened analog mixed-signal integrated circuits, FPGAs, SoCs and ASICs; power management products; timing and synchronization devices and precise time solutions, setting the world's standard for time; voice processing devices; RF solutions; discrete components; enterprise storage and communication solutions, security technologies and scalable anti-tamper products; Ethernet solutions; Power-over-Ethernet ICs and midspans; as well as custom design capabilities and services. Microsemi is headquartered in Aliso Viejo, Calif., and has approximately 4,800 employees globally. Learn more at www.microsemi.com
Microsemi makes no warranty, representation, or guarantee regarding the information contained herein or the suitability of its products and services for any particular purpose, nor does Microsemi assume any liability whatsoever arising out of the application or use of any product or circuit. The products sold hereunder and any other products sold by Microsemi have been subject to limited testing and should not be used in conjunction with mission-critical equipment or applications. Any performance specifications are believed to be reliable but are not verified, and Buyer must conduct and complete all performance and other testing of the products, alone and together with, or installed in, any end-products. Buyer shall not rely on any data and performance specifications or parameters provided by Microsemi. It is the Buyer’s responsibility to independently determine suitability of any products and to test and verify the same. The information provided by Microsemi hereunder is provided “as is, where is” and with all faults, and the entire risk associated with such
Microsemi Corporate HeadquartersOne Enterprise, Aliso Viejo, CA 92656 USAWithin the USA: +1 (800) 713-4113Outside the USA: +1 (949) 380-6100Sales: +1 (949) 380-6136
Power Matters.TM 47© 2016 Microsemi Corporation. Company Proprietary©2016 Microsemi Corporation. All rights reserved. Microsemi and the Microsemi logo are registered trademarks of Microsemi Corporation. All other trademarks and service marks are the property of their respective owners.
y p y p , ,information is entirely with the Buyer. Microsemi does not grant, explicitly or implicitly, to any party any patent rights, licenses, or any other IP rights, whether with regard to such information itself or anything described by such information. Information provided in this document is proprietary to Microsemi, and Microsemi reserves the right to make any changes to the information in this document or to any products and services at any time without notice.
Sales: 1 (949) 380 6136Fax: +1 (949) 215-4996email: sales.support@microsemi.comwww.microsemi.com
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