Voltage or Current References Requirements of a Reference Circuit: Should be independent of power...

Voltage or Current References

Requirements of a Reference Circuit: • Should be independent of power supply• Should be independent of temperature • Should be independent of processing variations• Should be independent of noise

Voltage or Current References

Requirements of a Reference Circuit: • Should be independent of power supply• Should be independent of temperature • Should be independent of processing variations• Should be independent of noise

S = ( Vref / Vref ) / ( Vdd / Vdd )Vdd

Vref

Sensitivity:

Voltage or Current References

Requirements of a Reference Circuit: • Should be independent of power supply• Should be independent of temperature • Should be independent of processing variations• Should be independent of noise

S = ( Vref / Vref ) / ( Vdd / Vdd )Vdd

Vref

Sensitivity:

If sensitivity = 1, then 10% change in Vdd results in a 10% in Vref

Simple Bias Circuits

Vout

Vdd

GND

Typically usinga potentiometer

Simple Bias Circuits

Vout

Vdd

GND

Typically usinga potentiometer

S = 1Vdd

Vref

Simple Bias Circuits

Vout

Vdd

GND

Typically usinga potentiometer

GND

Vout

Vdd

Transistor-basedresistive divider

S = 1Vdd

Vref

Simple Bias Circuits

Vout

Vdd

GND

Typically usinga potentiometer

GND

Vout

Vdd

Transistor-basedresistive divider

S = 1Vdd

Vref

If KN = KP and VTN = |VTP|

S = 1Vdd

Vref

Simple Bias Circuits

Vout

Vdd

GND

Typically usinga potentiometer

Typically poor Power Supply Rejection (low PSRR)

GND

Vout

Vdd

Transistor-basedresistive divider

S = 1Vdd

Vref

If KN = KP and VTN = |VTP|

S = 1Vdd

Vref

Bias Circuits involving Diodes

GND

Vout

R

Vdd

GND

Iout

Current Source

MOSFET Source

Bias Circuits involving Diodes

GND

Vout

R

Vdd

GND

Iout

Current Source

MOSFET Source

GND

Vout

R

Vdd

BJT Source

Bias Circuits involving Diodes

Significant Power Supply Rejection (higher PSRR)

GND

Vout

R

Vdd

GND

Iout

Current Source

MOSFET Source

GND

Vout

R

Vdd

BJT Source

Output Voltage Sensitivity

GND

Vref

R

Vdd

BJT Source Small-Signal model:

R

Vref

1/gm

GND

Vdd

Output Voltage Sensitivity

GND

Vref

R

Vdd

BJT Source Small-Signal model:

R

Vref

1/gm

GND

Vdd Vref = Vdd / (1 + gm R)

gm = (Vdd0 – Vref0)/ R UT

Output Voltage Sensitivity

GND

Vref

R

Vdd

BJT Source Small-Signal model:

R

Vref

1/gm

GND

Vdd Vref = Vdd / (1 + gm R)

gm = (Vdd0 – Vref0)/ R UT

Vref (1 + (Vdd0 – Vref0)/ UT ) = Vdd

S = (Vref / Vdd) (Vdd0 / Vref0)

= (Vdd0/Vref0)/(1 + (Vdd0–Vref0)/UT )

Vdd

Vref

Output Voltage Sensitivity

GND

Vref

R

Vdd

BJT SourceS = (Vref / Vdd) (Vdd0 / Vref0)

= (Vdd0/Vref0)/(1 + (Vdd0–Vref0)/UT )

Vdd

Vref

Output Voltage Sensitivity

GND

Vref

R

Vdd

BJT SourceS = (Vref / Vdd) (Vdd0 / Vref0)

= (Vdd0/Vref0)/(1 + (Vdd0–Vref0)/UT )

Vdd

Vref

Vdd0–Vref0 >> UT

S = (Vdd0/ (Vdd0–Vref0)) (UT / Vref0) Vdd

Vref

Output Voltage Sensitivity

GND

Vref

R

Vdd

BJT SourceS = (Vref / Vdd) (Vdd0 / Vref0)

= (Vdd0/Vref0)/(1 + (Vdd0–Vref0)/UT )

Vdd

Vref

Vdd0–Vref0 >> UT

S = (Vdd0/ (Vdd0–Vref0)) (UT / Vref0) Vdd

Vref

~1

Output Voltage Sensitivity

GND

Vref

R

Vdd

BJT SourceS = (Vref / Vdd) (Vdd0 / Vref0)

= (Vdd0/Vref0)/(1 + (Vdd0–Vref0)/UT )

Vdd

Vref

Vdd0–Vref0 >> UT

S = (Vdd0/ (Vdd0–Vref0)) (UT / Vref0) Vdd

Vref

~1

With Vref0 ~ 0.65, S = 0.04Vdd

Vref

Bias Circuits involving Diodes

Significant Power Supply Rejection (high PSRR)

GND

Vout

R

Vdd

GND

R1

R2

Allows wider variation of output voltage

Breakdown Diode Reference

Breakdown Diode Reference

Breakdown Diode Reference

Big Issue: Very noisy output voltage

SVREFVDD

VREF

VDD

VDD

VREF

vref

vdd

VDD

VBV

rZ

rZ R

VDD

VBV

Bootstrapped Reference

GND

Vout1

Vdd Vdd

M3

M4

GND

Vout2

M2

M1

Iref

AI = (W/L)1 / (W/L)2

R

Bootstrapped Reference

GND

Vout1

Vdd Vdd

M3

M4

GND

Vout2

M2

M1

Iref

AI = (W/L)1 / (W/L)2

VR

Bootstrapped Reference

GND

Vout1

Vdd Vdd

M3

M4

GND

Vout2

M2

M1

Iref

AI = (W/L)1 / (W/L)2

In subthreshold (or BJTs): V = UT ln(AI) = Iref R

Iref = UT ln(AI) / R V

R

Bootstrapped Reference

GND

Vout1

Vdd Vdd

M3

M4

GND

Vout2

M2

M1

Vdd

Iref

Iref

GND

Iref

AI = (W/L)1 / (W/L)2

In subthreshold (or BJTs): V = UT ln(AI) = Iref R

Iref = UT ln(AI) / R V

R

Bootstrapped Reference

Bootstrapped Reference

Bootstrapped Reference

Startup Circuit

Bootstrapped Reference

Bootstrapped Reference

Bootstrapped Reference

Startup Circuit