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Digital design lect 18 19
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Finite State MachinesFinite State MachinesFinite State MachinesFinite State Machines
ASIC DESIGN USING FPGA
BEIT VII
KICSIT
Lecture 18-19
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Two Types of Logic CircuitsTwo Types of Logic Circuits
Lecture 18-19
Lecture 18-19 3
State MachineState Machine
• Any device that stores the status of something at a given time.
• Can operate on input to change the status and/or cause an action or output to take place for any given change.
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State MachineState Machine
• A Finite State Machine (FSM) is one that has a limited or finite number of possible states.
• There are a number of ways to show state machines, from simple tables through graphically animated illustrations.
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State MachineState Machine
• A computer is basically a state machine.
• Machine instruction is input that changes one or more states and may cause other actions to take place.
• The read-only memory from which a program is loaded stores a state.
• The boot program itself is an initial state.
• The application result is the output.
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States and State VariablesStates and State Variables
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Basic Sequential ElementsBasic Sequential Elements
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Simultaneous Input ChangesSimultaneous Input Changes
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Setup and Hold TimeSetup and Hold Time
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Mealy State MachineMealy State Machine
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• A Mealy state Machine’s output depends on both the state variables and the current input.
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Moore State MachineMoore State Machine
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• A Moore state Machine’s output depends only on the state variables.
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Mealy vs. MooreMealy vs. Moore
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State Machine Design ProcessState Machine Design Process
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Example of a State MachineExample of a State Machine
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Machine States (Moore FSM)Machine States (Moore FSM)
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States Diagram (Moore FSM)States Diagram (Moore FSM)
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States Table (Moore FSM)States Table (Moore FSM)
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Machine States (Mealy FSM)Machine States (Mealy FSM)
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States Diagram (Mealy FSM)States Diagram (Mealy FSM)
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States Table (Mealy FSM)States Table (Mealy FSM)
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