© 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.Brey: The Intel Microprocessors, 7e Chapter 15 Bus Interface Barry B. Brey

© 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.Brey: The Intel Microprocessors, 7e

Chapter 15

Bus InterfaceBarry B. Brey

[email protected]


ISA Bus

• The Industry Standard Architecture (ISA) bus was the first I/O bus found on the original PC. This bus operated at 8 MHz and was 8-bits wide. Through enhancement it was increased to a 16-bit bus.

• Although seldom found in personal computers, it is still found in industrial applications and probably will remain in them for years to come.





S2 S1 U3 U4 U5 U6

On On 0300H 0301H 0302H 0303H

On Off 0304H 0305H 0306H 0307H

Off On 0308H 0309H 030AH 030BH

Off Off 030CH 030DH 030EH 030FH


library ieee;use ieee.std_logic_1164.all;entity DECODER_15_3 isport (

IOW, A14, A13, A12, A11, A10, A9, A8, A7, A6A5, A4, A3, A2, A1, A0, S1, S2: in STD_LOGIC;

U3, U4, U5, U6: out STD_LOGIC);end;architecture V1 of DECODER_15_3 isbegin

U3 <= IOW or A14 or A13 or A12 or A11 or A10 or not A9 or not A8 or A7 or A6 or A5 or A4 or A1 or A0 or (S2 or S1 or A3 or A2) and (S2 or not S1 or A3 or not A2) and (not S2 or S1 or not A3 or A2) and (not S2 or not S1 or not A3 or not A2);

U4 <= IOW or A14 or A13 or A12 or A11 or A10 or not A9 or not A8 or A7 or A6 or A5 or A4 or A1 or not A0 or (S2 or S1 or A3 or A2) and (S2 or not S1 or A3 or not A2) and (not S2 or S1 or not A3 or A2) and (not S2 or not S1 or not A3 or not A2);

U5 <= IOW or A14 or A13 or A12 or A11 or A10 or not A9 or not A8 or A7 or A6 or A5 or A4 or not A1 or A0 or (S2 or S1 or A3 or A2) and (S2 or not S1 or A3 or not A2) and (not S2 or S1 or not A3 or A2) and (not S2 or not S1 or not A3 or not A2);

U6 <= IOW or A14 or A13 or A12 or A11 or A10 or not A9 or not A8 or A7 or A6 or A5 or A4 or not A1 or not A0 or (S2 or S1 or A3 or A2) and (S2 or not S1 or A3 or not A2) and (not S2 or S1 or not A3 orA2) and (not S2 or not S1 or not A3 or not A2);

end V1;


void OutPort(int address, int data){

_asm{

mov edx,addressmov eax,datamov ecx,4

OutPort1:out dx,al ;output 8-bitsshr eax,8 ;get next 8-bit sectioninc dx ;address next portloop OutPort1 ;repeat 4 times

}}


void OutPrt(int address, int data){

for ( int a = address; a < address + 4; a++ ){

_asm{

mov edx,amov eax,dataout dx,al

}data >>= 8; //get next 8-bit section

}}



library ieee;use ieee.std_logic_1164.all;entity DECODER_15_4 isport (

IOW, IOR, A9, A8, A7, A6 A5, A4, A3, A2, A1, A0: in STD_LOGIC;A, B, C, D, E, F: out STD_LOGIC

);end;architecture V1 of DECODER_15_4 isbegin

A <= not A9 or not A8 or A7 or A6 or A5 or A4 or A3 or A2 or A1 or A0 or IOR; B <= not A9 or not A8 or A7 or A6 or A5 or A4 or A3 or A2 or A1 or A0 or IOW;C <= not A9 or not A8 or A7 or A6 or A5 or A4 or A3 or A2 or A1 or not A0 or IOR;D <= not A9 or not A8 or A7 or A6 or A5 or A4 or A3 or A2 or not A1 or not A0 or IOR;E <= not A9 or not A8 or A7 or A6 or A5 or A4 or A3 or A2 or not A1 or A0 or IOR;F <= not A9 or not A8 or A7 or A6 or A5 or A4 or A3 or A2 or not A1 or A0 or IOW;

end V1;


Device Port

Start ADC (U3) 0300H

Read ADC (U3) 0300H

Read INTR (U3) 0301H

Start ADC (U4) 0302H

Read SDC (U4) 0302H

Read INTR (U4) 0303H


char ADC(int address){

char temp = 1;if ( address )

address = 2;address += 0x300;_asm{ ;start converter

mov edx,addressout dx,al

}while ( temp ) //wait if busy{

_asm{

mov edx,addressinc edxin al,dxmov temp,aland al,1

}}_asm{ ;get data

mov edx,addressin al,dxmov temp,al

}return temp;

}









The Parallel Port

• The parallel port is a legacy device that was at one time used to send data to printers. Most printers today are USB devices because of the reduced cost of the cable.

• Parallel can sustain data rates that approach 500 MBps.




MOV AL,20HMOV DX,37AHOUT DX,AL

MOV DX,378HIN AL,DX

MOV DX,378HMOV AL,WRITE_DATAOUT DX,AL


Serial Data

• The COM ports on a PC are used for serial data communications.

• There are up to 8 of them available, but most modern systems use only one called COM1. Some systems also contain a second COM2 port.


bool WriteComPort(CString PortSpecifier, CString data){

DCB dcb;DWORD byteswritten;HANDLE hPort = CreateFile(PortSpecifier, GENERIC_WRITE,0,NULL,OPEN_EXISTING,0,NULL);if (!GetCommState(hPort,&dcb)){

return false;}dcb.BaudRate = CBR_9600; //9600 Bauddcb.ByteSize = 8; //8 data bitsdcb.Parity = NOPARITY; //no paritydcb.StopBits = ONESTOPBIT; //1 stopif (!SetCommState(hPort,&dcb))

return false;bool retVal = WriteFile(hPort,data,1,&byteswritten,NULL);CloseHandle(hPort); //close the handlereturn retVal;

}


int ReadByte(CString PortSpecifier){

DCB dcb;int retVal;BYTE Byte;DWORD dwBytesTransferred;DWORD dwCommModemStatus;HANDLE hPort = CreateFile(PortSpecifier, GENERIC_READ,0,NULL,OPEN_EXISTING,0,NULL);if (!GetCommState(hPort,&dcb))

return 0x100;dcb.BaudRate = CBR_9600; //9600 Bauddcb.ByteSize = 8; //8 data bitsdcb.Parity = NOPARITY; //no paritydcb.StopBits = ONESTOPBIT; //1 stopif (!SetCommState(hPort,&dcb))

return 0x100;SetCommMask (hPort, EV_RXCHAR | EV_ERR); //receive character event WaitCommEvent (hPort, &dwCommModemStatus, 0); //wait for characterif (dwCommModemStatus & EV_RXCHAR)

ReadFile (hPort, &Byte, 1, &dwBytesTransferred, 0); //read 1else if (dwCommModemStatus & EV_ERR)

retVal = 0x101;retVal = Byte;CloseHandle(hPort);return retVal;

}


USB

• The universal serial bus (USB) transfers data at rates of between 1Mbps to 480 Mbps depending on the interface standard available.

• The USB bus has become a very common way to interface many I/O device to the personal computer.







PID Name Type Description

E1 OUT Token Host function transaction

D2 ACK Handshake Receiver accepts packet

C3 Data0 Data Data packet (PID even)

A5 SOF Token Start of frame

69 IN Token Function host transaction

5A NAK Handshake Receiver does not accept packet

4B Data1 Data Data packet (PID odd)

3C PRE Special Host preamble

2D Setup Token Setup command

1E Stall Token Stalled


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© 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.Brey: The Intel Microprocessors, 7e Chapter 15 Bus Interface Barry B. Brey