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Introduction toDigital CMOS

Technology

Anurup Mitra

Introduction

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Digital Philosophy

Issues in Digital

ICs

Introduction to Digital CMOS Technology

...Or What We Do with 1s and 0s...

Anurup Mitra

STMicroelectronics Pvt. Ltd.

March 2012
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Technology

Anurup Mitra

Introduction

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ICs

Modern Day Integrated Systems

Why Not Just One?

Why do we not stick to just one - either analog or digital -for all our signal processing needs?
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Anurup Mitra

Introduction

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ICs


Why Not Just One?


Naturally occurring signals are analog - which is why we

need to extensively use A/D and D/A interfaces.
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Technology

Anurup Mitra

Introduction

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Issues in Digital

ICs


Why Not Just One?




Digital circuits are more robust to environmental and devicenoise.
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Technology

Anurup Mitra

Introduction

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Issues in Digital

ICs


Why Not Just One?




Digital circuits are more robust to environmental and devicenoise.

Today 5-10% of all signal processing chip circuitry is analogand the rest is digital. From the 1980s there has been arapid shift of signal processing tasks to digital circuitryrather than analog.
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Technology

Anurup Mitra

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Issues in Digital

ICs

Application of Mixed Signal ICs

Communications
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Anurup Mitra

Introduction

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Issues in Digital

ICs


Communications Wireline
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Anurup Mitra

Introduction

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Issues in Digital

ICs



Telephone (DSL,ISDN)
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Technology

Anurup Mitra

Introduction

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Issues in Digital

ICs



Telephone (DSL,ISDN) Television (TV tuner, cable modem)
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Technology

Anurup Mitra

Introduction

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Issues in Digital

ICs



Telephone (DSL,ISDN) Television (TV tuner, cable modem) Ethernet (Gigabit, 10/100Mbps)


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Technology

Anurup Mitra

Introduction

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Digital Philosophy

Issues in Digital

ICs




Wireless
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Technology

Anurup Mitra

Introduction

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Digital Philosophy

Issues in Digital

ICs




Wireless Cellular Telephony (GSM, CDMA)
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Technology

Anurup Mitra

Introduction

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Digital Philosophy

Issues in Digital

ICs




Wireless Cellular Telephony (GSM, CDMA) WLAN (Bluetooth, UWB, 802.11 a/b/g)
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Technology

Anurup Mitra

Introduction

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Issues in Digital

ICs




Wireless Cellular Telephony (GSM, CDMA) WLAN (Bluetooth, UWB, 802.11 a/b/g) Radio


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Technology

Anurup Mitra

Introduction

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Computing and Control

I d i
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Technology

Anurup Mitra

Introduction

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ICs





Computing and Control Storage (disk drives, digital tape)

I t d ti t


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Technology

Anurup Mitra

Introduction

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Issues in Digital

ICs





Computing and Control Storage (disk drives, digital tape) Imagers and Displays (CMOS, CCDs, TFT, LCD)

Introduction tof S C
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Technology

Anurup Mitra

Introduction

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Issues in Digital

ICs






Instrumentation (Test equipment, sensors)

Introduction toA li i f Mi d Si l IC
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Technology

Anurup Mitra

Introduction

Basic BuildingBlock

PerformanceMetrics

Digital Philosophy

Issues in Digital

ICs




Wireless

Cellular Telephony (GSM, CDMA) WLAN (Bluetooth, UWB, 802.11 a/b/g) Radio


Instrumentation (Test equipment, sensors)

Consumer Electronics (You tell me!)

Introduction toA li i f Mi d Si l IC
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Technology

Anurup Mitra

Introduction

Basic BuildingBlock

PerformanceMetrics

Digital Philosophy

Issues in Digital

ICs




Wireless

Cellular Telephony (GSM, CDMA) WLAN (Bluetooth, UWB, 802.11 a/b/g) Radio

Computing and Control Storage (disk drives, digital tape)

Imagers and Displays (CMOS, CCDs, TFT, LCD) Instrumentation (Test equipment, sensors)

Consumer Electronics (You tell me!)

Introduction toQ i k O i f T d
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Technology

Anurup Mitra

Introduction

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Issues in Digital

ICs

Quick Overview of Trends

Reduced cost is one of the big attractions of integrated

electronics, and the cost advantage continues to increase asthe technology evolves toward the production of larger andlarger circuit functions on a single semiconductor substrate.

Introduction toQ i k O i f T d
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uDigital CMOS

Technology

Anurup Mitra

Introduction

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ICs




For simple circuits, the cost per component is nearlyinversely proportional to the number of components, the

result of the equivalent piece of semiconductor in theequivalent package containing more components.

Introduction toQ ick O e ie of T e ds


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Digital CMOSTechnology

Anurup Mitra

Introduction

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But as components are added, decreased yields more thancompensate for the increased complexity, tending to raisethe cost per component.

Introduction toQuick Overview of Trends


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Anurup Mitra

Introduction

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ICs






But as components are added, decreased yields more thancompensate for the increased complexity, tending to raisethe cost per component.

Thus there is a minimum cost at any given time in theevolution of the technology.

Introduction toMoores Law


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Anurup Mitra

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ICs

Moore s Law

Moores ObservationThe complexity for minimum component costs has increasedat a rate of roughly a factor of two per year. Certainly overthe short term this rate can be expected to continue, if notto increase. Over the longer term, the rate of increase is a

bit more uncertain, although there is no reason to believe itwill not remain nearly constant for at least 10 years. Thatmeans by 1975, the number of components per integratedcircuit for minimum cost will be 65,000.

I believe that such a large circuit can be built on a singlewafer.

There are corollaries to this Observation/Law.

Introduction toD l CMOSBenefits to Digital Technology
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Anurup Mitra

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Benefits to Digital Technology

Enhanced functionality and flexibility

Introduction toDi i l CMOSBenefits to Digital Technology
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Anurup Mitra

Introduction

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Issues in Digital

ICs



Automated design and test possible

Introduction toDi it l CMOSBenefits to Digital Technology


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Anurup Mitra

Introduction

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Issues in Digital

ICs




Arbitrary precision possible (at least in theory)

Introduction toDigital CMOSBenefits to Digital Technology


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Anurup Mitra

Introduction

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PerformanceMetrics

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Issues in Digital

ICs




Arbitrary precision possible (at least in theory)

Provides inexpensive storage capability

Introduction toDigital CMOSDual Power Supplies for Analog and Digital


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Anurup Mitra

Introduction

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Issues in Digital

ICs

Dual Power Supplies for Analog and Digital

Due to conflicting needs for analog and digital circuits,today a separate power supply is used for the analog anddigital blocks on a mixed signal chip.

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Anurup Mitra

Introduction

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Issues in Digital

ICs



In the O-Lab we have design kits from both TSMC and

UMC for 180nm.



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Anurup Mitra

Introduction

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Issues in Digital

ICs



In the O-Lab we have design kits from both TSMC and

UMC for 180nm.

These have separate transistors for analog and digitalfunctions. The analog transistors are operated from a supplyvoltage of 2.5V and have a minimum feature size of 0.25

m, while the digital devices are operated at 1.8V and havea minimum feature size of 0.18 m.

Introduction toDigital CMOSITRS


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gTechnology

Anurup Mitra

Introduction

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Issues in Digital

ICs

ITRS is the International Technology Roadmap forSemiconductors. The organisation is responsible for layingout milestones for the entire semiconductor industry.

Introduction toDigital CMOSITRS
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Technology

Anurup Mitra

Introduction

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Issues in DigitalICs

ITRS is the International Technology Roadmap forSemiconductors. The organisation is responsible for layingout milestones for the entire semiconductor industry.

Year of Production 2005 2006 2007 2008 2009 2010 2011 2012 2013Digital

Supply voltage (V) 1.2 1.2 1.2 1.2 1.1 1.1 1.1 1 1Tox (nm) 2.2 2.1 2.0 1.9 1.6 1.5 1.4 1.4 1.3

Gate Length (nm) 75 65 53 45 37 32 28 25 22gm/gds at 5Lmindigital 47 40 32 30 30 30 30 30 30

Peak Ft (GHz) 120 140 170 200 240 280 320 360 400Analog

Supply voltage (V) 2.5 2.5 2.5 2.5 2.5 1.8 1.8 1.8 1.8Tox (nm) 5 5 5 5 5 3 3 3 3

Gate Length (nm) 250 250 250 250 250 180 180 180 180gm/gds at 10Lmindigital 220 220 220 220 220 160 160 160 160

Peak Ft (GHz) 40 40 40 40 40 50 50 50 50

Introduction toDigital CMOSSemiconductor Rankings for 2011


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Anurup Mitra

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g

Introduction toDigital CMOSWhy Digital?
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Anurup Mitra

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y g

It has been often stated that digital circuits are used over

analog ones because of their noise margin.


T h lWhy Digital?
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Anurup Mitra

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analog ones because of their noise margin.The noise margin of digital circuits is something that isinherent in their construction and functionality. While analogdesigners take great pains to lower the noise present in their

circuits, digital designers choose a circuit methodologywhere their is no noise!


T h lWhy Digital?


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Technology

Anurup Mitra

Introduction

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analog ones because of their noise margin.The noise margin of digital circuits is something that isinherent in their construction and functionality. While analogdesigners take great pains to lower the noise present in their

circuits, digital designers choose a circuit methodologywhere their is no noise!

Digital electronics works at a level of abstraction muchabove voltages and currents. It collapses the values that canbe taken by a variable to 2 - namely 1 and 0. In laymans

language, it can be said, that digital is bothered aboutwhether a certain parameter is present or absent - and notabout how much is present or absent.


TechnologyThe Digital Abstraction


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Technology

Anurup Mitra

Introduction

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Digital Philosophy


Electronics has always sought to process or transmitinformation.


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Anurup Mitra

Introduction

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Scheme 1 To transmit information, a given voltage issplit up into equal divisions, each onesignifying a particular code. For example tocode the English alphabet, there need to be 26equal divisions for a given voltage.




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Anurup Mitra

Introduction

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Digital Philosophy



Scheme 1 To transmit information, a given voltage issplit up into equal divisions, each onesignifying a particular code. For example tocode the English alphabet, there need to be 26equal divisions for a given voltage. Any

amount of intrinsic or external noise canchange the coded representation.




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Anurup Mitra

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Scheme 2 In transmitting information at each point intime, only one of two codes can be valid - 1 or0 - also called bits. The English alphabet canbe represented by having a sequence of 5 bitsfor each letter.




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gy

Anurup Mitra

Introduction

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Scheme 2 In transmitting information at each point intime, only one of two codes can be valid - 1 or0 - also called bits. The English alphabet canbe represented by having a sequence of 5 bitsfor each letter. The time and/or hardwareincreases, but the coding is more robustagainst noise.



El i h l h i
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Anurup Mitra

Introduction

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Scheme 2 In transmitting information at each point intime, only one of two codes can be valid - 1 or0 - also called bits. The English alphabet canbe represented by having a sequence of 5 bitsfor each letter. The time and/or hardwareincreases, but the coding is more robustagainst noise.

Scheme 2 is the digital abstraction.


TechnologyGenerating 1s and 0s


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Anurup Mitra

Introduction

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Digital Philosophy


The first requirement of digital electronics is a circuit that is

capable of generating only two output levels - 1 and 0.


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Anurup Mitra

Introduction

Basic BuildingBlock

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Digital Philosophy



capable of generating only two output levels - 1 and 0.Because, in real life we do not have a 1 and a 0, we seekthe digital abstraction from real life parameters by settingthe maximum voltage available in a circuit to 1 and theminimum to 0.




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Anurup Mitra

Introduction

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Digital Philosophy




Therefore, to represent these output levels, there needs to bea circuit which can at any time, connect to either VDD orground.




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Anurup Mitra

Introduction

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Therefore, to represent these output levels, there needs to bea circuit which can at any time, connect to either VDD orground. A simple implementation would be to have afloating node that could be connected by an (electrically

controlled) switch to either supply or ground.


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Anurup Mitra

Introduction

Basic BuildingBlock

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Therefore, to represent these output levels, there needs to bea circuit which can at any time, connect to either VDD orground. A simple implementation would be to have afloating node that could be connected by an (electrically

controlled) switch to either supply or ground.In IC technology, an electrically operated switch is easilyobtained by an MOS transistor.


TechnologyDetecting 1s and 0s


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Anurup Mitra

Introduction

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Detecting a 1 and a 0 implies having an output from a

system that can respond to these two stiumli.


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Anurup Mitra

Introduction

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Digital Philosophy




The inputs and outputs can be mapped in two unique ways:

Buffer 0 0; 1 1




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Anurup Mitra

Introduction

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Buffer 0 0; 1 1

Inverter 0 1; 1 0




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Anurup Mitra

Introduction

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Buffer 0 0; 1 1

Inverter 0 1; 1 0

The second option is easier to implement with electronics.




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Anurup Mitra

Introduction

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Digital Philosophy





Buffer 0 0; 1 1

Inverter 0 1; 1 0

The second option is easier to implement with electronics.

An inverter is used as a basic building block of all digitalcircuits because of its innate ability to both detect andgenerate a 1 and a 0 successfully.


TechnologyThe CMOS Digital Inverter


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Anurup Mitra

Introduction

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The MOSFETs act as electrically (voltage) controlledswitches. Two of the reasons CMOS technology caught thedigital designers fancy were the MOSFETs extremely highresistance in the OFF state and its extremely low resistancein the ON.


Technology

A Mi

The CMOS Digital Inverter
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Anurup Mitra

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The MOSFETs act as electrically (voltage) controlledswitches. Two of the reasons CMOS technology caught thedigital designers fancy were the MOSFETs extremely highresistance in the OFF state and its extremely low resistancein the ON.

By employing one nMOS and one pMOS switch, the state ofthe two switches is always complementary - hence the name

CMOS digital electronics.


Technology

A Mit

Digital Performance Measures


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Anurup Mitra

Introduction

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Unlike analog circuits, digital circuits are quantified bylargely two performance measures - speed and power.These two directly trade off with each other.


Technology

Anurup Mitra

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Anurup Mitra

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An inverter works by charging a node to a 1 or by

discharging it to a 0. Since all nodes in an MOS circuit arecapacitive in nature, the charging or discharging is madefaster by using a higher current, thus providing a greaterspeed of operation.


Technology

Anurup Mitra



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Anurup Mitra

Introduction

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An inverter works by charging a node to a 1 or by

discharging it to a 0. Since all nodes in an MOS circuit arecapacitive in nature, the charging or discharging is madefaster by using a higher current, thus providing a greaterspeed of operation.

However, the higher current also implies a greater power

dissipation.


Technology

Anurup Mitra

The Truth About Digital


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Anurup Mitra

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It can be safely said that all of digital electronics containsthe gainful employment of inverters of various shapes andsizes cascaded in a fashion to provide a meaningful output toa given set of inputs.


Technology

Anurup Mitra

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Anurup Mitra

Introduction

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It can be safely said that all of digital electronics containsthe gainful employment of inverters of various shapes and

sizes cascaded in a fashion to provide a meaningful output toa given set of inputs.

A given stage of a digital circuit, no matter how seeminglycomplex can be simplified to an equivalent inverter.


Technology

Anurup Mitra



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Introduction

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Therefore, if the static characteristics of a digital invertercan be studied, the static characteristics of any equivalentinverter can be known. The static characteristics of aninverter is the steady state response of an inverter - this isusually just the transfer function of the same.


Technology

Anurup Mitra



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Introduction

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Therefore, if the static characteristics of a digital invertercan be studied, the static characteristics of any equivalentinverter can be known. The static characteristics of aninverter is the steady state response of an inverter - this isusually just the transfer function of the same.

Similarly, the dynamic characteristics of the digital inverter -the behaviour of the inverter in time, i.e., how fast it reachessteady state - should be comprehended.


Technology

Anurup Mitra

Abstraction


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Digital circuits employ the concept of abstraction. This

implies that a circuit is split up into a hierarchy and eachlevel of the hierarchy constitute one abstraction. Forexample at the lowest level there is the inverter, then logicgates, followed by functional blocks and so on.


Technology

Anurup Mitra

Abstraction
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The performance of each level in terms of speed and powercan be characterised and used in the next higher level ofhierarchy.


Technology

Anurup Mitra

Abstraction


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This abstraction also allows the use of design automation.

CAD or EDA tools can take in as input the design specs ofthe top level of the hierarchy and produce as output, GDS IIformat - ready for tape-out.


Technology

Anurup Mitra

Abstraction


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Introduction

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This abstraction also allows the use of design automation.

CAD or EDA tools can take in as input the design specs ofthe top level of the hierarchy and produce as output, GDS IIformat - ready for tape-out. This is known as synthesis.


Technology

Anurup Mitra

CAD Tools

As has been mentioned earlier CAD tools play an


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p yindispensable part in the manufacture of digital ICs.Todays digital ICs pack so much functionality into a smallarea, the number of transistors required for implementationcannot be hand placed and routed.


Technology

Anurup Mitra

CAD Tools



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p yindispensable part in the manufacture of digital ICs.Todays digital ICs pack so much functionality into a smallarea, the number of transistors required for implementationcannot be hand placed and routed.

A digital synthesis tool takes a top level description andseeks to create the actual circuit by looking up a

pre-manufactured library. From the library it selectscharacterised components in a manner such that the toplevel design specs can be met.


Technology

Anurup Mitra

CAD Tools

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Introduction

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indispensable part in the manufacture of digital ICs.Todays digital ICs pack so much functionality into a smallarea, the number of transistors required for implementationcannot be hand placed and routed.

A digital synthesis tool takes a top level description andseeks to create the actual circuit by looking up a

pre-manufactured library. From the library it selectscharacterised components in a manner such that the toplevel design specs can be met.

There are many variations on this theme. The standard celland the FPGA are the most widely used. While a standardcell library contains different versions of each functionalblock on software, the FPGA has pre-fabricated functionalblocks the interconnections between which can be(re)programmed.


Technology

Anurup Mitra

Interconnect and Power Issues


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While the abstraction works well for digital circuits, inmodern day deep-submicron design interconnect issues oftentend to break this down.


Technology

Anurup Mitra

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While digital ciruits tend to be characterised and used byCAD tools in terms of their intrinsic delays (i.e. the delaysincurred in charging/discharging an output to 1/0 as a

response to an input), the interconnects themselvescontribute parasitic capacitances and resistances thatincrease the overall delay of the system.


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Anurup Mitra



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While digital ciruits tend to be characterised and used byCAD tools in terms of their intrinsic delays (i.e. the delaysincurred in charging/discharging an output to 1/0 as a

response to an input), the interconnects themselvescontribute parasitic capacitances and resistances thatincrease the overall delay of the system.

As aggressive scaling continues, the power issue has limited

integration with each passing digital generation. There is alimit to the amount of localised heat generation that can behandled by a packaged integrated circuit.


Technology

Anurup Mitra

Timing and Synchronisation Issues

The most widely permeated digital circuit is the


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The most widely permeated digital circuit is themicroprocessor. Most of the components of the

microprocessor are synchronised to operate on a rising or afalling clock edge.


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Anurup Mitra


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The main clock is derived from a crystal oscillator by a PLL.This clock needs to be distributed to all parts of the chip forproper synchronisation of all functional blocks.


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Anurup Mitra




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The main clock is derived from a crystal oscillator by a PLL.This clock needs to be distributed to all parts of the chip forproper synchronisation of all functional blocks.

However, the clock signal experiences different delays as ittravels to different parts of the chip. This gives rise to clockskews and possible race conditions.


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Anurup Mitra




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The main clock is derived from a crystal oscillator by a PLL.This clock needs to be distributed to all parts of the chip for

proper synchronisation of all functional blocks.

However, the clock signal experiences different delays as ittravels to different parts of the chip. This gives rise to clockskews and possible race conditions.

Clock distribution trees, which symmetrically distribute theclock to various parts of the chip need to be employed.

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