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TE 242: Digital Electronics for Engineers I – 2.0 unitsCourse Description

The objective of the course is to build the students with the basic tools used in designingand analysing basic digital circuits. The course also introduces the concept of Finite StateMachine ( FSM) and CAD of digital circuits.

Objectives1. To enable students understand the binary and hexadecimal numbering systems.

2. To enable students be able to design combinational logic systems using basic logic gates.3. To enable students be able to optimize logic designs using Boolean algebra and Karnaughmaps

4. To enable students be able to design simple sequential circuits5. To introduce the concept of Finite State Machine (FSM) and CAD of digital circuits

____________________ COURSE CONTENTS __________________

Introduction to digital technology and digital electronics: digital vs analog world,digital systems

Number systems : numerical representations, different bases (binary, octal,hexadecimal, BCD), conversion between the different bases.

Basic logic gates and Boolean algebra : Boolean constants and variable, OR operation,AND operation, NOT operation, NOR operation, NAND operation, truth tables, basic logicgates, Boolean algebra postulates and theorems, DeMorgan’s theorem, Booleanexpression from simple combinational logic circuits, EX-OR gate, EX-NOR gate.

Design of combinational logic circuits : definition, SoP and PoS representation,canonical maxiterm/minterm expressions, algebraic simplification of logic circuits,Karnaugh method, don’t cares, decoders, encoders, multiplexers.

Sequential logic circuits : definition, Flip-flops, NAND latch, NOR latch, clock signal andclocked flip-flops, SR-FF, JK-FF, D-FF, synchronous inputs, asynchronous inputs,master/slave FF, flip-flop applications, asynchronous and synchronous counters,

Concept of finite state machine (FSM)

CAD of digital circuits.

Recommended References/Textbooks1. Ronald J. Tocci, “Digital Systems: Principles and Applications, “Prentice-Hall, 5 th Ed. 1991.

2. Alan C. Dixon and James L. Antonakos, “Practical Approach to Digital Electronics, Prentice Hall, 1999.3. Nigel P. Cook, “Introductory Digital Electronics, “Prentice Hall, 19974. Myke Predko, “Digital Electronics Demystified”, McGraw Hill, 20045 Dale R. Patrick, Stephen W. Fardo and Vigyan Chandra, “Electronic Digital System Fundamentals”,

Fairmont Press, 2007.6 V.M. Rao and P.K. Srivastava, “Fundamentals of Digital Electronics and its Applications”, BPB

Publications, 20067 Nigel P. Cook, “A First Course in Digital Electronics”, Prentice Hall, 1998.

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TE 242: Digital Electronics for Engineers I – 2.0 unitsSemester 2 – 2010/2011

____________________ TENTATIVE COURSE SCHEDULE __________________

Session

Topics Remarks

01 Introduction to digital technology and digital electronics: digital vs. analog world,

digital systems02 Number systems: numerical representations, different bases (binary, octal, hexadecimal,

BCD), conversion between the different bases

03Basic logic gates and Boolean algebra : Boolean constants and variable, OR operation,AND operation, NOT operation, NOR operation, NAND operation, truth tables, basiclogic gates, Boolean algebra postulates and theorems, DeMorgan’s theorem, Booleanexpression from simple combinational logic circuits, EX-OR gate, EX-NOR gate

04Basic logic gates and Boolean algebra : Boolean constants and variable, OR operation,AND operation, NOT operation, NOR operation, NAND operation, truth tables, basiclogic gates, Boolean algebra postulates and theorems, DeMorgan’s theorem, Booleanexpression from simple combinational logic circuits, EX-OR gate, EX-NOR gate

04.5 Quiz (Saturday, May 21 st – 08:30~09:30) 5%

05Design of combinational logic circuits: definition, SoP and PoS representation, canonical

maxiterm/minterm expressions, algebraic simplification of logic circuits, Karnaughmethod, don’t cares, decoders, encoders, multiplexers

06Design of combinational logic circuits: definition, SoP and PoS representation, canonicalmaxiterm/minterm expressions, algebraic simplification of logic circuits, Karnaughmethod, don’t cares, decoders, encoders, multiplexers

06.5 Quiz (Saturday, June 11 th – 08:00~09:30) 5%

07 Sequential logic circuits : definition, Flip-flops, NAND latch, NOR latch, clock signal andclocked flip-flops, SR-FF, JK-FF, D-FF, synchronous inputs, asynchronous inputs,master/slave FF, flip-flop applications, asynchronous and synchronous counters

08Sequential logic circuits : definition, Flip-flops, NAND latch, NOR latch, clock signal andclocked flip-flops, SR-FF, JK-FF, D-FF, synchronous inputs, asynchronous inputs,master/slave FF, flip-flop applications, asynchronous and synchronous counters

09 Concept of finite state machine (FSM)

10 CAD of digital circuits10.5 Test (Saturday, June 25 th – 08:00~10:00) 20%

Assessment: CA (40%) - Test (20%) + 3 Quizzes (5% each) + Homeworks/Presentations/Projects/Viva voce (5%)UE (60%) – End of the semester – strictly covering the whole syllabus and all the lectures

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