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CPU SPECIFIC ARCHITECTURE SETTINGS Unit 02.2 V 21.2

02.2 iSYSTEM winIDEA CPU Specific Architecture Settings

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Page 1: 02.2 iSYSTEM winIDEA CPU Specific Architecture Settings

CPU SPECIFIC ARCHITECTURE SETTINGS

Unit 02.2

V 21.2

Page 2: 02.2 iSYSTEM winIDEA CPU Specific Architecture Settings

CPU Specific Architecture Settings

Contents

01 CPU Architectures 3

02 ARM Cortex 4

03 Infineon TriCore 5

04 NXP/ST Power Architecture 7

05 Renesas RH850 9

06 CPU Reset 10

Configure minimum CPU settings and execute CPU Reset.

Page 3: 02.2 iSYSTEM winIDEA CPU Specific Architecture Settings

CPU Architectures01

This tutorial explains minimum architecture specific settings required to connect iSYSTEM BlueBox to the target microcontroller or SoC.

Make sure your workspace is configured and the correct SoC Device selected in Debug menu / Configure Session / SoCs.

You can follow:

• First steps with winIDEA Examples or• Configure a New Workspace

After completing this unit, you should be able to perform the CPU Reset Debug command, which establishes initial debug connection and gains a control over the target microcontroller.

Introduction to BlueBox and winIDEA / Unit 02.2 / Chapter 01 / CPU Architectures 3

ARM Cortex Infineon TriCore NXP/STPower Architecture Renesas RH850

For more information about workspace configuration refer to winIDEA Help.

Page 4: 02.2 iSYSTEM winIDEA CPU Specific Architecture Settings

ARM Cortex02ARM Cortex devices can feature multiple debug interfaces, SWD and JTAG being most common. In general the SWD debug interface is the preferred choice since it uses less physical pins and has higher data bandwidth.

1. Identify which debug interface provides the target debug connector on his target board:i. Open CPU Options / SoC page.ii. Select JTAG or SWD under the Debug

Protocol.

Default SWD clock setting should work in most cases.

2. If JTAG Debug Protocol is selected, the JTAG Scan speed is set in the JTAG page, which is visible only when the JTAG debug protocol is selected and confirmed.

Minimum BlueBox setup is now completed. Continue to Debug Reset Chapter.

Introduction to BlueBox and winIDEA / Unit 02.2 / Chapter 02 / ARM Cortex 4

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JTAG Scan speed – 1000 kHz (default) should work in most cases. However, if the debug connection cannot be established with the target microcontroller or the debug session behaves unreliably, try frequencies in the range from 1 to 5 MHz. A value in kHz can be manually typed in. If it still doesn’t work, go further below 1MHz until you find a working setting.

Page 5: 02.2 iSYSTEM winIDEA CPU Specific Architecture Settings

Infineon TriCore 1/203TriCore devices can feature either the DAP or the JTAG debug interface or both.

In general the DAP debug interface is the preferred choice since it uses less physical pins and has higher data bandwidth. Depending on the device, the DAP debug interface can have two modes:• DAP Standard uses one clock (DAP0) and one

bidirectional data (DAP1) line• DAP Wide uses one clock (DAP0) and two

bidirectional data (DAP1 and DAP2) lines

1. Define which debug interface provides the target debug connector on the target board:i. Open CPU Options / SoC pageii. Select JTAG, DAP Standard or DAP Wide

Default DAP Clock setting should work in most cases.

2. If JTAG debug protocol is selected, the JTAG scan speed is set in the JTAG page, which is visible only when the JTAG debug protocol is selected and confirmed.

Introduction to BlueBox and winIDEA / Unit 02.2 / Chapter 03 / Infineon TriCore 5

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JTAG Scan speed – 1000 kHz (default) should work in most cases. However, if the debug connection can’t be established with the target or the debug session operates unreliably, try frequencies in the range from 1 to 5 MHz. Wanted value in kHz can be manually typed in. If it still doesn’t work, go further below 1MHz until you find a working setting.

Page 6: 02.2 iSYSTEM winIDEA CPU Specific Architecture Settings

Infineon TriCore 2/203

Some TriCore devices provide a 256-bit password preventing an unauthorized access to the TriCore on-chip debugging resources through the debug interface:

1. Open Hardware menu / CPU Options / SoC page.

2. Check option Use Password and enter the password.

Use this debug interface protection withcaution since the device can become permanently inaccessible due to user's mistake.

Minimum BlueBox setup is now completed. Continue to Debug Reset Chapter.

Introduction to BlueBox and winIDEA / Unit 02.2 / Chapter 03 / Infineon TriCore 6

Page 7: 02.2 iSYSTEM winIDEA CPU Specific Architecture Settings

NXP/ST Power Architecture 1/204

Power Architecture devices feature one debug interface which is the JTAG.

JTAG Scan speedScan speed 1000 kHz is the default setting and should work in most cases.

However, if the debug connection cannot be established with the target microcontroller or the debug session behaves unreliably, try frequencies in the range from 1 to 5 MHz. A value in kHz can be manually typed in. If it still doesn’t work, go further below 1MHz until you find a working setting.

Introduction to BlueBox and winIDEA / Unit 02.2 / Chapter 04 / NXP/ST Power Architecture 7

Page 8: 02.2 iSYSTEM winIDEA CPU Specific Architecture Settings

NXP/ST Power Architecture 2/204

Some Power Architecture devices provide a 64-bit or a 256-bit password preventing an unauthorized access to the Power Architecture on-chip debugging resources through the debug interface.

New devices can come protected already and unprotected can be protected later by the user.

Matching Password must be entered in the Hardware menu/CPU Options/SoC tabto connect to such protected target device.

Use this debug interface protection withcaution since the device can become permanently inaccessible due to user's mistake.

Minimum BlueBox setup is now completed. Continue to the Debug Reset Chapter.

Introduction to BlueBox and winIDEA / Unit 02.2 / Chapter 04 / NXP/ST Power Architecture 8

Page 9: 02.2 iSYSTEM winIDEA CPU Specific Architecture Settings

Renesas RH85005

1. LPD clockRH850 devices feature one debug interface which is the LPD.

If the default LPD clock setting doesn’t work, it is recommended to lower the LPD clock below 4MHz under the Hardware menu/CPU Options/SoC tab. A value in kHz can be manually typed in.

2. Security ID codeRH850 devices usually provide 128 or 256-bit Security ID code preventing an unauthorized access to the RH850 on-chip debugging resources through the debug interface.

Matching Security ID code must be entered in the Hardware menu/CPU Options/SoC tabto connect to the target device. A blank RH850 device out of the production comes with all bytes 0xFF in the Security ID code area. Use this debug interface protection withcaution since the device can become permanently inaccessible due to user's mistake.

Minimum BlueBox setup is now completed.Introduction to BlueBox and winIDEA / Unit 02.2 / Chapter 05 / Renesas RH850 9

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CPU Reset 1/206

Establishing the debug session with the embedded target for the first time, start with carrying out the CPU Reset debug command. With this command, the CPU should enter the debug mode and application stop running.

1. CPU Reset: • From the Debug toolbar select the

Reset button or• Select CPU Reset from Debug

menu/Run Control or• Use SHIFT+F5 shortcut

2. Debug session initialization details and status can be observed in the Progresswindow.

Introduction to BlueBox and winIDEA / Unit 02.2 / Chapter 06 / CPU Reset 10

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If the Build Manager window pops-up, asking to build the project, click No, unless you would like to use your own applicationand your code is not built yet.

Page 11: 02.2 iSYSTEM winIDEA CPU Specific Architecture Settings

CPU Reset 2/206

winIDEA shows green STOP status in the bottom right corner when BlueBox is successfully connected to the target device.

To execute Download debug command and start using Debug windows with your next step is the Debug Control unit.

Introduction to BlueBox and winIDEA / Unit 02.2 / Chapter 06 / CPU Reset 11

If the Build Manager window pops-up, asking to build the project, click No, unless you would like to use your own application and your code is not yet built.