04-68283A Manual Digsy Chapter N Table of Operands

8/11/2019 04-68283A Manual Digsy Chapter N Table of Operands

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Chapter N

Table of Operands

Drawing Number: 04 68 283000/A

Issued: 19.06.02

Stored: 03.04.03

Version: 1.0.0

File name: 04-68283 Manual digsyCha ter N Table of O erands.doc

Prepared by: Ralf Neuber

This manual was prepared with great care. The details and data in this document are regularly checked and updated andare at any time subject to change without notice. Nevertheless, INTER CONTROL does not assume liability for thecorrectness of the details/data in this document, since, despite great effort, mistakes cannot always be completely ruled out.In addition, INTER CONTROL reserves the right to make at any time technical changes to the product, which can also resultin deviations from the contents of this document.The document includes information that enjoys protection of copyright. No part of this publication may be reproduced and/ortranslated into other languages without the prior written permission of INTER CONTROL.Of course, any ideas and suggestions regarding amendments, or notes concerning mistakes in this document are welcome.Please refer to INTER CONTROL.

INTER CONTROLHermann Khler Elektrik GmbH & Co. KGSchafhofstrae 30D-90411 NrnbergGermany

Tel.: ++49 911 9522-5Fax: ++49 911 9522-857E-mail: [email protected]: http://www.intercontrol.de
mailto:[email protected]://www.intercontrol.de/http://www.intercontrol.de/mailto:[email protected]


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Table of Contents:

N Table of Operands ...................................................................................................................N-3N.1 Introduction .......................................................................................................................N-3N.2 Overview of the Operand Areas .......................................................................................N-3

N.3 Input Operands of the digsycompactE................................................................................N-4

N.4 Output Operands of the digsycompactE.............................................................................N-8

N.5 System Input Operands of the digsycompactE ................................................................N-12

N.6 System Output Operands of the digsycompactE..............................................................N-15

N.7 Configuration Operands of the digsycompactE ................................................................N-16N.8 Notes...............................................................................................................................N-25


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N TABLE OF OPERANDS

N.1 Introduction

The tables below are listing the inputs or outputs that are assigned to the respective operandsrequired for programming (please refer to the Documentation and Programming system

PROSYD1131 Type 4395.20.100).

NOTE: PROSYD1131 V2.1 SP11 (or versions of a higher level) is to be used at anyrate, if the complete flag area is to be addressed, too !

N.2 Overview of the Operand Areas

The interface between firmware, application program PROSYD1131 and external processes is adata interface consisting of 1024 input bytes (I-area), 1024 output bytes (Q-area) and 2048 flagbytes (M-area).

Since both the firmware and external processes (e.g., CANopen)are accessing these operands,the user should use the predefined operands in the variable control configuration for programming.

Inputs (IX, IB, IW) Outputs (QX, QB, QW) Flags (MX, MB, MW)

Bytes Area (read only) Bytes Area (read write) Bytes Area (read write)0 0 0

191

Inputvariables

191

Outputvariables

192 192

255

SYSIN255

256

511

Configurationfiles

256

511

SYSOUT

512 512

1023

freely usablefor user variables;

e.g.,CANopen

input variables1023

freely usablefor user variables;

e.g.,CANopen-output

variables1023

1024

2047

freely usablefor CANopeninput / outputvariables and

fixly addresseduser data

Figure N.1: Overview of the operand areas


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N.3 Input Operands of the digsycompactE

Input operand as Symbol address acc. to Description on Default

%IW(Word)

%IB(Byte)

%IX(Bit)

Data structureAdjustable control

configuration

CPU

IO

Preset

Digital Inputs (TDIGININ)

0 0In.DigIn.Value[1]

(WORD)ID1 All digital inputs of DcS CPU (ID1.1..ID1.12) X

0.0 ID1_1 Digital input 1 of DcS CPU (ID1.1) X








1 0.8 ID1_9 Digital input 9 of DcS CPU (ID1.9) X




0.12 not used

: :

0.15 not used

1 2In.DigIn.Value[2]

(WORD)ID2 All digital inputs of DcS I/O (ID2.1..ID2.12) X

1.0 ID2_1 Digital input 1 of DcS I/O (ID2.1) X








3 1.8 ID2_9 Digital input 9 of DcS I/O (ID2.9) X


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%IW(Word)

%IB(Byte)

%IX(Bit)


configuration

CPU

IO

Preset

14 28 In.AnIn.RAMPE(WORD)

RAMPE_CPU Test ramp for the Analog inputs of DcS CPU(presently not supported)

X

Counting Inputs (TCOUNTERIN)

15 30In.Cnt.Value[1]

(DINT)IC1_1

Counting input 1 of DcS CPU(ID1.11 as IC1.1)

X


(DINT)IC1_2

Counting input 2 of DcS CPU(ID1.12 as IC1.2)

X


(DINT)IC2_1

Counting input 1 of DcS I/O(ID2.11 as IC2.1)

X


(DINT)IC2_2


X


(DINT)IC3_1


X


(DINT) IC3_2 Counting input 4 of DcS I/O (ID2.10 as IC3.2) X


(DINT)IC4_1 Counting input 5 of DcS I/O(ID2.13 as IC4.1) X


(DINT)IC4_2 Counting input 6 of DcS I/O(ID2.14 as IC4.2) X

31 62In.Cnt.Velocity[1]

(WORD)IC1_1_Velo

Velocity on counting input No. 1 of DcS CPU(IC1.1) [Pulses/time window]

X


(WORD)IC1_2_Velo

Velocity on counting input No. 2 of DcS CPU(IC1.2) [Pulses/time window]

X


(WORD)IC2_1_Velo

Velocity on counting input 1 of DcS I/O(IC2.1) [Pulses/time window]

X


(WORD)IC2_2_Velo

Velocity on counting input 2 of DcS I/O(IC2.2) [Pulses/time window] (In the case of aconfiguration as an AB-counter: 0 = forwardor unchanged (A before B), 1 = backward(B before A))

X


(WORD)IC3_1_Velo

Velocity on counting input 3of DcS I/O (IC3.1)[Pulses/time window]


(WORD)IC3_2_Velo


X


(WORD)IC4_1_Velo

Velocity on counting input 5 of DcS I/O(IC4.1) [Pulses/time window]

X


(WORD)IC4_2_Velo


X

PWM Current Measurement (TPWMIN)

39 78In.PWM.Current

[1] (WORD)IPI1_1

Readback of current on PWM-output 1of DcS CPU (QD1.1) [2mA/Digit]

X

40 80In.PWM.Current

[2] (WORD)IPI1_2


X

41 82In.PWM.Current

[3] (WORD)IPI1_3


X

42 84In.PWM.Current

[4] (WORD)IPI1_4


X

43 86In.PWM.Current

[5] (WORD)IPI1_5


X

44 88In.PWM.Current

[6] (WORD)IPI1_6


X


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%IW(Word)

%IB(Byte)

%IX(Bit)


configuration

CPU

IO

Preset

45 90 In.PWM.Current[7] (WORD)

IPI1_7 Readback of current on PWM-output 7of DcS CPU (QD1.7) [2mA/Digit]

X

46 92In.PWM.Current

[8] (WORD)IPI1_8


X

General Input Variables of the Control Unit (TCOMMONIN)

47 94In.Common.Awp

Cycle (BYTE)I_AWPCycle Duration of the last AWP-cycle [ms] X

95In.Common.Wdg

Reset (BYTE)I_WdgReset

Detection of a Watch-Dog-Reset on the DcSCPU (TRUE -> Watch-Dog-Reset occurred)

X

48 96In.Common.Pwr

Fail (BYTE)I_PwrFail

Detection of an undervoltage VIM on the DcSCPU (TRUE = VIM smaller than 8V in the12V-system or smaller than 16V in the 24V-system)

X

97In.Common.PWR

_VIQ1 (BYTE)I_PWR_VIQ1

Readback of the load supply voltage VIQ1 of

DcS CPUX

49 98 not used

99In.Common.PWR_VIQ2 (BYTE)

I_PWR_VIQ2Digital input for the load supply voltage VIQ2of DcS I/O

X

50 100In.Common.

SRAMchecked(INT)

I_SRAMcheckedNumber of test runs in the SRAM of DcS CPU(-1 stands for error)

X

51 102In.Common.

FWchecked (INT)I_Fwchecked

Number of test runs of the firmware in theflash of DcS CPU (-1 stands for error)

X

52 104In.Common.Nodestate

(BYTE)I_Nodestate

Indicates the NMS-state of the CAN-node(0=Initializing, 1=Disconnected, 2=Connec-ting, 3= Preparing, 4=PREPARED,5=OPERATIONAL, 127=PREOPERA-TIONAL; s. ENUM EnodeState)

X

105 In.Common.AWPchecked(INT)

I_AWPchecked Number of test runs of the AWP(appl. progr.)in the flash of DcS CPU (-1 stands for error)

X

Input Variables of the CAN-Bus on the DcS I/O (TCANIOIN)

53 106In.CAN.Active

(BYTE)CANActive_In

Indication as to whether the communicationpartner is transmitting in the DcS I/O (1 ->cyclic transmission 2 -> WRN(Activation ofthe SHDN) 4 -> BOFF(Activation of SHDN))

X

54 108In.CAN.Data

(BYTE)

Input data from the CAN-Bus of DcS I/O;Permissible data types: TCanIOMobaRx,TCanIOJ1939Rx, TCanIODeutzRx, ,TCanIOMuxRx

XTCanIOMuxRx


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N.4 Output Operands of the digsycompactE


%QW(Word)

%QB(Byte)

%QX(Bit)


configuration

CPU

IO

Preset

Output Variables for the Digital Outputs (TDIGOUTOUT)

0 0Out.DigOut.Value

(WORD)QD

Digital outputs of DcS CPU and I/O(QD1.1..QD1.8 und QD2.1..QD2.8)

X X 2#0

0.0 QD1_1 Digital output 1 of DcS CPU (QD1.1) X 2#0








1 0.8 QD2_1 Digital output 1 of DcS I/O (QD2.1) X 2#0

0.9 QD2_2 Digital output 2 of DcS I/O (QD2.2) X 2#0







Output Variables for the Counting Inputs (TCOUNTEROUT)

1 2Out.Cnt.Time

Wnd[1] (WORD)IC1_1_TimeWnd

Time window of counting input 1

of DcS CPU in [ms]X 2#0

2 4Out.Cnt.Time


Time window of counting input 2of DcS CPU in [ms]

X 2#0

3 6Out.Cnt.Time


Time window of counting input 1of DcS I/O in [ms]

X 2#0

4 8Out.Cnt.Time



X 2#0

5 10Out.Cnt.Time



X 2#0

6 12Out.Cnt.Time



X 2#0

7 14Out.Cnt.Time



X 2#0

8 16Out.Cnt.Time



X 2#0


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%QW(Word)

%QB(Byte)

%QX(Bit)


configuration

CPU

IO

Preset

9 18Out.Cnt.Start

(BYTE)IC_Start

Starting/Stopping the counting on thecounting inputs of DcSs CPU and I/O(IC1.1..IC1.2 and IC2.1..IC4.2 onID1.11..ID1.12 and ID2.9..2.14)

X X 2#0

9.0 IC_1_1_StartStarting the counting on counting input 1of DcS CPU (IC1.1 or ID1.11)

X 2#0

9.1 IC_1_2_StartStarting the counting on counting input 2of DcS CPU (IC1.2 or ID1.12)

X 2#0

9.2 IC_2_1_StartStarting the counting on counting input 1of DcS I/O (IC2.1 or ID2.11)

X 2#0


X 2#0


X 2#0

9.5 IC_3_2_StartStarting the counting on counting input 4

of DcS I/O (IC3.2 or ID2.10)X 2#0


X 2#0


X 2#0

19Out.Cnt.Reset

(BYTE)IC_Reset

Resetting the counter values (with concurrentstopping) on the counting inputs of DcSs CPUand I/O (IC1.1..IC1.2 and IC2.1..IC4.2 onID1.11..ID1.12 and ID2.9..2.14)

X X 2#0

9.8 IC_1_1_ResetResetting the counter values (with concurrentstopping) on the counting input 1of DcS CPU(IC1.1 or ID1.11)

X 2#0

9.9 IC_1_2_ResetResetting the counter values (with concurrentstopping) on the counting input 2 of DcS CPU(IC1.2 or ID1.12)

X 2#0

9.10 IC_2_1_Reset Resetting the counter values (with concurrentstopping) on the counting input 1 of DcS I/O(IC2.1 or ID2.11)

X 2#0

9.11 IC_2_2_ResetResetting the counter values (with concurrentstopping) on the counting input 2 of DcS I/O(IC2.2 or ID2.12)

X 2#0


X 2#0


X 2#0


X 2#0

9.15 IC_4_2_Reset

Resetting the counter values (with concurrent

stopping) on the counting input 6 of DcS I/O(IC4.2 or ID2.14) X 2#0

Analog Outputs (TANOUTOUT)

10 20Out.AnOut.Value

[1] (WORD)QAI1

Output value of Analog output 1 of DcS I/O(QAI1) [Digits] (0 to 500 Digits = 0 to +20mA)

X 2#0


[2] (WORD)QAI2


X 2#0


[3] (WORD)QAI3


X 2#0


[4] (WORD)QAI4


X 2#0

PWM-Outputs (TPWMOUT)


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%QW(Word)

%QB(Byte)

%QX(Bit)


configuration

CPU

IO

Preset

14 28 Out.PWM.Freq[1](WORD)

QP1_Freq Frequency of the PWM-output 1 of DcS CPU(QD1.1) [Hz] Range: 50 to 1200Hz

X 10#400

15 30Out.PWM.Freq[2]

(WORD)QP2_Freq

Frequency of the PWM-output 2 of DcS CPU(QD1.2) [Hz] Range: 50 to 1200Hz

X 10#400


(WORD)QP3_Freq


X 10#400


(WORD)QP4_Freq


X 10#400


(WORD)QP5_8_Freq

Frequency of the PWM-outputs 5..8 of DcSCPU (QD1.5..QD1.8) [Hz] Range: 50 to1200Hz

X 10#400

19 38Out.PWM.Pwidth

[1] (WORD)QP1_PWidth

Pulse width of the PWM-output 1of DcS CPU(QD1.1) [Digits] Range: 0 to 1023 Digits

X 2#0

20 40Out.PWM.Pwidth


Pulse width of the PWM-output 2 of DcS CPU(QD1.2) [Digits] Range: 0 to 1023 Digits

X 2#0

21 42 Out.PWM.Pwidth[3] (WORD)

QP3_PWidth Pulse width of the PWM-output 3 of DcS CPU(QD1.3) [Digits] Range: 0 to 1023 Digits

X 2#0

22 44Out.PWM.Pwidth



X 2#0

23 46Out.PWM.Pwidth



X 2#0

24 48Out.PWM.Pwidth



X 2#0

25 50Out.PWM.Pwidth



X 2#0

26 52Out.PWM.Pwidth



X 2#0

27 54Out.PWM.Pstart

(BYTE)QP_Start

Enabling the PWM-outputs 1 to 8 of DcS CPU(QD1.1 to QD1.8)

X 2#0

27.0 QP1_Start Enabling the PWM-output 1 of DcS CPU(QD1.1) X 2#0

27.1 QP2_StartEnabling the PWM-output 2 of DcS CPU(QD1.2)

X 2#0


X 2#0


X 2#0


X 2#0


X 2#0


X 2#0

27.7 QP8_Start

Enabling the PWM-output 8 of DcS CPU

(QD1.8) X 2#0

55 not used

General Output Variables of the Control Unit (TCOMMONOUT)

28 56Out.Common.Pwr

_Hold (BYTE)Q_Pwr_Hold

Flag for defined switch-off of the control unitfrom the AWP (appl. prog.); shall be set afterswitch-on; in the case of FALSE and switchedoff IPON, the control unit will be switched off(Vcc=0)

X X 2#0

57Out.Common.VQSW1_OFF

(BYTE)Q_VQSW1_OFF

Flag for switching the load supply voltageVIQ1 from the outputs QD1.1..QD1.8(true=outputs supplied; is currently notsupported)

X 2#0


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%QW(Word)

%QB(Byte)

%QX(Bit)


configuration

CPU

IO

Preset

29 not used

30 60Out.Common.SET_12_24V

(BOOL)

Change of the voltage level for the Digitalinputs on the I/OTRUE -> 24VFALSE -> 12V

X

61 not used

Output variables of the CAN-Bus of the DcS I/O (TCANIOOUT)

31 62Out.CAN.Mode

(BYTE)Q_CAN_Mode

Possible modes: 0=no mode, 1=MOBA,2=J1939, 3=Deutz Motor connection J1939

X 10#0

63Out.CAN.Timeout

(BYTE)Q_CAN_Timeout

Timeout of the CAN of DcS I/O in steps of[10ms] (0=no Timeout)

X 10#200

32 64Out.CAN.Speed

(ECanSpeed) Q_CAN_Speed

Transmission speed of the CAN of DcS I/O

(Data type from enumeration structureEcanSpeed in the library Prosyd.lib)

XKBD_125

33 66 Out.CAN.Data

From here all output-PDOs of the CAN-bus(Permissible data types: TCanIOMobaTx,TCanIOJ1939Tx, TCanIODeutzTx,TCanIOMuxTx)

XTcanIOMuxTx


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N.5 System Input Operands of the digsycompactE


%IW(Word)

%IB(Byte)

%IX(Bit)


configuration

CPU

IO

Preset

96 192SysIn.initialized

(BYTE)SYSIN_WasInit

Flag for the first AWP-processing (true=firstAWP-run (is/was) effected, false=AWP notyet started)

X

193SysIn.SW_Major

(BYTE)SYSIN_CPU_SW

_MajorMajority-version of the software of DcS CPU X

97 194SysIn.SW_Minor

(BYTE)SYSIN_CPU_SW

_MinorMinority-version of the software of DcS CPU X

195SysIn.SW_Bugfix

(BYTE)SYSIN_CPU_SW

_BugfixBugfix-version of the software of DcS CPU X

98 196SysIn.HW_Major

(BYTE)

SYSIN_CPU_Har

dware_Major

Majority-version of the hardware of DcS CPU X

197SysIn.HW_Minor

(BYTE)SYSIN_CPU_Har

dware_MinorMinority-version of the hardware of DcS CPU X

99 198 not used

199SysIn.RetainIdx

(BYTE)SYSIN_RetainIdx Current Retain data block X X

100 200SysIn.Retain

Length (WORD)SYSIN_Retain

LengthProvides the current Retain data length X X

101 202SysIn.Retain

Pcycles (WORD)SYSIN_Retain

PCyclesNumber of the Retain programming cycles sofar

X X

102 204SysIn.CanType

(BYTE)SYSIN_CANType

Type of the implemented CAN-protocol(0=CANopen-Slave)

X X

205SysIn.CanNodeState (BYTE)

SYSIN_CANNodeState

NMS-state of the CAN-node X X

103 206SysIn.ErrorCnt

(WORD)SYSIN_ErrorCnt Provides the current error counter status X X

104 208SysIn.IO_SW_Major (BYTE)

SYSIN_IO_SW_Major

Majority-version of the software of DcS I/O X

209SysIn.IO_SW_Minor (BYTE)

SYSIN_IO_SW_Minor

Minority-version of the software of DcS I/O X

105 210SysIn.IO_SW_Bugfix (BYTE)

SYSIN_IO_SW_Bugfix

Bugfix-version of the software of DcS I/O X

211SysIn.IO_HW_Major (BYTE)

SYSIN_IO_HW_Major

Majority-version of the hardware of DcS I/O X

106 212SysIn.IO_HW_Mi

nor (BYTE)SYSIN_IO_HW_

MinorMinority-version of the hardware of DcS I/O X

213SysIn.FlManuCode (BYTE)

SYSIN_FlManuCode

Manufacturing Code of the Flash-EPROMbeing on the DcS CPU

X

107 214 SysIn.FlIdent(BYTE)

SYSIN_FlIdent Identity Code of the Flash-EPROM being onthe DcS CPU

X

215SysIn.PWR_VIQ1

(BYTE)SYSIN_PWR_

VIQ1Readback of the load supply voltage VIQ1 ofDcS CPU

X

108SysIn.cnt_PWR_IPON-Changes

(WORD)

SYSIN_PWR_IPON_Changes

Number of the IPON switching operations(only change from high to low)

X

109 218SysIn.PWR_IPON (BYTE)

SYSIN_PWR_IPON

State of the switching input IPON X

219SysIn.PWR_FAIL_Voltage(BYTE)

SYSIN_PWR_FAIL

Detection of an undervoltage VIM on DcSCPU (TRUE = VIM smaller than 8V in 12V-system or smaller than 16V in 24V-system)

X

110 220SysIn.cnt_PWR_

FAIL (WORD)SYSIN_CNT_

PWR_FAIL

Number of the detected undervoltages (VIMsmaller than 8V in 12V-system or VIM smallerthan 16V in 24V-system)

X


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%IW(Word)

%IB(Byte)

%IX(Bit)


configuration

CPU

IO

Preset

111 222SysIn.readCfg10msTask[1]

(WORD)

SYSIN_CFG10MS_1

Configuring the 1st millisecond of the 10mstask (low Byte indicates active channel,Assignment: Bit 0 -> QP1, Bit 1 -> QP2, etc.,Bit 8..14 irrelevant, Bit 15 = call-up active)

X


(WORD)

SYSIN_CFG10MS_2

Configuring the 2nd millisecond of the 10mstask (low Byte indicates active channel,Assignment: Bit 0 -> QP1, Bit 1 -> QP2, etc.,Bit 8..14 irrelevant, Bit 15 = call-up active)

X


(WORD)

SYSIN_CFG10MS_3

Configuring the 3rd millisecond of the 10mstask (low Byte indicates active channel,Assignment: Bit 0 -> QP1, Bit 1 -> QP2, etc.,Bit 8..14 irrelevant, Bit 15 = call-up active)

X


(WORD)

SYSIN_CFG10MS_4

Configuring the 4th millisecond of the 10mstask (low Byte indicates active channel,Assignment: Bit 0 -> QP1, Bit 1 -> QP2, etc.,Bit 8..14 irrelevant, Bit 15 = call-up active)

X


(WORD)

SYSIN_CFG10MS_5


X


(WORD)

SYSIN_CFG10MS_6


X


(WORD)

SYSIN_CFG10MS_7


X


(WORD)

SYSIN_CFG10MS_8


X


(WORD)

SYSIN_CFG10MS_9


X


(WORD)

SYSIN_CFG10MS_10


X

121 242SysIn.maxCur

rentToMeasure[1](WORD)

SYSIN_MAX_IPI1_1

Maximum current to be measured on currentmeasuring channel 1 (QD1.1) [2mA/Digit]

X

122 244SysIn.maxCur


SYSIN_MAX_IPI1_2


X

123 246SysIn.maxCur

rentToMeasure[3]

(WORD)

SYSIN_MAX_IPI1_3


X

124 248SysIn.maxCur


SYSIN_MAX_IPI1_4


X

125 250SysIn.maxCur


SYSIN_MAX_IPI1_5


X

126 252SysIn.maxCur


SYSIN_MAX_IPI1_6


X

127 254SysIn.maxCur


SYSIN_MAX_IPI1_7


X

128 256SysIn.maxCur


SYSIN_MAX_IPI1_8


X


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%IW(Word)

%IB(Byte)

%IX(Bit)


configuration

CPU

IO

Preset

129 258SysIn.statePWMOffsetCalibration

(BYTE)

State of the Offset-calibration of the PWMcurrent measurement (true=calibrated)

X

259SysIn.statePWMGradientCalibra

tion (BYTE)

Status of the Gradient calibration of the PWMcurrent measurement (true=calibrated)

X

130 not used

131 262SysIn.DayOfWeek (BYTE)

SYSIN_DAYOFWEEK

Reading out the weekday of the real-timeclock (0=Sunday, 1=Monday, .., 6=Saturday)(Only valid with RTC_Date-flag set inSystemCfg)

X

263SysIn.Week

(BYTE)SYSIN_WEEK

Reading out the calendar week of the real-time clock (only valid with RTC_Date-flag setin SystemCfg)

X

132 264 SysIn.RTC_Date(DATE) SYSIN_RTC_DATE

Reading out the date of the real-time clock

(Notation: YYYY-MM-DD) (Only valid withRTC_Date-flag set in SystemCfg)

X

134 268SysIn.RTC_DateAndTime (DATE_

AND_TIME)

SYSIN_RTC_DATEANDTIME

Reading out the date and time of the real-timeclock (Notation: YYYY-MM-DD-hh:mm:ss)(Only valid with RTC_Date-flag set inSystemCfg)

X

136 not used

: :

159 not used


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N.6 System Output Operands of the digsycompactE


%QW(Word)

%QB(Byte)

%QX(Bit)


configuration

CPU

IO

Preset

96 192SysOut.initialized

(BYTE)SYSOUT_Was

InitFlag for one-time processing of theAWP(appl. progr.)-cycle

X

193SysOut.set_Can

Type (BYTE)SYSOUT_set

CANTypeSets the type of the CAN-protocol(0=CANopen-Slave)

X

97 194SysOut.set_Can

NodeState(BYTE)

SYSOUT_setCANNodeState

Sets the NMS-state of the CAN-node X

195SysOut.en_emergency

(BYTE)

SYSOUT_ENABLE_

EMERGENCY

Mask for Emergency-readouts on the CAN-bus (0=no message, 1=normal message,2=warning, 4=user error, 8=application error,16=system error, 31=all)

X 2#0

98 196SysOut.wSet_VCP (WORD)

SYSOUT_SET_VCP

Setting the Offset voltage VCP for the inputsID1.9..ID1.12 on the DcS CPU [mV](0..34500mV in steps of 138mV)

X 10#0

99 198SysOut.wSet_VTS (WORD)

SYSOUT_SET_VTS

Setting the Test ramp VTS for testing thefunction of the AD-converter on the DcS CPU[mV] (0..34500mV in steps of 138mV)(presently not supported)

X 2#0

100 200SysOut.bReset

WdgFlag (BYTE)SYSOUT_

RESET_WDGResetting the Watchdog counter WdgReset inTCommonIn with rising edge

X 2#0

201SysOut.bActivate

_setting_VCP(BYTE)

SYSOUT_ACTIVATE_VCP

Activating the Offset voltage wSet_VCP X 2#0

101 not used

: :

127 not used


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N.7 Configuration Operands of the digsycompactE

Input operand as Symbol address acc. to Desription on Default

%QW(Word)

%QB(Byte)

%QX(Bit)


configuration

CPU

IO

Preset

Configuration Variables for the Digital Inputs (TDIGINCFG)

128 256Cfg.DigIn.Used[1]

(WORD)CFG_ID_CPU

Using the Digital inputs of DcS CPU (ID1.1 toID1.12) - dyncfg

X 0

128.0 CFG_ID1_1Using the Digital input 1of DcS CPU (ID1.1) - dyncfg

X 0


X 0


X 0

128.3 CFG_ID1_4 Using the Digital input 4of DcS CPU (ID1.4) - dyncfg

X 0


X 0


X 0


X 0


X 0

257 128.8 CFG_ID1_9Using the Digital input 9of DcS CPU (ID1.9) - dyncfg

X 0


X 0

128.10 CFG_ID1_11Using the Digital input 11of DcS CPU (ID1.11) (Has to be set to 0when used as counter IC1.1) - dyncfg

X 0

128.11 CFG_ID1_12Using the Digital input 12of DcS CPU (ID1.12) (Has to be set to 0when used as counter IC1.2) - dyncfg

X 0

128.12 not used

: :

128.15 not used


(WORD)CFG_ID_IO

Using the Digital inputs of DcS I/O (ID2.1 toID2.14) dyncfg

X 0

129.0 CFG_ID2_1Using the Digital input 1of DcS I/O (ID2.1) dyncfg

X 0


X 0


X 0


X 0


X 0


X 0


X 0


X 0


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%QW(Word)

%QB(Byte)

%QX(Bit)


configuration

CPU

IO

Preset

259 129.8 CFG_ID2_9Using the Digital input 9of DcS I/O (ID2.9) (Has to be set to 0 whenused as counter IC3.1) - dyncfg

X 2#0

129.9 CFG_ID2_10Using the Digital input 10of DcS I/O (ID2.10) (Has to be set to 0 whenused as counter IC3.2) - dyncfg

X 2#0


X 2#0


X 2#0


X 2#0

129.13 CFG_ID2_14

Using the Digital input 14

of DcS I/O (ID2.14) (Has to be set to 0 whenused as counter IC4.2) - dyncfg

X 2#0

129.14 not used

129.15 not used


(WORD)CFG_QD_AS_ID

Using the Digital outputs of DcS I/O as Digitalinputs (QD2.1 to QD2.8) - dyncfg

X 0

130.0CFG_QD2_1_AS

_ID3_1Using the Digital output 1of DcS I/O as Digital input (QD2.1) - dyncfg

X 0

130.1CFG_QD2_2_AS


X 0

130.2CFG_QD2_3_AS


X 0

130.3

CFG_QD2_4_AS

_ID3_4

Using the Digital output 4

of DcS I/O as Digital input (QD2.4) - dyncfg X 0

130.4CFG_QD2_5_AS


X 0

130.5CFG_QD2_6_AS


X 0

130.6CFG_QD2_7_AS


X 0

130.7CFG_QD2_8_AS


X 0

261 not used

131 262Cfg.DigIn.Group

(BYTE)CFG_ID_GROUP

Configuring the active switching levels of theDigital inputs of DcSs CPU and I/O(1=plusswitching, 0=groundswitching) -dyncfg

X X 0

131.0CFG_ID_GROUP_1

Configuring the active switching levels of theDigital inputs 1 to 5 of DcS CPU (ID1.1 toID1.4) (1=plusswitching, 0=groundswitching) -dyncfg

X 0

131.1CFG_ID_GROUP_2

Configuring the active switching levels of theDigital inputs 6 to 10 of DcS CPU(ID1.4 to ID1.8) (1=plusswitching,0=groundswitching) - dyncfg

X 0

131.2CFG_ID_GROUP_3

Configuring the active switching levels of theDigital inputs 1 to 4 of DcS I/O(ID2.1 to ID2.4) (1=plusswitching,0=groundswitching) - dyncfg

X 0

131.3CFG_ID_GROUP_4

Configuring the active switching levels of theDigital inputs 5 to 8 of DcS I/O(ID2.5 to ID2.8) (1=plusswitching,0=groundswitching) - dyncfg

X 0


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%QW(Word)

%QB(Byte)

%QX(Bit)


configuration

CPU

IO

Preset

131.4 not used

: :

131.7 not used

263 not used

132 264Cfg.DigOut.Used

(WORD)CFG_QD

Using the Digital outputs of DcS CPU and I/O(QD1.1..QD1.8 and QD2.1..QD2.8) - dyncfg

X X

132.0 CFG_QD1_1Using the Digital output 1of DcS CPU (QD1.1) (Has to be set to 0when used as a PWM-output) - dyncfg

X


X


X


X


X


X

132.6 CFG_QD1_7

Using the Digital output 7

of DcS CPU (QD1.7) (Has to be set to 0when used as a PWM-output) - dyncfg

X


X

265 132.8 CFG_QD2_1Using the Digital output 1of DcS I/O (QD2.1) - dyncfg

X

132.9 CFG_QD2_2Using the Digital output 2of DcS I/O (QD2.2) - dyncfg

X


X


X


X 0


X 0


X 0


X 0

Configuration Variables for the Analog Inputs (TANINCFG)

133 266Cfg.AnIn.Used

(BYTE)CFG_IA_Used

Using the Analog inputs of DcS CPU and I/O(IAV1.1..IAV1.4, IAV2.1..IAV2.4 orIAI1.1..IAI1.4, IAI2.1..IAI2.4) - dyncfg

X X 0

133.0CFG_IA1_1_

UsedUsing the Analog input 1of DcS CPU (IAV1.1 or IAI1.1) - dyncfg

X 0

133.1CFG_IA1_2_


X 0


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%QW(Word)

%QB(Byte)

%QX(Bit)


configuration

CPU

IO

Preset

133.2 CFG_IA1_3_Used

Using the Analog input 3of DcS CPU (IAV1.3 or IAI1.3) - dyncfg

X 0

133.3CFG_IA1_4_


X 0

133.4CFG_IA2_1_

UsedUsing the Analog input 1of DcS I/O (IAV2.1 or IAI2.1) - dyncfg

X 0

133.5CFG_IA2_2_


X 0

133.6CFG_IA2_3_


X 0

133.7CFG_IA2_4_


X 0

267 not used

134 268 Cfg.AnIn.UpperLimit [1] (WORD) CFG_IA1_1_LimitUp

Upper limiting value of the Analog input 1

of DcS CPU (IAV1.1 or IAI1.1) [Digit](Range: 0 to 1023 Digits) - dyncfg

X 16#0FFF

135 270Cfg.AnIn.Upper

Limit [2] (WORD)CFG_IA1_2_

LimitUp

Upper limiting value of the Analog input 2of DcS CPU (IAV1.2 or IAI1.2) [Digit](Range: 0 to 1023 Digits) - dyncfg

X16#0FFF



LimitUp


X16#0FFF



LimitUp


X16#0FFF



LimitUp

Upper limiting value of the Analog input 1of DcS I/O (IAV2.1 or IAI2.1) [Digit](Range: 0 to 1023 Digits) - dyncfg

X16#0FFF


Limit [6] (WORD)

CFG_IA2_2_

LimitUp


X16#

0FFF



LimitUp


X16#0FFF



LimitUp


X16#0FFF

142 284Cfg.AnIn.Lower


LimitLow

Lower limiting value of the Analog input 1of DcS CPU (IAV1.1 or IAI1.1) [Digit](Range: 0 to 1023 Digits) - dyncfg

X16#0000



LimitLow


X16#0000



LimitLow


X16#0000



LimitLow


X16#0000



LimitLow

Lower limiting value of the Analog input 1of DcS I/O (IAV2.1 or IAI2.1) [Digit](Range: 0 to 1023 Digits) - dyncfg

X16#0000



LimitLow


X16#0000



LimitLow


X16#0000



LimitLow


X16#0000


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%QW(Word)

%QB(Byte)

%QX(Bit)


configuration

CPU

IO

Preset

150 300Cfg.AnIn.VQS_

VCP_UpperLimit(WORD)

CFG_VQS_VCP_LimitUp

Upper limiting value of the offset voltage VCPfor the inputs ID1.9..ID1.12 on the DcS CPUin [mV] (Range: 0 to 32000mV)

X16#7D00

151 302Cfg.AnIn.VIMP_

UpperLimit(WORD)

CFG_VIMP_LimitUp

Upper limiting value of the operating voltageVIMP of DcS CPU in [100mV] (Range: 90 to320 corresponds with 9 to 32V )

X 10#350

152 304Cfg.AnIn.TEMP_

UpperLimit(WORD)

CFG_TEMP_LimitUp

Upper limiting value of temperature of DcSCPU in [K] (Range: 243 to 393K)

X 10#393

153 306Cfg.AnIn.RAMPE

_UpperLimit(WORD)

CFG_RAMPE_LimitUp

Upper limiting value of test ramp VTS of DcSCPU in [Digit] (Range: 0 to 1023 Digits)(presently without function)

X16#03FF

154 308Cfg.AnIn.VQS_

VCP_LowerLimit(WORD)

CFG_VQS_VCP_LimitLow

Lower limiting value of offset voltage VCP forthe inputs ID1.9..ID1.12 on the DcS CPU in[mV] (Range: 0 to 32000mV)

X16#0000

155 310

Cfg.AnIn.VIMP_

LowerLimit(WORD)

CFG_VIMP_LimitLow

Lower limiting value of operating voltage

Vimp of DcS CPU in [Digit] (0 to 1023 ->1Digit corresponds to 10mV)

X 10#90

156 312Cfg.AnIn.TEMP_

LowerLimit(WORD)

CFG_TEMP_LimitLow

Lower limiting value of temperatureof DcS CPU in [K] (Range: 243 to 393K)

X 10#243

157 314Cfg.AnIn.RAMPE

_LowerLimit(WORD)

CFG_RAMPE_LimitLow

Lower limiting value of test ramp VTS of DcSCPU in [Digit] (Range: 0 to 1023 Digits)(presently without function)

X16#0000

Configuration Variables for the Analog Outputs (TANOUTCFG)

158 316Cfg.AnOut.Used

(BYTE)CFG_QAI

Using the Analog Outputs 1-4of DcS I/O (QAI1..QAI4) - dyncfg

X 0

158.0 CFG_QAI1Using the Analog output 1of DcS I/O (QAI1) - dyncfg

X 0

158.1 CFG_QAI2Using the Analog output 2

of DcS I/O (QAI2) - dyncfg

X 0


X 0


X 0

158.4 not used

: :

158.7 not used

317 not used

Configuration Variables for the Counting Inputs (TCOUNTERCFG)

159 318Cfg.Cnt.Used

(BYTE)CFG_IC

Using the counting inputsof DcS CPU and I/O(IC1.1..IC1.2; IC2.1..IC4.2) - dyncfg

X X 0

159.0 CFG_IC1_1Using the counting input 1of DcS CPU (IC1.1) - dyncfg

X 0

159.1 CFG_IC1_2Using the counting input 2of DcS CPU (IC1.2) - dyncfg

X 0

159.2 CFG_IC2_1Using the counting input 1of DcS I/O (IC2.1) - dyncfg

X 0


X 0


X 0


X 0


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%QW(Word)

%QB(Byte)

%QX(Bit)


configuration

CPU

IO

Preset

159.6 CFG_IC4_1 Using the counting input 5of DcS I/O (IC4.1) - dyncfg

X 0


X 0

319Cfg.Cnt.AB

(BYTE)CFG_AB

Using the counting inputs of DcS I/O as AB-counters(IC2.1 to IC4.2)(1=AB-counter, 0=single counter) - dyncfg

X 16#00

159.8 CFG_IC1_AB_1

Using the counting input IC1 of DcS CPU asAB-counter (A-signal) (IC1.1)(1=AB-counter, 0=single counter)(presently not supported, must be 0) dyncfg

X 2#0

159.9 CFG_IC1_AB_2

Using the counting input IC1 of DcS CPU asAB-counter (B-signal) (IC2.2)(1=AB-counter, 0=single counter)(presently not supported, must be 0)

dyncfg

X 2#0

159.10 CFG_IC2_AB_1Using the counting input IC2 of DcS I/O asAB-counter (A-signal) (IC2.1)(1=AB-counter, 0=single counter) - dyncfg

X 2#0

159.11 CFG_IC2_AB_2Using the counting input IC2 of DcS I/O asAB-counter (B-signal) (IC2.2)(1=AB-counter, 0=single counter) - dyncfg

X 2#0


X 2#0


X 2#0


X 2#0


X 2#0

Configuration variables for the PWM-Outputs (TPWMCFG)

160 320Cfg.PWM.Used

(BYTE)CFG_QP

Using the PWM-outputs 1 to 8of DcS CPU (QD1.1..QD1.8) - dyncfg

X 0

160.0 CFG_QP1_1Using the PWM-output 1of DcS CPU (QD1.1) (Has to be set to 0 ifused as a digital output) - dyncfg

X 0


X 0

160.2 CFG_QP1_3Using the PWM-output 3of DcS CPU (QD1.3) (Has to be set to 0 if

used as a digital output) - dyncfg

X 0


X 0


X 0


X 0


X 0


X 0


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%QW(Word)

%QB(Byte)

%QX(Bit)


configuration

CPU

IO

Preset

321 not used

Configuration Variables for the General Functions of the Control Unit (TCOMMONCFG)

161 322Cfg.Common.

AwpCycle(BYTE)

CFG_AWPCycle

Setting a fixed AWP(appl. prog.)-cycle time[ms] (Range: 1 to 255ms) (If the actual cycletime of the AWP is longer than the adjustedone, the AWP will nevertheless be completelyprocessed and the cycle time not kept)

X 10#5

323Cfg.Common.

U_12_24 (BYTE)CFG_U_12_24

Configuring the system voltage level for theswitching thresholds of the digital inputs(possible values: 12V or 24V)

X X 10#24

162 324 Cfg.Common.CheckSRAMStartup (BYTE)

CFG_CheckSRAMStartup

Configuring an SRAM test run in the startupof the DcS CPU (Notation: 2#nnnnSSSS)In the whole RAM, (n+1) Bytes each will bechecked in step widths of ((S+1)*16).

n: number Check bytes=n+10=1; 1=2; ..; 16#F=16Bytes

S: Step width=S+1*16Byte0=16; 1=32; ..; 16#F=256

Special values: 16#00=Test 1 Byte every 256steps; 16#F0=Check of the whole RAM

X 16#00

325Cfg.Common.

CheckSRAMRun(BYTE)

CFG_CheckSRAMRun

Configuring a continuous SRAM-check of theDcS CPU (Notation: 2#nnnnSSSS)In the whole RAM, (n+1) Bytes will bechecked in step widths of ((S+1)*16) steps.n: Number Check bytes=n+1

0=1; 1=2; ..; 16#F=16BytesS: Step width=S+1*16Byte

0=16; 1=32; ..; 16#F=256Special values: 16#00= Check 1 Byte every256 steps; 16#F0=Check of the whole RAM

X 16#00

163 326Cfg.Common.

CheckPRGStartup (BYTE)

CFG_CheckPRGStartup

Configuring a flash-ROM test run in thestartup of the DcS CPU (Notation:2#nnnnmmmm)n = reserved; m = Mode:2#0000=Check AWP-CRC(approx.100ms/16kByte)2#0001=Check AWP-CKS (approx.25ms/16kByte)2#0010=Check FW-CRC (approx.100ms/16kByte)2#0011=Check FW-CKS (approx.25ms/16kByte)2#11xx=reserved, Bit0: 1=CRC, 0=CKS

X 16#08

327Cfg.Common.

CheckPRGRun(BYTE)

CFG_CheckPRGRun

Configuring a continuous flash-ROM check ofthe DcS CPU (in every cycle)(Notation: 2#nnnnmmmm)

n = reserved; m = Mode:2#0000=Check AWP-CRC (approx.185s/16Byte)2#0001=Check AWP-CKS (approx.80s/16Byte)2#0010=Check FW+AWP-CRC (approx.

370s/16Byte)2#0011=Check FW+AWP-CKS (approx.

160s/16Byte)2#0100=Check FW-CRC (approx.185s/16Byte)2#0101=Check FW-CKS (t approx.8s/16Byte)2#1xxx := reserved, Bit0: 1=CRC, 0=CKSSpecial value: 16#00 = no continuous check

X 16#00


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%QW(Word)

%QB(Byte)

%QX(Bit)


configuration

CPU

IO

Preset

Configuration Variables for the CAN-Bus of the DcS I/O (TCANIOCFG)

164 328Cfg.CAN.Mode

(BYTE)CFG_CAN_

Mode

Adjustment of the CAN-protocol of the DcSI/O (possible modes: 0=no mode, 1=MOBA,2=Caterpillar J1939, 3=Deutz J1939)

X 2#0

329Cfg.CAN.ModePa

r (BYTE)CFG_CAN_

TimeoutAdjustment of the Timeout of the CAN-bus ofthe DcS I/O in steps of [10ms] (0=no Timeout)

X 10#200

165 330Cfg.CAN.Speed

(EcanSpeed)CFG_CAN_

Speed

Adjustment of the transmission speed of theCAN-bus of the DcS I/O in [EcanSpeed (seeProsyd.lib)]

XKBD_125

331 not used

166 not used

: :

195 not used

Configuration Variables for the Control System (TSYSTEMCFG)

196 392Cfg.Sys.maxWDreset (WORD)

CFG_MaxWdgReset

Max. number of Watchdog-resets. When thisnumber of watchdog-resets is reached oneafter the other, the AWP will be deactivated

X 10#5

197 394Cfg.Sys.cycles

WDclear (WORD)CFG_CyclesToClearWdg

Number of faultless AWP-cycles after whichthe internal Watchdog-reset-counter will bereset

X 10#500

198 396Cfg.Sys.en_emergency

(BYTE)

CFG_Enable

Emergency

Mask for EMERGENCY-readouts on theCAN-bus:16#00 = no message,16#01 = NO_ERROR = normal message,16#02 = WARNING = warnings,

16#04 = USER_ERROR = user error,16#08 = APP_ERROR = application error,16#10 = SYS_ERROR = system error,16#1F = output of all

X 16#1F

397Cfg.Sys.RTC_

Date_flag (BYTE)CFG_RTC_DATE

_FLAGFlag for updating the Date & Time variables inSystemIn

X 2#1

199 398Cfg.Sys.ASC0_CharLen (BYTE)

CFG_ASC0_CharLength

Configuring the character frame of the RS232of the DcS CPU(16#18 = 1 Stop bit & 8 Data bits)

X 16#18

399Cfg.Sys.ASC0_Parity (BYTE)

CFG_ASC0_PARITY

Configuring the parity error detection of theRS232 of DcS CPU(16#00 = no parity, 16#10 = EVEN-parity,16#20 = ODD-Parity)

X 16#00

200Cfg.Sys.ASC0_

Baudrate

(DWORD)

CFG_ASC0_

BAUDRATE

Configuring the transmission rate of theRS232 of DcS CPU

(possible values: 2400, 4800, 9600, 19200,38400, 57600)

X10#

19200

202 not used

: :

211 not used


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N.8 Notes


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Documents

04-68283A Manual Digsy Chapter N Table of Operands