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1
A Simple ALU
Binary Logic
2
Outline
Binary Logic Representation of Logic Gates Constructing a 1-bit adder Constructing an n-bit adder
3
Binary Logic
A computer works using digital electronics. There are only High and Low voltages All computer logic is based on the
manipulation of these Abstractly,
» High is interpreted as 1 (true)» Low is interpreted as 0 (false)
4
Logic Circuit
A logic circuit takes in a number of input lines (A, B, C, ...)» and has a number of output lines (X,Y,Z,...)
AB
C
X
Y
Z
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Logic Basics Every expression evaluates to 1 or 0 NOT
» ~A (“A bar”)– is the complement of A, i.e. 1-A
OR» A + B
– is 1 if and only if at least one of A or B is 1, else 0
AND» A.B
– is 1 if and only if both A and B are 1, else 0
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Truth Tables
A B A+B A.B0 0 0 00 1 1 01 0 1 01 1 1 1
A ~A0 11 0
A B C A.B A.C B+C A.(B+C) A.B+A.C0 0 0 0 0 0 0 00 0 1 0 0 1 0 00 1 0 0 0 1 0 00 1 1 0 0 1 0 01 0 0 0 0 0 0 01 0 1 0 1 1 1 11 1 0 1 0 1 1 11 1 1 1 1 1 1 1
A.(B+C)=A.B+A.C
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Gates
A
BA.B AND Gate
A
BA+B OR Gate
A ~A Inverter (NOT)
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Representations of Integers
Positive integers are represented by strings of binary digits - of fixed length given by the word length (eg, 32 bits).
Numbers in the range 0 to 232-1 can be represented.
0131
LSBMSB
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Negative Numbers We have to have a way to represent negative
numbers and 0.» If the word length is n, then there are 2n bit-patterns
possible - there cannot be an equal number of positive and negative numbers represented.
Suppose n=3, and consider the following:» 000two = 0ten 100two = -4ten
» 001two = 1ten 101two = -3ten
» 010two = 2ten 110two = -2ten
» 011two = 3ten 111two = -1ten
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Two’s Complement
For an n-bit word, the MSB is called the ‘sign bit’, which if 1 determines a negative number.
An n-bit word: (bn-1bn-2...b1b0)two represents the decimal number:
Eg, if n=4, 1101 = -8 + 4 + 1 = -3. Eg, if n=5, 10110 = -16 + 2 + 4 = -10
2 21
10
2n
nii
nb b
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Negating a Number
A simple technique for negating a number:» Invert each bit, and then add 1.
Convert:-» 10110
01001 + 1 = 01010 = 2ten+8ten = 10ten
» 1101 0010 + 1 = 0011 = 1ten + 2ten = 3ten
» 0011 1100 + 1 = 1101 = -8ten+4ten+1ten = -3ten
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Arithmetic
Binary arithmetic, addition and subtraction are similar to decimal:» work from least significant bit to most significant bit
– using carries where necessary.
A fundamental issue on a computer is the fixed word size» The operands and result is dependent on the word
length, and sometimes the result will be too small (negative) or too large (positive) to be represented.
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Addition and Subtraction Examples, n=4 (OVERFLOW)
0110+ 6ten
0111 7ten
------- ------
1101 = -8+4+1 = -3ten
Subtraction0111-0110 = 0111+1010 (two’s complement) =
0001 = 1ten
Overflow (Patterson)
° Examples: 7 + 3 = 10 but ... - 4 - 5 = - 9 but ...
2’s ComplementBinaryDecimal
0 0000
1 0001
2 0010
3 0011
0000
1111
1110
1101
Decimal
0
-1
-2
-3
4 0100
5 0101
6 0110
7 0111
1100
1011
1010
1001
-4
-5
-6
-7
1000-8
0 1 1 1
0 0 1 1+
1 0 1 0
1
1 1 0 0
1 0 1 1+
0 1 1 1
110
7
3
1
- 6
- 4
- 5
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Overflow Detection (Patterson)
° Overflow: the result is too large (or too small) to represent properly
• Example: - 8 < = 4-bit binary number <= 7
° When adding operands with different signs, overflow cannot occur!
° Overflow occurs when adding:
• 2 positive numbers and the sum is negative
• 2 negative numbers and the sum is positive
0 1 1 1
0 0 1 1+
1 0 1 0
1
1 1 0 0
1 0 1 1+
0 1 1 1
110
7
3
1
-6
- 4
- 5
7
0
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Designing a 1-bit Adder
A 1-bit adder must follow the following rules:-» a b R C» 0 0 0 0» 0 1 1 0» 1 0 1 0» 1 1 0 1
a, b inputs, R result, C carry.
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Logic Circuit for 1-bit Adder
Notice that » R = (~a).b + a.(~b)» C = a.b a
b
r
c
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n-bit Adder
Problem with previous circuit is that there is no way to combine a sequence of adders together » the carry of one addition must be passed to
the next. Need a structure as:
carryin
a
b r
carryout
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Truth Table
a b carryin result carryout0 0 0 0 00 0 1 1 00 1 0 1 01 0 0 1 01 0 1 0 11 1 0 0 10 1 1 0 11 1 1 1 1
Cout = a.(~b).c + a.b.(~c) + (~a).b.c + a.b.c = a.c+b.c+a.bResult = (~a).(~b).c + (~a).b.(~c) + a.(~b).(~c) + a.b.c
Logic diagramscan be constructedfor each of carryout and Result, using the results below.
Logic Diagrams for CarryOut and Sum (Patterson)
° CarryOut = B & CarryIn | A & CarryIn | A & B
° Result = A XOR B XOR CarryIn
CarryIn
CarryOut
A
B
A
B
CarryIn
Result
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Link 1-bit adders for n-bitcarryin
a
b r0
carryout/carry in
a
b r1
carryout
A chain of 1-bitadders is formedwhere the carryout of eachbecomes the carryin of thenext.The result is the sequenceof results from LSB to MSB.
A0
B0
1-bitALU
Result0
CarryIn0
CarryOut0
A1
B1
1-bitALU
Result1
CarryIn1
CarryOut1
A2
B2
1-bitALU
Result2
CarryIn2
CarryOut2
A3
B3
1-bitALU
Result3
CarryIn3
CarryOut3
(Patterson)
Notice howthe 1-bit addersare cascadedtogether.
23
Summary
Binary logic Number representations
» two’s complement Binary arithmetic Constructing a 1-bit adder Constructing an n-bit adder ...next time --- floating point.