1- A transistor has |S11| > 1 and |S11| < 1. Above, S-l is the source stability circle and S-2 is the load stability circle. Mark the stable and potentially unstable regions of each Smith chart.

3- Below are stability circles for a certain transistor. |S11| < 1 and |S22| > 1. Circle the correct answer.

5- Given 11 0.62 34S = ∠ − ° , 21 2.1 96S = ∠ ° , 12 0S = , 22 0.78 20S = ∠ − ° .

a) What is the maximum power gain that can be realized with this transistor? b) What impedances should the matching circuits present to the transistor I/O for max gain? c) What is the max power gain that can be realized with this transistor when 12 0.05 84S = ∠ ° ? d) What impedances should the matching circuits present to the transistor I/O for maximum gain when 12 0.05 84S = ∠ ° ?

max

2 2

TU 212 2 2 2

11 22

11

22

1 1 1 1) 2.1 18.29 12.62dB

1 1 1 0.62 1 0.78

1b) 0.62 34 130.1 48.4

1

10.78 20 232.26 53.72

1

170 200 , 280

Max gain 12.11 dB

)

38

)

n

0

I

SS S

S

LL L

L

in out

a G SS S

S Z j

S Z j

Z j Z j

c

d

∗

∗

= = = =− − − −

+ ΓΓ = = ∠ °⇒ = = + Ω− Γ

+ ΓΓ = = ∠ °⇒ = = + Ω− Γ

= + Ω = + Ω

put impedance = , Output impedance =100 150 180 320j j+ +

4- S-parametreleri (50 ohm) aşağıda verilen transisitor ile 1 GHz'te bir kuvvetlendirici tasarlanacaktır. a) Bu transistorun kararlı olup olmadığını belirtin. b) Maximum kazancı ve buna karşılık gelen SΓ , and LΓ değerlerini bulun. c) Smith Chart kullanarak L-devresi ile sadece giriş devresini tasarlayın.

11 21 12 220.61 155 , 6 180 , 0, 0.48 20S S S S= ∠− ° = ∠ ° = = ∠− ° 4- An amplifier is to be designed for max gain using a BJT with s-parameters at 1 GHz in a 50 ohm system as 11 21 12 220.61 155 , 6 180 , 0, 0.48 20S S S S= ∠− ° = ∠ ° = = ∠− ° . a) Determine whether this BJT is unconditionally stable. b) Calculate the the maximum transducer gain and the correspondingSΓ , and LΓ values. c) Design L-section matching network using lumped elements. Your amplifier must look like below. Design only the input. Attach your Smith Chart.

Unconditionally stable dB

nH pF

pF nH

110 0

11

1 2

1 2

, 73.9 18.69

1 150(0.253411 .208086) 12.67 10.44

1 1

5.1229 , 5.4537

14.0747 , 4.6361

T

inin

in

G

SZ Z Z j j

S

L C

C L

= =

+ Γ += = = −Ω = −

−Γ −

= =

= =

4- A transistor requires a source and load reflection coefficients as 0.215 170SΓ = ∠ ° and 0.361 83LΓ = ∠ ° for a desired regime of amplifier operation. Design a single shunt stub open

circuit tuner input and output matching networks as below. Attach your Smith Chart. 4- Aşağıdaki kuvvetlendirici için yansıma katsayıları 0.215 170SΓ = ∠ ° ve 0.361 83LΓ = ∠ ° ise şekildeki uyumlandırma devrelerini tasarlayın. Smith Chart’i kağıdınıza ekleyin.

or

or

0 1 1 1 1

0 2 2 2 2

132.4481 2.5403 0.121 , 0.067 0.406 , 0.434

1

141.7180 34.3757 0.039 , 0.067 0.230 , 0.105

1

Sin

S

Lout

L

Z Z j d l d l

Z Z j d l d l

λ λ λ λ

λ λ λ λ

∗

∗

∗

∗

+ Γ= = − Ω→ = = = =

−Γ

+ Γ= = − Ω→ = = = =

−Γ

1- Asağıda 6.0 GHz’te 50 ohm sistemınde s-parametreleri verilen bir FET ile kuvvetlendirici tasarlanacaktir. 11 21 12 220.61 170 , 2.24 32 , 0, 0.72 83S S S S= ∠− ° = ∠ ° = = ∠ ° . a) FET’in

şartlı veya şartsız kararlı olup olmadığını bulun. b) Maksimum unilateral tranducer kazancını ve buna göre SΓ , ve LΓ değerlerini hesaplayın. c) Giriş/Çıkış devresi için toplu elemanlarla aşağıdaki şekildeki gibi L uyum devresi tasarlayın ve Smith’i kağıdınıza ekleyin. Isteyen giris isteyen cikis devresini tasarlayabilir fakat devre elemanlari asagidaki gibi olmalidir. 1- 4- An amplifier is to be designed for max gain using a FET with s-parameters at 6.0 GHz in a 50 ohm system as 11 21 12 220.61 170 , 2.24 32 , 0, 0.72 83S S S S= ∠− ° = ∠ ° = = ∠ ° . a) Determine whether this FET is unconditionally stable. b) Calculate the the maximum transducer gain and the correspondingSΓ , and LΓ values. c) Design L-section matching netwok using lumped elements.. Your amplifier must look like below. Design only the input or output. The coice is yours.

unconditionally stable

dB

nH pF

2

max 212 2

11 22

1111 0 1 1

11

2222 0

22

1, 0.45 1

1 11.6 5 2.07 16.56 12.2

1 1

10.61 170 12.2 4.12 0.679 , 0.934

1

10.72 83 17.9 53.2

1

TU

S in

L out

k

G SS S

SS Z Z j L C

S

SS Z Z j

S

∗

∗

=∞> ∆ = < →

= = × × =− −

+Γ = = ∠ ° → = = − Ω→ = =

−

+Γ = = ∠ ° → = = + Ω→

−

≃

p2 30.907 pF, 0.71 FC C= =

1- Asağıda 6.0 GHz’te 50 ohm sistemınde s-parametreleri verilen bir FET ile kuvvetlendirici tasarlanacaktir. 11 21 12 220.61 170 , 2.24 32 , 0, 0.72 83S S S S= ∠− ° = ∠ ° = = ∠− °

a) FET’in şartlı veya şartsız kararlı olup olmadığını bulun. b) Maksimum unilateral tranducer kazancını ve buna göre SΓ , ve LΓ değerlerini hesaplayın. c) Giriş/Çıkış devresi için toplu elemanlarla aşağıdaki şekildeki gibi L uyum devresi tasarlayın ve Smith’i kağıdınıza ekleyin. Siz sadece girişteki devre elemanlarını bulun. 4- An amplifier is to be designed for max gain using a FET with s-parameters at 6.0 GHz in a 50 ohm system as : 11 21 12 220.61 170 , 2.24 32 , 0, 0.72 83S S S S= ∠− ° = ∠ ° = = ∠− ° .

a) Determine whether this FET is unconditionally stable.

11 221, 1, 1, 1 FET is unconditionally stable S S k< < ∆ < > → b) Calculate the the maximum transducer gain and the correspondingSΓ , and LΓ values.

11 22

2

max 212 2

11 22

0.61 170 , 0.72 83

1 116.6 12.2 dB

1 1

S L

TU

S S

G SS S

∗ ∗Γ = = ∠ ° Γ = = ∠ °

= = =− −

, ,

c) Design the input/output matching circuit using L-section matching sections using lumped elements as seen in the figure. Attach your Smith Chart!

0

0

0 0

11.53pF 0.78nH

0.753nH 0.98 nH

L

c

L L

input output

Z xC L

Z x

Z ZL L

b b

ω ω

ω ω

−= = = =

− −= = = =

4- 10 GHz’te s-parametreleri 11 0.55 170S = ∠ ° , 12 0S = , 21 1.7 25S = ∠ ° , 22 0.84 67S = ∠− ° verilen bir FET kullanılarak kuvvetlendirici tasarlanacaktir. a) FET’in kararlı olup olmadığını bulun. b) Maksimum kazanç için SΓ , ve LΓ değerlerini hesaplayın. c) Maksimum tranducer kazancını hesaplayın. d) Çıkış devresi için “single shunt stub open circuit tuner” uyum devresi tasarlayın. Devreyi cizin ve Smith’i kağıdınıza ekleyin.

4- An 10 GHz amplifier is designed using a FET with s-parameters: 11 0.55 170S = ∠ ° ,

12 0S = , 21 1.7 25S = ∠ ° , 22 0.84 67S = ∠− ° . a) Determine whether this FET is unconditionally stable. b) Find source and load reflection coefficient for maximum transducer gain design. c) Calculate the value of the maximum transducer gain. d) Design the output matching circuit using single shunt stub open circuit tuner. Assume the load impedance is 50 ohm. Draw the circuit and attach your Smith Chart! a) is unconditionally stable

b)

c)

11 22

11 22

2

max 212 2

11 22

1, 1, 1, 1 FET

0.55 170 , 0.84 67

1 114.07 11.48 dB

1 1

S in L out

TU

S S k

S S

G SS S

∗ ∗ ∗ ∗

< < ∆ < > →

Γ = Γ = = ∠− ° Γ = Γ = = ∠ °

= = =− −

d)

input: point 0.55 170SΓ = ∠− ° on SC. convert it admittance by 0.55 10S−Γ = ∠ ° intersect 1 jb+ circle by moving from 0.262 0.328λ λ→ so 1 10.066 , 0.147d lλ λ= =

output: point 0.84 67LΓ = ∠ ° on SC. convert it admittance by 0.84 113L−Γ = ∠− ° intersect 1 jb+ circle by moving from 0.093 0.205λ λ→ so 2 20.112 , 0.298d lλ λ= =

4- A transistor requires a source reflection coefficient 0.55 142SΓ = ∠ ° for a desired regime of amplifier operation. Design a single shunt stub input matching network to transform 50 ohm source impedance to the desired source reflection coefficient. 1) plot 0.55 142 0.32 0.31S sz jΓ = ∠ ° → = + and transform to admittance 1.6 1.58sy j= − 2) Plot constant VSWR circle and intersect 1+jb circle at 1 1.32y j= ± solution 1: 1.32j+ o.c. stub gives shortest 1 0.146 gl λ=

solution 2: 1.32j− s.c. stub gives shortest 2 0.354 0.25 0.104 gl λ= − =

3) Now move from 1 1.32j± to ys along constant VSWR circle (WTG) solution 1: 1 0.302 0.171 0.131 gd λ= − =

solution 2: 2 (0.5 0.328) 0.302 0.474 gd λ= − + =

d2 is much grater than d1 hence solution 1 appears to be the better choice (could improve further with balanced o.c stubs)

1- The output of a transistor with s-parameters at 10 GHz given below in a 50 Ω system is terminated in a 50 Ω load as seen in the figure below. Design a single stub series tuner that matches the input of the transistor to a 50 Ω transmission line. Attach your Smith Chart.

50 Ω[ ]SGV50 Ω

InputMatchingNetwork

11 11 11, 50(1 ) (1 ) 50(0.23 0.3)in inS Z S S jΓ = = + − = + Ω

i) The shortest line section is the one that transforms Zin into an impedance with a real part of unity when rotating towards the generator (see Smith Chart). We get l/λ = 0.182 - 0.049 = 0.133. Hence: lb = 0.133 x 30 mm = 4 mm ii) To match the transformed input impedance to 50 Ω we add a negative reactance of –j1.7 in series. The shortest stub having this input reactance is an open-circuited stub of length l/λ = 0.335 - 0.25 = 0.085. Hence: lc = 0.085 x 30 mm = 2.55 mm. A short-circuited stub would be λ/4 or 7.5 mm longer.

[ ]

145 50

65 35

0.65 0.02

2.55 0.35

j j

j j

e eS

e e

° °

° − °

=

3- The s-parameters of a transistor at 10 GHz in a 50 Ω system are given below. Design a lumped element input matching network that matches the input of the transistor to a 50 ohm generator when the output of the transistor is terminated in a 50 Ω load as shown in the figure below. The first element of the matching circuit next to the transistor must be an inductor. Attach your Smith Chart. 3- 10 GHz’te 50 ohm sisteminde bir transistorun s-parametreleri aşağıda verilmiştir. Bu transistorun girişini generatore uyumlandırmak için gereken toplu eleman uyumlandırma devresini tasarlayın. Uyumlandırma devresinin transistor tarafındaki eleman bobin olmalı. Smith’i kağıdınıza ekleyin.

50 Ω[ ]SGV50 Ω

InputMatchingNetwork

Γin = S11. 11 1150(1 ) (1 ) 50(0.23 0.3)inZ S S j= + − = + Ω

1200.12 95.5 10 H

xZjx j L

ω

−= → = = × , 1201.83 0.58 10 FBY

jb j Cω

−= → = = ×

[ ]

145 50

65 35

0.65 0.02

2.55 0.35

j j

j j

e eS

e e

° °

° − °

=

2- 50 sisteminde s-parametreleri 11 0.706 160S = ∠− ° , 12 0S = , 21 5.01 85S = ∠ ° ,

22 0.508 20S = ∠− ° olarak verilen transistor ile GTU,max için kuvvetlendirici tasarlanacaktır. a) GTU,max değerini hesaplayın. b) Giris devresi için “single shunt stub open circuit tuner” uyum devresi tasarlayın. c) Cikis devresi için “single shunt stub open circuit tuner” uyum devresi tasarlayın. 2- A microwave transistor amplifier is to be designed for GTU,max using a transistor whose s-parameters in a 50 ohm system are given by 11 0.706 160S = ∠− ° , 12 0S = ,

21 5.01 85S = ∠ ° , 22 0.508 20S = ∠− ° . a) Find GTU,max.

211 22 0 21

max max ,max2 2

11 22

0.706 160 , 0.508 20 , | | 25.1 14dB

1 11.99 3dB, 1.35 1.3dB, 18.3dB

1 1

S L

S L TU

S S G S

G G GS S

∗ ∗Γ = = ∠ ° Γ = = ∠ ° = = =

= = = = = = =− −

b) Design the input matching network single shunt stub open circuit tuner.

c) Design the output matching network using single shunt stub open circuit tuner.

1-A transistor has the following scattering parameters for a 50 ohm characteristic impedance at 1 GHz: 11 0.76 186S = ∠ ° , 21 3.06 74S = ∠ ° , 12 0S = , 22 0.45 63S = ∠ ° . Match the output of this transistor to a load impedance of 24 + j 35 ohm using two reactive lumped elements at 1 GHz. Make sure that your design allows placement of the load on the transistor without influencing the transistor bias. A smith chart is attached for your use.

4- A particular transistor requires a source reflection coefficient 0.55 142sΓ = ∠ ° for a desired regime of amplifier operation. An alternative design uses λg/4 transmission line section immediately after the 50 ohm source impedance followed by a shunt stub of length 3λg/8 (as shown below) to match to the desired Gs. Determine the required characteristic impedance (Z01 and Z02) of the λg/4 through line and the shunt stub, and your choice for the stub type (oc or sc) and length, to accomplish the match with due consideration of BW. Include a sketch of a microstrip implementation of your design (you do not need to calculate the specific microstrip dimensions.)

(1) plot 0.55 142 0.32 0.31S sz jΓ = ∠ ° → = + → (2) transform to admittance → 1.6 1.58sz j→ = − . Ys lies on constant g circle g=1.6. (3) Draw constant VSWR circle through g=1.6 (g=1.6 corresponds to r=0.625) (4) R=r50=31.25 ohm. Use quarterwave transformer to get to this impedance value ZL=50 ohm, Zs=31.25 ohm. 01 50 31 25 39.5Z = × × = Ω .

(5) transform to admittance → g=1.6 Now just add a susceptance jb=-j1.58 to get to the desired ys. However we are constrained to use a λg/8 or 3λg/8 stub of impedance Z02. jB=jbY0 = -j 0.0316. recall a λg/8 or 3λg/8 stub can give 1jb j′ = ± → choose normalized impedance Z02 to convert jb′ to desired jb. Since we need a negative susceptance, choose a λg/8 sc stub for better BW

1- In each of the stability circle drawings shown below, indicate clearly the possible locations for a stable source reflection coefficient. 1- Aşağıdaki “Smith Chart”larda kararlılık daireleri çizilen transistorler için, giriş (kaynak) yansıma katsayısının (sΓ ) kararlı olacağı bölgeleri tarayınız.

sr

sr

sr

sr

sr| |sC

| |sC

| |sC

| |sC

| |sC| | 1outΓ =

| | 1outΓ =

| | 1outΓ = | | 1outΓ =

| | 1outΓ =

| | 1outΓ =

11 221, | | 1, | | 1K S S< > < 11 221, | | 1, | | 1K S S< > <

11 221, | | 1, | | 1, | | 1K S S> ∆ > < > 11 221, | | 1, | | 1, | | 1K S S> ∆ > > >

11 221, | | 1, | | 1, | | 1K S S> ∆ < < > 11 221, | | 1, | | 1, | | 1K S S> ∆ < < <

sr

sr

sr

sr

sr| |sC

| |sC

| |sC

| |sC

| |sC| | 1outΓ =

| | 1outΓ =

| | 1outΓ = | | 1outΓ =

| | 1outΓ =

| | 1outΓ =

11 221, | | 1, | | 1K S S< > < 11 221, | | 1, | | 1K S S< > <

11 221, | | 1, | | 1, | | 1K S S> ∆ > < > 11 221, | | 1, | | 1, | | 1K S S> ∆ > > >

11 221, | | 1, | | 1, | | 1K S S> ∆ < < > 11 221, | | 1, | | 1, | | 1K S S> ∆ < < <

1- What is the purpose of a matching circuit on the input or output of a transistor circuit? To maximize power transfer. To reach a desired gain that is lower than the maximum gain. To change the impedance of the load or source. 2- Is this true or false? High frequency amplifiers have a high input impedance and a high output impedance. True 3- What are the effects of the mismatched impedances? Some of the voltage will be reflected. Some of the current will be reflected. Cancellation of voltages. 5- What is the difference between high frequency and low frequency amplifier design? The high frequency transistor has low gain. Feedback is large enough to cause stability problems. The operational frequencies.

7- You are asked to design a LNA at 950 MHz. The S parameters is shown below.

11 0.3 90S = ∠ − ° , 22 0.5 90S = ∠ − ° , 21 4.0 90S = ∠ ° , 12 0.0S = . Also, it is found that the noise characteristics are described by Fmin= 2dB, opt 0.5 90Γ = ∠ ° and Rn= 20 ohms. a) What is the greatest gain that can be gotten from the device by proper matching of the input and the output?

2

max 212 2

11 22

1 123.44 13.7 dB

1 1TG S

S S= = =

− −

b) What is the noise figure under this matching condition?

11 0.3 90s S∗Γ = = ∠ ° , 0.5 90optΓ = ∠ ° , 20nR = Ω , 0 50Z = Ω , min 2 dBF =

( )2

min 2 20

41.64 2.15 dB

1 1

s optn

opt s

RF F

Z

Γ − Γ= + = =

+ Γ − Γ

c) If the transistor is matched for minimum noise, what is the noise figure? To get minimum NF, s optΓ = Γ min 2 dBF F⇒ = = d) What is the gain for the matching condition for minimum noise? What is the input VSWR?

0.5 90s optΓ = Γ = ∠ ° , 2

2

212 2

11 22

1 122.15 13.45 dB

1 1s

T

s

G SS S

− Γ= = =

− Γ −

11in SΓ = ⇒ 0.23531in s

ain s

∗Γ − ΓΓ = =− Γ Γ

, 1

1.61541

ain

a

VSWR+ Γ

= =− Γ

e) With an input match to minimize noise, how much noise power is contained in the output, in a frequency band 30 kHz wide centered at 950MHz? No = F(dB) + 10log[kTGTB] GT = 22.15 , F = 2 dB , B = 30 kHz , T = 290K (room temp) No = -114 dBm

4- A fully matched RF amplifier has the following parameters. 11 0.6 158S = ∠ ° ,

12 0.09 70S = ∠ ° , 21 4.4 75S = ∠ ° , 22 0.16 173S = ∠ − ° . a) Determine the stability factor.

2 2 2

11 2211 22 12 21

12 21

10.487 31.14 , 1.08

2

S SS S S S k

S S

− − + ∆∆ = − = ∠ − ° = =

b) Determine the error assuming the unilateral case.

12 21 22 112 2 2 2

11 22

1 10.061, 0.89, 1.13

(1 ) (1 )(1 )(1 )

0.51 dB 0.55 dBt

tu

S S S SU

U US S

G

G

= = = =+ −− −

− < <

c) Determine the source side reflection coefficient for a conjugate match.

d) Determine the maximum transducer gain.

6- A low noise transistor has the following parameters: Fmin= 2.1 dB, opt 0.45 85Γ = ∠ − ° , Rn= 32 Ω and B = 3 KHz.

[ ] 0.6 0 0.02 07.3 0 0.8 0

S∠ ° ∠ °

= ∠ ° ∠ °

a) If the transistor is terminated with 1 0.65 100Γ = ∠ − ° , and the source temperature is

120 KsT = ° , find the internal noise of the transistor referred to its input.

b) Assuming the same termination, 1Γ at the input, find the output termination, Z2, that maximizes the gain.