1

Figure 7.27 A simple but inefficient approach for differential to single-ended conversion.

2

Circuit for a basic MOSFET constant-current source.

3

Basic MOSFET Current Mirror.

4

Figure 7.28 The active-loaded MOS differential pair.

5

Figure 7.28 The circuit at equilibrium assuming perfect matching.

Assignment # 2

Problems 7.11, 7.14, 7.16, 7.20, 7.21, 7.22, 7.23, 7.31, 7.33, 7.34, 7.36, 7.37, 7.38

Due date: 30th March 2012

Figure 7.28 The circuit with a differential input signal applied, neglecting the ro of all transistors.

8

Figure 7.29 Determining the short-circuit transconductance Gm =io/vid of the active-loaded MOS differential pair.

9

Figure 7.30 Circuit for determining Ro. The circled numbers indicate the order of the analysis steps.

10

Figure 7.31 Analysis of the active-loaded MOS differential amplifier to determine its common-mode gain.

Figure 4.44 (a) Common-source amplifier with a resistance RS in the source lead. (b) Small-signal equivalent circuit with ro neglected.

12

Common Mode Gain (Acm)

vicmvicm

vovgs3 =-vsg4

1 2

1m1 m2

3 4

3 4

& are negelcted

1 1, 2

g g 2

o o

icmSS

SS

o o o

m m m

r r

vR therefore i

R

r r r

g g g

13

Common Mode Gain (Acm) & CMRR

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vovgs3 =-vsg4

SS

icm

R

vii

221

3 1 33

4 4 3 1 4 33

4 2 4

1

1

( )

g om

m g m om

o o

v i rg

i g v i g rg

v i i r

14

1 4 3 2 43

4 3 43

1( )

1( 1)

2

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m SS

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g R

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ocm

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2

42

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4

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44

Common Mode Gain (Acm) & CMRR

Exercise 7.12

16

The basic BJT current mirror.

17

A simple BJT current source.

18

Figure 7.32 Active-loaded bipolar differential pair.

19

Figure 7.32 Small-signal equivalent circuit for determining the transconductance Gm=; io/vid.

20

Differential Gain Ad

vid/2 -vid/2

vo

21

Differential Gain Ad

3 1 1 3 3 4 1 3

1, 3, 4 e3

3 4 4

4 4 4 1 3

0

2 2 as

Since , the collector curren of will be

2The output current can be f

id idb m o e o m e

o o

b b

idm b m m e

v vv g r r r r g r

r r r r

v v Q

vg v g g r

i

2 4 4 2 4 1 3

1 2 4

33

3

ound from a node equation at the output as

2 2 2/ 2

Since all devices are operating at the same bias current, where

1and

Thu

id id ido m m b o m m m e

Cm m m m m

t t

em m m

v v vi g g v i g g g r

IIg g g g g

V V

rg g g

s om m

id

iG g

v

22

Figure 7.32 Equivalent circuit for determining the output resistance Ro =vx/ix.

23

Figure 7.33 Analysis of the bipolar active-loaded differential amplifier to determine the common-mode gain.

24

Figure 7.33 Analysis of the bipolar active-loaded differential amplifier to determine the common-mode gain.

111

11 r

rg

r

rg

rg

grr

m

m

m

me

25

vicm vicm

vbe3 = -vbe3 vo

i1i2

Common Mode Gain

mmm

ooo

EE

icmEE

oo

ggg

rrr

R

viithereforeR

rr

43

43

11m2m1

21

2 2

g

1,

g

1

negelcted are &

26

Common Mode Gain

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o

icm

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EE

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mm

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om

mo

omm

ebbe

oo

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R

r

v

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ivv

rrNeglect

rrRR

vii

3

4

3

4

433

44

42433

14

433433

143033

143

21

2111

2

2

1||||1

2

||||1

,as ||||1

||||||1

&

,2 as 2

27

Common Mode Gain

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o

icm

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emEE

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R

r

v

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vrv

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rrNeglect

rrRR

vii

3

4

3

4

4344

424314

4334314303143

21

2111

2

2

1||2

||

,as ||||||

&

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28

Common Mode Gain

2

2

2111

21||

43

434

3434

m

m

e

em

em

g

g

rr

rrg

rrg

2

2

21

21

2

1

21

21

21

21

21

21

21||||

1

33

34

33

3

43

3

3

34

343

34

rg

gg

rg

r

gr

g

rg

g

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g

m

mm

m

m

m

mm

mm

29

Common Mode Rejection Ratio (CMRR)

omd rgA2

1

EE

ocm R

rA

3

4

EEmo

EEom

cm

d Rgr

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A

ACMRR 3

3

2

1

2

1