1000BASE-RH PHY system simulationsgrouper.ieee.org/groups/802/3/bv/public/Sep_2015/... · IEEE 802.3bv Task Force - September 2015 P O F Knowledge Development 1000BASE-RH PHY simulation

IEEE 802.3bv Task Force - September 2015

POF

Knowledge Development

Rubén Pérez-Aranda([email protected])

1000BASE-RH PHY system simulations

mailto:[email protected]

mailto:[email protected]


POF


Simulation scheme


POF


1000BASE-RH PHY simulation scheme

3

Draft Amendment to IEEE Std 802.3-201x IEEE Draft P802.3bv/D1.2IEEE 802.3bv Gigabit Ethernet Over Plastic Optical Fiber Task Force 13th August 2015

Copyright © 2015 IEEE. All rights reserved.This is an unapproved IEEE Standards draft, subject to change.

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The resulting length of a Transmit Block is 225 792 symbols. Because the nominal symbol frequency is 325 MHz, a Transmit Block is transmitted nominally every 694.7446 microseconds.

Transmit Blocks are generated as shown in Figure 114–5. S1 and S2 pilots, header data, and payload data symbols are generated in a different manner, so the four symbol streams are multiplexed to produce the tem-poral order indicated in Figure 114–4.

Figure 114–5—Transmit Block generation

64B/65BEncoding

BinaryScrambler

CodedPAM16

SymbolScrambler THP Power

Scaling

HeaderBuilder CRC-16 BCH

EncoderPowerScaling

BinaryScrambler

BPSK PAM2Modulation

Payload data path

Header data path

PowerScaling

Pilot S1Generation

PowerScaling

Pilot S2Generation

Pilots data path

PMD

Mul

tiple

xer

GMIII

PMA,OAM MDI

Pilots data path

Pilots S1 and S2 are predefined signals transmitted in fixed allocated time slots of the Transmit Block and are used by the receiver for initialization and continuous tracking purposes based on data-aided signal pro-cessing. A pilot signal S1 is transmitted at the beginning of each Transmit Block as shown in Figure 114–4 and is intended for optimum symbol synchronization and timing recovery. Pilot S2 is divided into a series of sub-blocks (S2x, x=0, through 12) that are distributed along the Transmit Block. Pilot S2 sub-blocks are intended to facilitate timing recovery, channel estimation and equalization by the receiver.

114.2.1.1 Pilot S1 generation

A pilot S1 sub-block is transmitted at the beginning of each Transmit Block as shown in Figure 114–4. The S1 signal within the sub-block shall be generated as follows. The signal consists of a pseudo-random sequence of length LS1 = 128 PAM2 symbols. As shown in Figure 114–6, a maximum length sequence (MLS) generator is used to generate a 128-bit binary pseudo-random sequence, which is then mapped into PAM2 symbols. The symbols at the input of the power scaling block belong to the set {-1, 1}. See 114.2.3.3.3 for the definition of the B2D block.

The MLS generator is made from a linear feedback shift register (LFSR) of 25-bits (see Figure 114–7).

The feedback circuit is accomplished through a modulo-2 adder. In particular, the feedback is from bits 21 and 24 and the corresponding generator polynomial can be written as 1+x22+x25. The shift register, r[0] through r[24], is initialized with a hexadecimal value of 0x0 AC 2B 4B for each new Transmit Block (0 1010 1100 0010 1011 0100 1011 binary), where the leftmost digit corresponds to the initial value of reg-ister element r[0]. The output of the MLS generator is taken from register element r[0]. To generate the first symbol belonging to an S1 pilot, the initialized value of r[0] is taken. Then, the LFSR is shifted 127 times to

DAC PMD TX POF VOA

ADC

AGC

SYNCHTR

PLL325 MHz

FRAC-N PLL325 MHz

Freq control

Gain control

Equalizer Symbol Descr.

DSP

S1, S

2

S2PAM16MSD

BinaryDescr.

PGA BUFFERPMD RX AAFLT 64B/65B

Decod.

GMII

1000BASE-RH TX

1000BASE-RH RX

Channel9 bits

BWRC = 1 GHz

THP to PMA


POF


1000BASE-RH transmit block

4

Draft Amendment to IEEE Std 802.3-201x IEEE Draft P802.3bv/D1.2IEEE 802.3bv Gigabit Ethernet Over Plastic Optical Fiber Task Force 13th August 2015

Copyright © 2015 IEEE. All rights reserved.This is an unapproved IEEE Standards draft, subject to change.

40

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mit signal independent of GMII data content. After that, the information is encoded and mapped into PAM16 symbols using a Multi-Level Coset Code (MLCC) block oriented encoder. The resultant PAM16 symbols are Tomlinson-Harashima precoded to compensate the intersymbol interference produced when transmit symbols traverse the communication channel. Finally, the precoded codewords are time division multiplexed with control information using various sub-blocks that compose Transmit Blocks.

The PCS receive functions perform clock recovery for correct time sampling of received symbols and adap-tive channel equalization. Received PAM16 codewords are extracted from the Transmit Blocks and decoded for error correction and detection. The resultant information is descrambled recovering the original PDB sequence which finally is decoded to produce the GMII receive data stream.

114.2.1 Transmit Block

The Transmit Block is the basic structure for transmission of data and control information for 1000BASE-H. On an active link, Transmit Blocks shall be transmitted continuously to ensure that the receivers are syn-chronized and the equalizers are aligned to the channel conditions.

Each Transmit Block shall include pilot, header data and payload data symbols, which are transmitted in defined time slots. In particular, the Transmit Block consists of 1 pilot S1 sub-block (S1), 13 pilot S2 sub-blocks (S20, S21, ..., S212), 14 header data sub-blocks (PHS0, PHS1, …, PHS13) and 28 payload data sub-blocks (numbered 0 through 27), which are temporally ordered as indicated in Figure 114–4.

The GMII data stream is mapped into the data sub-blocks in a stream of fixed length Transmit Blocks.

Figure 114–4—1000BASE-H Transmit Block

S1 PHS0 PHS1S20

S1PHS12

S212

PHS13

CW

0C

W1

CW

2C

W3

CW

4C

W5

CW

6C

W7

CW

8C

W9

CW

10C

W11

CW

12C

W13

CW

14C

W15

CW

16C

W17

CW

18C

W19

CW

20C

W21

CW

22C

W23

CW

24C

W25

CW

26C

W27

CW

26C

W29

CW

30C

W31

CW

32

CW

0

CW

193

CW

194

CW

195

CW

196

CW

197

CW

198

CW

199

CW

200

CW

201

CW

202

CW

203

CW

204

CW

205

CW

206

CW

207

CW

208

CW

209

CW

210

CW

211

CW

212

CW

213

CW

214

CW

215

CW

216

CW

217

CW

218

CW

219

CW

220

CW

221

CW

222

CW

223

S21

Transmit Blockj

Transmit Blockj+1

Pilot S1 and S2x sub-blocks

Physical header Sub-Frame

PHS12 S1

S212

Data sub-block0

Data sub-block27

sub-blocks

Time

Each pilot or header sub-block is composed of 160 symbols. For pilot and header sub-blocks the first 16 symbols (prefix) and the last 16 symbols (postfix) are zeros (see 114.6.1). Each payload data sub-block is composed of 7904 symbols that span eight MLCC codewords (CW) of 988 symbols each. The transmission of MLCC codewords is aligned with the start of the payload data sub-blocks. Since the Transmit Block includes 28 data sub-blocks, a total number of 224 MLCC codewords (CW0, CW1, …, CW223) are transmit-ted. This gives a total of 221 312 payload data symbols.


POF


PAM16 encoder

5

BCH encoder /shortening

MLCC demux

QAM8 (RZ2 lattice)

mapper

Transf.

level 2

level 1

RZ2 to PAM multiplexer

PAM16

(1976, 1668, t=28, GF(211))

From Binary Scrambler

Transf.

Transf.

3150bits/CW

1668 bits/CW Λ1t (1)

Λ1t (2)

Λ2t

988 1D symbols/CW2 bits/dim

325 MSps

QAM16 Gray

mapper

FIFO1

FIFO2

1482 bits/CW

1976 bits/CW

1.5 bits/dim

494 2D symb/CW162.5 MSymb/s


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PAM16 encoder

6

Level 1, QAM16 Level 2, QAM8

−4 −2 0 2 4

−3

−2

−1

0

1

2

3

0000 1000

0100 1100

00101010

01101110

0001 1001

0101 1101

00111011

01111111

0000 1000

0100 1100

00101010

01101110

0001 1001

0101 1101

00111011

01111111

0000 1000

0100 1100

00101010

01101110

0001 1001

0101 1101

00111011

01111111

0000 1000

0100 1100

00101010

01101110

0001 1001

0101 1101

00111011

01111111

0000 1000

0100 1100

00101010

01101110

0001 1001

0101 1101

00111011

01111111

0000 1000

0100 1100

00101010

01101110

0001 1001

0101 1101

00111011

01111111

0000 1000

0100 1100

00101010

01101110

0001 1001

0101 1101

00111011

01111111

0000 1000

0100 1100

00101010

01101110

0001 1001

0101 1101

00111011

01111111

−4 −2 0 2 4

−3

−2

−1

0

1

2

3

000000000000000000000000000000000000000000000000

100100100100100100100100100100100100100100100100

010010010010010010010010010010010010010010010010

110110110110110110110110110110110110110110110110

001001001001001001001001001001001001001001001001

101101101101101101101101101101101101101101101101

011011011011011011011011011011011011011011011011

111111111111111111111111111111111111111111111111


POF


PAM16 encoder

7

−15 −10 −5 0 5 10 15−15

−10

−5

0

5

10

15

0000000

1000000

0100000

1100000

0010000

1010000 0110000

1110000

0001000

10010000101000

1101000

0011000

1011000

0111000

1111000

0000100

1000100

0100100

1100100

0010100

1010100 0110100

1110100

0001100

10011000101100

1101100

0011100

1011100

0111100

1111100

0000010

1000010

0100010

1100010

0010010

1010010 0110010

1110010

0001010

10010100101010

1101010

0011010

1011010

0111010

1111010

0000110

1000110

0100110

1100110

0010110

1010110 0110110

1110110

0001110

10011100101110

1101110

0011110

1011110

0111110

1111110

0000001

1000001

0100001

1100001

0010001

10100010110001

1110001

0001001

1001001 0101001

1101001

0011001

1011001

0111001

1111001

0000101

1000101

0100101

1100101

0010101

1010101 0110101

1110101

0001101

10011010101101

1101101

0011101

1011101

0111101

1111101

0000011

1000011

0100011

1100011

0010011

10100110110011

1110011

0001011

1001011 0101011

1101011

0011011

1011011

0111011

1111011

0000111

1000111

0100111

1100111

0010111

1010111 0110111

1110111

0001111

10011110101111

1101111

0011111

1011111

0111111

1111111

• Basic numbers of constellation:• 128 points in a 2D constellation• log2(128) = 7 bits / 2D symbol• 7 bits =

• 4 bits of 1st MLCC level• 3 bits of 2nd MLCC level

• Each 2D symbol are transmitted at a rate of 162.5 MSymb/s

• To transmit over 1D (i.e. intensity modulation of LED), the system does time interleaving of both coordinates of 2D constellation at double rate, that is 325 MSymb/s

• Each 2D point can be represented by 2 coordinates that can take 16 different values each one: {-15, -13, … 13, 15} therefore, 16-PAM

• This is PAM16, but encoded with 3.5 bits/1D symbol (i.e. 7bits/2D) instead of 4 bits

• 3.1883 bits of 3.5 are information bits, the rest is parity for error correction and detection

After , 128-QAMΛ2t


POF


PAM16 multi-stage decoder

8

QAM16detector

Λ2− t

mod-Λ1[-4, 4)

BCH decoder

16-QAM mapper

Λ1− t (1)

Λ1t (1)-

QAM8 detector

mod-Λ2[-4, 4)

QAM8de-mapperΛ1

− t (2)

Info bits

Decoded codeword

3150 bits/CW

MLC

C m

ultip

lexer

Info bits

FIFO1,2

QAM16de-mapper

FIFO1

FIFO2

PAM to RZ2

demux

Equalized noisy PAM16 symbols 988 1D

symbols/CW

325 MSymb/s

Decoding failure flag162.5

MSymb/s494 2D symbols/CW

2 bits/dim

1.5 bits/dim

1976 bits/CW

1976 bits/CW

1668 bits/CW

1482 bits/CW


POF


Eye diagrams


POF


Eye diagrams for S1, PHS

10

TP2 - Driver+LED output(worst case response)DAC output


POF



11

PD-TIA output(worst case, Tj=125ºC)

TP3 - 15m POF + VOAAOPTP3 = -18.5 dBm


POF



12

PD-TIA output(worst case, Tj=125ºC)

TP3 - 50m POF + VOAAOPTP3 = -17 dBm


POF


Eye diagrams for DATA without THP

13



POF


Eye diagrams for S2

14



POF


Eye diagrams for DATA with THP

15



POF


Eye diagrams for Test mode 2

16



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Eye diagrams for Test mode 3

17



POF


1000BASE-RH receiver operation

15 m of POF at sensitivity


POF


1000BASE-RH PHY receiver operation

19

ADC

AGC

SYNCHTRFRAC-N PLL

325 MHz

Freq control

Gain control

Equalizer Symbol Descram

DSP

S1, S

2

S2

PAM16MSD

BinaryDescr.


Decod.

GMII

THP to PMA


POF


1000BASE-RH PHY estimated channel

20

0 2 4 6 8 10 12−0.05

0

0.05

0.1

0.15

0.2

0.25

0.3

0.35

0.4

0.45Channel response − Time

Hc

0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5−25

−20

−15

−10

−5

0Channel response − Freq (dB)

Hc

15m POF at sensitivity


POF


1000BASE-RH PHY estimated THP

21

0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5−15

−10

−5

0

5

10

15

20

25Equalizer − Freq (dB)

FFFFBFTHP

0 2 4 6 8 10 12 14 16−1.5

−1

−0.5

0

0.5

1

1.5

2

2.5Equalizer − Time

FFFFBF



POF



22

ADC

AGC

SYNCHTRFRAC-N PLL

325 MHz

Freq control

Gain control


DSP

S1, S

2

S2

PAM16MSD

BinaryDescr.


Decod.

GMII

THP to PMA


POF


−40 −30 −20 −10 0 10 20 30 400

50

100

150

200

250

300

350

400Equalized symbols 1D

1000BASE-RH PHY equalized 1D symbols

23


Histogram shows the constellationexpansion produced by THP


POF



24

QAM16detector

Λ2− t

mod-Λ1[-4, 4)

BCH decoder

16-QAM mapper

Λ1− t (1)

Λ1t (1)-

QAM8 detector

mod-Λ2[-4, 4)

QAM8de-mapperΛ1

− t (2)

Info bits

Decoded codeword

3150 bits/CW

MLC

C m

ultip

lexer

Info bits

FIFO1,2

QAM16de-mapper

FIFO1

FIFO2

PAM to RZ2

demux


symbols/CW

325 MSymb/s



2 bits/dim

1.5 bits/dim

1976 bits/CW

1976 bits/CW

1668 bits/CW

1482 bits/CW


POF


PAM16 multi-stage decoder - PAM to 2D demux

25



POF



26

QAM16detector

Λ2− t

mod-Λ1[-4, 4)

BCH decoder

16-QAM mapper

Λ1− t (1)

Λ1t (1)-

QAM8 detector

mod-Λ2[-4, 4)

QAM8de-mapperΛ1

− t (2)

Info bits

Decoded codeword

3150 bits/CW

MLC

C m

ultip

lexer

Info bits

FIFO1,2

QAM16de-mapper

FIFO1

FIFO2

PAM to RZ2

demux


symbols/CW

325 MSymb/s



2 bits/dim

1.5 bits/dim

1976 bits/CW

1976 bits/CW

1668 bits/CW

1482 bits/CW


POF


PAM16 multi-stage decoder - 1st level input

27



POF



28

QAM16detector

Λ2− t

mod-Λ1[-4, 4)

BCH decoder

16-QAM mapper

Λ1− t (1)

Λ1t (1)-

QAM8 detector

mod-Λ2[-4, 4)

QAM8de-mapperΛ1

− t (2)

Info bits

Decoded codeword

3150 bits/CW

MLC

C m

ultip

lexer

Info bits

FIFO1,2

QAM16de-mapper

FIFO1

FIFO2

PAM to RZ2

demux


symbols/CW

325 MSymb/s



2 bits/dim

1.5 bits/dim

1976 bits/CW

1976 bits/CW

1668 bits/CW

1482 bits/CW


POF


PAM16 multi-stage decoder - 2nd level input

29



POF


1000BASE-RH receiver operation

50 m of POF at sensitivity


POF



31

ADC

AGC

SYNCHTRFRAC-N PLL

325 MHz

Freq control

Gain control


DSP

S1, S

2

S2

PAM16MSD

BinaryDescr.


Decod.

GMII

THP to PMA


POF


1000BASE-RH PHY estimated channel

32


0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5−25

−20

−15

−10

−5

0Channel response − Freq (dB)

Hc

0 2 4 6 8 10 12−0.05

0

0.05

0.1

0.15

0.2

0.25

0.3

0.35

0.4Channel response − Time

Hc


POF


1000BASE-RH PHY estimated THP

33


0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5−15

−10

−5

0

5

10

15

20

25Equalizer − Freq (dB)

FFFFBFTHP

0 2 4 6 8 10 12 14 16−1.5

−1

−0.5

0

0.5

1

1.5

2

2.5

3Equalizer − Time

FFFFBF


POF



34

ADC

AGC

SYNCHTRFRAC-N PLL

325 MHz

Freq control

Gain control


DSP

S1, S

2

S2

PAM16MSD

BinaryDescr.


Decod.

GMII

THP to PMA


POF


−50 −40 −30 −20 −10 0 10 20 30 40 500

50

100

150

200

250

300

350

400

450Equalized symbols 1D

1000BASE-RH PHY equalized 1D symbols

35


Histogram shows the constellationexpansion produced by THP


POF



36

QAM16detector

Λ2− t

mod-Λ1[-4, 4)

BCH decoder

16-QAM mapper

Λ1− t (1)

Λ1t (1)-

QAM8 detector

mod-Λ2[-4, 4)

QAM8de-mapperΛ1

− t (2)

Info bits

Decoded codeword

3150 bits/CW

MLC

C m

ultip

lexer

Info bits

FIFO1,2

QAM16de-mapper

FIFO1

FIFO2

PAM to RZ2

demux


symbols/CW

325 MSymb/s



2 bits/dim

1.5 bits/dim

1976 bits/CW

1976 bits/CW

1668 bits/CW

1482 bits/CW


POF


PAM16 multi-stage decoder - PAM to 2D demux

37



POF



38

QAM16detector

Λ2− t

mod-Λ1[-4, 4)

BCH decoder

16-QAM mapper

Λ1− t (1)

Λ1t (1)-

QAM8 detector

mod-Λ2[-4, 4)

QAM8de-mapperΛ1

− t (2)

Info bits

Decoded codeword

3150 bits/CW

MLC

C m

ultip

lexer

Info bits

FIFO1,2

QAM16de-mapper

FIFO1

FIFO2

PAM to RZ2

demux


symbols/CW

325 MSymb/s



2 bits/dim

1.5 bits/dim

1976 bits/CW

1976 bits/CW

1668 bits/CW

1482 bits/CW


POF


PAM16 multi-stage decoder - 1st level input

39



POF



40

QAM16detector

Λ2− t

mod-Λ1[-4, 4)

BCH decoder

16-QAM mapper

Λ1− t (1)

Λ1t (1)-

QAM8 detector

mod-Λ2[-4, 4)

QAM8de-mapperΛ1

− t (2)

Info bits

Decoded codeword

3150 bits/CW

MLC

C m

ultip

lexer

Info bits

FIFO1,2

QAM16de-mapper

FIFO1

FIFO2

PAM to RZ2

demux


symbols/CW

325 MSymb/s



2 bits/dim

1.5 bits/dim

1976 bits/CW

1976 bits/CW

1668 bits/CW

1482 bits/CW


POF


PAM16 multi-stage decoder - 2nd level input

41



POF


Coded PAM16 performance reminder

Material presented in January 2015


POF


Coded PAM16 - Performance

43

BER = 10-12

Coding-gain 6.35 dB

−2 0 2 4 6 8 10 12 14 1610−16

10−14

10−12

10−10

10−8

10−6

10−4

10−2

3.5 bits/dim, 16−PAM, 3.18826 b/s/Hz/dim, MLCC 1976, Error−rate vs. SNR norm

SNRnorm (dB)

Erro

r Rat

e

SER − InputBER − InputSER − UncodedBER − UncodedShannon−BoundCapacity−BoundBER − Input level 1BER − Output level 1BER − Input level 2BER − Output level 2MLCC BER


POF


Coded PAM16 - Performance analysis

44

-- BER analysis: --Channel: THPLevel 1: BCH(1976, 1668, 28) m = 11Spect. Eff.: 3.18826 b/s/Hz/dimShannon gap (BER = 1e-12): 5.87 dBCapacity bound gap (BER = 1e-12): 4.56 dBSNR (BER = 1e-12): 25.01 dBUncoded gap (BER = 1e-12): 12.2 dBCoding gain (BER = 1e-12): 6.35 dBInput SER (BER = 1e-12): 0.0132918Input BER (BER = 1e-12): 0.00291155Input BER MLC level 1 (BER = 1e-12): 0.00332296Input BER MLC level 2 (BER = 1e-12): 2.06509e-27

-- MTTFPA analysis: --MLC level 1:! MTBE (BER = 1e-12): 09 h:31 m:44 s! MTTFPA with FCS detect (BER = 1e-12): 4.7e+06 y! MTTFPA with BCH detect (BER = 1e-12): 1.1e+27 y! MTTFPA with BCH & FCS detect (BER = 1e-12): 4.7e+36 yMLC level 2:! MTBE (BER = 1e-12): 3.3e+10 y! MTTFPA with FCS detect (BER = 1e-12): 1.4e+20 y

MLC as a whole:! MTBE (BER = 1e-12): 09 h:31 m:44 s! MTTFPA -PHY & FCS- (BER = 1e-12): 1.4e+20 y! MTTFPA -just PHY- (BER = 1e-12): 3.3e+10 y

-- PER analysis: --! Eth Frame Size = 64 bytes, PER = 1.1e-10 (BER = 1e-12)! Eth Frame Size = 256 bytes, PER = 1.6e-10 (BER = 1e-12)! Eth Frame Size = 512 bytes, PER = 1.9e-10 (BER = 1e-12)! Eth Frame Size = 1024 bytes, PER = 3.7e-10 (BER = 1e-12)! Eth Frame Size = 1522 bytes, PER = 5.4e-10 (BER = 1e-12)

High coding gain. Basically, it is responsibleof 6 dBo of link budget, considering thatthe TIA has to implement an AGC based on trans-impedance control

FCS does not suffice to provide MTTFPA > age of universe. Error detection capability of BCH is needed. Error detection capability will also avoid error propagation in Ethernet frames encapsulation due to bad frame delimiters detection.

Low PER. Because the error arrives inbursts from FEC decoder and BCH error detection capability is used.PER < BER*PktSz/10

MAC FCS is not required for MTTFPA. BCH suffices to detect packet errors, and the MTBE of second level is > age of universe. The MTTFPA is determined by the second level, which is the minimum.

High input BER to Level 1.This is good for an implementation of Link Monitor able to determine the link quality accurately and fast. Bit errors corrected by the BCH decoder per codeword may be a good estimate of the received signal quality.


POF


Coded PAM16 - Performance analysis• Errors burst length statistics for an erroneous code-word event (MC simulation):

45

20 25 30 35 40 45 50 55 60 650

1000

2000

3000

4000

5000

6000

7000

8000

9000

Bit errors per FEC CW

FEC errors burst length histogram

mean 37.3751, std 4.92145


POF


Coded PAM16 - Performance analysis• Errors burst length statistics for an erroneous code-word event (MC simulation):

46

0 5 10 15 20 25 30 35 400

2000

4000

6000

8000

10000

12000

14000

16000

18000

Bit errors per MLC level

FEC errors burst length histogram

Level 1: mean 25.94, std 2.55

Level 2: mean 11.44, std 3.94


POF


Coded PAM16 - Performance analysis• Link budget, MTBE and MTTFPA as a function of BER:

47

BER ≤ 10-10 BER ≤ 10-11 BER ≤ 10-12 BER ≤ 10-13 BER ≤ 10-14

MTBE

MTTFPA -PHY + FCS- (years)

MTTFPA -only PHY- (years)

5m:45s 57m:28s 9h:32m 4 days 39 days

6,9·1018 3,2·1019 1,4·1020 6,0·1020 2,4·1021

1,6·109 7,4·109 3,3·1010 1,4·1010 5,7·1011

Age of universe ≃ 13.8·109 years


POF


Questions?

Documents

1000BASE-RH PHY system simulationsgrouper.ieee.org/groups/802/3/bv/public/Sep_2015/... · IEEE 802.3bv Task Force - September 2015 P O F Knowledge Development 1000BASE-RH PHY simulation