New High Frequency Switching Method of Cascaded Multilevel Inverters in PV Application

S. Y. MOSAZADEH, S. H. FATHI, H. RADMANESH Department of Electrical engineering Amirkabir university of technology

Tehran, Iran

Abstract— in recent years, interest of using multilevel inverters have been increased. Among different types of multilevel inverters cascaded one is a good choice of power conditioning in renewable energy application, because of their simplicity, modularity, low switches voltage stress and less number of components. Different switching techniques have been proposed for equal power sharing between cells of multilevel inverter. Low order harmonics and inter harmonics in output voltage of multilevel inverter are problems caused by voltage ripple in dc link capacitors. For solving these problems, a large DC capacitor is needed which increases cost and size of the system and reduces lifetime and reliability. Among multilevel switching techniques, In Phase Disposition pulse width modulation (IDPPWM) have the lowest amount of harmonics. In this method power delivery of the inverter cells are not equal. In this paper a method that improves power sharing in IDPPWM is proposed for photovoltaic (PV) application. This method is compared with similar switching patterns in aspects of dc link voltage ripple and amount of DC link capacitor. The switching pattern is applied to a 7 level inverter in which each H-bridge or cell is connected to a PV array operated at maximum power point (MPP). The 7 level inverter supplies a standalone AC inductive load. Simulations are implemented using MATLAB/SIMULINK software and the results confirm effectiveness of the proposed method in balancing power sharing among different inverter cells and requiring smaller DC link capacitors.

Keywords-component; Multilevel Inverters, Power Conditioning, PWM switching, Power sharing, Photovoltaic System

I. INTRODUCTION Nowadays multilevel inverters are being used in many

applications such as flexible AC transmission systems (FACTS), variable speed drives and renewable energy conditioning devices [1]. Multilevel inverters have advantage such as low stress of switches, higher voltage capability and sine similar output voltage waveform [2]. Different topologies have been proposed for multilevel inverters, the most popular of which are diode clamped, flying capacitors and cascade H-bridges (CHB) [3] and [4]. Among multilevel inverters, cascaded one which uses a string of H-bridge inverters, due to following reasons, is more interesting in power conditioning applications: For generating the same voltage levels, compared to the other configuration, CHB requires least number of elements such as capacitors and diodes. Because of using H-bridge inverters, this configuration has modular

feature and independent maximum power point tracking (MPPT) in Photovoltaic (PV) and wind application can be obtained [5],[6]. Cascaded Multilevel inverters (CMI) have been used as power conditioner in wind and solar applications for aforementioned reasons. In these applications, equal power sharing between different cells of CMI is a concern. Several low and high frequency switching patterns have been used in multilevel inverters. Optimal minimization of the total harmonic distortion (OMTHD) [7-8] and Optimized harmonic stepped waveform (OHSW)[9] are common technique in low frequency switching category. High frequency switching patterns are classified into space vector PWM (SVM) and sinusoidal PWM (SPWM) [10]. SPWM is also classified into two categories as: single carrier SPWM (SCPWM) and sub-Harmonics PWM [11]. In Phase Disposition pulse width modulation (IDPPWM) is a kind of SCPWM category which produces lower total harmonics distortion (THD). In this method, because of different active periods of the cells, diverse powers are delivered by CMI’s cells. For solving this problem in IDPPWM, a method has been proposed in [12] for PV application which will be discussed in this paper for comparative study. In this paper a switching method is proposed for Photovoltaic application, which is a modified version of that introduced in [12].

In this paper, first, PV model and MPPT is discussed. MPPT verification is checked by simulation results. Then the switching method of [12] is applied to a standalone ac load and finally the proposed switching pattern is simulated. Simulations are implemented using MATLAB/SIMULINK. The results verify the effectiveness of the proposed switching method for decreasing the dc link voltage ripples, which cause inter harmonics in output voltage of multilevel inverter [13]. By reducing the dc voltage ripples, smaller capacitors are required, causing cost and weight reduction, therefore, durability and reliability of the whole system are increased.

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II. PV AND MPPT SIMULATION Photovoltaic cells can directly convert sunlight energy into

electrical energy. As shown in Fig.1, a photovoltaic cell’s equivalent circuit consists of a current source (Iph) which represents cell photocurrent; Rseries represents internal

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resistance of the cell and a parallel diode. The shunt resistance (RShunt) models the leakage current of the cell, which is usually neglected [14].

Fig.1. Equivalent circuit for PV cell

The output current of photovoltaic cell is described by Eq.1

[15]:

)1/)((exp(0 ���� kTmRIVqIII sph (1) Where k, m, T and q are Boltzmann’s constant, the ideality

factor of the diode, absolute temperature of the cell and electron charge, respectively. I0 is also the dark saturation current of the cell.

The photocurrent is a function of temperature and sun irradiance described by the following equation:

GTTII refcSC ).(( ��� � (2)

Where, G and � are solar irradiance level and temperature coefficient of short circuit current, respectively. The output voltage and current of each photovoltaic cell are too small, so the cells should be connected in series and parallel groups to constitute a module; Hence Equ.1 should be rewritten as follows:

)1/)//((exp(0 ���� kTmNRINVqININI PsSPphP (3)

Where, NP is the number of parallel and NS is the number of

series connected photovoltaic cells in each module. Parameters of simulated PV module are listed in table (1).

Table (1). Parameters of the PV module

Voc 21.7 V VMPPT 17 V

ISC 4.8 A IMPPT 4.4 A

NS 36

Ten PV modules are connected in series to form a PV array. Fig.2 shows the simulated P-V characteristic under different solar irradiance (1000w/m2 and 800w/m2).

Fig.2. P-V characteristic of the PV array

The output power of PV array depends on temperature and solar irradiance; hence, the photovoltaic system should be able to track the operation point in order to obtain the maximum power. Due to its simplicity, perturb and observe (P&O) method is implemented in this paper. This method is implemented via a boost converter. By applying a small perturbation in the terminal voltage, the output power is measured and according to the algorithm depicted in Fig.3, the boost converter is controlled [16].

Fig.3. Flowchart of p & o method

Fig.4 shows the simulated PV and MPPT system in MATLAB/SIMULINK software. Considering PV, Boost converter and a 100� resistive load, for evaluating the effectiveness of the MPPT system, solar irradiance is changed at t=.8s from 800w/m2 to 1000w/m2, then is reduced at t=1.5s to 800w/m2. The output power is shown in Fig .5. This figure shows that PV array delivered 600 watt which is maximum power of PV according to P-V characteristic shown in Fig.3 under 800w/m2 solar irradiance and by changing the solar irradiance to 1000 w/m2 , the PV delivers about 750 watt which is also the maximum power of the PV array according to Fig.2.

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Fig.4. PV and MPPT configuration

Fig.5. Output power of the PV system

III. CASCADED MULTILEVEL INVERTER Different topologies have been introduced for multilevel inverters. Because of the aforementioned reasons, cascaded multilevel inverters are a good choice in power conditioning application. Fig.6 shows a seven level cascaded multilevel inverter. The number of level can be increased by adding series full (H) - bridge inverters. The number of phase voltage levels (m) is as follow:

12 �� Sm (4)

Where, S is the number of cascaded H-bridge (cells). The output voltage of each cell is given as:

VPPV DCiiHi ).( 21 �� (5)

Where, P1i and P2i can be (1, 0), so from Equ.5, VHi can be (- VDC , 0 and + VDC ). By increasing the number of cascaded full bridge inverters the output voltage will be more similar to a sine wave; hence, the output voltage will contain lower THD.

Fig .6 .7-level cascaded multilevel inverter (CMI)

IV. IN PHASE SHIFTED PWM ''In phase disposition PWM'' has low distortion harmonics

[12]. In this method, the phase and amplitude of different cell’s carrier signals are the same but the dc level are different. These carrier signals are compared with the reference sine wave. In 7-level inverter, the amplitude of carrier signals is 2/ (m-1) =1/3. Different active periods of these cells are caused by these different DC levels of carrier signals.

Carrier waveforms of “In Phase Disposition SPWM” switching are depicted in Fig.7 with 5kH switching frequency. By comparing the carrier waves as shown in Fig.7, for a given reference sinusoidal wave, active period of the upper cells will be shorter than that of the lower cells.

Fig .7.carrier wave of In Phase Disposition PWM method

V. PROPOSED METHOD IN [12] As mentioned before, due to different DC levels of carrier waves in IPDSPWM method, diverse powers are delivered by the cells of multilevel inverter, so for delivering equal powers by the cells, the average DC level of carrier waves of different cells should be the same. In method proposed in [12], by shifting DC levels of carrier waves at quarter of fundamental

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frequency (i.e. 50Hz or 60 Hz), equal power sharing is obtained. Fig .8 shows the corresponding carrier waves for 7-level inverter. In Fig.8 (b), the red color wave is the upper cell’s carrier wave; The dc level of which is swapped after a quarter of fundamental frequency. Similar swapping is exerted to the other carriers.

Fig.8(a). carrier wave of proposed method in [12].

Fig. 8(b). Simulated carrier wave of proposed method in [12]

VI. PROPOSED METHOD In this method, dc levels of the carrier signals are proposed to be swapped at each switching period (period of switching frequency), rather than a quarter of the fundamental output period, employed in the previous method. Equal power sharing between cells is obtained. Because of swapping DC level of each carrier at switching period, charging and discharging of DC link capacitors occur at higher frequency. Therefore, fluctuations in the voltage across the dc link capacitors are decreased. Simulated carrier waves are shown in Fig .9. In this figure the carrier wave of the upper cell is shown by red color. As it is seen, after one switching period, its dc level is swapped with the carrier wave of another cell of multilevel inverter.

Fig .9. Carrier wave of proposed method

VII. APPLYING THE METHOD OF [12] AND PROPOSED METHOD IN THIS PAPER TO PV CONNECTED

MULTILEVEL INVERTER In this section the proposed method and switching method proposed in [12] are applied in PV connected multilevel inverter. Fig .10 shows simulation circuit.

Fig10. Configuration of simulated circuit

In Fig.10, PV arrays represented by rectangular boxes are connected as multilevel inverter’s DC source. Capacity of DC link capacitors are chosen 1 mF and the PV connected multilevel inverter supplies an AC inductive load that its impedance is given here:

�� 1571005502100 ���� .***z Furthermore, solar irradiance during the simulation is kept constant at 800w/m2 and other parameter of simulated PV has been listed in table (1), the switching frequency in this simulation is 5 kH. Firstly, the proposed method in [12] is implemented in switching of PV connected multilevel inverter. Fig.11 shows produced power of different cells which confirms the effectiveness of the switching method in balancing power sharing among different cells (i.e. PV arrays) of multilevel inverter; Furthermore Fig.11 shows that each PV array is implemented in maximum power point (i.e. 600watt under 800 w/m2 according to P-V characteristic shown in Fig.2 ). Fig. 12 and Fig.13 show different capacitor link voltages and output voltages of different cells of the multilevel inverter, respectively. As shown in Fig.13, output voltage of each cell which shows the on or off state of the switches, is asymmetric in one cycle of the fundamental frequency. In other word the interval that output voltage of each cell are negative is not equal to the interval that each cell voltage is positive, hence the charging and discharging periods of dc link capacitors will

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not be equal after one cycles, unlike in conventional switching pattern. Furthermore, although the switching method causes a balanced average power sharing between the three modules, there is an inter-cycle difference in operation of the cells, so the voltage ripples that causes inter harmonics in the output voltage of multilevel inverter will be higher in this switching pattern, unless larger capacitors are used in dc links.

Fig.11 power of different PV arrays by applying proposed switching

pattern in [11]

Using larger capacitors increase cost and volume and decrease reliability and lifetime of total PV connected multilevel inverters, so decreasing the capacitor is beneficial. According to the simulation result in Fig.12 DC voltage ripples in each dc link are about 12 % by using C=1 mF =1000 uF capacitor.

Fig.12 dc link capacitor voltages of inverter cells by applying the switchnig pattern proposd in [12]

Fig.13 output voltage of inverter cells by applying switching pattern of [12]

Then proposed switching pattern in this paper is applied to simulated circuit as shown in Fig.10. All parameters of the simulation are the same with the pervious case except these carrier waves of switching pattern which has been shown in Fig.7. Fig.14 shows that each PV array operates in their maximum power point (i.e. 600 watt at 800w/m2 solar irrational), so equal power sharing is obtained in this switching pattern.

Fig.14 power of different PV arrays by applying proposed switching pattern

. Dc link capacitor voltages and output voltages of different

multilevel inverter cells are shown in Fig.15 and Fig.16 respectively. As shown in Fig.14, because of displacing the DC level of carrier wave of different cells at one switching period, compared to the method of [12], the output voltages of the cells are more symmetric; hence charging and discharging intervals of dc link capacitors, after one fundamental cycle will be equal. Furthermore in this method, not only the average power delivered by different cells of CMI are equal but also the inter-cycle difference in power delivered by the cells is less than the previous method. Since the DC level of carrier waves are swapped at each switching cycle (i.e. 1/5000 s for 5kH switching frequency), as shown in Fig.15 the voltage ripple of dc link capacitors is about 3%, which is less than that obtained by switching method of [12]. This means that smaller capacitors are adequate for dc links, if the proposed method is employed. Output voltage of multilevel inverter which is fed by three PV array with the proposed method is also shown in Fig.17.

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Fig.15 dc link capacitor voltages of inverter cells by applying

proposed switching pattern

Fig.16 output voltage of inverter cells by applying proposed

switching pattern

Fig.17- seven level output voltage of PV connected multilevel

inverter by using this proposed method Conclusion

In this paper, a novel switching pattern which modifies the '' In Phase Disposition'' switching method is proposed. This method was applied to a 7-level inverter feed by three photovoltaic arrays operated at their maximum power point. Simulation results show that the proposed method not only solves different power sharing problem among different cells of multilevel inverters in IPDSPWM method, but also in comparison with previous methods, smaller amount of dc link capacitors are needed. Reliability and lifetime of total system are increased and the cost and volume of the system are decreased by using smaller dc link capacitors.

[1] A. Shojaei, S. H. Fathi and N. Farokhnia, “Power Sharing Improvement in Cascaded Multilevel Inverters,” 14th International Power Electronics and Motion Control Conference, EPE-PEMC 2010 , PP. T3-88 - T3-92,2010J. Clerk Maxwell, A Treatise on Electricity and Magnetism, 3rd ed., vol. 2. Oxford: Clarendon, 1892, pp.68–73.

[2] I S. Ali Khajehoddin, Alireza Bakhshai and Praveen Jain, “The Application of the Cascaded Multilevel Converters in Grid Connected Photovoltaic Systems,” 2007 IEEE Canada Electrical Power Conference, PP.296 – 301,2007.

[3] A. Nabae, I. Takahashi, H. Agaki, “A New Neutral-Point-Clamped PWM, Inverter,” IEEE Transactions on Industry Applications. Vol.IA-17, No.5, Sep./Oct., 1981, pp.518-523. 1981..

[4] R. F. Z. Peng, J-S Lai, “Multilevel Converters – A New Breed of Power Converters” IEEE Transactions on Industry Applications, Vol.32, No.3, May/June, , PP. 509-517,1996.

[5] E. Villanueva, P. Correa, J. Rodriguez, and M. Pacas, “Control of a single-phase cascaded h-bridge multilevel inverter for grid-connected photovoltaic systems,” IEEE Transactions on Industrial Electronics, vol. 56, no. 11, PP. 4399–4406, Nov. 2009.

[6] Cecati, F. Ciancetta, and P. Siano “A multilevel inverter for photovoltaic systems with fuzzy logic control,,” IEEE Transactions on Industrial Electronics, , vol. 57, no. 12, PP. 4115–4125, Dec. 2010.

[7] Y. Sahali, and M. K. Fellah, “Comparison between Optimal Minimization of Total Harmonic Distortion and Harmonic Elimination with Voltage Control candidates for Multilevel Inverters” Journal of Electrical Systems, pp. 32-46, 2005.

[8] M. G. Hosseini-Aghdam, S. H. Fathi, and G. B. Gharehpetian “Comparison of OMTHD and OHSW Harmonic Optimizatio Techniques in Multi-Level Voltage-Source Inverter with Non-Equal DC Sources”, in proceeding International Conference on Power System (ICPE), PP. 587 - 591 ,2007.

[9] Kaviani, A. Kashefi; Fathi, S.H.; Farokhnia, N.; Ardakani, A. Jahanbani; “PSO, an effective tool for harmonics elimination and optimization in multi-level inverters” 4th IEEE Conference on Industrial Electronics and Applications, ICIEA 2009 , pp. 2902 – 2907, May 2009

[10] Jing Ning; and Yuyao He, “Phase-Shifted Suboptimal Pulse-Width Modulation Strategy for Multilevel Inverter, ” Industrial Electronics and Applications, 2006 1ST IEEE Conference on ICIEA,PP. 1-5, 2006.

[11] Patel, D.; Saravanakumar, R.; Ray, K.K.; Ramesh, R.; “A Review of Various Carrier based PWM Methods for Multilevel Inverter”, Power Electronics (IICPE), 2010 India International Conference ,pp,1-6,2011.

[12] Faete Filho, Yue Cao, Leon M. Tolbert, “11-level Cascaded H-bridge Grid-tied Inverter Interface with Solar Panels,” Applied Power Electronics Conference and Exposition (APEC), 2010 Twenty-Fifth Annual IEEE ,PP. 968 – 972,2010.

[13] C. H. Ng, M. A. Parker, Li Ran, P. J. Tavner, J. R. Bumby, and E. Spooner, “A Multilevel Modular Converter for a Large, Light Weight Wind Turbine Generator”, IEEE Trans. on Power Electronics, Vol. 23, Issue 3, pp. 1062-1074, 2008

[14] D B.C Chen; C.L Lin, “Implementation of Maximum-Power-Point Tracker for Photovoltaic Arrays, ” Industrial Electronics and Applications (ICIEA), 2011 6th IEEE Conference, P.P.1621-1626,2011

[15] Y. Jiang; A. Abu Qahouq;, M. Orabi “Matlab/Pspice Hybrid Simulation Modeling of Solar PV Cell/Module Applied Power Electronics Conference and Exposition (APEC), 2011 Twenty-Sixth Annual IEEE, P.P.1244-1250,2011

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