17 February 2010 The Silicon Vertex Detector of the Belle II Experiment VCI 2010 M.Friedl, T.Bergauer, I.Gfall, C.Irmler, M.Valentan (HEPHY Vienna)

17 February 2010

The Silicon Vertex Detector of the Belle II Experiment

VCI 2010

M.Friedl, T.Bergauer, I.Gfall, C.Irmler, M.Valentan (HEPHY Vienna)

2Markus Friedl (HEPHY Vienna)17 February 2010


IntroductionBelle II: The FutureSuperSVD ComponentsAPV25 & Time ResolutionReadout SystemSummary

Contents



Linac

Belle

KEKB

KEKB and Belle @ KEK• Asymmetric machine:

8 GeV e- on 3.5 GeV e+

• Center of mass energy: Y(4S) (10.58 GeV)

• High intensity beams (1.6 A & 1.3 A)

• Integrated luminosity 1 ab-1 recorded by end of 2009

~1 km in diameter

Mt. Tsukuba

KEKBBelle

Linac

About 60km northeast of Tokyo



„…the two particle detectors BaBar at Stanford, USA and

Belle at Tsukuba, Japan, both detected broken symmetries…“

(Press Release of the Swedish Academy)

2008 Nobel Prize in Physics

T. MaskawaM. Kobayashi



µ / KL detection 14/15 lyr. RPC+Fe

CsI(Tl) 16 X0

Si vertex detector 4 lyr. DSSD

SC solenoid 1.5 T

8 GeV e-

3.5 GeV e+

Aerogel Cherenkov counter n=1.015~1.030

Central Drift Chamber small cell +He/C2H5

TOF counter

Belle Detector (1999–2010)



The Present: SVD2 – Overview

• 4 layers (6/12/18/18 ladders), r = 2.0…8.8 cm • 17°…150° polar angle coverage• 246 double sided silicon detectors (DSSDs), 0.5 m2 overall active

area• VA1TA readout chip (Viking variant; 800ns shaping time) • 110592 channels in total






KEKB/Belle upgrade (2010–2013)

• Aim: super-high luminosity ~81035 cm-2s-1 11010 BB / year• LoI published in 2004; TDR is presently being written• Refurbishment of accelerator and detector required

http://belle2.kek.jp



Belle II SVD Upgrade (2010–2013)

• Present SVD limitations are– occupancy (currently ~10% in

innermost layer) need faster shaping

– dead time (currently ~3%) need faster readout and pipeline

• Needs Silicon Vertex Detector with– high background tolerance– pipelined readout– robust tracking– low material budget in active

volume (low energy machine)

Current SVD is not suitable for Belle II

• Ultimately 40-fold increase in luminosity (~81035 cm-2s-1)



Present SVD2 Layout

• 4 straight layers of 4" double-sided silicon detectors (DSSDs)• Outer radius of r~8.8 cm • Up to 3 sensors are ganged

and read out by one hybridlocated outside of acceptance

0

0

10

12

34

[cm]

layers

[cm]

20

-10-20-30 10 20 30 40



0

0

10

1+23

45

6[cm] layers

[cm]

20

-10-20-30 10 20 30 40

SuperSVD Layout

• Geometry optimization is underway• New central pixel double-layer using

DEPFET• Strip layers extend to r~14 cm• Every sensor is read out individually

(no ganging) to maintain good S/N chip-on-sensor concept

Double-layer of DEPFET pixels

4 layers of double-sided strip sensors






Double-sided Silicon Strip Detectors

• Only 3 different sensor designs for SuperSVD (2 x , 1 x )• 6” prototypes ordered from Hamamatsu (rectangular) and Micron

(trapezoidal)• Currently in production, expected in April and summer

Atoll p-stop designTrapezoidal sensor with test structures



APV25 Readout Chip

• Developed for CMS (LHC) by IC London and RAL (70k chips installed)• 0.25 µm CMOS process (>100 MRad tolerant)• 40 MHz clock (adjustable), 128 channels• 192 cell analog pipeline no dead time • 50 ns shaping time low occupancy • Low noise: 250 e + 36 e/pF must minimize capacitive load!!!• Multi-peak mode (read out several samples along shaping curve)• Thinning to 100µm successful

Schematics of one channel



Origami – Chip-on-Sensor Concept

• Chip-on-sensor concept for double-sided readout• Flex fan-out pieces wrapped to opposite side (hence “Origami“)• All chips aligned on one side single cooling pipe

Prototype for 4” DSSD(later with 6” sensors)

Side View (below)

zylon rib

APV25 cooling pipe

3-layer kapton hybrid

integrated fanoutDSSD

double-layer flex wrapped to p-side

APV25(th inned to 100µm )

zylon ribcooling pipe

DSSDRohacellKapton



16

4th Open Meeting of the Belle II Collaboration

First Origami Module

• Top and bottom side Origami concept (4” sensor)• Prototype completed in August 2009• Successfully evaluated in lab and beam tests



Sketch of the Outermost Ladder (Layer 6)

• Composed of 5 x 6” double-sided sensors• Center sensors have Origami structure• Border sensors are conventionally read out from sides

Connector (Nanonics)

Structural element (CF)

Cooling pipe

Flex circuits

Electronics for border sensor

Electronics for border sensor

ca. 60cm



3D Rendering (preliminary)

• Carried by ribs made of carbon fiber and Rohacell

• Averaged material budget: 0.58% X0

• Cooling options under study






APV25 – Hit Time Reconstruction

• Possibility of recording multiple samples (x) along shaped waveform (feature of APV25)

• Reconstruction of peak time (and amplitude)by waveform fit

• Will be used toremove off-timebackground hits

0 50 100 150 200 250 300

0

5000

10000

15000

20000

25000

30000

S peak

tpeak

Measurement



Measured Hit Time Precision

• Results achieved in beam tests with several different types of Belle DSSD prototype modules (covering a broad range of SNR)

• 2...3 ns RMSaccuracy at typical cluster SNR(15...25)

• Working onimplementationin FPGA (using lookup tables) – simulationsuccessful

Time Resolution vs. Cluster SNR

0

1

2

3

4

5

6

7

5 10 15 20 25 30

Cluster SNR [1]

trm

s [n

s]

Previous beam tests

SPS 09 beam test

Log-Log Fit

(TDC error subtracted)

Origami Module



Aim: Occupancy Reduction

Threshold

Threshold

Tim e over threshold ~ 2000ns (m easured)

Tim e over threshold ~ 160ns (measured)

Sensitive tim e window ~ 20ns

VA1TATp~800ns

APV25Tp~50ns

Pulse shapeprocessingRM S(tm ax)~3ns

Gain ~12.5

Gain ~8

Total gain ~100

With hit time reconstruction, we can cope with 40-fold increase in luminosity






Readout System• Prototype readout system exists• Verified in several beam tests• Basis for future SVD system shown below

1902APV25chips

Front-end hybrids Rad-hardvoltage

regulators

Analog level translation, data sparsification andhit time reconstruction

Unified Belle IIDAQ system

~2mcoppercable

J unctionbox

~10mcoppercable

FADC+PROC

CO

PP

ER

Unified opticaldata link (>20m)

Finesse Transmitter Board (FTB)



Prototype Readout System

Repeater BoxLevel translation, buffering

FADC+PROC (9U VME)Digitization, zero-suppression,

hit time reconstruction



Beam Tests

KEK (Apr 2005)

PSI (Aug 2005, Aug 2006)

KEK (Nov 2007, Nov 2008)

CERN (June 2008,September 2009)






Summary

• KEKB is the highest luminosity machine in the world• Belle experiment acknowledged by Physics Nobel Prize 2008• Upgrade of KEKB and Belle (2010-2013)

– 40-fold increase in luminosity– Needs upgrades of all subdetectors

• New, enlarged Silicon Vertex Detector– DEPFET pixel double-layer– Plus 4 strip layers

• Strip Detector R&D– Origami chip-on-sensor concept for low-mass DSSD readout– Readout with hit time reconstruction for improved background

tolerance (up to 100x occupancy reduction w.r.t. now)– Implementation in FPGA hardware (using lookup tables)

SVD

Documents

17 February 2010 The Silicon Vertex Detector of the Belle II Experiment VCI 2010 M.Friedl, T.Bergauer, I.Gfall, C.Irmler, M.Valentan (HEPHY Vienna)