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1N4001-1N
4007
1N4001-1N4007, Rev. C 2001 Fairchild Semiconductor Corporation
1N4001 - 1N4007
General Purpose Rectifiers (Glass Passivated)
Absolute Maximum Ratings* TA = 25°C unless otherwise noted
*These ratings are limiting values above which the serviceability of any semiconductor device may be impaired.
Electrical Characteristics TA = 25°C unless otherwise noted
Features• Low forward voltage drop.
• High surge current capability.
Symbol
Parameter
Device
Units 4001 4002 4003 4004 4005 4006 4007
VF Forward Voltage @ 1.0 A 1.1 V Irr Maximum Full Load Reverse Current, Full
Cycle TA = 75°C 30 µA
IR Reverse Current @ rated VR TA = 25°C TA = 100°C
5.0 500
µA µA
CT Total Capacitance VR = 4.0 V, f = 1.0 MHz
15 pF
DO-41COLOR BAND DENOTES CATHODE
Symbol
Parameter
Value
Units 4001 4002 4003 4004 4005 4006 4007
VRRM Peak Repetitive Reverse Voltage 50 100 200 400 600 800 1000 V IF(AV) Average Rectified Forward Current,
.375 " lead length @ TA = 75°C 1.0 A
IFSM Non-repetitive Peak Forward Surge Current
8.3 ms Single Half-Sine-Wave 30 A
Tstg Storage Temperature Range -55 to +175 °C TJ Operating Junction Temperature -55 to +175 °C
Symbol
Parameter
Value
Units PD Power Dissipation 3.0 W RθJA Thermal Resistance, Junction to Ambient 50 °C/W
Thermal Characteristics
1N4001-1N
4007
1N4001-1N4007, Rev. C 2001 Fairchild Semiconductor Corporation
General Purpose Rectifiers (Glass Passivated)(continued)
Typical Characteristics
0.6 0.8 1 1.2 1.40.010.020.04
0.10.20.4
124
1020
Forward Voltage, VF [V]
Forw
ard
Cur
rent
, IF [
A]
T = 25 C Pulse Width = 300µµµµS2% Duty Cycle
ºJ
1 2 4 6 8 10 20 40 60 1000
6
12
18
24
30
Number of Cycles at 60Hz
Peak
For
war
d Su
rge
Cur
rent
, IFS
M [A
]
0 20 40 60 80 100 120 140 160 1800
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
Ambient Temperature [ºC]Ave
rage
Rec
tifie
d Fo
rwar
d C
urre
nt, I
F [A
]
SINGLE PHASE HALF WAVE
60HZRESISTIVE OR
INDUCTIVE LOAD.375" 9.0 mm LEAD
LENGTHS
0 20 40 60 80 100 120 1400.01
0.1
1
10
100
1000
Percent of Rated Peak Reverse Voltage [%]
Reve
rse
Curr
ent,
I R [m
A]
T = 25 CºJ
T = 150 CºJ
T = 100 CºJ
Figure 1. Forward Current Derating Curve Figure 2. Forward Voltage Characteristics
Figure 3. Non-Repetitive Surge Current Figure 4. Reverse Current vs Reverse Voltage
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHERNOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILDDOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCTOR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENTRIGHTS, NOR THE RIGHTS OF OTHERS.
TRADEMARKSThe following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and isnot intended to be an exhaustive list of all such trademarks.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORTDEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.As used herein:1. Life support devices or systems are devices orsystems which, (a) are intended for surgical implant intothe body, or (b) support or sustain life, or (c) whosefailure to perform when properly used in accordancewith instructions for use provided in the labeling, can bereasonably expected to result in significant injury to theuser.
2. A critical component is any component of a lifesupport device or system whose failure to perform canbe reasonably expected to cause the failure of the lifesupport device or system, or to affect its safety oreffectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
This datasheet contains the design specifications forproduct development. Specifications may change inany manner without notice.
This datasheet contains preliminary data, andsupplementary data will be published at a later date.Fairchild Semiconductor reserves the right to makechanges at any time without notice in order to improvedesign.
This datasheet contains final specifications. FairchildSemiconductor reserves the right to make changes atany time without notice in order to improve design.
This datasheet contains specifications on a productthat has been discontinued by Fairchild semiconductor.The datasheet is printed for reference information only.
Formative orIn Design
First Production
Full Production
Not In Production
OPTOLOGIC™OPTOPLANAR™PACMAN™POP™Power247™PowerTrenchQFET™QS™QT Optoelectronics™Quiet Series™SILENT SWITCHER
FASTFASTr™FRFET™GlobalOptoisolator™GTO™HiSeC™ISOPLANAR™LittleFET™MicroFET™MicroPak™MICROWIRE™
Rev. H4
ACEx™Bottomless™CoolFET™CROSSVOLT™DenseTrench™DOME™EcoSPARK™E2CMOSTM
EnSignaTM
FACT™FACT Quiet Series™
SMART START™STAR*POWER™Stealth™SuperSOT™-3SuperSOT™-6SuperSOT™-8SyncFET™TinyLogic™TruTranslation™UHC™UltraFET
STAR*POWER is used under license
VCX™
NTE130 (NPN) & NTE219 (PNP)Silicon Power Transistor
Audio Power Amp, Medium Speed Switch
Description:The NTE130 (NPN) and NTE219 (PNP) are silicon complementary transistors in a TO3 type casedesigned for general purpose switching and amplifier applications.
Features: DC Current Gain: hFE = 20 – 70 @ IC = 4A Collector–Emitter Saturation Voltage: VCE(sat) = 1.1V (Max) @ IC = 4A Excellent Safe Operating Area
Absolute Maximum Ratings:Collector–Emitter Voltage, VCEO 60V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Collector–Emitter Voltage, VCER 70V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Collector–Base Voltage, VCB 100V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Emitter–Base Voltage, VEB 7V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous Collector Current, IC 15A. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Base Current, IB 7A. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Total Device Dissipation (TC = +25°C), PD 115W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Derate Above 25°C 0.657W/°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating Junction Temperature Range, TJ –65° to +200°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Storage Temperature Range, Tstg –65° to +200°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Thermal Resistance, Junction–to–Case, RthJC 1.52°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical Characteristics: (TC =+25°C unless otherwise specified)
Parameter Symbol Test Conditions Min Typ Max Unit
OFF Characteristics
Collector–Emitter Sustaining Voltage VCEO(sus) IC = 200mA, IB = 0, Note 1 60 – – V
Collector–Emitter Sustaining Voltage VCER(sus) IC = 200mA, RBE = 100Ω, Note 1 70 – – V
Collector Cutoff Current ICEO VCE = 30V, IB = 0 – – 0.7 mA
ICEX VCE = 100V, VBE(off) = 1.5V – – 1.0 mA
VCE = 100V, VBE(off) = 1.5V, TC = +150°C – – 5.0 mA
Emitter Cutoff Current IEBO VBE = 7V, IC = 0 – – 5.0 mA
Note 1. Pulse Test: Pulse Width ≤ 300µs. Duty Cycle ≤ 2%.
Electrical Characteristics (Cont’d): (TC =+25°C unless otherwise specified)
Parameter Symbol Test Conditions Min Typ Max Unit
ON Characteristics (Note 1)
DC Current Gain hFE IC = 4A, VCE = 4V 20 – 70
IC = 10A, VCE = 4V 5 – –
Collector–Emitter Saturation Voltage VCE(sat) IC = 4A, IB = 400mA – – 1.1 V
IC = 10A, IB = 3.3A – – 3.0 V
Base–Emitter ON Voltage VBE(on) IC = 4A, VCE = 4V – – 1.5 V
Second Breakdown
Second Breakdown Collector Currentwith Base Forward Biased
Is/b VCE = 40V, t = 1.0s; Nonrepetitive 2.87 – – A
Dynamic Characteristics
Current Gain–Bandwidth Product fT IC = 500mA, VCE = 10V, f = 1MHz 2.5 – – MHz
Small–Signal Current Gain hfe IC = 1A, VCE = 4V, f = 1kHz 15 – 120
Small–Signal Current Gain CutoffFrequency
fhfe VCE = 4V, IC = 1A, f = 1kHz 10 – – kHz
Note 1. Pulse Test: Pulse Width ≤ 300µs. Duty Cycle ≤ 2%.Note 2. NTE130MP is a matched pair of NTE130 with their DC Current Gain (hFE) matched to within
10% of each other.Note 3. NTE219MCP is a matched complementary pair containing 1 each of NTE219 (PNP) and
NTE130 (NPN).
1.187 (30.16)
.875 (22.2)Dia Max
.665(16.9)
.430(10.92)
SeatingPlane
.040 (1.02).312 (7.93) Min
.135 (3.45) Max
.350 (8.89)
Emitter
Collector/CaseBase
.215 (5.45)
.525 (13.35) R Max
.156 (3.96) Dia(2 Holes)
.188 (4.8) R Max
LM555TimerGeneral DescriptionThe LM555 is a highly stable device for generating accuratetime delays or oscillation. Additional terminals are providedfor triggering or resetting if desired. In the time delay mode ofoperation, the time is precisely controlled by one external re-sistor and capacitor. For astable operation as an oscillator,the free running frequency and duty cycle are accuratelycontrolled with two external resistors and one capacitor. Thecircuit may be triggered and reset on falling waveforms, andthe output circuit can source or sink up to 200mA or driveTTL circuits.
Featuresn Direct replacement for SE555/NE555n Timing from microseconds through hoursn Operates in both astable and monostable modesn Adjustable duty cyclen Output can source or sink 200 mAn Output and supply TTL compatiblen Temperature stability better than 0.005% per ˚Cn Normally on and normally off outputn Available in 8-pin MSOP package
Applicationsn Precision timingn Pulse generationn Sequential timingn Time delay generationn Pulse width modulationn Pulse position modulationn Linear ramp generator
Schematic Diagram
DS007851-1
February 2000LM
555Tim
er
© 2000 National Semiconductor Corporation DS007851 www.national.com
Connection Diagram
Ordering InformationPackage Part Number Package Marking Media Transport NSC Drawing
8-Pin SOIC LM555CM LM555CM RailsM08A
LM555CMX LM555CM 2.5k Units Tape and Reel
8-Pin MSOP LM555CMM Z55 1k Units Tape and ReelMUA08A
LM555CMMX Z55 3.5k Units Tape and Reel
8-Pin MDIP LM555CN LM555CN Rails N08E
Dual-In-Line, Small Outlineand Molded Mini Small Outline Packages
DS007851-3
Top View
LM55
5
www.national.com 2
Absolute Maximum Ratings (Note 2)
If Military/Aerospace specified devices are required,please contact the National Semiconductor Sales Office/Distributors for availability and specifications.
Supply Voltage +18VPower Dissipation (Note 3)
LM555CM, LM555CN 1180 mWLM555CMM 613 mW
Operating Temperature RangesLM555C 0˚C to +70˚C
Storage Temperature Range −65˚C to +150˚C
Soldering InformationDual-In-Line Package
Soldering (10 Seconds) 260˚CSmall Outline Packages
(SOIC and MSOP)Vapor Phase (60 Seconds) 215˚CInfrared (15 Seconds) 220˚C
See AN-450 “Surface Mounting Methods and Their Effecton Product Reliability” for other methods of solderingsurface mount devices.
Electrical Characteristics (Notes 1, 2)(TA = 25˚C, VCC = +5V to +15V, unless othewise specified)
Parameter Conditions Limits Units
LM555C
Min Typ Max
Supply Voltage 4.5 16 V
Supply Current VCC = 5V, RL = ∞VCC = 15V, RL = ∞(Low State) (Note 4)
310
615 mA
Timing Error, Monostable
Initial Accuracy 1 %
Drift with Temperature RA = 1k to 100kΩ, 50 ppm/˚C
C = 0.1µF, (Note 5)
Accuracy over Temperature 1.5 %
Drift with Supply 0.1 %/V
Timing Error, Astable
Initial Accuracy 2.25 %
Drift with Temperature RA, RB = 1k to 100kΩ, 150 ppm/˚C
C = 0.1µF, (Note 5)
Accuracy over Temperature 3.0 %
Drift with Supply 0.30 %/V
Threshold Voltage 0.667 x VCC
Trigger Voltage VCC = 15V 5 V
VCC = 5V 1.67 V
Trigger Current 0.5 0.9 µA
Reset Voltage 0.4 0.5 1 V
Reset Current 0.1 0.4 mA
Threshold Current (Note 6) 0.1 0.25 µA
Control Voltage Level VCC = 15VVCC = 5V
92.6
103.33
114
V
Pin 7 Leakage Output High 1 100 nA
Pin 7 Sat (Note 7)
Output Low VCC = 15V, I7 = 15mA 180 mV
Output Low VCC = 4.5V, I7 = 4.5mA 80 200 mV
LM555
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Electrical Characteristics (Notes 1, 2) (Continued)
(TA = 25˚C, VCC = +5V to +15V, unless othewise specified)
Parameter Conditions Limits Units
LM555C
Min Typ Max
Output Voltage Drop (Low) VCC = 15V
ISINK = 10mA 0.1 0.25 V
ISINK = 50mA 0.4 0.75 V
ISINK = 100mA 2 2.5 V
ISINK = 200mA 2.5 V
VCC = 5V
ISINK = 8mA V
ISINK = 5mA 0.25 0.35 V
Output Voltage Drop (High) ISOURCE = 200mA, VCC = 15V 12.5 V
ISOURCE = 100mA, VCC = 15V 12.75 13.3 V
VCC = 5V 2.75 3.3 V
Rise Time of Output 100 ns
Fall Time of Output 100 ns
Note 1: All voltages are measured with respect to the ground pin, unless otherwise specified.
Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is func-tional, but do not guarantee specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which guar-antee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters where no limit isgiven, however, the typical value is a good indication of device performance.
Note 3: For operating at elevated temperatures the device must be derated above 25˚C based on a +150˚C maximum junction temperature and a thermal resistanceof 106˚C/W (DIP), 170˚C/W (S0-8), and 204˚C/W (MSOP) junction to ambient.
Note 4: Supply current when output high typically 1 mA less at VCC = 5V.
Note 5: Tested at VCC = 5V and VCC = 15V.
Note 6: This will determine the maximum value of RA + RB for 15V operation. The maximum total (RA + RB) is 20MΩ.
Note 7: No protection against excessive pin 7 current is necessary providing the package dissipation rating will not be exceeded.
Note 8: Refer to RETS555X drawing of military LM555H and LM555J versions for specifications.
LM55
5
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Typical Performance Characteristics
Minimuim Pulse WidthRequired for Triggering
DS007851-4
Supply Current vs.Supply Voltage
DS007851-19
High Output Voltage vs.Output Source Current
DS007851-20
Low Output Voltage vs.Output Sink Current
DS007851-21
Low Output Voltage vs.Output Sink Current
DS007851-22
Low Output Voltage vs.Output Sink Current
DS007851-23
LM555
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Typical Performance Characteristics (Continued)
Output Propagation Delay vs.Voltage Level of Trigger Pulse
DS007851-24
Output Propagation Delay vs.Voltage Level of Trigger Pulse
DS007851-25
Discharge Transistor (Pin 7)Voltage vs. Sink Current
DS007851-26
Discharge Transistor (Pin 7)Voltage vs. Sink Current
DS007851-27
LM55
5
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Applications InformationMONOSTABLE OPERATION
In this mode of operation, the timer functions as a one-shot(Figure 1). The external capacitor is initially held dischargedby a transistor inside the timer. Upon application of a nega-tive trigger pulse of less than 1/3 VCC to pin 2, the flip-flop isset which both releases the short circuit across the capacitorand drives the output high.
The voltage across the capacitor then increases exponen-tially for a period of t = 1.1 RA C, at the end of which time thevoltage equals 2/3 VCC. The comparator then resets theflip-flop which in turn discharges the capacitor and drives theoutput to its low state. Figure 2 shows the waveforms gener-ated in this mode of operation. Since the charge and thethreshold level of the comparator are both directly propor-tional to supply voltage, the timing internal is independent ofsupply.
During the timing cycle when the output is high, the furtherapplication of a trigger pulse will not effect the circuit so longas the trigger input is returned high at least 10µs before theend of the timing interval. However the circuit can be resetduring this time by the application of a negative pulse to thereset terminal (pin 4). The output will then remain in the lowstate until a trigger pulse is again applied.
When the reset function is not in use, it is recommended thatit be connected to VCC to avoid any possibility of false trig-gering.
Figure 3 is a nomograph for easy determination of R, C val-ues for various time delays.
NOTE: In monostable operation, the trigger should be drivenhigh before the end of timing cycle.
ASTABLE OPERATION
If the circuit is connected as shown in Figure 4 (pins 2 and 6connected) it will trigger itself and free run as a multivibrator.The external capacitor charges through RA + RB and dis-charges through RB. Thus the duty cycle may be preciselyset by the ratio of these two resistors.
In this mode of operation, the capacitor charges and dis-charges between 1/3 VCC and 2/3 VCC. As in the triggeredmode, the charge and discharge times, and therefore the fre-quency are independent of the supply voltage.
DS007851-5
FIGURE 1. Monostable
DS007851-6
VCC = 5V Top Trace: Input 5V/Div.TIME = 0.1 ms/DIV. Middle Trace: Output 5V/Div.RA = 9.1kΩ Bottom Trace: Capacitor Voltage 2V/Div.C = 0.01µF
FIGURE 2. Monostable Waveforms
DS007851-7
FIGURE 3. Time Delay
DS007851-8
FIGURE 4. Astable
LM555
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Applications Information (Continued)
Figure 5 shows the waveforms generated in this mode ofoperation.
The charge time (output high) is given by:
t1 = 0.693 (RA + RB) C
And the discharge time (output low) by:
t2 = 0.693 (RB) C
Thus the total period is:
T = t1 + t2 = 0.693 (RA +2RB) C
The frequency of oscillation is:
Figure 6 may be used for quick determination of these RCvalues.
The duty cycle is:
FREQUENCY DIVIDER
The monostable circuit of Figure 1 can be used as a fre-quency divider by adjusting the length of the timing cycle.Figure 7 shows the waveforms generated in a divide by threecircuit.
PULSE WIDTH MODULATOR
When the timer is connected in the monostable mode andtriggered with a continuous pulse train, the output pulsewidth can be modulated by a signal applied to pin 5. Figure8 shows the circuit, and in Figure 9 are some waveformexamples.
DS007851-9
VCC = 5V Top Trace: Output 5V/Div.TIME = 20µs/DIV. Bottom Trace: Capacitor Voltage 1V/Div.RA = 3.9kΩRB = 3kΩC = 0.01µF
FIGURE 5. Astable Waveforms
DS007851-10
FIGURE 6. Free Running Frequency
DS007851-11
VCC = 5V Top Trace: Input 4V/Div.TIME = 20µs/DIV. Middle Trace: Output 2V/Div.RA = 9.1kΩ Bottom Trace: Capacitor 2V/Div.C = 0.01µF
FIGURE 7. Frequency Divider
DS007851-12
FIGURE 8. Pulse Width Modulator
DS007851-13
VCC = 5V Top Trace: Modulation 1V/Div.TIME = 0.2 ms/DIV. Bottom Trace: Output Voltage 2V/Div.RA = 9.1kΩC = 0.01µF
FIGURE 9. Pulse Width Modulator
LM55
5
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Applications Information (Continued)
PULSE POSITION MODULATOR
This application uses the timer connected for astable opera-tion, as in Figure 10, with a modulating signal again appliedto the control voltage terminal. The pulse position varies withthe modulating signal, since the threshold voltage and hencethe time delay is varied. Figure 11 shows the waveformsgenerated for a triangle wave modulation signal.
LINEAR RAMP
When the pullup resistor, RA, in the monostable circuit is re-placed by a constant current source, a linear ramp is gener-ated. Figure 12 shows a circuit configuration that will performthis function.
Figure 13 shows waveforms generated by the linear ramp.
The time interval is given by:
VBE . 0.6VDS007851-14
FIGURE 10. Pulse Position Modulator
DS007851-15
VCC = 5V Top Trace: Modulation Input 1V/Div.TIME = 0.1 ms/DIV. Bottom Trace: Output 2V/Div.RA = 3.9kΩRB = 3kΩC = 0.01µF
FIGURE 11. Pulse Position Modulator
DS007851-16
FIGURE 12.
DS007851-17
VCC = 5V Top Trace: Input 3V/Div.TIME = 20µs/DIV. Middle Trace: Output 5V/Div.R1 = 47kΩ Bottom Trace: Capacitor Voltage 1V/Div.R2 = 100kΩRE = 2.7 kΩC = 0.01 µF
FIGURE 13. Linear Ramp
LM555
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Applications Information (Continued)
50% DUTY CYCLE OSCILLATOR
For a 50% duty cycle, the resistors RA and RB may be con-nected as in Figure 14. The time period for the output high isthe same as previous, t1 = 0.693 RA C. For the output low itis t2 =
Thus the frequency of oscillation is
Note that this circuit will not oscillate if RB is greater than 1/2RA because the junction of RA and RB cannot bring pin 2down to 1/3 VCC and trigger the lower comparator.
ADDITIONAL INFORMATION
Adequate power supply bypassing is necessary to protectassociated circuitry. Minimum recommended is 0.1µF in par-allel with 1µF electrolytic.
Lower comparator storage time can be as long as 10µswhen pin 2 is driven fully to ground for triggering. This limitsthe monostable pulse width to 10µs minimum.
Delay time reset to output is 0.47µs typical. Minimum resetpulse width must be 0.3µs, typical.
Pin 7 current switches within 30ns of the output (pin 3) volt-age.
DS007851-18
FIGURE 14. 50% Duty Cycle Oscillator
LM55
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Physical Dimensions inches (millimeters) unless otherwise noted
Small Outline Package (M)NS Package Number M08A
8-Lead (0.118” Wide) Molded Mini Small Outline PackageNS Package Number MUA08A
LM555
www.national.com11
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORTDEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERALCOUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices orsystems which, (a) are intended for surgical implantinto the body, or (b) support or sustain life, andwhose failure to perform when properly used inaccordance with instructions for use provided in thelabeling, can be reasonably expected to result in asignificant injury to the user.
2. A critical component is any component of a lifesupport device or system whose failure to performcan be reasonably expected to cause the failure ofthe life support device or system, or to affect itssafety or effectiveness.
National SemiconductorCorporationAmericasTel: 1-800-272-9959Fax: 1-800-737-7018Email: [email protected]
National SemiconductorEurope
Fax: +49 (0) 180-530 85 86Email: [email protected]
Deutsch Tel: +49 (0) 69 9508 6208English Tel: +44 (0) 870 24 0 2171Français Tel: +33 (0) 1 41 91 8790
National SemiconductorAsia Pacific CustomerResponse GroupTel: 65-2544466Fax: 65-2504466Email: [email protected]
National SemiconductorJapan Ltd.Tel: 81-3-5639-7560Fax: 81-3-5639-7507
www.national.com
Molded Dual-In-Line Package (N)NS Package Number N08E
LM55
5Ti
mer
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
NTE123Silicon NPN Transistor
General Purpose Audio Amplifier, Switch
Absolute Maximum Ratings:Collector–Emitter Voltage, VCEO 40V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Collector–Base Voltage, VCBO 75V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Emitter–Base Voltage, VEBO 6V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous Collector Current, IC 800mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Total Device Dissipation (TA = +25°C), PD 800mW. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Derate Above 25°C 5.33mW/°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Total Device Dissipation (TC = +25°C), PD 3.0W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Derate Above 25°C 20mW/°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating Junction Temperature Range, TJ –65° to +200°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage Temperature Range, Tstg –65° to +200°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical Characteristics: (TA = +25°C unless otherwise specified)
Parameter Symbol Test Conditions Min Typ Max Unit
OFF Characteristics
Collector–Emitter Breakdown Voltage V(BR)CEO IC = 10mA, IB = 0 40 – – V
Collector–Base Breakdown Voltage V(BR)CBO IC = 10µA, IE = 0 75 – – V
Emitter–Base Breakdown Voltage V(BR)EBO IE = 10µA, IC = 0 6 – – V
Collector Cutoff Current ICBO VCE = 60V, IE = 0 – – 0.01 µA
VCE = 60V, IE = 0, TA = +150°C – – 10 µA
ICEX VCE = 60V, VEB(off) = 3V – – 10 nA
Emitter Cutoff Current IEBO VEB = 3V, IC = 0 – – 10 nA
Base Cuttoff Current IBL VCE = 60V, VEB(off) = 3V – – 20 nA
Electrical Characteristics (Cont’d): (TA = +25°C unless otherwise specified)
Parameter Symbol Test Conditions Min Typ Max Unit
ON Characteristics (Note 1)
DC Current Gain hFE IC = 0.1mA, VCE = 10V 35 – –
IC = 1mA, VCE = 10V 50 – –
IC = 10mA, VCE = 10V 75 – –
IC = 10mA, VCE = 10V, TA = –55°C 35 – –
IC = 150mA, VCE = 10V 100 – 300
IC = 150mA, VCE = 1.0V 50 – –
IC = 500mA, VCE = 10V 40 – –
Collector–Emitter Saturation Voltage VCE(sat) IC = 150mA, IB = 15mA – – 0.3 V
IC = 500mA, IB = 50mA – – 1.0 V
Base–Emitter Saturation Voltage VBE(sat) IC = 150mA, IB = 15mA 0.6 – 1.2 V
IC = 500mA, IB = 50mA – – 2.0 V
Small–Signal Characteristics
Current Gain–Bandwidth Product fT IC = 20mA, VCE = 20V,f = 100MHz, Note 2
300 – – MHz
Output Capacitance Cobo VCB = 10V, IE = 0, f = 100kHz – – 8 pF
Input Capacitance Cibo VEB = 0.5V, IC = 0, f = 100kHz – – 25 pF
Input Impedance hie IC = 1mA, VCE = 10V, f = 1kHz 2.0 – 8.0 kΩ
IC = 10mA, VCE = 10V, f = 1kHz 0.25 – 1.25 kΩ
Voltage Feedback Ratio hre IC = 1mA, VCE = 10V, f = 1kHz – – 8 x 10–4
IC = 10mA, VCE = 10V, f = 1kHz – – 4 x 10–4
Small–Signal Current Gain hfe IC = 1mA, VCE = 10V, f = 1kHz 50 – 300
IC = 10mA, VCE = 10V, f = 1kHz 75 – 375
Output Admittance hoe IC = 1mA, VCE = 10V, f = 1kHz 5.0 – 35 µmhos
IC = 10mA, VCE = 10V, f = 1kHz 25 – 200 µmhos
Collector–Base Time Constant rb′Cc IE = 20mA, VCB = 20V, f = 31.8MHz – – 150 ps
Noise Figure NF IC = 100µA, VCE = 10V,RS = 1kΩ, f = 1kHz
– – 4 dB
Real Part of Common–EmitterHigh Frequency Input Impedance
Re(hie) IC = 20mA, VCE = 20V, f = 300MHz – – 60 Ω
Switching Characteristics
Delay Time tq VCC = 30V, VBE(off) = 0.5V, – – 10 ns
Rise Time trIC = 150mA, IB1 = 15mA – – 25 ns
Storage Time ts VCC = 30V, IC = 150mA, – – 225 ns
Fall Time tfIB1 = IB2 = 15mA – – 60 ns
Active Region Time Constant TA IC = 150mA, VCE = 30V – – 2.5 ns
Note 1. Pulse Test: Pulse Width ≤ 300µs, Duty Cycle ≤ 2%.
Note 2. fT is defined as the frequency at which |hfe| extrapolates to unity.
.260(6.6)Max
.500(12.7)Min
.370 (9.39) Dia Max
.355 (9.03) Dia Max
45°
.031 (.793)
Emitter
Base
Collector/Case
.018 (0.45)
NTE123APSilicon NPN TransistorAudio Amplifier, Switch
(Compl to NTE159)
Absolute Maximum Ratings:Collector–Emitter Voltage, VCEO 40V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Collector–Base Voltage, VCB 60V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Emitter–Base Voltage, VEB 6V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous Collector Current, IC 600mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Total Device Dissipation (TA = 25°C), PD 350mW. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Derate Above 25°C 2.8mW/°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Total Device Dissipation (TC = 25°C), PD 1.0W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Derate Above 25°C 8.0mW/°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating Junction Temperature Range, TJ –55° to +150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Storage Temperature Range, Tstg –55° to +150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Thermal Resistance, Junction to Case, RθJC 125°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Thermal Resistance, Junction to Ambient, RθJA 357°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical Characteristics: (TA = +25°C unless otherwise specified)
Parameter Symbol Test Conditions Min Typ Max Unit
OFF Characteristics
Collector–Emitter Breakdown Voltage V(BR)CEO IC = 1mA, IB = 0, Note 1 40 – – V
Collector–Base Breakdown Voltage V(BR)CBO IC = 0.1mA, IE = 0 60 – – V
Emitter–Base Breakdown Voltage V(BR)EBO IE = 0.1mA, IC = 0 6 – – V
Collector Cutoff Current ICEV VCE = 35V, VEB(off) = 0.4V – – 0.1 µA
Base Cutoff Current IBEV VCE = 35V, VEB(off) = 0.4V – – 0.1 µA
ON Characteristics (Note 1)
DC Current Gain hFE VCE = 1V, IC = 0.1mA 20 – –
VCE = 1V, IC = 1mA 40 – –
VCE = 1V, IC = 10mA 80 – –
VCE = 1V, IC = 150mA 100 – 300
VCE = 1V, IC = 500mA 40 – –
Note 1. Pulse Test: Pulse Width ≤ 300µs, Duty Cycle ≤ 2%.
Electrical Characteristics (Cont’d): (TA = +25°C unless otherwise specified)
Parameter Symbol Test Conditions Min Typ Max Unit
ON Characteristics (Note 1) (Cont’d)
Collector–Emitter Saturation Voltage VCE(sat) IC = 150mA, IB = 15mA – – 0.4 V
IC = 500mA, IB = 50mA – – 0.75 V
Base–Emitter Saturation Voltage VBE(sat) IC = 150mA, IB = 15mA 0.75 – 0.95 V
IC = 500mA, IB = 50mA – – 1.2 V
Small–Signal Characteristics
Current Gain–Bandwidth Product fT IC = 20mA, VCE = 10V, f = 100MHz 250 – – MHz
Collector–Base Capacitance Ccb VCB = 5V, IE = 0, f = 100kHz – – 6.5 pF
Emitter–Base Capacitance Ceb VCB = 0.5V, IC = 0, f = 100kHz – – 30 pF
Input Impedance hie IC = 1mA, VCE = 10V, f = 1kHz 1.0 – 15 kΩ
Voltage Feedback Ratio hre IC = 1mA, VCE = 10V, f = 1kHz 0.1 – 8.0 x 10–6
Small–Signal Current Gain hfe IC = 1mA, VCE = 10V, f = 1kHz 40 – 500
Output Admittance hoe IC = 1mA, VCE = 10V, f = 1kHz 1.0 – 30 µmhos
Switching Characteristics
Delay Time td VCC = 30V, VEB(off) = 2V, – – 15 ns
Rise Time trIC = 150mA, IB1 = 15mA
– – 20 ns
Storage Time ts VCC = 30V, IC = 150mA, – – 225 ns
Fall Time tfIB1 = IB2 = 15mA
– – 30 ns
Note 1. Pulse Test: Pulse Width ≤ 300µs, Duty Cycle ≤ 2%.
.021 (.445) Dia Max
E B C
Seating Plane
.135 (3.45) Min
.100 (2.54)
.050 (1.27)
.105 (2.67) Max
.105 (2.67) Max
.205 (5.2) Max
.210(5.33)Max
.500(12.7)Min
.165(4.2)Max
NTE159Silicon PNP TransistorAudio Amplifier, Switch(Compl to NTE123AP)
Absolute Maximum Ratings:Collector–Emitter Voltage, VCEO 80V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Collector–Base Voltage, VCBO 80V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Emitter–Base Voltage, VEBO 5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous Collector Current, IC 1.0A. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Total Device Dissipation (TA = 25°C), PD 625mW. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Derate Above 25°C 5mW/°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Total Device Dissipation (TC = 25°C), PD 1.5W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Derate Above 25°C 12mW/°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating Junction Temperature Range, TJ –55° to +150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Storage Temperature Range, Tstg –55° to +150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Thermal Resistance, Junction to Case, RθJC 83.3°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Thermal Resistance, Junction to Ambient, RθJA 200°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Note 1. Matched complementary pairs are available upon request (NTE159MCP). Matched com-plementary pairs have their gain specification (hFE) matched to within 10% of each other.
Electrical Characteristics: (TA = +25°C unless otherwise specified)
Parameter Symbol Test Conditions Min Typ Max Unit
OFF Characteristics
Collector–Emitter Breakdown Voltage V(BR)CEO IC = 10mA, IB = 0 80 – – V
Collector–Base Breakdown Voltage V(BR)CBO IC = 10µA, IE = 0 80 – – V
Emitter–Base Breakdown Voltage V(BR)EBO IE = 10µA, IC = 0 5 – – V
Collector Cutoff Current ICBO VCB = 50V, IE = 0 – – 50 nA
VCB = 50V, IE = 0, TA = +75°C – – 5 µA
Emitter Cutoff Current IEBO – – 100 nA
Electrical Characteristics (Cont’d): (TA = +25°C unless otherwise specified)
Parameter Symbol Test Conditions Min Typ Max Unit
ON Characteristics
DC Current Gain hFE VCE = 10V, IC = 0.1mA 25 – –
VCE = 10V, IC = 1mA 40 – –
VCE = 10V, IC = 10mA 50 – 250
VCE = 10V, IC = 100mA 40 – –
VCE = 10V, IC = 500mA 30 – –
Collector–Emitter Saturation Voltage VCE(sat) IC = 150mA, IB = 15mA, Note 2 – – 0.15 V
IC = 500mA, IB = 50mA, Note 2 – – 0.5 V
Base–Emitter Saturation Voltage VBE(sat) IC = 150mA, IB = 15mA, Note 2 – – 0.9 V
IC = 500mA, IB = 50mA, Note 2 – – 1.1 V
Base–Emitter ON Voltage VBE(on) IC = 500mA, VCE = 500mV – – 1.1 V
Small–Signal Characteristics
Current Gain–Bandwidth Product fT IC = 50mA, VCE = 10V, f = 100MHz 100 – 500 MHz
Output Capacitance Cob VCB = 10V, IE = 0, f = 100kHz – – 30 pF
Input Capacitance Cib VCB = 10V, IE = 0, f = 100kHz – – 110 pF
Input Impedance hie IC = 10mA, VCE = 10V, f = 1kHz – 550 – kΩ
Voltage Feedback Ratio hre IC = 10mA, VCE = 10V, f = 1kHz – 100 – x 10–6
Small–Signal Current Gain hfe IC = 10mA, VCE = 10V, f = 1kHz – 200 –
Output Admittance hoe IC = 10mA, VCE = 10V, f = 1kHz – 100 – µmhos
Noise Figure NF IC = 100µA, VCE = 10V, RS = 1kΩ,f = 1kHz
– – 3 dB
Switching Characteristics
Turn–On Time ton VCC = 30V, VBE(off) = 3.8V,IC = 500mA, IB1 = 50mA
– – 100 ns
Turn–Off Time toff VCC = 30V, IC = 500mA,IB1 = IB2 = 50mA
– – 400 ns
Note 2. Pulse Test: Pulse Width ≤ 300µs, Duty Cycle ≤ 2%.
.021 (.445) Dia Max
E B C
Seating Plane
.135 (3.45) Min
.100 (2.54)
.050 (1.27)
.105 (2.67) Max
.105 (2.67) Max
.205 (5.2) Max
.210(5.33)Max
.500(12.7)Min
.165(4.2)Max
Semiconductor Components Industries, LLC, 1999
December, 1999 – Rev. 61 Publication Order Number:
SN74LS122/D
These dc triggered multivibrators feature pulse width control bythree methods. The basic pulse width is programmed by selection ofexternal resistance and capacitance values. The LS122 has an internaltiming resistor that allows the circuits to be used with only an externalcapacitor. Once triggered, the basic pulse width may be extended byretriggering the gated low-level-active (A) or high-level-active (B)inputs, or be reduced by use of the overriding clear.• Overriding Clear Terminates Output Pulse
• Compensated for VCC and Temperature Variations
• DC Triggered from Active-High or Active-Low Gated Logic Inputs
• Retriggerable for Very Long Output Pulses, up to 100% Duty Cycle
• Internal Timing Resistors on LS122
GUARANTEED OPERATING RANGES
Symbol Parameter Min Typ Max Unit
VCC Supply Voltage 4.75 5.0 5.25 V
TA Operating AmbientTemperature Range
0 25 70 °C
IOH Output Current – High –0.4 mA
IOL Output Current – Low 8.0 mA
Rext External Timing Resistance 5.0 260 k
Cext External Capacitance No Restriction
Rext/Cext Wiring Capacitance atRext/Cext Terminal
50 pF
LOW POWER SCHOTTKY
Device Package Shipping
ORDERING INFORMATION
SN74LS123N 16 Pin DIP
SN74LS123D 16 Pin
SOICD SUFFIX
CASE 751A
http://onsemi.com
PLASTICN SUFFIXCASE 646
14
1
14
1
SOICD SUFFIX
CASE 751B
PLASTICN SUFFIXCASE 648
16
1
16
1
SN74LS122N 14 Pin DIP 2000 Units/Box
SN74LS122D 14 Pin 2500/Tape & Reel
2000 Units/Box
2500/Tape & Reel
SN74LS122 SN74LS123
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SN74LS122 (TOP VIEW)(SEE NOTES 1 THRU 4)
SN74LS123 (TOP VIEW)(SEE NOTES 1 THRU 4)
NOTES:1. An external timing capacitor may be connected between Cext and Rext/Cext (positive).2. To use the internal timing resistor of the LS122, connect Rint to VCC.3. For improved pulse width accuracy connect an external resistor between Rext/Cext and VCC with Rint open-circuited.4. To obtain variable pulse widths, connect an external variable resistance between Rint/Cext and VCC.
14 13 12 11 10 9
1 2 3 4 5 6
8
7
VCC
Rext/Cext NC Cext NC Rint Q
A1 A2 B1 B2 CLR Q GND
CLR Q
Q
Rint
2Rext/Cext
1Cext
1 Rext/Cext
14 13 12 11 10 9
1 2 3 4 5 6 7
16 15
8
VCC
1A
1Q 2Q 2B2
CLR 2A
1B 1CLR
1Q 2Q 2Cext
GND
Q
Q Q
Q
CLR
CLR
NC — NO INTERNAL CONNECTION.
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LS122 FUNCTIONAL TABLE
INPUTS OUTPUTS
CLEAR A1 A2 B1 B2 Q Q
L X X X X L HX H H X X L HX X X L X L HX X X X L L HH L X ↑ HH L X H ↑H X L ↑ HH X L H ↑H H ↓ H HH ↓ ↓ H HH ↓ H H H↑ L X H H
↑ X L H H
LS123 FUNCTIONAL TABLE
INPUTS OUTPUTS
CLEAR A B Q Q
L X X L HX H X L HX X L L HH L ↑H ↓ H↑ L H
TYPICAL APPLICATION DATAThe output pulse tW is a function of the external
components, Cext and Rext or Cext and Rint on the LS122.For values of Cext ≥ 1000 pF, the output pulse at VCC = 5.0V and VRC = 5.0 V (see Figures 1, 2, and 3) is given by
tW = K Rext Cext where K is nominally 0.45
If Cext is on pF and Rext is in kΩ then tW is in nanoseconds.The Cext terminal of the LS122 and LS123 is an internal
connection to ground, however for the best systemperformance Cext should be hard-wired to ground.
Care should be taken to keep Rext and Cext as close to themonostable as possible with a minimum amount ofinductance between the Rext/Cext junction and the Rext/Cextpin. Good groundplane and adequate bypassing should bedesigned into the system for optimum performance to ensurethat no false triggering occurs.
It should be noted that the Cext pin is internally connectedto ground on the LS122 and LS123, but not on the LS221.Therefore, if Cext is hard-wired externally to ground,substitution of a LS221 onto a LS123 socket will cause theLS221 to become non-functional.
The switching diode is not needed for electrolyticcapacitance application and should not be used on the LS122and LS123.
To find the value of K for Cext ≥ 1000 pF, refer to Figure 4.Variations on VCC or VRC can cause the value of K tochange, as can the temperature of the LS123, LS122.
Figures 5 and 6 show the behavior of the circuit shown inFigures 1 and 2 if separate power supplies are used for VCCand VRC. If VCC is tied to VRC, Figure 7 shows how K willvary with VCC and temperature. Remember, the changes inRext and Cext with temperature are not calculated andincluded in the graph.
As long as Cext ≥ 1000 pF and 5K ≤ Rext ≤ 260K, thechange in K with respect to Rext is negligible.
If Cext ≤ 1000 pF the graph shown on Figure 8 can be usedto determine the output pulse width. Figure 9 shows how Kwill change for Cext ≤ 1000 pF if VCC and VRC are connectedto the same power supply. The pulse width tW innanoseconds is approximated by
tW = 6 + 0.05 Cext (pF) + 0.45 Rext (kΩ) Cext + 11.6 Rext
In order to trim the output pulse width, it is necessary toinclude a variable resistor between VCC and the Rext/Cext pinor between VCC and the Rext pin of the LS122. Figure 10, 11,and 12 show how this can be done. Rext remote should bekept as close to the monostable as possible.
Retriggering of the part, as shown in Figure 3, must notoccur before Cext is discharged or the retrigger pulse will nothave any effect. The discharge time of Cext in nanosecondsis guaranteed to be less than 0.22 Cext (pF) and is typically0.05 Cext (pF).
For the smallest possible deviation in output pulse widthsfrom various devices, it is suggested that Cext be kept≥ 1000 pF.
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WAVEFORMS
EXTENDING PULSE WIDTH
OVERRIDING THE OUTPUT PULSE
B INPUT
Q OUTPUT
B INPUT
CLEAR INPUT CLEAR PULSE
Q OUTPUTOUTPUT WITHOUT CLEAR PULSE
RETRIGGERPULSE (See Application Data)
OUTPUT WITHOUT RETRIGGERtW
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DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)
Limits
Symbol Parameter Min Typ Max Unit Test Conditions
VIH Input HIGH Voltage 2.0 VGuaranteed Input HIGH Voltage forAll Inputs
VIL Input LOW Voltage0.8
VGuaranteed Input LOW Voltage forAll Inputs
VIK Input Clamp Diode Voltage –0.65 –1.5 V VCC = MIN, IIN = –18 mA
VOH Output HIGH Voltage2.7 3.5 V VCC = MIN, IOH = MAX, VIN = VIH
or VIL per Truth Table
VO Output LOW Voltage0.25 0.4 V IOL = 4.0 mA VCC = VCC MIN,
VIN = VIL or VIHVOL Output LOW Voltage0.35 0.5 V IOL = 8.0 mA
VIN = VIL or VIHper Truth Table
I Input HIGH Current20 µA VCC = MAX, VIN = 2.7 V
IIH Input HIGH Current0.1 mA VCC = MAX, VIN = 7.0 V
IIL Input LOW Current –0.4 mA VCC = MAX, VIN = 0.4 V
IOS Short Circuit Current (Note 1) –20 –100 mA VCC = MAX
ICC Power Supply CurrentLS122 11
mA VCC = MAXICC Power Supply CurrentLS123 20
mA VCC = MAX
Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.
AC CHARACTERISTICS (TA = 25°C, VCC = 5.0 V)
Limits
Symbol Parameter Min Typ Max Unit Test Conditions
tPLH Propagation Delay, A to Q 23 33nsPLH
tPHL
g yPropagation Delay, A to Q 32 45
nsCext = 0
tPLH Propagation Delay, B to Q 23 44ns
extCL = 15 pF
PLHtPHL
g yPropagation Delay, B to Q 34 56
nsRext = 5.0 kΩ
tPLH Propagation Delay, Clear to Q 28 45ns
extRL = 2.0 kΩ
PLHtPHL
g yPropagation Delay, Clear to Q 20 27
ns
tW min A or B to Q 116 200 ns Cext = 1000 pF, Rext = 10 kΩ,
tWQ A to B to Q 4.0 4.5 5.0 µs
ext extCL = 15 pF, RL = 2.0 kΩ
AC SETUP REQUIREMENTS (TA = 25°C, VCC = 5.0 V)
Limits
Symbol Parameter Min Typ Max Unit Test Conditions
tW Pulse Width 40 ns
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Figure 1. Figure 2.
Figure 3.
Figure 4.
VCC VRC VCC
Cext0.1 µF
Pout
Cext Rext/Cext
VCC
QCLR
B
CLRB2B1
A2A1
1/2 LS123 LS122
Rext
QGNDA
51 ΩPin
Pin
Pout tW
RETRIGGER
5K ≤ Rext ≤ 260K
10
1
0.1
0.01
0.0010.3 0.35 0.4 0.45 0.5 0.55
K
EXTE
RN
AL C
APAC
ITAN
CE,
C
(
F)
µex
t
VCC VRC VCC
Cext0.1 µF
Pout
Cext Rext/Cext
VCC
Q
Rext
QGND
51 Ω
Pin
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Figure 5. K versus V CC Figure 6. K versus V RC Figure 7. K versus V CC and VRC
VCC
VCC = 5 VCext = 1000 pF
VRC
Cext = 1000 pF
0.55
0.5
K
0.45
0.4
0.354.5 5 5.5
VCC = VRC
125°C
70°C
25°C
0°C
– 55°C
VRC = 5 VCext = 1000 pF
125°C
70°C
0°C– 55°C
125°C
25°C
0°C
– 55°C
70°C
25°C
100000
10000
1000
100
101 10 100 1000
t W
Cext, EXTERNAL TIMING CAPACITANCE (pF)
Rext = 80 kΩRext = 40 kΩRext = 20 kΩRext = 10 kΩRext = 5 kΩ
, OU
TP
UT
PU
LSE
WID
TH
(ns
)
Rext = 260 kΩRext = 160 kΩ
4.5 5 5.54.5 5 5.5
0.55
0.5
K
0.45
0.4
0.35
0.55
0.5
K
0.45
0.4
0.35
Figure 8.
SN74LS122 SN74LS123
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Figure 9.
Figure 10. LS123 Remote Trimming Circuit
Cext = 200 pF
0.65
0.6
K 0.55
0.5
4.5 4.75 5 5.25 5.5VCC VOLTS
125°C
70°C
25°C
0°C
– 55°C
VCC
RextREMOTERext
Cext
PIN 7OR 15
PIN 6OR 14
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Figure 11. LS122 Remote Trimming Circuit Without R ext
Figure 12. LS122 Remote Trimming Circuit with R int
OPEN
VCC
RextREMOTERext
Cext
PIN 13
PIN 11
PIN 9
VCC
RextREMOTE
PIN 13
PIN 11
PIN 9
SN74LS122 SN74LS123
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PACKAGE DIMENSIONS
1 7
14 8
B
A DIM MIN MAX MIN MAXMILLIMETERSINCHES
A 0.715 0.770 18.16 18.80B 0.240 0.260 6.10 6.60C 0.145 0.185 3.69 4.69D 0.015 0.021 0.38 0.53F 0.040 0.070 1.02 1.78G 0.100 BSC 2.54 BSCH 0.052 0.095 1.32 2.41J 0.008 0.015 0.20 0.38K 0.115 0.135 2.92 3.43LM ––– 10 ––– 10 N 0.015 0.039 0.38 1.01
NOTES:1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.2. CONTROLLING DIMENSION: INCH.3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.5. ROUNDED CORNERS OPTIONAL.
F
H G DK
C
SEATINGPLANE
N
–T–
14 PL
M0.13 (0.005)
L
MJ
0.290 0.310 7.37 7.87
NOTES:1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.2. CONTROLLING DIMENSION: MILLIMETER.3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBARPROTRUSION SHALL BE 0.127 (0.005) TOTALIN EXCESS OF THE D DIMENSION ATMAXIMUM MATERIAL CONDITION.
–A–
–B–
G
P 7 PL
14 8
71M0.25 (0.010) B M
SBM0.25 (0.010) A ST
–T–
FR X 45
SEATINGPLANE
D 14 PL K
C
JM
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A 8.55 8.75 0.337 0.344B 3.80 4.00 0.150 0.157C 1.35 1.75 0.054 0.068D 0.35 0.49 0.014 0.019F 0.40 1.25 0.016 0.049G 1.27 BSC 0.050 BSCJ 0.19 0.25 0.008 0.009K 0.10 0.25 0.004 0.009M 0 7 0 7 P 5.80 6.20 0.228 0.244R 0.25 0.50 0.010 0.019
D SUFFIXPLASTIC SOIC PACKAGE
CASE 751A–03ISSUE F
N SUFFIXPLASTIC PACKAGE
CASE 646–06ISSUE M
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PACKAGE DIMENSIONS
N SUFFIXPLASTIC PACKAGE
CASE 648–08ISSUE R
NOTES:1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.2. CONTROLLING DIMENSION: INCH.3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.5. ROUNDED CORNERS OPTIONAL.
–A–
B
F C
S
HG
D
J
L
M
16 PL
SEATING
1 8
916
K
PLANE–T–
MAM0.25 (0.010) T
DIM MIN MAX MIN MAXMILLIMETERSINCHES
A 0.740 0.770 18.80 19.55B 0.250 0.270 6.35 6.85C 0.145 0.175 3.69 4.44D 0.015 0.021 0.39 0.53F 0.040 0.70 1.02 1.77G 0.100 BSC 2.54 BSCH 0.050 BSC 1.27 BSCJ 0.008 0.015 0.21 0.38K 0.110 0.130 2.80 3.30L 0.295 0.305 7.50 7.74M 0 10 0 10 S 0.020 0.040 0.51 1.01
D SUFFIXPLASTIC SOIC PACKAGE
CASE 751B–05ISSUE J
NOTES:1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.2. CONTROLLING DIMENSION: MILLIMETER.3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBARPROTRUSION SHALL BE 0.127 (0.005) TOTALIN EXCESS OF THE D DIMENSION ATMAXIMUM MATERIAL CONDITION.
1 8
16 9
SEATINGPLANE
F
JM
R X 45
G
8 PLP–B–
–A–
M0.25 (0.010) B S
–T–
D
K
C
16 PL
SBM0.25 (0.010) A ST
DIM MIN MAX MIN MAXINCHESMILLIMETERS
A 9.80 10.00 0.386 0.393B 3.80 4.00 0.150 0.157C 1.35 1.75 0.054 0.068D 0.35 0.49 0.014 0.019F 0.40 1.25 0.016 0.049G 1.27 BSC 0.050 BSCJ 0.19 0.25 0.008 0.009K 0.10 0.25 0.004 0.009M 0 7 0 7 P 5.80 6.20 0.229 0.244R 0.25 0.50 0.010 0.019
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