2014 International Symposium on Integrated Circuits …toc.proceedings.com/25083webtoc.pdf · · 2015-04-152014 International Symposium on Integrated Circuits (ISIC) Thursday, December

IEEE Catalog Number: ISBN:

CFP1476B-POD 978-1-4799-4832-1

2014 International Symposium on Integrated Circuits (ISIC 2014)

Singapore 10-12 December 2014

2014 International Symposium on Integrated Circuits (ISIC)

Thursday, December 11, 2014

Session A1 – Power Management IC

Chair Prof. Philip K. T. Mok , Hong Kong University of Science and Technology (HK SAR, China)

Date/Time Thursday, 11 Dec 2014 / 13:00 – 14:30

Venue Room 4103/4104

A Compact Multi-Input Thermoelectric Energy Harvesting System with 58.5% Power

Conversion Efficiency and 32.4-mW Output Power Capability

Chia-Lun Chang*; Tai-Cheng Lee, National Taiwan Univ. (Taiwan)

A Maximum Power Point Tracking and Voltage Regulated Dual-Chip System for Single-Cell

Photovoltaic Energy Harvesting

Wen-Yaw Chung*; Pei-Shan Yu; Angelito Silverio, Chung Yuan Christian Univ. (Taiwan)

Modeling and Implementation of High-Gain Switched-Inductor Switched-Capacitor

Converter

Yuen-Haw Chang*; Chen Yu-Jhang, Chaoyang Univ. of Technology (Taiwan)

A Three-Topology Based, Wide Input Range Switched-Capacitor DC-DC Converter with

Low-Ripple and Enhanced Load Line Regulations

Hendika Fatkhi Nurhuda*; Yongkui Yang; Wang Ling Goh, NTU (Singapore)

Triple Boundary Multiphase With Predictive Interleaving Technique for Switched Capacitor

DCDC Converter Regulation

Zhekai Xiao*; Chiang Liang Kok; Liter Siek, NTU (Singapore)


Session B1 – Side Channel Analysis and Attacks on Integrated Circuits (Special Session 11 )

Chair Prof. Georg Sigl, TUM (Germany)


Venue Room 4102

Investigating Measurement Methods for High-Resolution Electromagnetic Field Side-

Channel Analysis

Robert Specht*; Johann Heyszl; Georg Sigl, TUM (Germany)

Side-Channel Analysis of a Real–World AES Peripheral with Countermeasures

Benedikt Heinz*; Johann Heyszl; Frederic Stumpf, Fraunhofer AISEC (Germany)

Zero Collision Attack and Its Countermeasures on Residue Number System Multipliers

Ray C. C. Cheung; Marc Stöttinger*; Gavin Xiaoxu Yao, TL-Lab (Singapore)

Constructive Side-Channel Analysis for Secure Hardware Design

Alexander Herrmann; Marc Stottinger*, TL-Lab (Singapore)

Overview of Machine Learning Based Side-Channel Analysis Methods

Dirmanto Jap*; Jakub Breier, TL-Lab (Singapore)


Session C1– RF and Mixed Analog-Digital ICs for Wideband Communications( Special Session 10 )

Chair Prof. Atila Alvandpour, Linköping University (Sweden)


Venue Room 4101B

A Low-Power Direct IQ Upconversion Technique Based on Duty-Cycled Multi-Phase Sub-

Harmonic Passive Mixers for UWB Transmitters

Amin Ojani*; Behzad Mesgarzadeh; Atila Alvandpour, Linköping University (Sweden)

Timing Challenges in High-speed Interleaved ΔΣ DACs

Ameya Bhide*; Atila Alvandpour, Linköping University (Sweden)

mm-Wave Pulse-Generation Circuits in 65nm CMOS

Markus Törmänen*, Lund University (Sweden)

A 65 nm CMOS Varactorless mm-wave VCO

Therese Forsberg, Henrik Sjöland and Markus Törmänen, Lund University (Sweden)

A 28 GHz SiGe QVCO with an I/Q Phase Error Detector for an 81-86 GHz ‘E-Band’

Transceiver

Tobias Tired, Henrik Sjöland, Carl Bryant and Markus Törmänen, Lund University (Sweden)


Session D1 – Energy Efficiency, Complexity, and High-Level Design Methodologies (

Special Session 13)

Chair Prof. Deming Chen, UIUC (USA)


Venue Room 4101A

QED Post-Silicon Validation and Debug

David Lin; Subhasish Mitra*, Stanford (USA)

Energy-Efficient Computing with Heterogeneous Multi-Cores

Mitra Tulika*, NUS (Singapore)

A User's Reflections on the Art of High Level Synthesis

Yu Pan*; Santhosh Kumar Pilakkat; Kay-Chuan Benny Tan; Wai-Meng Mok, A*STAR I2R

(Singapore)

New Solutions for System-Level and High-Level Synthesis (Invited Paper)

Wei Zuo; Hongbin Zheng; Swathi T. Gurumaniy; Kyle Rupnowy; Deming Chen*, UIUC (USA)


Session A2 – Mixed-Signal IC

Chair Prof . Sai-Weng Sin, University of Macau (Macau SAR, China)



Digital Compensation Method for the Path Delay Mismatches in GRO-TDC

Pyoungwon Park*; Dipankar Nag; Dan Lei Yan; Muthukumaraswamy Annamalai Arasu, IME

A*STAR (Singapore)

Digital Phase Locked Loop (DPLL) with Offset Dithered Bang-Bang Phase Detector (BBPD)

for Bandwidth Control

Younghoon Kim*; Min-Ki Jeon; Changsik Yoo, Hanyang University (South Korea)

A 14-bit 100MS/s Pipelined A/D Converter with 2b Interstage Redundancy

Kun Ao*; Qiang Li, Univ. of Electronic Science and Technology of China (China)

Design of a 4 GS/s Radix-1.75 Single Channel Pipeline ADC in 28 nm CMOS Technology with

Foreground Calibration

Felix Lang*; Markus Grözing; Manfred Berroth, Institute of Electrical and Optical

Communications Engineering Univ. of Stuttgart (Germany)

A High Efficiency CMOS Rectifier with ON-OFF Response Compensation for Wireless Power

Transfer in Biomedical Applications

Qiang Li*; Jing Wang; Yasuaki Inoue, Waseda University (Japan)


Session B2 – System Methodologies

Chair Prof. Ching Cheun Jong, Nanyang Technological University (Singapore)

Date/Time Thursday, 11 Dec 2014/ 15:00 – 16:30

Venue Room 4102

Statistical Power Optimization of Deep-Submicron Digital CMOS Circuits Based on

Structured Perceptron

Amir Zjajo*; Meijs Van der; Van Leuken Nick; Nick Rene, Delft Univ. of Technology

(Netherlands)

Vt-Conscious Repeater Insertion in Power-Managed VLSI

Houman Zarrabi*; Asim AlKhalili; Yvon Savaria, Concordia University (Canada)

An Improved Scan Cell Ordering Method Using the Scan Cells with Complementary Outputs

Ai Jiao Cui*, Harbin Institute of Technology Shenzhen Graduate School (China)

Ray-Casting Algorithm and Its Considerations for Parallel Processing: Optimization

Techniques for Parallel Ray-Casting Algorithm

Hanjoo Cho*; Young Hwan Kim, POSTECH (South Korea)

A Hierarchical Switch Matrix and Interconnect Resources Test in Virtex-5 FPGA

Aiwu Ruan*; Wei Tian; Bo Ni; Ke Wu, Univ. of Electronic Science and Technology of China

(China)


Session C2 – Emerging Memory and Machine Learning (Special Session 2)

Chair Prof. Xin Li, CMU (USA)


Venue Room 4101B

Ultra-Low-Power Biomedical Circuit Design and Optimization: Catching The Don't Cares

Xin Li*; Ronald Blanton; Pulkit Grover; Donald Thomas, CMU (USA)

SLIC: Statistical Learning in Chip

Ronald D Blanton*; Xin Li; Ken Mai; Diana Marculescu; Radu Marculescu; Jeyanand

Paramesh; Jeff Schneider; Donald E. Thomas, CMU (USA)

Neuromorphic Hardware Acceleration Enabled by Emerging Technologies

Hai Li*; Xiaoxiao Liu; Mengjie Mao; Yiran Chen; Qing Wu; Mark Barnell, Univ. of Pittsburgh

(USA)

Architectural Exploration for On-chip, Online Learning in Spiking Neural Networks

Subhrajit Roy*; Sougata Kumar Kar; Arindam Basu, NTU (Singapore)

An Improved SPICE model of Phase-Change Memory (PCM) for Peripheral Circuits

Simulation and Design

Yiqun Wei; Xinnan Lin*, Peking Univ. (China)


Session D2 – Integrated Circuits and Systems for Security Primitives (Special Session 6 )

Chair Prof. Georg Sigl, TUM (Germany)


Venue Room 4101A

Advanced Performance Metrics for Physical Unclonable Functions

Michael Pehl*; Akshara Ranjit Punnakkal; Matthias Hiller; Helmut Graeb, TUM (Germany)

Reconfigurable PUFs for FPGA-Based SoCs

Stefan Gehrer*; Georg Sigl, TUM (Germany)

Lightweight Cryptography for Constrained Devices

Cesare Alippi; Andrey Bogdanov; Francesco Regazzoni*, LaRI Institute of Univ. of Lugano

(Switzerland)

Statistic-Based Security Analysis of Ring Oscillator PUFs

Florian Wilde; Matthias Hiller*; Michael Pehl, TUM (Germany)

A Survey of the State-of-the-Art Fault Attacks

Jakub Breier*; Dirmanto Jap, TL-Lab (Singapore)


Session P1 – Analog/Mixed-Signal/Sensor ICs & Integrated Systems (Poster)

Chair Prof. Yvonne Ying Hung Lam, Nanyang Technological University (Singapore)

Prof . Siek Liter, Nanyang Technological University (Singapore)


Venue Room 4001A/B

Low Noise Linear and Wideband Transconductance Amplifier Design for Current-Mode

Frontend

Quoc-Tai Duong*; Atila Alvandpour, Linköping University (Sweden)

A Self-Oscillating Class D Audio Amplifier with Dual Voltage and Current Feedback

Salma Nashit*; Victor Adrian; Keer Cui; Quoc-An Mai; Bah-Hwee Gwee; Joseph S. Chang, NTU

(Singapore)

Transducer Driver with Active Bootstrap Switch

Jun Yu*; Muthukumaraswamy Annamalai Arasu, IME A*STAR (Singapore)

Design of an Output Stage for High Switching Frequency DC-DC Converters

Tian-Shun Ng*; Yin Sun*; Victor Adrian; Bah-Hwee Gwee; Joseph S. Chang, NTU (Singapore)

A Digital Calibration Technique For Multi-Bit-Per-Stage Pipelined ADC

Song Wang*; Qiang Li, Univ. of Electronic Science and Technology of China (China)

A Small Area 10-bit Linear Gamma DAC with Voltage Adder for Large-Sized Active Matrix

Flat Panel Displays

Jae-Yoon Bae*; Seong-Hwan Hwang; Hyeon-Cheon Seol; Young-Cheon Kwon; Seung-Tae Kim;

Seong-Kwan Hong; Oh-Kyong Kwon, Hanyang University (South Korea)

A 40nm/65nm Process Adaptive Low Jitter Phase-Locked Loop

Hengzhou Yuan*; Yang Guo; Zhuo Ma, National University of Defense Technology (China)


A Versatile Biopotential Acquisition Analog Front End IC with Effective DC Offset and Ripple

Rejection

Seunghyun Im*; Changho Seok; Hyunho Kim; Haryong Song; Hyoungho Ko; Dong-il “Dan”

Cho,Chungnam National University (South Korea)

An Efficient Residue-to-Binary Converter for the New Moduli Set{2 2/n

±1,22n+1

,2n+1}

Hillary Siewobr*; Kazeem Gbolagade; Sorin Cotofana, University for Development Studies

(Ghana)

FPGA-Based Quantum Circuit Emulation: A Case Study on Quantum Fourier Transform

Yee Hui Lee*; Khalil-Hani Mohamed; Mohammad Nadzir Marsono, Universiti Teknologi

Malaysia (Malaysia)

Low-Power Multi-Function Multi-Mode Baseband Design for Low Data Rate Applications

Bin Zhao*; Hongbao Zhang; Lay Keng Lim; Xin Liu; Raja Muthusamy Kumarasamy, IME

A*STAR (Singapore)

Design and Characterization of Radiation-Tolerant CMOS 4T Active Pixel Sensors

Xinyuan Qian*; Hang Yu; Shoushun Chen; Kay Soon Low, NTU (Singapore)

A More Accurate Circuit Model for CMOS Hall Cross with Non-Linear Resistors and JFETs

Fei Lu*; Yutong Bi; Zhenduo Zhu; Zhenfei Lu; Li Li; Jin Sha; Hongbing Pan, Nanjing Univ.

(China)

An Amperometric Sensor Readout Circuit for Multiple Electrochemical Sensor Cells

Wen-Yaw Chung*; Angelito Silverio; Vincent F.S. Tsai, Chung Yuan Christian Univ. (Taiwan)

A Novel Amperometric Sensor Readout Based on Charge Measurement by Current

Integration

Wen-Yaw Chung*; Angelito Silverio; Vincent F.S. Tsai; Ming-Ying Zhou, Chung Yuan Christian

Univ. (Taiwan)


Friday, December 12, 2014

Session A3 – RF IC

Chair Prof Yue Ping Zhang, Nanyang Technological University (Singapore)

Date/Time Friday, 12 Dec 2014 / 08:30 – 10:00


A Fully Integrated 166-GHz Frequency Synthesizer in 0.13-μm SiGe BiCMOS for D-Band

Applications

Jin He*; Yong-Zhong Xiong; Li Jiankang Li; Debin Hou; Sanming Hu; Dan Lei Yan;

Muthukumaraswamy Annamalai Arasu; Yue Ping Zhang, Wuhan University (China)

A 2.5-GHz Band Low-Voltage High Efficiency Class-E Power Amplifier IC With Body Effect

Taufiq Kurniawan*; Xin Yang; Xiao Xu; Zheng Sun; Toshihiko Yoshimasu, Waseda University

(Japan)

A 20.5GHz Wide-Band Programmable Divide-by-N Frequency Divider

Ting Guo*; Zhiqun Li; Qin Li, Zhigong Wang Southeast University (China)

A Dual-band VCO using Inductor Splitting for Automotive Radar System at W-band

Jongsuk Lee*; Yong Moon, Soongsil University (South Korea)


Session B3 – High Speed and Low-Power Architectures for Contemporary

Communication Systems (Special Session 15)

Chair Dr. Pramod Kumar Meher, NTU (Singapore)


Venue Room 4102

Challenging the Limits of FFT Performance on FPGAs

Mario Garrido*; Miguel Acevedo; Andreas Ehliar; Oscar Gustafsson, Linköping University

(Sweden)

Subquadratic Space Complexity Digit-Serial Multiplier over Binary Extension Fields using

Toom-Cook Algorithm

Chiou-Yng Lee*; Pramod Kumar Meher; Wen-Yo Lee, Lunghwa UST (Taiwan)

A New Memoryless and Low-latency FFT Rotator Architecture

Shen-Jui Huang*; Sau-Gee Chen, National Chiao-Tung Univ. (Taiwan)

Cost-Efficiency FFT Using Hardware-Reduction and Dynamic Current Scaling Approaches

Ying-Liang Chen*, National Chiao Tung Univ. (Taiwan)

Fast Binary to BCD Converters for Decimal Communications Using New Recoding Circuits

Tso-Bing Juang*; Yu-Ming Chiu, National Ping Tung Univ. (Taiwan)


Session C3 – Biomedical Signal Processing in Assistive Hearing Systems (Special

Session 4)

Chair Prof. Yi Hu , Univ. of Wisconsin (USA)


Venue Room 4101B

The Role of Auditory Feedback in Speech Production: Implications for Speech Perception

in the Hearing Impaired

Yongqiang Feng*; Yonghong Yan; Yan Xiao; Dongying Liang, Institute of Acoustics CAS

(China)

An Efficient Spectral Subtraction-Based Strategy for Suppressing Reverberation in Cochlear

Implant Devices

Kostas Kokkinakis*; Yi Hu; Dongying Liang, Univ. of Kansas (USA)

Perceptual Contribution of Vowels and Consonants to Sentence Intelligibility by Cochlear

Implant Users

Qudsia Tahmina; Fei Chen; Yi Hu*, Univ. of Wisconsin (USA)

Effect of Adaptive Envelope Compression in Simulated Electric Hearing in Reverberation

Ying-hui Lai; Fei Chen*; Yu Tsao, The Univ. of Hong Kong (HK SAR China)


Session D3 – Emerging Technologies and Architectures for Big-data Computing (Special Session

7)

Chair Prof. Wei Zhang, HKUST (HK SAR, China)


Venue Room 4101A

Intra- and Inter-Chip Voltage Droop Analysis Using a Power Delivery Grid Model

Wing Oi Siu*; Terrence Mak, CUHK (HK SAR China)

Time-Efficient Computation of Digit Serial Montgomery Multiplication

Wangchen Dai*; Huapeng Wu; Ray C.C. Cheung, CityU HK (HK SAR China)

The Internet of Things: An Overview and New Perspectives in Systems Design

Jun Wei Chuah*, A*STAR I2R (Singapore)

A Heterogeneous Platform with GPU and FPGA for Power Efficient High Performance

Computing

Qiang Wu; Yajun Ha*; Akash Kumar; Shaobo Luo; Ang Li; Shihab Mohamed, NUS (Singapore)

Thermal-Aware Task Scheduling for 3D-Network-on-Chip: A Bottom-to-Top Scheme

Yingnan Cui*; Wei Zhang; Vivek Chaturvedi; Weichen Liu; Bingsheng He, NTU (Singapore)


Session A4 – Analog IC

Chair Prof. Basu Arindam, Nanyang Technological University (Singapore)



A Low-Distortion R-active-C Lowpass Filter for Linear Sensor Applications

Dong Wang*; Pak Kwong Chan, NTU (Singapore)

A Versatile Three-Stage Operational Amplifier with Second-Stage Bypass Compensation

Uday Dasgupta*; Geok Teng Ong; Junmin Cao; Soong Lin Chew, MediaTek (Singapore)

A Primary Side Feedback Control for Flyback LED Driver with No Output Voltage Feedback

Resistors

Zhelu Li*; Yahui Leng; Xufeng Wu; Jianxiong Xi; Lenian He, Zhejiang University (China)

A SOI-CMOS Low Noise Chopper Amplifier for High Temperature Applications

Yejin Chen*; Wang Ling Goh; Jun Yu; Muthukumaraswamy Annamalai Arasu, NTU

(Singapore)

A 66dB Continuous Gain Adjusting CMOS AGC Amplifier with Both Feedforward and

Feedback Loop

Chunfeng Bai*; Jianhui Wu, Southeast University (China)


Session B4 – Integrated Systems

Chair Prof. Shoushun Chen, Nanyang Technological University (Singapore)


Venue Room 4102

ASIC Implementation of the Cross Frequency Coupling Algorithm for EEG Signal Processing

Philip Davis*; Chsarles D. Creusere; Wei Tang, New Mexico State University (USA)

A Second-Generation Noise-Immune Motion Detection Image Sensor for Moving Object

Tracking Application

Xiangyu Zhang*; Shoushun Chen, NTU (Singapore)

The Design and Verification of a Novel LDPC Decoder with High-Efficiency

Dan Yang*; Guoyi Yu; Xuecheng Zou; Yelei Deng; Jianfu Zhong, Huazhong Univ. of Science

and Technology (China)

A Highly-Integrated Wireless Configuration Circuit for FPGA chip

Tongqiang Gao*; Haigang Yang; Xiaodong Xu; Hongfeng Zhang, Institute of Electronics

Chinese Academy of Sciences (China)

Power Distribution Network Design for High-Speed Automotive Graphical Processing

Module

Lin Biao Wang*; Kye Yak See, Continental Automotive (Singapore)


Session C4 – VLSI for Big Data Bioinformatics and Biomedical Applications (Special Session 12)

Chair Prof. Ray C. C. Cheung, CityU HK (HK SAR, China)


Venue Room 4101B

Energy Efficient Spiking Neural Network Design with RRAM Devices

Tianqi Tang; Rong Luo; Boxun Li; Hai Li; Yu Wang*; Huazhong Yang, Tsinghua Univ. (China)

VLSI Architecture of a High-Performance Neural Spiking Activity Simulator Based on

Generalized Volterra Kernel

Will X. Y. Li*; Yao Xin; Dong Song; Theodore W. Berger; Ray C. C. Cheung, CityU HK (HK SAR

China)

A Real-Time Silicon Cerebellum Spiking Neural Model Based on FPGA

Junwen Luo; Graeme Coapes; Patrick Degenaar; Terrence Mak; Tadashi Yamazaki; Chung

Tin*, CityU HK (HK SAR China)

Trade-Offs Between the Sensitivity and the Speed of the FPGA-Based Sequence Aligner

Peng Chen; Chao Wang; Xi Li; Xuehai Zhou; Aili Wang; Ray C. C. Cheung*, CityU HK (HK SAR

China)

Hierarchical Air Quality Monitoring System Design

Yangyang Ma; Shengqi Yang*; Zhangqin Huang; Yibin Hou; Leqiang Cui; Dongfang

Yang, Beijing Univ. of Technology (China)


Session D4 – Advances in mm-wave and THz Technology (Special Session 9)

Chair Prof. Yong-Zhong Xiong, CAEP (China)


Venue Room 4101A

A 330 GHz Frequency Modulator using 0.13-μm SiGe HBTs

Yihu Li; Wang Ling Goh*; Yong-Zhong Xiong, NTU (Singapore)

An Overview of New Design Techniques for High Performance CMOS Millimeter-Wave

Circuits

Shunli Ma*; Junyan Ren; Hao Yu, Fudan Univ. (China)

A Fully Integrated 166-GHz Frequency Synthesizer in 0.13-μm SiGe BiCMOS for D-Band

Applications

Jin He; Yong-Zhong Xiong*; Jiankang Li; Debin Hou; Sanming Hu; Dan-Lei Yan;

Muthukumaraswamy Annamalai Arasu; Yue Ping Zhang, CAEP (China)

A 340 GHz Fully Integrated Transmitter for High-Speed Communications

Xiaodong Deng*; Yihu Li; Jiankang Li; Wen Wu; Yong-Zhong Xiong, CAEP (China)

A Compact Ka-band SPDT Switch with High Isolation

Chao Liu; Qiang Li; Yong-Zhong Xiong*, CAEP (China)

A 150-GHz Push-Push VCO in 0.13-μm SiGe BiCMOS

Jiang Luo; Jin He*; Hao Wang; Sheng Chang; Qijun Huang, Wuhan Univ. (China)


Session A5 – Digital IC

Chairs Prof. Tso-Bing Juang, National Pingtung University, (Taiwan)

Prof. Minkyu JE Daegu Gyeongbuk, Institute of Science and Technology (Korea),



High-Speed and Low-Leakage FinFET SRAM Cell with Enhanced Read and Write Voltage

Margins

Shairfe Salahuddin*; Volkan Kursun, Hong Kong Univ. of Science and Technology (HK SAR

China)

Novel STT-MRAM-Based Last Level Caches for High Performance Processors Using

Normally-Off Architectures

Shinobu Fujita*, Toshiba Corporation (Japan)

A Dynamic-Voltage-Scaling 1kbytex8-bit Non-Imprinting Master-Slave SRAM with High

Speed Erase for Low-Power Operation

Weng-Geng Ho*; Kwen-Siong Chong; Bah-Hwee Gwee; Joseph Sylvester Chang, NTU

(Singapore)

Design of Threshold Dominant Delay Physical Unclonable Functions in 65nm CMOS

Yuejun Zhang*; Pengjun Wang; Jianrui Li; Gang Li, Ningbo University (China)

MTCMOS Low-Power Design Technique (LPDT) for Low-Voltage Pipelined Microprocessor

Circuits

Chen-Bo Hsu*; James B. Kuo, National Taiwan Univ. (Taiwan)


Session B5 – Special Session 3: Performance and Power Issues in Multi/Many Core Architecture

and Systems

Chair Prof. Hitoshi Oi, The Univ. of Aizu (Japan)


Venue Room 4102

Case Study: Effectiveness of Dynamic Frequency Scaling on Server Workload

Hitoshi Oi*, The Univ. of Aizu (Japan)

Scaling Java Virtual Machine on a Many-Core System

Karthik Ganesan*; Yaomin Chen; Xiaochen Pan, Oracle (USA)

A Hybrid MapReduce Model for Prolog

Joana Côrte-Real*; Inês Dutra; Ricardo Rocha, CRACS (Portugal)

Acceleration of Naive-Bayes Algorithm on Multicore Processor for Massive Text

Classification

Lijun Zhou*; Zhiyi Yu; Jie Lin; Shikai Zhu; Weijing Shi; Haijie Zhou; Kunpeng Song; Xiaoyang

Zeng, Fudan Univ. (China)

Differences of Energetic Consumption Between Java and JNI Android Apps

Ricardo Isidro RamÃrez*; Erika HernÃ¡ndez Rubio; Amilcar Meneses Viveros; Irene Torres

HernÃ¡ndez Monserrat, IPN-SEPI ESCOM (Mexico)


Session C5 – The Coming of Age of Microfluidics: EDA Solutions for Enabling Biochemistry on a

Chip (Special Session 8)

Chair Prof. Philip Brisk, UC-Riverside (USA)


Venue Room 4101B

Performance and Cost Analysis of NoC-Inspired Virtual Topologies for Digital Microfluidic

Biochips

Daniel Grissom; Jeffrey McDaniel; Philip Brisk*, UC-Riverside (USA)

Online Synthesis for Operation Execution Time Variability on Digital Microfluidic Biochips

Mirela Alistar*; Paul Pop, Tech. Univ. of Denmark (Denmark)

Recent Trends in Chip-Level Design Automation for Digital Microfluidic Biochips

Sudip Roy*; Tsung-Yi Ho, National Cheng Kung University (Taiwan)

Sample Preparation for Droplet-Based Microfluidics

Juinn-Dar Huang*; Chia-Hung Liu, National Chiao Tung University (Taiwan)


Session D5 – VLSI Systems for Vision-based Applications: Challenges and Advancements

(Special Session 14)

Chair Dr. Ravi Kumar Satzoda, UCSD (USA)


Venue Room 4101A

Mask-Based Non-Maximal Suppression with Iterative Pruning for Low-Complexity Corner

Detection

Nirmala Ramakrishnan*; Meiqing Wu; Siew-Kei Lam; Thambipillai Srikanthan, NTU

(Singapore)

Vision-Based Pedestrian Tracking System Using Color and Motion Cue

Meiqing Wu*; Siew-Kei Lam; Thambipillai Srikanthan; Tushar Shah, NTU (Singapore)

Reducing Computational Complexity for Face Detection

Supriya Sathyanarayana*; Srikanthan Thambipillai, NTU (Sinapore)

Development of Driver Assistance Systems Using Virtual Hardware-in-the-Loop

Philipp Wehner*; Fynn Schwiegelshohn; Diana Goehringer; Michael Huebner, RUB

(Germany)

Pipelined Architecture for Motion Tracking on a Multicore Environment

Sudha Natarajan*; Sridharan Krishnamurthy; Dan Wilkinson, XMOS (Indian)


Session A6 – Sensor IC

Chair Prof. Wen-Yaw Chung, Chung Yuan Christian University (Taiwan)



A 0.3-V, 37.5-nW 1.5~6.5-pF-Input-Range Supply Voltage Tolerant Capacitive Sensor

Readout

May Kay Lay*; Fu-Yan Fan; Pui-In Mak; Rui P. Martins, University of Macau (Macau

S.A.R.China)

CMOS Image Sensor Based Physical Unclonable Function for Smart Phone Security

Applications

Yuan Cao*; Siarhei S. Zalivaka; Le Zhang; Chip-Hong Chang; Shoushun Chen, NTU (Singapore)

ASIC Front-End for Sensing MEMS-Mirror Position

Leo Chemmanda John*; Colin Jianrong Chue; Ravinder Pal Singh; Yalon Roterman, IME

A*STAR (Singapore)

High Accuracy Time-Mode Duty-Cycle-Modulation-Based Temperature Sensor for Energy

Efficient System Applications

Di Zhu*; Jiacheng Wang; Liter Siek; Chiang Liang Kok; Lei Qiu; Yuanjin Zheng, NTU

(Singapore)

High Performance ΔΣ Closed Loop Accelerometer

Dipankar Nag*; Kevin Tshun Chuan Chai, IME A*STAR (Singapore)


High Accuracy Remote Temperature Sensor Based on BJT Devices in 0.13-μm CMOS

Seong-Jin Kim*; Simon Sheung Yan Ng; David Wee; Yoon Hwee Leow; Fan-Yung Ma; Sie Boo

Chiang, IME A*STAR (Singapore)

Session B6 – Semiconductors

Chair Prof. Wang Ling Goh, Nanyang Technological University (Singapore)


Venue Room 4102

Parasitic BJT versus DIBL: Floating-Body-Related Subthreshold Characteristics of SOI NMOS

Device

James B. Kuo*; D.H. Lung, National Taiwan Univ. (Taiwan)

Effect of AC Stress on Oxide TDDB and Trapped Charge in Interface States

Benjamin Rebuffat*; Pascal Masson; Jean-Luc Ogier; Marc Mantelli; Romain

Laffont, STMicroelectronics (France)

The Increase Sensitivity of PNP-Magnetotransistor in CMOS Technology

Channa Leepattarapongpan*; Toempong Phetchakul; Puttapon Pengpad; Arckom Srihapat;

Wutthinan Jeamsaksiri; Ekalak Chaowicharat; Charndet Hruanun; Amporn Poyai, King

Mongkutâ€™s Institute of Technology (Thailand)

Analysis and Modelling on CMOS Spiral Inductor with Impact of Metal Dummy Fills

Yong Wang*; Bo Chen; Supeng Liu; Liheng Lou; Kai Tang; Ying Zhang; Yuanjin Zheng, NTU

(Singapore)


A Semi-Analytical Extraction Method for Transformer Model

Bo Chen*; Liheng Lou; Supeng Liu; Kai Tang; Yong Wang; Yuanjin Zheng; Jianjun Gao, NTU

(Singapore)

Session C6 – Special Session 5: Residue Number Systems: Modern Design Techniques and

Applications

Chair Prof. Mehdi Hosseinzadeh, Azad Univ. (Iran)


Venue Room 4101B

ROM-less RNS-to-Binary Converter Moduli{22n

-1, 22n

+1, 2n-3, 2

n+3}

Pedro Miguens Matutino*; Ricardo Chaves; Leonel Sousa, ISEL (Portugal)

Twenty Years of Research on RNS for DSP: Lessons Learned and Future Perspectives

Pietro Albicocco*; Giancarlo Cardarilli; Alberto Nannarelli; Marco Re, Tor Vergata (Italy)

Babï Round-Off CVP method in RNS: Application to Lattice based cryptographic protocols

Jean Claude Bajard*; Julien Eynard; Nabil Merkiche; Thomas Plantard, LIP6 CNRS (France)

Rethinking Reverse Converter Design: From Algorithms to Hardware Components

Amir Sabbagh Molahosseini*; Azadeh Alsadat Emrani Zarandi; Seyed Mostafa Mirhosseini;

Mehdi Hosseinzadeh, Azad Univ. (Iran)

A Low-Cost Architecture for DWT Filter Banks in RNS Applications

Yinan Kong; C.V. Niras; Azadeh Safari*, Macquarie University (Australia)


ECRT: An Extension Of CRT Based On Weight Pre-Assignment

Shang Ma*; Chenhao Wang; Jianhao Hu; Hongyan Chen, UESTC (China)

Session D6 – Special Session 14: VLSI Systems for Vision-based Applications: Challenges and

Advancements

Chair Dr. Martin Lukasiewycz, TUM-CREATE (Singapore)


Venue Room 4101B

Diagnosis-Aware System Design for Automotive E/E Architectures

Peter Waszecki*; Florian Sagstetter; Martin Lukasiewycz; Samarjit Chakraborty, TUM

(Germany)

SystemC-Based Multi-level Error Injection for the Evaluation of Fault-Tolerant Systems

Daniel Mueller-Gritschneder*; Petra R. Maier; Marc Greim; Ulf Schlichtmann, TUM

(Germany)

Fault-Tolerant Embedded Control Systems for Unreliable Hardware

Dip Goswami*; Daniel Mueller-Gritschneder; Basten Twan; Ulf Schlichtmann; Samarjit

Chakraborty, TUM (Germany)

System Simulation and Optimization Using Reconfigurable Hardware

Martin Lukasiewycz*; Shreejith Shanker; Suhaib Fahmy, TUM-CREATE (Singapore)

Apps-Usage Driven Energy Management for Multicore Mobile Computing Systems

Zhao Qi Rex Hou; Ching Chuen Jong*; Andreas Herkersdorf, NTU (Singapore)


Session P2 – RF IC, Internet of Things, Testing and Methodologies (Poster)

Chair Prof. Meng Hiot Lim ,Nanyang Technological University (Singapore)

Prof. Yajun Yu, Nanyang Technological University (Singapore),

Date/Time 12 Dec Friday / 10:30 – 12:18

Venue Room 4001A/B

DC – 15 GHz CMOS SP8T Switches Using Defected Ground Structure Low Pass Filter

Agung Anak*; Apriyana Alit; Yue Ping Zhang, NTU (Singapore)

Modeling of Two Port Center-Tapped to Ground and Three Port Scalable Symmetrical

Inductor

Wei Yi Lim*; Muthukumaraswamy Annamalai Arasu; Raja Muthusamy Kumarasamy, IME

A*STAR (Singapore)

A +33dBm 1.9GHz Linear CMOS Power Amplifier with MOS-Level Linearizers

Zhixiong Ren*; Kefeng Zhang; Lanqi Liu; Cong Li; Xiaofei Chen; Dongsheng Liu; Zhenglin Liu;

Xuecheng Zou,Huazhong University of Science and Technology (China)

A Broadband CMOS LC Voltage-Controlled Oscillator for FMCW Synthesizer

Liheng Lou*; Supeng Liu; Bo Chen; Kai Tang; Yong Wang; Yuanjin Zheng, NTU (Singapore)

A Low Power Injection-Locked Divider for Body Sensor Network

Dawei Li*; Dongsheng Liu; Xuecheng Zou; Lun Li; Zilong Liu, Huazhong Univ. of Science and

Technology (China)


A 400MHz Low Power fractional-N synthesizer with GFSK/GMSK modulation in 0.13μm

CMOS

Dan Lei Yan*; Bin Zhao; M.K. Raja, IME A*STAR (Singapore)

Deep Packet Inspection in Residential Gateways and Routers: Issues and Challenges

Shiva Shankar Subramanian*; Pinxing Lin; Andreas Herkersdorf, Lantiq Asia Pacific

(Singapore)

Development of of a Variable Frequency Impedance Measuring System

Angelina Ang Silverio*; Angelito Ang Silverio; Joseph Demferlee Tatel, Chung Yuan Christian

Univ. (Taiwan)

Internet of Things: Trends, Challenges and Applications

Kiat Seng Yeo*; Anh Tuan Do; Mojy Curtis Chian; Tony Ng Chon Wee, Singapore Univ. of

Technology and Design (Singapore)

Zone Classification for Low-Power Active RFID Tags

Felis Dwiyasa*; Meng Hiot Lim, NTU (Singapore)

A Ramping Method Combined with the Damped PTA Algorithm to Find the DC Operating

Points for Nonlinear Circuits

Jin Zhou*; Wu Xiao; Dan Niu Dan; Yasuaki Inoue, Waseda Univeristy (Japan)

Design of a 4-Bit Programmable Delay with TDC-Based BIST for Use in Serial Data Links

Kaamran Raahemifar*, Ryerson University (Canada)


Automatic Adjustment System for Optical Interconnection Transmitter Using Improved

Particle Swarm Optimization

Kenichi Ohhata*; Hiroki Nakahara; Takuya Inoue; Toru Yazaki; Norio Chujo; Takuma

Nishimoto,Kagoshima University (Japan)

The Limitation for the Growth of Step of DPTA Method

Wu Xiao*; Jin Zhou; Niu Dan; Yasuaki Inoue, Waseda Univeristy (Japan)

A Bitstream Readback Based FPGA Test and Diagnosis System

Aiwu Ruan*; Ke Wu; Bo Ni; Wei Tian; Bairui Jie, Univ. of Electronic Science and Technology of

China (China)

A Modular Design of Elliptic-Curve Point Multiplication for Resource Constrained Devices

Wei Wei*; Li Zhang; Chip Hong Chang, NTU (Singapore)

Conversions Between RNS and Mixed-Radix Numbers Using Signed-Digit Arithmetic

Shugang Wei*, Gunma University (Japan)

NuDE 2.0: A Model-based Software Development Environment for the PLC & FPGA Based

Digital Systems in Nuclear Power Plants

Junbeom Yoo*; Eui-Sub Kim; Dong-Ah Lee; Jong-Gyun Choi; Young Jun Lee; Jang-Soo

Lee, Konkuk University (South Korea)

Obfuscation and Watermarking of FPGA Designs Based on Constant Value Generators

Viadimar V. Sergerichik; Alexander A. Ivaniuk; Chip Hong Chang*, NTU (Singapore)

Documents

2014 International Symposium on Integrated Circuits …toc.proceedings.com/25083webtoc.pdf · · 2015-04-152014 International Symposium on Integrated Circuits (ISIC) Thursday, December