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1
Gra
ph
ical
Sys
tem
Des
ign
: B
rin
gin
g E
mb
edd
ed D
esig
n t
o t
he
Mas
ses
in S
cien
ce a
nd
En
gin
eeri
ng
Hug
o A
. And
rade
Prin
cipa
l Arc
hite
ct, A
rchi
tect
ure
and
Tec
hnol
ogy
Gro
up
Zac
h N
elso
n
Aca
dem
ic F
ield
Eng
inee
ring
Man
ager
Pre
sen
ted
at
CH
ES
S S
emin
ar, E
EC
S U
C B
erk
eley
, N
ov
. 28
, 20
06
3
To
day
’s A
gen
da
•Bac
kgro
und
•Our
app
roac
h to
Dev
elop
ing
Em
bedd
ed S
yste
ms
•Tec
hnic
al D
etai
ls o
f Too
ls
•Res
earc
h T
opic
s
•Cur
rent
Act
iviti
es a
t UC
Ber
kele
y
4
Nat
ion
al In
stru
men
ts•
30 Y
ear
Lead
ers
in C
ompu
ter-
Bas
ed
Mea
sure
men
t and
Aut
omat
ion
•40
00 E
mpl
oyee
s; 1
,500
Eng
inee
rs
•C
orpo
rate
Hea
dqua
rter
s in
Aus
tin,
Tex
as–
Dire
ct O
pera
tions
in 4
0 C
ount
ries
•O
ver
600
Alli
ance
Par
tner
s
7 Y
ears
Asi
a 21
%
Eu
rop
e 31
%
Am
eric
as 4
8%
5
Wid
esp
read
Ad
op
tio
n•
Mor
e th
an 2
5,00
0 co
mpa
nies
in 9
0 co
untr
ies
•>
90%
of F
ortu
ne 5
00 m
anuf
actu
ring
com
pani
es
•N
o cu
stom
er r
epre
sent
s m
ore
than
3%
of r
even
ue
6
Div
ersi
ty o
f In
du
stri
es
Ele
ctro
nic
sS
emic
on
du
cto
rsC
om
pu
ters
Ad
van
ced
Res
earc
hP
etro
chem
ical
Fo
od
Pro
cess
ing
Tex
tile
s
Au
tom
oti
veT
elec
om
AT
EM
ilita
ry/A
ero
spac
e
8
Del
iver
ing
Co
mp
lete
Sys
tem
So
luti
on
s
Har
dw
are
and
Dri
ver
So
ftw
are
Ap
plic
atio
n
So
ftw
are
Netw
ork
9
To
day
’s D
esig
ns:
Co
nve
rgin
g C
om
ple
xity
Au
tom
oti
ve
Te
lem
ati
cs
CD
+R
WC
D+
RW
AM
/FM
Ste
reo
AM
/FM
Ste
reo
DV
D+
RW
DV
D+
RW
PC
/WW
WP
C/W
WW
/ /
Em
ail
Em
ail
Na
vig
ati
on
Na
vig
ati
on
Ce
llu
lar
Ce
llu
lar
Ph
on
eP
ho
ne
Sa
tell
ite
Car
Sa
tell
ite
Car
Ala
rm/R
ad
ioA
larm
/Ra
dio
TV
TV
Ga
mes
Ga
mes
Re
mo
te
Re
mo
te
Dia
gn
os
tic
sD
iag
no
sti
cs
10
To
day
’s C
hal
len
ges
: T
he
Tra
dit
ion
al A
pp
roac
h
Os
cil
losc
op
e Lo
gic
A
na
lyze
r
Sp
ec
tru
m A
na
lyze
r
DM
M
Co
mm
un
ica
tio
ns
A
na
lyze
r
LC
R M
ete
r
Fu
nc
tio
nG
en
era
tor
Po
we
r S
up
ply
Pa
ttern
Ge
nera
tor
Pro
gra
mm
ab
le
Sw
itc
hA
uto
mo
tive
Te
lem
ati
cs
11
•L
ow
er c
ost
•H
igh
er p
erfo
rman
ce
•S
mal
ler
size
•F
lexi
ble
•E
asily
up
gra
ded
•U
ser-
def
ined
•L
ow
er c
ost
•H
igh
er p
erfo
rman
ce
•S
mal
ler
size
•F
lexi
ble
•L
ow
er c
ost
•H
igh
er p
erfo
rman
ce
•S
mal
ler
size
Tel
emat
ics
Un
it
NI’s
Val
ue
Pro
po
siti
on
Vir
tual
Inst
rum
enta
tio
n
Th
eS
oft
war
eIs
the
Inst
rum
ent
“Do
fo
r en
gin
eers
wh
at t
he
spre
adsh
eet
did
fo
r fi
nan
cial
an
alys
ts.”
Lev
erag
ing
Sem
ico
nd
uct
or
Tec
hn
olo
gy
28
26
24
22
20
18
16
14 12
10 8 4
110
10
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Accuracy (Bits)
28
26
24
22
20
18
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110
10
01
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10
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0M
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10
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0G
Sam
plin
g R
ate
(S/s
)
6
Tra
dit
ion
al In
stru
men
ts
NI P
rod
uct
s, 2
005
NI P
rod
uct
s, 2
006
Fle
xDM
MP
reci
sio
n
Au
dio
RF
M
ixed
-Sig
nal
Su
ite
(Dig
itiz
er, G
ener
ato
r, D
igit
al)
Dig
ital D
ata
B
ack-E
nd
MIT
E
Tim
ing E
ngin
e(T
imin
g,
Tri
gge
rin
g,
Scannin
g)
Co
un
ter/
Tim
ers
Dig
ital IO
DA
Q S
TC
AD
C
DA
C
SC
/SC
XI
Lab
VIE
W o
n H
ost
DA
Qm
x
Dat
a A
cqu
isit
ion
Arc
hit
ectu
re
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ectivity
Co
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ectivity
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nn
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nal
Co
nd
itio
nin
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nal
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nd
itio
nin
g
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nal
Co
nd
itio
nin
g
An
aly
sis
DS
P
Dis
pla
y
Re
po
rtin
g
Mo
nito
rin
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na
l C
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dit
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vers
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cess
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Ap
pli
ca
tio
n
E-S
eri
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AQ
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ntr
ol
Lo
gic
EU
Sca
ling
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rms
Dri
ve
r
Co
nn
ectivity
Co
nn
ectivity
Co
nn
ectivity
Sig
nal
Co
nd
itio
nin
g
Sig
nal
Co
nd
itio
nin
g
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nal
Co
nd
itio
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PC
I
Dig
ital D
ata
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ack-E
nd
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ing E
ngin
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imin
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gge
rin
g,
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un
ter/
Tim
ers
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ital IO
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ger
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ital
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nal
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mp
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r S
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ge
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ce
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Wa
ve
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Au
dio
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ce
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eam
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mp
uta
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rm B
ased
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mp
uta
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n
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ltip
le C
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cip
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er
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it
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its
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ate
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PC
P
erf
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ce
PL
C
Perf
orm
an
ce
Desir
ed
:S
ing
le S
oft
ware
E
nvir
on
men
t
Mac
hine
Vis
ion
ME
MS
Con
trol
Vib
ratio
n
Mon
itorin
g Mot
ion
Dis
cret
e
Pro
cess
Bat
ch
Sys
tem
Sp
ecif
icat
ion
Rap
id
Pro
toty
pin
g
Co
de
Gen
erat
ion
Sys
tem
Tes
t (H
IL)
Cal
ibra
tio
n &
Fu
nct
ion
al T
est
Fie
ld T
est
Des
ign
&
Sim
ula
tio
n
Des
ign
Tes
t
Th
e C
on
verg
ence
of
Des
ign
an
d T
est
Th
e E
xpan
din
g W
orl
d o
f V
irtu
al In
stru
men
tati
on
21
Exa
mp
les
of
Em
bed
ded
Sys
tem
s
22
Tra
dit
ion
al D
eplo
ymen
t O
pti
on
s
Sin
gle
-Bo
ard
Co
mp
ute
rsP
LC
s
Cu
sto
m
Des
ign
s
23
Th
e L
on
g T
ail
Ven
dor-
defin
ed s
olut
ions
Ref
eren
ce d
esig
ns
Cus
tom
chi
ps
Use
r-de
fined
sol
utio
ns
24
Exa
mp
les
of
Em
bed
ded
Sys
tem
s
26
Gro
win
g C
ompl
exity
in E
mbe
dded
Sys
tem
s
•10
X in
crea
se in
app
licat
ion
com
plex
ity
•74
% p
roje
cts
run
late
bec
ause
of l
ack
of p
rodu
ctiv
e so
ftwar
e an
dha
rdw
are
prot
otyp
e to
ols
•E
xtre
mel
y fr
agm
ente
d m
arke
t mea
ns in
com
patib
ility
and
con
side
rabl
e ef
fort
to m
aint
ain
and
to p
ort a
pplic
atio
ns
-V
DC
Em
bedd
ed S
urve
y, A
nalo
g D
evic
es U
ser
Stu
dy
Indu
stria
l con
trol
RT
/FP
GA
sys
tem
s
Nex
t gen
erat
ion
devi
ces
C c
ode
gene
ratio
n
Tes
t sys
tem
des
ign
RF
Dig
ital
Dis
trib
uted
Rea
l-tim
e m
easu
rem
ents
Em
bedd
ed m
onito
ring
Mec
hatr
onic
s
HIL
Vir
tual
Inst
rum
enta
tio
nE
mb
edd
ed S
yste
ms
Nat
ion
al In
stru
men
ts V
isio
n E
volv
ed
27
“His
toric
ally
, eng
inee
rs d
esig
ned
in a
vac
uum
and
shi
pped
so
met
hing
six
to 1
2 m
onth
s la
ter-
-the
n re
aliz
ed w
hat w
as w
rong
w
ith it
. With
an
emph
asis
on
prot
otyp
ing…
, you
…br
ing
it rig
ht
back
to th
e pe
ople
you
are
des
igni
ng it
for
to g
et th
eir
feed
back
. T
he a
bilit
y to
put
som
ethi
ng li
ve o
ut in
the
wor
ld is
a k
ey p
arto
f th
is p
roce
ss.”
–G
eorg
e K
embe
l, S
tanf
ord
Uni
vers
ity (
Em
bedd
ed.c
om)
Indu
stria
l con
trol
RT
/FP
GA
sys
tem
s
Nex
t gen
erat
ion
devi
ces
C c
ode
gene
ratio
n
Tes
t sys
tem
des
ign
RF
Dig
ital
Dis
trib
uted
Rea
l-tim
e m
easu
rem
ents
Em
bedd
ed m
onito
ring
Mec
hatr
onic
s
HIL
Vir
tual
Inst
rum
enta
tio
nE
mb
edd
ed S
yste
ms
Nat
ion
al In
stru
men
ts V
isio
n E
volv
ed
28
Dep
loy
Pro
toty
pe
Des
ign
Indu
stria
l con
trol
RT
/FP
GA
sys
tem
s
Nex
t gen
erat
ion
devi
ces
C c
ode
gene
ratio
n
Tes
t sys
tem
des
ign
RF
Dig
ital
Dis
trib
uted
Rea
l-tim
e m
easu
rem
ents
Em
bedd
ed m
onito
ring
Mec
hatr
onic
s
HIL
Vir
tual
Inst
rum
enta
tio
nE
mb
edd
ed S
yste
ms
Nat
ion
al In
stru
men
ts V
isio
n E
volv
ed
53
Gra
ph
ical
Sys
tem
Des
ign
Dep
loy
Pro
toty
pe
Des
ign
Inte
ract
ive
Alg
ori
thm
Des
ign
•C
on
tro
l des
ign
•D
ynam
ic s
yste
m s
imu
lati
on
•D
igit
al f
ilter
des
ign
•A
dva
nce
d m
ath
emat
ics
Dep
loya
ble
Tar
get
s
•R
ug
ged
dep
loym
ent
pla
tfo
rms
•D
istr
ibu
ted
net
wo
rkin
g
•H
um
an m
ach
ine
inte
rfac
es
•C
ust
om
Des
ign
s
Tig
ht
I/O In
teg
rati
on
•I/O
mo
du
les
and
dri
vers
•C
OT
S F
PG
A h
ard
war
e
•V
HD
L a
nd
C c
od
e in
teg
rati
on
•D
esig
n v
alid
atio
n t
oo
ls
54
Dep
loy
Pro
toty
pe
Des
ign
Th
e “D
om
ain
Exp
ert”
–N
on-e
mbe
dded
pro
gram
min
g gu
ru
–S
yste
m-le
vel e
ngin
eer
or s
cien
tist
–T
echn
olog
y pi
onee
r, e
arly
ado
pter
, vis
iona
ry
–A
nyon
e ne
edin
g ab
stra
ctio
n fr
om s
ome
of th
e co
mpl
exity
of e
mbe
dded
pro
gram
min
g
–A
nyon
e ne
edin
g ea
sier
, fas
ter
deve
lopm
ent p
roce
ss
–A
nyon
e ne
edin
g C
OT
S to
str
eam
line
deve
lopm
ent
Ben
efic
iary
55
Dep
loy
Pro
toty
pe
Des
ign
Ben
efic
iary
UI
(face o
f th
e p
roduct)
an
d
Applic
ation S
oft
ware
(alg
orith
ms)
Hard
wa
re-b
ased c
usto
m a
lgo
rith
ms
and t
ransd
ucers
MP
U,
OS
Buses
Drivers
I/O
Hard
ware
(A
/D,
D/A
)
Career embedded
engineer
Traditional domain tasks
56
Dep
loy
Pro
toty
pe
Des
ign
Ben
efic
iary
UI
(face o
f th
e p
roduct)
an
d
Applic
ation S
oft
ware
(alg
orith
ms)
Hard
wa
re-b
ased c
usto
m a
lgo
rith
ms
and t
ransd
ucers
PC
, O
S
Buses
Drivers
I/O
Hard
ware
(A
/D,
D/A
)
MP
U,
OS
Buses
Drivers
I/O
Hard
ware
(A
/D,
D/A
)
GSD-empowered domain tasks
Bri
ngin
g
Em
bed
ded
Des
ign
to t
he
Mass
es i
n
Sci
ence
an
d
En
gin
eeri
ng
57
Dep
loy
Pro
toty
pe
Des
ign
FP
GA
s RT
OS
Con
trol
lers
Rug
ged
PC
sC
usto
m H
W
58
Dep
loy
Pro
toty
pe
Des
ign
•F
ull c
ompi
led,
gra
phic
al
prog
ram
min
g en
viro
nmen
t
•T
arge
t des
ktop
, mob
ile, i
ndus
tria
l, an
d em
bedd
ed
•T
hous
ands
of o
ut-o
f-th
e bo
x
mat
hem
atic
s an
d si
gnal
pr
oces
sing
•S
eam
less
con
nect
ivity
with
m
illio
ns o
f I/O
dev
ices
60
Dep
loy
Pro
toty
pe
Des
ign
Des
ign
To
ols
One
Env
ironm
ent
•S
truc
tura
l Dat
aflo
w -
G
•La
bVIE
W A
dvan
ced
Mat
h an
d A
naly
sis
VIs
•C
ontr
ol D
esig
n T
oolk
it
•S
imul
atio
n M
odul
e
•D
igita
l Filt
er D
esig
n T
oolk
it
•S
tate
Dia
gram
Too
lkit
•.m
(M
athS
crip
t)
61
Dep
loy
Pro
toty
pe
Des
ign
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Real-Time
Controller
Connectivit
yA
DC
Sig
nalC
on
d.
�
Pro
toty
pin
g P
latf
orm
s
Rec
on
fig
ura
ble
I/O
, Pro
gra
mm
able
Har
dw
are
62
Dep
loy
Pro
toty
pe
Des
ign
Dep
loym
ent
Op
tio
ns
Sys
tem
s S
hipp
ed /
Leve
l of c
usto
miz
abili
ty
Hardware System Cost
Cu
sto
m D
esig
ns
Pro
toty
pin
g P
latf
orm
s
PX
I
RIO
Cu
sto
m D
esig
ns
Custom Hardware Design ProcessL
abV
IEW
Em
bed
ded
Lab
VIE
W R
eal-
Tim
e
Lab
VIE
W F
PG
AR
IO
Co
mp
on
ents
63
Dep
loy
Pro
toty
pe
Des
ign
Dep
loym
ent
Op
tio
ns
Rea
l-T
ime
Pro
cess
or
Rec
on
fig
ura
ble
FP
GA
Ind
ust
rial
I/O
Mo
du
les
•Rec
on
fig
ura
ble
FP
GA
for
high
-spe
ed
and
cust
om I/
O ti
min
g, tr
igge
ring,
cont
rol
•Rea
l-T
ime
Pro
cess
or
for
dete
rmin
istic
, sta
nd-a
lone
ope
ratio
n
and
adva
nced
ana
lysi
s
•In
du
stri
al I/
O M
od
ule
s w
ith b
uilt-
in
sign
al c
ondi
tioni
ng fo
r di
rect
con
nect
ion
to s
enso
rs/a
ctua
tors
Co
mp
actR
IO
65
Dep
loy
Pro
toty
pe
Des
ign
Dep
loym
ent
Op
tio
ns
Cu
sto
m 3
2-b
it P
roce
sso
rsL
abV
IEW
Em
bed
ded
Dev
elo
pm
ent
Mo
du
le
3rdp
arty
to
olc
hai
n
3rdp
arty
OS
Po
rt L
abV
IEW
to
:
An
y32
-bit
arc
hit
ectu
re
An
yem
bed
ded
OS
66
NI G
rap
hic
al S
yste
m D
esig
n a
nd
EW
B
67
Gra
ph
ical
Sys
tem
Des
ign
Ap
plic
atio
ns
Cu
sto
m C
on
tro
l/Sen
sors
Bre
adth
of
I/OA
lgo
rith
m D
evel
op
men
t
Bio
med
ical
Mac
hin
e
Dep
loym
ent
Ele
ctro
nic
s
Rap
id P
roto
typ
ing
On
-lin
e V
ibra
tio
n
Mo
nit
ori
ng
an
d C
on
tro
l
76
Gra
ph
ical
Sys
tem
Des
ign
(G
SD
)
Cu
sto
m
Des
ign
s
77
Fro
nt
Pan
el
Blo
ck D
iag
ram
Wh
at is
Lab
VIE
W?
78
Wh
at is
Lab
VIE
W?
Rep
rese
nts
20 Y
ears
of
Inn
ovati
on2005
2006
2003
2005
1998
2000
1993
1997
1990
1992
1986
La
bV
IEW
1.0
For
Macin
tosh
La
bV
IEW
2.0
Com
pile
d L
anguage
La
bV
IEW
For
Sun, W
indow
s
La
bV
IEW
3.0
Multip
latform
La
bV
IEW
4.0
Pro
fessio
nal
Develo
pm
ent
La
bV
IEW
6i
Inte
rnet R
eady
La
bV
IEW
5.0
Undo! R
eal-T
ime La
bV
IEW
7 E
xp
res
sP
DA
and F
PG
A
La
bV
IEW
Em
bedded a
nd D
SP
Lab
VIE
W 8
.20
Anniv
ers
ary
Editio
n
La
bV
IEW
8D
istr
ibute
d Inte
lligence
79
Lab
VIE
W™
and
“G
”
•"G
" pr
ogra
mm
ing
lang
uage
–D
ataf
low
lang
uage
impl
emen
ted
in th
e N
atio
nal
Inst
rum
ents
’Lab
VIE
W™
–In
here
ntly
par
alle
l lan
guag
e
–S
ynth
esiz
able
lang
uage
•D
irect
com
pila
tion
to s
oftw
are
bina
ries
on h
ost p
roce
ssor
s
•T
o F
PG
As
(via
VH
DL)
•E
mbe
dded
Pro
cess
ors
(via
C)
80
Th
e G
Lan
gu
age
Mo
del
•H
omog
enou
s da
taflo
w la
ngua
ge
•R
un-t
ime
sche
dulin
g
•S
truc
ture
d ca
se (
switc
h, s
elec
t) a
nd lo
ops
–“S
truc
ture
d da
taflo
w”
•T
urin
g co
mpl
ete
81
G L
ang
uag
e (c
on
tin
ued
)
•H
omog
eneo
us a
dvan
tage
s–
Bou
nded
que
ues
•A
lthou
gh e
ach
elem
ent c
an b
e ar
bitr
arily
larg
e
–C
ompo
sabl
e
•M
ultid
imen
sion
al d
ata
type
s
•F
eedb
ack
only
bui
lt in
to th
e lo
op c
onst
ruct
•O
ccur
renc
es
•S
uppo
rts
mod
ular
sof
twar
e en
gine
erin
g co
nstr
ucts
and
in
telle
ctua
l pro
pert
y pr
otec
tion
82
Dis
trib
ute
d In
telli
gen
ce
Mu
ltip
le
Pro
gra
mm
ing
Mo
del
s
Wh
at is
Lab
VIE
W?
83
Mix
ed M
od
els
of
Co
mp
uta
tio
n f
or
an
Ap
plic
atio
n
Sta
te
Dia
gra
m
Gra
ph
ical
Use
r
Inte
rfac
e
Sim
ula
tio
n
Dia
gra
m
Gra
ph
ical
Dat
aflo
w
91
Mo
del
s o
f C
om
pu
tati
on
‘Sco
reca
rd’
Dat
aflo
w:
LabV
IEW
gra
phic
al p
rogr
amm
ing
Co
nti
nu
ou
s T
ime:
LabV
IEW
Sim
ulat
ion
Nod
e
Tim
ed M
ult
itas
kin
g:
prio
rity-
driv
en m
ultit
aski
ng, d
eter
min
istic
com
mun
icat
ion
Tim
e D
rive
n:
LabV
IEW
tim
ed lo
op
Syn
chro
no
us/
Rea
ctiv
e:La
bVIE
W F
PG
A, S
ingl
e-cy
cle
loop
Dis
cret
e E
ven
t:La
bVIE
W e
vent
str
uctu
re a
nd ti
med
loop
Syn
chro
no
us
Dat
a F
low
:st
atic
ally
sch
edul
ed, s
trea
m-b
ased
com
mun
icat
ion
Pro
cess
Net
wo
rks:
LabV
IEW
str
uctu
red
data
flow
Co
mm
un
icat
ing
Seq
uen
tial
Pro
cess
es:
LabV
IEW
syn
chro
niza
tion
elem
ents
Exp
ertis
e R
equi
red
No
vice
Typ
ical
Exp
ert
93
Gra
ph
ical
Sys
tem
Des
ign
A p
latf
orm
bas
ed-a
pp
roac
h
Gra
ph
ical
Pla
tfo
rm
DS
PM
PU
FP
GA
RT
OS
Des
kto
p
95
Inco
rpo
rati
ng
Tim
e
•T
imin
g an
d IO
•C
lock
syn
chro
niza
tion
–IE
EE
-158
8
•T
ime-
trig
gere
d ar
chite
ctur
e
–D
eter
min
istic
Com
mun
icat
ion
•P
rogr
amm
ing
with
tim
e
96
Tim
ed L
oo
p in
Lab
VIE
W
•A
llow
s m
ulti-
rate
tim
e-cr
itica
l loo
ps
•M
icro
seco
nd ti
min
g on
Lab
VIE
W R
eal-t
ime
•In
tegr
ated
with
dat
a ac
quis
ition
tim
ing
97
Tra
ce T
oo
l Ou
tpu
t fo
r M
ult
i-R
ate
Exa
mp
le
98
Oth
er T
imin
g S
tru
ctu
res
in L
abV
IEW
Sin
gle
-Cyc
le T
imed
Lo
op
(Lab
VIE
W F
PG
A)
Sim
ula
tio
n S
tru
ctu
re
(Lab
VIE
W S
imu
lati
on
Mo
du
le f
or
sim
ula
tio
n a
nd
rea
l-ti
me
con
tro
l)
99
FP
GA
, Rea
l-T
ime
and
Ho
st C
om
mu
nic
atio
n
Rec
on
fig
ura
ble
FP
GA
Lab
VIE
W
FP
GA
Dat
a S
tora
ge
Lab
VIE
W R
eal-
Tim
e S
yste
mW
ind
ow
s P
C
En
terp
rise
Use
r
Inte
rfac
eT
ime-
Cri
tica
l
Inte
rfac
eN
orm
al P
rio
rity
Win
do
ws
Ho
st
Net
wo
rk
Co
mm
un
icat
ion
Inte
r-T
hre
ad
Co
mm
un
icat
ion
FP
GA
Inte
rfac
e
Lab
VIE
W
for
Win
do
ws
Lab
VIE
W F
PG
AL
abV
IEW
Rea
l-T
ime
100
Lab
VIE
W F
PG
A
•La
bVIE
W d
iagr
ams
targ
eted
to V
HD
L fo
r F
PG
As
•P
aral
lel T
asks
for
Acq
uisi
tion
and
Ana
lysi
s–
Par
alle
lism
is in
here
nt in
Lab
VIE
W b
lock
di
agra
m a
ppro
ach
–P
aral
lel t
asks
are
clo
cked
thro
ugh
the
FP
GA
si
mul
tane
ousl
y
•F
lexi
ble
I/O–
Logi
c to
mod
ify D
IO li
nes
to c
ount
ers,
en
code
rs, P
WM
•R
esou
rce
sync
hron
izat
ion
and
timin
g–
Pre
cise
tim
ing
of o
nboa
rd r
esou
rces
incl
udin
g an
alog
I/O
, dig
ital I
/O
101
FP
GA
Tas
ks
•R
econ
figur
able
I/O
, 160
dig
ital l
ines
:–
80 q
uad
enco
ders
(A
, B)
–40
qua
d en
code
rs (
A,B
), 4
0 P
WM
out
puts
(m
ag, d
ir)
–30
qua
d en
code
rs, 3
0 P
WM
out
puts
, 40
limits
•C
usto
m s
tart
up/s
hutd
own
•P
ID, d
iscr
ete-
logi
c co
ntro
l
•S
igna
l pro
cess
ing
•H
ealth
mon
itorin
g an
d sa
fety
•C
omm
unic
atio
n pr
otoc
ols
(SP
I, I2 C
, MIL
-ST
D-1
553…
)
102
FP
GA
-Bas
ed I/
O A
pp
licat
ion
s
Cu
sto
m A
nal
og
I/O
Mu
ltip
le S
can
Rat
es
Cu
sto
m A
nal
og
Tri
gg
erin
g
Co
un
ters
Cu
sto
m C
ou
nte
rs
PW
MC
lock
s
Cu
sto
m T
imin
g a
nd
Syn
chro
niz
atio
n
Bu
ilt-i
n IP
Pro
cess
ing
Blo
cks
103
Evo
luti
on
of
Lab
VIE
W B
acke
nd
Tec
hn
olo
gie
s
VH
DL
OE
M
Syn
thes
is
PA
RF
PG
A
Inte
rmed
iate
Co
de
Co
mp
iler
Har
dw
are
Tar
get
No
ne
(Mac
hin
e C
od
e)
Lab
VIE
W
Rea
l-T
ime
Win
tel
Po
wer
PC
No
ne
(Ob
ject
Lib
rary
)
Lab
VIE
W
DS
PD
SP
CA
ny
An
y 32
-bit
MP
U
104
PX
I Tim
ing
&
Syn
chro
niz
atio
n
Co
mp
act
Vis
ion
Sys
tem
PC
I R S
erie
s
Inte
llig
ent
DA
Q
Co
mp
actR
IO
PX
I R S
erie
s
Inte
llig
ent
DA
Q
Lab
VIE
W F
PG
A T
arg
ets
105
Cu
rren
t A
ctiv
itie
s at
UC
Ber
kele
y
•P
artn
er M
embe
rshi
p in
CH
ES
S
•N
atio
nal I
nstr
umen
ts E
mbe
dded
Sys
tem
s La
b
Par
tner
Mem
ber
ship
in C
HE
SS
•Com
mon
Goa
ls b
etw
een
CH
ES
S a
nd N
I–
Com
mon
Use
Cas
es
–T
arge
ting
the
Dom
ain
Exp
ert
–A
dvan
cem
ent a
ctor
-orie
nted
pro
gram
min
g en
viro
nmen
ts
–T
ime
and
conc
urre
ncy
as fi
rst c
lass
pro
gram
min
g co
nstr
ucts
–C
ompl
emen
tary
app
roac
hes
•R
esea
rch
(UC
B)
and
Pro
duct
s (N
I)
•S
oftw
are
and
Har
dwar
e (B
oth)
–C
olla
bora
tive
Res
earc
h O
ppor
tuni
ties
107
Lab
VIE
W C
on
stru
cts
–R
evie
w
•N
ativ
e La
bVIE
W r
epre
sent
atio
ns o
f sys
tem
func
tions
•M
odel
s of
Com
puta
tions
–da
ta fl
ow, c
ontin
uous
tim
e,
stat
e ch
art
•I/O
–w
avef
orm
, sin
gle-
poin
t
•T
imin
g –
perio
dic,
eve
nt-b
ased
, tim
e-tr
igge
red
•P
rogr
amm
able
har
dwar
e el
emen
ts –
netw
orks
, bus
es
•P
artit
ioni
ng –
hard
war
e-in
depe
nden
t vie
w o
f sys
tem
108
Nat
ion
al In
stru
men
ts R
esea
rch
•T
imin
g: s
ynch
rono
us a
nd a
sync
hron
ous
even
ts, m
inim
um a
nd
max
imum
tim
e in
terv
als,
late
ncy,
ske
w, j
itter
, on
diffe
rent
tim
e-sc
ales
•M
easu
rem
ent s
yste
m d
esig
ner
envi
ronm
ent
•S
ingl
e co
mm
unic
atio
n de
sign
pla
tform
•A
dditi
onal
mod
els
of c
ompu
tatio
n
•I/O
Mod
els
•S
yste
m R
epre
sent
atio
ns
•E
mbe
dded
Pro
cess
ing
•W
irele
ss s
enso
rs
109
Fu
ture
Res
earc
h A
gen
da
•M
odel
s of
Com
puta
tion
•P
rogr
amm
ing
with
con
curr
ency
and
tim
e
•P
rogr
amm
ing
hete
roge
neou
s m
ulti-
core
arc
hite
ctur
es
•N
onlin
ear,
ada
ptiv
e an
d hy
brid
con
trol
app
licat
ions
•V
isio
n se
nsin
g fo
r co
ntro
l app
licat
ions
•D
istr
ibut
ed c
ontr
ol
•W
irele
ss n
etw
orks
•V
erifi
catio
n an
d va
lidat
ion
•F
PG
A-b
ased
I/O
110
Nat
ion
al In
stru
men
ts E
mb
edd
ed S
yste
ms
Lab
•D
esig
nate
Spa
ce in
Cor
y H
all (
2ndflo
or)
•F
urni
shed
PX
I Lab
Sta
tions
•N
I Sof
twar
e A
cces
s (in
Sof
twar
e W
areh
ouse
)
111
So
ftw
are/
DV
D O
rgan
izat
ion
112
UC
Ber
kele
y S
tud
ent
Inst
all O
pti
on
113
Qu
esti
on
sw
ww
.ni.c
om
/lab
view
ww
w.n
i.co
m/f
pg
a
ww
w.n
i.co
m/e
mb
edd
ed