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Challenges for three-dimensional (3D) ICs and systems, Toulouse 2011
3D Defect localization on System in Packages using Lock-in Thermography
Christian Schmidt, Christian Große, Frank Altmann
Fraunhofer Institute for Material Mechanics of Materials IWM Department of Microelectronics and MicrosystemsDiagnostic of Semiconductor TechnologiesWalter-Huelse-Str. 106120 Halle/S.Germany
+ 49 (0) 345 5589-170Christian.Schmidt@iwmh.fraunhofer.dewww.iwmh.fraunhofer.de
Overview
• Motivation• Principle of Lock-in Thermography• Case study on unfilled TSV structures• Through silicon defect localization on TSV structures• 3D defect localization using phase shift analysis• Investigations on a 2-die SiP
Motivation Failure Analysis of System in Packages (SiP)
• Complexity in design and materials, limited access for standard failure analysis methods
• 3D build-up requires appropriate non- destructive testing and fault isolation methods
• Target preparation on package level can be expensive, large amounts of materials to be removed
• Understanding of interface properties in interconnects requires high resolution (non- contacts, intermetallics, ..)
• Tremendous new challenges for FA• Needs improved and specifically adapted
new FA tools and workflows
64 GB Flash Memory device
Sketch of potential failure types
3
Motivation Defect localization using Lock-in Thermography (LIT)
• Electrical defects causing local temperature increase (shorts, increased interconnect resistance)
• Averaging over many lock- in periods improves signal-to-noise ratio (detection limit: few µW dissipation power, few µm spatial resolution (IC level))
• Si is transparent for IR light navigation and detection of thermal active defects underneath Si substrate
• Defect localization through opaque layers possible due to heat propagation Phase shift analysis enables 3D defect localization
Hot Spots
Hot Spot
4
Principle of Lock-in Thermography (LIT)
1Hz
10Hz
30HzCourtesy of Breitenstein, MPI Halle, Germany
Amplitude:
Phase:
29020 SSA
0
90
SSarctan
avoiding emissivity effects
5
Overview
• Motivation• Principle of Lock-in Thermography• Case study on unfilled TSV structures• Through silicon defect localization on TSV structures• 3D defect localization using phase shift analysis• Investigations on a 2-die SiP
Defect localization on unfilled TSV structuresDevice description
SEM Image Sketch sidewall metallization
• Demonstrator for TSV - 3D interconnect technology• Unfilled TSV, Ti/TiN / W/ Al sidewall metallization
7
Defect localization on unfilled TSV structuresShort localization using LIT
Focused on surface -70µm defocus -140µm defocus -210µm defocus
• Failure type in TSV daiy chain: Metallization was shorted to the Si substrate
• First step: Localization of defective TSV at low mag. LIT (not shown)• Second step: High resolution focus series to locate the defect inside TSV
structure• Result: Defect could be located at sidewall in 210µm depth
8
Defect localization on unfilled TSV structuresRoot cause analysis
Hot spot
• SEM investigation of defective TSV• Local structural defect at TSV
sidewall could be verified
LIT Image SEM overview @ 0.8kV acc. voltage
9
Overview
• Motivation• Principle of Lock-in Thermography• Case study on unfilled TSV structures• Through silicon defect localization on TSV structures• 3D defect localization using phase shift analysis• Investigations on a 2-die SiP
11
Through silicon investigations on High density Metal-Metal BondingDevice description
740µm
Cu-Sn-Cu with BCB Key Cu/Sn-Cu thermocompression bonding
on 10µm pitch with 5µm pillars
Failure type: high resistive opens in daisy chains
• Investigated area is covered by Si• First step: Defect localization
using LIT
12
Through silicon investigations on High density Metal-Metal BondingSample probing for LIT investigations
pads to contact each row
Probe tip 1
Probe tip 2
Edge of top die Edge of bottom die probing for LIT
13
Through silicon investigations on High density Metal-Metal BondingResults LIT
• Overlay of LIT amplitude and single IR image showing three resistive defects
14
Through silicon investigations on High density Metal-Metal BondingThinning of Top Si for further FIB cross sectioning
Spot#1
Original sample Sample after grinding
30 µm residual Si thickness
Thickness of top die: 740µm
15
Through silicon investigations on High density Metal-Metal BondingFIB Navigation using FIB/IR Microscope
LIT result with localized hot spots
hot spot
Navigation to hot spot region using integrated IR microscope followed by precise FIB cross sectioningFEI FIB V600CE+
FIB cross section
16
Through silicon investigations on High density Metal-Metal BondingDefect characterization using FIB Cross section
Short path (Cu)
Hot spot
• Cu residues causes electrical short between adjacent contacts • Successful application of localization – preparation – analysis FA flow
Overview
• Motivation• Principle of Lock-in Thermography• Case study on unfilled TSV structures• Through silicon defect localization on TSV structures• 3D defect localization using phase shift analysis• Investigations on a 2-die SiP
18
Principle of LIT and 3D defect localization3D defect localization
• “Heat flow takes time” – heat propagation depends on thermal properties and applied frequency
• Resulting phase shift depends on defect depth and covering material layers “Fingerprint”enables 3D defect localization
measured
calculated
n
nnp
n
n
n n
nn
fc
zµz
*2***2
,
19
Case study on a 2-Die SiPDevice description
• Automotive controller device• Die thickness: ~ 250 µm• I/O diodes in bonding area are used as
internal heat sources• Investigated areas are covered by MC
• Phase shift vs. defect depth is measured using:
– Internal heat sources– Backside needle probing
• Results are compared to theoretical phase shift values calculated by thermal properties and geometrical thickness
3D device sketch
Mechanical Cross section
20
Case study on a 2-Die SiPAnalysis steps External heat source stimulation
using backside needle probing
• Sample is metalized on the backside connection to GND
• Needle is placed on sample backside Vdd connection
• Resulting contact resistance generates defined heat source
Internal heat sources
External heat sources
sample
Needle (Vdd)GND - Ring
substrate
Metallization
21
Case study on a 2-Die SiPResults
• Comparison shows good match between internal/ external heat sources and theory
• Comparison show slightly better match between external heat sources and theory compared to internal heat sources
Possible reasons:• Defect geometry• Die-MC interactions • Experiment shows successful application of
defect depth localization using both theoretical and experimental calibration model
21
22
Summary & Outlook
• LIT is a very useful and powerful method for facing 3D defect localization on SiP
• Defects on unfilled TSV structures can be localized by determination of local temperature maximum using stepwise defocusing technique
• Defects can be localized under IR – transparent Silicon layers further preparation and analyis using IR/FIB navigation and cross sectioning
• LIT enables full 3D localization by quantitative phase shift analyis defects can localized in depth even through opaque material layer like MC
• LIT is therefore most promissing non-destructive localization method for stacked die devices