Upload
others
View
11
Download
0
Embed Size (px)
Citation preview
A
B
C
D
1234
D
C
B
A
4 3 2 1
SHEET SIZE: B
SHEET OF
VER:
REV:
DRAWN BY:
TITLE:
DATE: 1.0
01
BF
11/13/2014:11:27
PCB P/N: 1280723
TEST P/N: TSS0165SCH P/N: 0381556
ASSY P/N: 0431811
662
Block DiagramSCHEM, ROHS COMPLIANTHW-U1-KCU105_REV1_0
Input SYSCLK 300MHz
0
HP
HP
HP
HP
HP
HP
HP
BANK# PAGE#
BANK 0
BANK#
Page 39
Page 34
SMT, 14-pin JTAG
Page 16
PAGE#
QSPI0 256Mb
GTH226GTH227 GTH225 GTH224
0
44
46
66
68
48
GTHNOTAVAIL.
4765
0
BANK 46BANK 47BANK 48
MGT225-228
U1
MECHANICALS
DDR4 Comp. Memory
BANK 44BANK 45
64
PWR/GND BANKS
67HP
45
4
54
3
BANK 64BANK 65
BANK 66
BANK 68BANK 67
40ohm
PWR CONNECTORS
HR
HR
Pages 17-20
66
8
98
77
64-bit: 4x16-bit
GTH228
10
Page 6611-1350-51
GTHNOTAVAIL.
Buffers
PMOD ConnectorsPage 48
Banks 44/45/46
GPIO DIP switchesPage 41
FMC LPC CONNECTORPage 25
HDMI CODEC/CONNECTORPage 46-47
GPIO PUSHBUTTONSPage 41
SDIO SD CARDPage 33
Page 39QSPI1 256Mb
Page 41GPIO LEDs
Page 43-45SYSMON Header and MUX
Recovered ClockSMA Clock
SI570 Clock
IIC Bus
USB UART
Page 35-37
Page 49-50
Page 40
FMC HPC CONNECTORPage 21-24
Ethernet SGMIIPage 38
125MHZ ClockPage 34
SYSMON A/D ChannelsPages 43-45
PCIe x8 EdgePage 28Page 36
SMA MGTPage 25
FMC LPC MGTsPage 27-28SFP+ 0:1FMC HPC MGTs
Page 21
System Controller
Page 29-33
IIC, JTAG, SD
Page 52
VCCINT Regulator @ 30A
Page 53
VCCAUX Regulator @ 3A
Page 54
VCCBRAM Regulator @ 5A
Page 55
VCC1V8 Regulator @ 2A
Page 56
VADJ_1V8 Regulator @ 10A
Page 57
VCC1V2 Regulator @ 2A
Page 58
MGTAVCC Regulator @ 4A
Page 59
MGTAVTT Regulator @ 2A
Page 60
MGTVCCAUX Regulator @ 1A
Page 61
UTIL_3V3 Regulator @ 10A
Page 62
SYS_5V0 Regulator @ 1A
Page 63
SYS_1V0 Regulator @ 2A
Page 63
SYS_1V8 Regulator @ 1A
Page 63
SYS_2V5 Regulator @ 1A
12VDC
A
B
C
D
1234
D
C
B
A
4 3 2 1
SHEET SIZE: B
SHEET OF
VER:
REV:
DRAWN BY:
TITLE:
DATE: 1.0
01
BF
11/13/2014:10:59
PCB P/N: 1280723
TEST P/N: TSS0165SCH P/N: 0381556
ASSY P/N: 0431811
6614
FPGA Decoupling 1SCHEM, ROHS COMPLIANTHW-U1-KCU105_REV1_0
1 PLACE
8 PLACES
3 PLACES 7 PLACES
VCCO_0 / VCCO_64 / VCCO_65
VCCO_44 / VCCO_45 / VCCO_46
VCCO_47 / VCCO_48 / VCCO_66 / VCCO_67 / VCCO_68
VCCINT_FPGA
VCCBRAM_FPGA VCCBRAM_FPGA
VCCAUX / VCCAUX_IO
VCCBRAM
VCCINT
VADJ_1V8_FPGAVADJ_1V8_FPGA
VCCAUX_FPGA
GND
GND
GNDGNDGND GND
GND
GND
GNDGND
VCCINT_FPGA
GND
7 PLACES
VCCINT_FPGA
6 PLACES
GND
FPGA Decoupling 1
VCC1V2_FPGA
VADJ_1V8_FPGA VADJ_1V8_FPGA
VCC1V8_FPGA
C461
2
1470UF2VSP
1
2
C460C462
2
1 1
2
C911VCCINT_FPGA
GND
5 PLACES
C906
2
1100UF4VX6S
1
2
C907C908
2
1 1
2
C909
X6S6.3V100UF 1
2
C235
X6S6.3V100UF 1
2
C156
X6S6.3V100UF 1
2
C159
X6S6.3V100UF 1
2
C160
X6S6.3V100UF 1
2
C161
X6S6.3V47UF 1
2
C240
C915
2
1 1
2
C916C917
2
1 1
2
C918
C914
2
1
1
2X6S4V100UF
C899
1
2
C900
1
2
C901
1
2X6S4V100UFC153
GND
5 PLACES
VCCAUX_FPGA
C657
4.7UF6.3VX5R
2
1
C659
2
1
C330
4.7UF6.3VX5R
2
1
C331
2
1
C335
2
1
C336
2
1
C337
2
1
C338
2
1
C919
4.7UF6.3VX5R
2
1
C920
2
1
C921
2
1
C922
2
1
C923
2
1
C658
2
1
C334
2
1
C660
0.47UF10VX5R
2
1
C661
2
1
C662
2
1
C664
2
1
C665
2
1
C663
2
1
C947
2
1 1
2
C948C949
2
1 1
2
C950
GND
1
2X5R6.3V
4.7UF
C951
1
2
C952
1
2
C953
C954
2
1
VADJ_1V8_FPGA
GND
C955
4.7UF6.3VX5R
2
1
C956
2
1
VCC1V8_FPGA
GND
1
2X5R
6.3V4.7UF
C957
1
2
C958VCC1V2_FPGA
C961
2
1
C962
2
1
C963
2
1
C964
2
1 1
2
C965
1
2
C966
C967
2
1 1
2
C968
1
2
C969C970
2
1
1
2
C971C972
2
1
C973
2
1 1
2
C974
A
B
C
D
1234
D
C
B
A
4 3 2 1
SHEET SIZE: B
SHEET OF
VER:
REV:
DRAWN BY:
TITLE:
DATE: 1.0
01
BF
11/13/2014:10:59
PCB P/N: 1280723
TEST P/N: TSS0165SCH P/N: 0381556
ASSY P/N: 0431811
6615
FPGA Decoupling 2SCHEM, ROHS COMPLIANTHW-U1-KCU105_REV1_0
BANK 224
BANK 225
BANK 226
BANK 227
BANK 228
MGTAVCC_FPGA MGTAVTT_FPGA MGTVCCAUX
MGTAVCC_FPGA MGTAVTT_FPGA
MGTAVCC_FPGA MGTAVTT_FPGA
MGTAVCC_FPGA MGTAVTT_FPGA
MGTAVCC_FPGA MGTAVTT_FPGA
GND GND GND
GND GND GND
GND GND GND
GND GND GND
GND GND GND FPGA Decoupling 2
MGTVCCAUX
MGTVCCAUX
MGTVCCAUX
MGTVCCAUX
MGTAVCC_FPGA
MGTAVTT_FPGA
GND
GND
1
2X6S4V100UFC903C902
100UF4VX6S
2
1
1
2X6S4V100UFC904
C622
2
10.22UF6.3VX6S X6S
6.3V0.22UF
1
2
C623
C615
2
10.22UF
6.3VX6S
C614
2
10.22UF6.3VX6S
C6014.7UF6.3VX5R
2
1
C5964.7UF6.3VX5R
2
1 C5954.7UF6.3VX5R
2
1
C5904.7UF6.3VX5R
2
1 C5894.7UF6.3VX5R
2
1
C6300.47UF
10VX5R
2
1
1
2X5R10V
0.47UFC628
1
2X5R10V
0.47UFC632
C712
2
1DNPDNPDNPDNP
DNPDNP
1
2
C621
DNPDNPDNP
1
2
C631
C714
2
1DNPDNPDNPDNP
DNPDNP
1
2
C617C592
2
1DNPDNPDNPDNP
DNPDNP
1
2
C629C616
2
1DNPDNPDNPDNP
DNPDNP
1
2
C593
1
2DNPDNPDNP
C618
C6200.22UF6.3VX6S
2
1C5994.7UF6.3VX5R
2
1
DNPDNPDNP
C602
2
1
C619DNPDNPDNP
2
1
C5980.22UF
6.3VX6S
2
1
X6S4V100UFC959
2
1
C7114.7UF6.3VX5R
2
1
1
2X5R
6.3V4.7UFC713
1
2X5R
6.3V4.7UFC924
MGTAVTT_FPGA
GND
X6S4V100UFC1011
2
1
X6S4V100UFC1012
2
1 1
2
C1013100UF4VX6S X6S
4V100UFC1014
2
1 1
2
C1015100UF4VX6S
MGTAVTT_FPGA
GND
1
2
C1016100UF4VX6S
1
2
C1017100UF4VX6S X6S
4V100UFC1018
2
1 1
2
C1019100UF4VX6S X6S
4V100UFC1020
2
1
GND
X6S4V100UFC1021
2
1
X6S4V100UFC1022
2
1 1
2
C1023100UF4VX6S X6S
4V100UFC1024
2
1 1
2
C1025100UF4VX6S
GND
1
2
C1026100UF4VX6S
1
2
C1027100UF4VX6S X6S
4V100UFC1028
2
1 1
2
C1029100UF4VX6S X6S
4V100UFC1030
2
1
MGTAVCC_FPGA
MGTAVCC_FPGA
A
B
C
D
1234
D
C
B
A
4 3 2 1
SHEET SIZE: B
SHEET OF
VER:
REV:
DRAWN BY:
TITLE:
DATE: 1.0
01
BF
11/13/2014:10:59
PCB P/N: 1280723
TEST P/N: TSS0165SCH P/N: 0381556
ASSY P/N: 0431811
6631
System Controller 3SCHEM, ROHS COMPLIANTHW-U1-KCU105_REV1_0
System Controller 3
L62
21
FERRITE-120
3A
C835
2
10.47UF10VX5R
C794
2
110UF4VX5R
GND
VCCPLLSYS_1V8
SYS_1V8SYS_1V8
SYS_1V0SYS_1V0
SYS_1V0
GND
VCCINT/VCCBRAM
GND
VCCAUX
SYS_1V8
GND
Bank 34SYS_1V8
SYS_1V8
GND
Bank 0
SYS_1V0
GND
VCCPINT
GND
VCCPAUXSYS_1V8
GND
VCCO_MIO0
SYS_1V8
GND
SYS_1V8
VCCO_MIO1
U111
K5H5G6VCCPINT_G6
VCCPINT_H5VCCPINT_K5
XC7Z010CLG225BANK VCCPINT
CL225
XC7Z010CLG225
U111
L6J6VCCPAUX_J6
VCCPAUX_L6
XC7Z010CLG225BANK VCCPAUX
CL225
XC7Z010CLG225
U111
F5VCCPLL_F5
XC7Z010CLG225BANK VCCPLL
CL225
XC7Z010CLG225
U111
L10J10G10F9E10VCCINT_E10
VCCINT_F9VCCINT_G10VCCINT_J10VCCINT_L10
XC7Z010CLG225BANK VCCINT
CL225
XC7Z010CLG225
U111
K9J8H9VCCAUX_H9
VCCAUX_J8VCCAUX_K9
XC7Z010CLG225BANK VCCAUX
CL225
XC7Z010CLG225
U111
R9P2P12N5N15M8L5L11L1K7K4K14K10J9J5H6H10G5G3G13F10E9E7E5D2D12C5C15B8A11A1GND_A1
GND_A11GND_B8
GND_C15GND_C5
GND_D12GND_D2GND_E5GND_E7GND_E9
GND_F10GND_G13GND_G3GND_G5
GND_H10GND_H6GND_J5GND_J9
GND_K10GND_K14GND_K4GND_K7GND_L1
GND_L11GND_L5GND_M8
GND_N15GND_N5
GND_P12GND_P2GND_R9
XC7Z010CLG225BANK GND
CL225
XC7Z010CLG225
X6S4V100UF
1
2
C816
C795
2
147UF6.3VX6S
X6S6.3V47UF 1
2
C792
C788
2
1100UF4VX6S
C789
2
1100UF4VX6S
X6S4V100UF
1
2
C790
C791
2
1100UF4VX6S
C796
2
147UF6.3VX6S
C806
2
14.7UF6.3VX5R
C808
2
14.7UF6.3VX5R
C810
2
14.7UF6.3VX5R
C811
2
14.7UF6.3VX5R
C801
2
14.7UF6.3VX5R
C798
2
14.7UF6.3VX5R
C803
2
14.7UF6.3VX5R
C805
2
14.7UF6.3VX5R
GND
1
2X5R10V0.47UFC834C833
0.47UF10VX5R
2
1
C8370.47UF10VX5R
2
1 1
2X5R10V0.47UFC843 C844
0.47UF10VX5R
2
1 1
2X5R10V0.47UFC841 C842
0.47UF10VX5R
2
1
1
2X5R10V0.47UFC825
C8210.47UF10VX5R
2
1 1
2X5R10V0.47UFC822 C820
0.47UF10VX5R
2
1 1
2X5R10V0.47UFC828
C8300.47UF10VX5R
2
1
A
B
C
D
1234
D
C
B
A
4 3 2 1
SHEET SIZE: B
SHEET OF
VER:
REV:
DRAWN BY:
TITLE:
DATE: 1.0
01
BF
11/13/2014:11:59
PCB P/N: 1280723
TEST P/N: TSS0165SCH P/N: 0381556
ASSY P/N: 0431811
6651
Pwr Connector - Switch - Pwr SupervisorsSCHEM, ROHS COMPLIANTHW-U1-KCU105_REV1_0
GND
GND
1%
10.0KR3181
2
R319
10.0K
1%
1 2
D1
DL4148
100V
12
J73
22_11_2032
3
2
1
1%
1.00KR4221
2
SM_FAN_TACH
SM_FAN_PWM
Keyed Fan Header
J381
BLACK
GND
BLACK
1J23
BLACK
1J24
J251
BLACK
J261
BLACK
BLACK
1J27
COM
N/C
12V
12V
N/C
COM
GND
B CB
CG3PSGCG2CG1
GND
GND
2.00K
2
1R460
J15
2
5
6
4
3
1
U16 50MOHM
76
3 5
81
VCC12_P
C2981UF25V 2
1
Q4BSS138
2
3
1
R31610.0K
1
2
VCC12_SW
MASTERPOWER
6-PIN MINI-FITAC ADAPTER (BRICK)
J54
DNP
1
VCC12_SW
Q18
23
1
SI2300DS
D3
12
DDZ9678
1.8V
R2291
2
3.48K
1%
Maxim Regulator Inhibit Jumper
GND Test points
VCC
OUT
CDELAY
GND
EN
IN
VCC12_P
U15
MAX16052
3
1
2
6
4
5
REG_EN
C358
2
1DNPDNP
J12
HDR_1X22
1
R4991
2
4.99K
1%
X5R
1/16W
1.7W
1/10W
1/10W
500MW
500MW
1/10W
1/16W
360MW
1/10W
1/10W
21DS26
1
225V0.1UFC549
VCC12_P
Q1
4
12
3
87
65G
DS
FDS6681Z 2.5W
NC
NC
INPUT_GND
1/16W
2.00KR421
1
2
R637 1
2
1.50K1/10W
1%
1/10W
R63910.0K
1
2
INPUT_GND
INPUT_GND
INPUT_GND
INPUT_GND
INPUT_GND
INPUT_GND
R6401
2
1.00K1/16W1%
VCC1V8
Pwr Connector - Switch - Pwr Supervisors
GND
GND
GND
GND
VCC
GND
OUT1SET1
SET2
DELAY
OUT2
CP_OUT
TIMEOUT
EN_HOLD_B
ABP
EPAD
DISC1
DISC2
OUT3
DISC3
OUT4
DISC4
SET3
SET4
EN
RESET_B
SEQ3
SEQ2
SEQ1
SHDN_B
FAULT_B
REM
OV_OUT_B
R82720K
1/10W
1
2
R81610.0K1/10W
1
2
R81710.0K1/10W
1
2
R8085.9K1/10W
1
2
1/10W10.0KR818 1
2
R8094.32K1/10W
1
2
C8731UF16V 2
1
VCC12_P
C869
2
1 C8700.022UF10V2
1
1
X5R
C8590.1UF25V2
1
U128 TQFN_28_EP
MAX16050
19
15
21
22
25
26
27
20
4
5
8
7
6
10
9
13
16
29
3
14
24
28
12
23
11
18 17
2
1
1/10W10.0KR819 1
2
2 PLACESDELAY TIME AND RESET TIMEOUT PERIOD SET TO 11mS
SYS_2V5_POR_B
SYS_1V0_POR_B
SYS_1V8_POR_B
SYSCTLR_POR_B
SYS_1V0SYS_1V8SYS_2V5
NC
NC
NC
NC
NC
NC
NC
NC
NC
1
2
2
MASTER_SW_12V
C242
2
110UF25VX5R
1
225V0.01UFC871
X7R
SW1SH2
SH1
3
2
11101M2S3AQE2
DNP
R638 1
2
3.32K1/10W
1%
R815 1
2
3.32K1/10W
1%
C499
2
1 330UF16VELEC
R2731
2
1.00K1/16W1%
X5R
C9101UF25V
2
1
UTIL_3V3
UTIL_3V3
UTIL_3V3
A
B
C
D
1234
D
C
B
A
4 3 2 1
SHEET SIZE: B
SHEET OF
VER:
REV:
DRAWN BY:
TITLE:
DATE:
ASSY P/N: 0431811
6652
VCCINT 40A RegulatorSCHEM, ROHS COMPLIANTHW-U1-KCU105_REV1_0
1.0
01
BF
11/13/2014:10:59
PCB P/N: 1280723
TEST P/N: TSS0165SCH P/N: 0381556
1P8
ADDR0ADDR1
BST
CIO
DCRN
DCRP
DGND
DH
DL
EN
EPAD
GDRV
INSNS
LBI
LBO
LCFFNLCFFP
LX
LXSNS
OUTN
OUTP
PG
PGND
SALRTSCLKSDAT
SET
SYNC
TEMPX
PWR3P33P3
POL CONTROLLERINTUNE DIGITAL
MAX15301
2
VCC12_VCCINTVCC12_SW
1
AGND1
AGND1
AGND1
AGND1
R2302.2
1
2
R4060
1 2
R4251.00K
1
2
1
R9010
1
2
R4622.00K
1
2
VCC12_SW
VCC12_VCCINT
L4510UH
21
3
3
2
VCCINT
VCCINT_FPGA
Z1
1 2
R4612.00K
1 2
PMBUS_SCLPMBUS_SDA
PMBUS_ALERT
VCCINT_PGOOD
VCCINT_SNS_P
VCCINT_SNS_N
2 PLACES
6 PLACES
2 PLACES
TO AVOID CONTRIBUTION TO CURRENT MEASUREMENTS.MINIMUM 1K LOAD REQUIRED. MUST BE CONNECTED BEFORE SENSE RESISTOR
PMBUS ADDR0x0A
SYNCHRONIZED TO OTHER LOWER CURRENT RAILS OPERATING AT 600 kHZ.VCCINT RAIL SWITCHING FREQUENCY IS 400kHz AND SHOULD NOT BE
CONNECT AGND TO GND AT OUTPUT CAPACITORS
2 PLACES
2 PLACES
1
DNP
J55
REG_EN
VCCINT_SYSMON_SENSE_N
VCCINT_SYSMON_SENSE_P
AT DUT PADSREMOTE SENSE CONNECTIONS
VCCINT_FPGA
AGND1
1/10W
1/10W
1/16W
1/10W 1/16W
1/16W
DEFAULT = 0.95VDC
R86S2 S1
12 R2 R1
S1S2
0.002
3W1%
Q204
123
8765
G
D
SFDMS8558S
78W
G
D
S
5 6 7 8
3 2 1
4
Q19
GNDGND
GND
GNDGND
GND
GND
GND
GND
GND
GND
Q3
4
123
8765
G
D
S
Q2
4
123
8765
G
D
S
FDMS8018
83W
R5141
2
140K1/10W1%
R226 1
2
2.21K1/10W
1%
Q233
21
C727
2
10.15UF16VX7R
21Z5Z4
1 2
Z21 2
21Z3
21Z61
Z621 2
VCCINT_FET_SWITCH
VCCINT_FET_SWITCH
C738
2
1100PF50VX7R
VCCINT_TEMPX
4 CONNECT ACROSS PINS OF OUTPUT INDUCTOR
4VCCINT
5 PLACE TEMP COMPENSATION TRANSISTOR ON THE BACKSIDE OF THE BOARD DIRECTLY UNDER OUTPUT INDUCTOR
5
VCCINT
VCCINT 40A RegulatorR710
1 2
10.0K
1/10W
1%
L19
21
FERRITE-96
10A
R811
2
12.7K1/10W1%
C453
2
12200PF50VX7R
C252
2
12.2UF25VX7R
VCCINT_DL
VCCINT_DH_R
C364
2
10.01UF25VX7R
D1612
MMSZ4680T1G2.2V500MW
GND
C167
2
1
100UF4VX6S
1
2
C166
C165
2
11
2
C164
C163
2
11
2
C162
C420
2
110UF6.3VX6S
C477
2
14.7UF6.3VX6S
C251
2
12.2UF10VX6S
C207
2
122UF25VX7R
1
2
C208
C206
2
122UF25VX7R
1
2
C205
L57
21
250NH
1 2X7R
16V
0.15UF
C636
6.3V0.22UFC403
X6S2
1
R1561
2
7.15K1/10W1%
C1111UF16VX5R
2
1
U29
MAX15301
22
7
1
3
11109
20
32
27
26
14
16
2829
23
21
13
18
33
12
19
15
5
30
31
8
17
42
2524
6
A
B
C
D
1234
D
C
B
A
4 3 2 1
SHEET SIZE: B
SHEET OF
VER:
REV:
DRAWN BY:
TITLE:
DATE:
ASSY P/N: 0431811
6653
VCCAUX 5A RegulatorSCHEM, ROHS COMPLIANTHW-U1-KCU105_REV1_0
1.0
01
BF
11/13/2014:12:00
PCB P/N: 1280723
TEST P/N: TSS0165SCH P/N: 0381556
1 2DNPL56
AGND2
VCCAUX_FPGA
21R457
1.00K
AGND2
21
Z42
AGND2
AGND2
VCCAUX_FPGA
1 J72
DNP
2
1R4581.00K1
1
2
1
1.00KR459
VCC12_SW
21DNP
DNP
R370 VCCAUX
VCCAUX_FPGA_SNS_P
VCCAUX_FPGA_SNS_N
AT DUT PADSREMOTE SENSE CONNECTIONS
PMBUS ADDR0x0B
TO AVOID CONTRIBUTION TO CURRENT MEASUREMENTS.MINIMUM 1K LOAD REQUIRED. MUST BE CONNECTED BEFORE SENSE RESISTOR
PMBUS_SCLPMBUS_SDA
PMBUS_ALERT
VCCAUX_PGOOD
REG_SYNC
REG_EN
VCCAUX_SYSMON_SENSE_N
VCCAUX_SYSMON_SENSE_P
AGND2
1/16W
1/16W
1/16W
DNP
DEFAULT = 1.80VDC
GND
GNDGND
GND
GND
GND
R193 1
2
5.11K1/10W
1%
R224 1
2
12.7K1/10W
1%
R2031
2
38.3K1/10W1%
3 PLACE TEMP COMPENSATION TRANSISTOR ON THE BACKSIDE OF THE BOARD DIRECTLY UNDER OUTPUT INDUCTOR
3
12
3
Q33
VCCAUX_TEMPX
1
2X7R50V100PFC748
21Z82
Z831 2
VCCAUX_FET_SWITCH
VCCAUX
2 CONNECT ACROSS PINS OF OUTPUT INDUCTOR
2
VCCAUX_FET_SWITCH
21Z39
Z381 2
21Z41Z40
1 2
2
1
1%1/10W140KR509
VCCAUX
VCCAUX 5A Regulator
C737
2
10.015UF25VX5R
SETADDR1ADDR0
SCLKSDAT
LBI
LBO
INSNS
TEMPX
BST
EN
SYNC
PG
1P8
SALRT
EPAD
CIO
DCRN
DCRP
OUTP
OUTN
3P3
LXSNS
GDRV
DGNDSGNDSGNDSGNDSGND
PGNDPGNDPGND
LXLXLXLX
PWR
PWR
POL REGULATOR
PWR
LX
INTUNE DIGITALMAX15303
PGND
C386
2
10.01UF25VX7R
R148
1 2
0.005
1W
1%
L11
21
1.15UH
D26
12
MMSZ4686T1G3.9V500MW
C414
210.1UF
25V
X5R
C431
2
110UF6.3VX6S
C488
2
14.7UF6.3VX6S
C273
2
12.2UF10VX6S
C233
2
122UF25VX7R
GND
1
2
X6S6.3V100UFC202
D33
12
MBRS240LT3G
40V
2A
GND
1 2X7R
16V
0.15UF
C385
R8821
2
100K1/10W1%
VCC12_SW
R720
1 2
8.87K
1/10W
1%
C1421UF16VX5R
2
1
U10TQFN_40_EP
MAX15303
38
177
28272221
31
342524
16
26
20
35
36
37
40
1
10
41
11
8
2
3
14
30
9
15
32
33
1312
456
23
29
19
18
39
A
B
C
D
1234
D
C
B
A
4 3 2 1
SHEET SIZE: B
SHEET OF
VER:
REV:
DRAWN BY:
TITLE:
DATE:
ASSY P/N: 0431811
6654
VCCBRAM 5A RegulatorSCHEM, ROHS COMPLIANTHW-U1-KCU105_REV1_0
1.0
01
BF
11/13/2014:12:00
PCB P/N: 1280723
TEST P/N: TSS0165SCH P/N: 0381556
1 2DNPL47
AGND4
VCCBRAM_FPGA
VCCBRAM_FPGA_SNS_P
VCCBRAM_FPGA_SNS_N
AT DUT PADSREMOTE SENSE CONNECTIONS
21
1.00K
R433
AGND4
21
Z13
AGND4
PMBUS ADDR0x0F
AGND4
PMBUS_SCLPMBUS_SDA
PMBUS_ALERT
VCCBRAM_PGOOD
VCCBRAM_FPGA
J57
1
DNP
2
1
1.00KR431
1
R361
1 2
DNP
DNP
VCCBRAM
REG_SYNC
REG_EN
VCCBRAM_SYSMON_SENSE_N
VCCBRAM_SYSMON_SENSE_P
AGND4
DNP
1/16W
1/16W
DEFAULT = 0.95VDC
GNDGND
GND
GND
R213 1
2
12.7K1/10W
1%
R505 1
2
9.53K1/10W
1%
1
3
2
TO AVOID CONTRIBUTION TO CURRENT MEASUREMENTS.MINIMUM 1K LOAD REQUIRED. MUST BE CONNECTED BEFORE SENSE RESISTOR
PLACE TEMP COMPENSATION TRANSISTOR ON THE BACKSIDE OF THE BOARD DIRECTLY UNDER OUTPUT INDUCTOR
CONNECT ACROSS PINS OF OUTPUT INDUCTOR
2
3
12
3
Q24C739100PF50VX7R
2
1
VCCBRAM_TEMPX
21Z63
Z641 2
VCCBRAM_FET_SWITCH
VCCBRAM
VCCBRAM_FET_SWITCH
Z121 2
21Z11
Z91 2
21Z10
2
1
1%1/10W140KR165
VCCBRAM
VCCBRAM 5A Regulator
2
10.015UF25VX5R
C728
SETADDR1ADDR0
SCLKSDAT
LBI
LBO
INSNS
TEMPX
BST
EN
SYNC
PG
1P8
SALRT
EPAD
CIO
DCRN
DCRP
OUTP
OUTN
3P3
LXSNS
GDRV
DGNDSGNDSGNDSGNDSGND
PGNDPGNDPGND
LXLXLXLX
PWR
PWR
POL REGULATOR
PWR
LX
INTUNE DIGITALMAX15303
PGND
GND
GND
2
1R4321.00K1/16W
VCC12_SW
R821
2
12.7K1/10W1%
C368
2
10.01UF25VX7R
1%
1W
0.005
21R141
L2
21
1UH
GND
D1812
MMSZ4680T1G2.2V500MW
C405
210.1UF
25V
X5R
C422
2
110UF6.3VX6S
C479
2
14.7UF6.3VX6S
C255
2
12.2UF10VX6S
C211
2
122UF25VX7R
1
2
X6S4V100UFC171
D27
12
MBRS240LT3G
40V
2A
GND
1 2X7R
16V
0.15UF
C367
2
1
1%1/10W100KR876
VCC12_SW
R711
1 2
14.3K
1/10W
1%
C1221UF16VX5R
2
1
U3TQFN_40_EP
MAX15303
38
177
28272221
31
342524
16
26
20
35
36
37
40
1
10
41
11
8
2
3
14
30
9
15
32
33
1312
456
23
29
19
18
39
A
B
C
D
1234
D
C
B
A
4 3 2 1
SHEET SIZE: B
SHEET OF
VER:
REV:
DRAWN BY:
TITLE:
DATE:
ASSY P/N: 0431811
6655
VCC1V8 2A RegulatorSCHEM, ROHS COMPLIANTHW-U1-KCU105_REV1_0
1.0
01
BF
11/13/2014:12:00
PCB P/N: 1280723
TEST P/N: TSS0165SCH P/N: 0381556
1 2DNPL55
AGND5
VCC1V8_SNS_P
VCC1V8_SNS_N
AT DUT PADSREMOTE SENSE CONNECTIONS
PMBUS ADDR0x11
21R456
1.00K
AGND5
21
Z37
AGND5
AGND5
PMBUS_SCLPMBUS_SDA
PMBUS_ALERT
VCC1V8_PGOOD
1 J71
DNP
2
1R4541.00K1
21DNP
DNP
R369
REG_SYNC
REG_EN
AGND5
1/16W
1/16W
DNP
DEFAULT = 1.80VDC
GNDGND
GND
GND
R223 1
2
12.7K1/10W
1%
R222 1
2
12.7K1/10W
1%
R2021
2
38.3K1/10W1%
1
2
TO AVOID CONTRIBUTION TO CURRENT MEASUREMENTS.MINIMUM 1K LOAD REQUIRED. MUST BE CONNECTED BEFORE SENSE RESISTOR
PLACE TEMP COMPENSATION TRANSISTOR ON THE BACKSIDE OF THE BOARD DIRECTLY UNDER OUTPUT INDUCTOR
CONNECT ACROSS PINS OF OUTPUT INDUCTOR
2
21Z80
Z811 2
VCC1V8_FET_SWITCH
VCC1V8
VCC1V8_FET_SWITCH
21Z36Z35
1 2
12
3
Q32C747100PF50VX7R
2
1
VCC1V8_TEMPX
3
2
1
1%1/10W140KR508
3
VCC1V8
VCC1V8 2A Regulator
2
10.015UF25VX5R
C736
SETADDR1ADDR0
SCLKSDAT
LBI
LBO
INSNS
TEMPX
BST
EN
SYNC
PG
1P8
SALRT
EPAD
CIO
DCRN
DCRP
OUTP
OUTN
3P3
LXSNS
GDRV
DGNDSGNDSGNDSGNDSGND
PGNDPGNDPGND
LXLXLXLX
PWR
PWR
POL REGULATOR
PWR
LX
INTUNE DIGITALMAX15303
PGND
GND
GND
2
1R4551.00K1/16W
VCC12_SW
VCC1V8_FPGA
VCC1V8_SYSMON_SENSE_N
VCC1V8_SYSMON_SENSE_PZ84
1 2
21Z85
VCC1V8
VCC1V8_FPGA
C384
2
10.01UF25VX7R
1%
1W
0.005
21R836
L10
21
3.3UH
C199
2
1 47UF6.3VX6S
GND
D25
12
MMSZ4686T1G3.9V500MW
C413
210.1UF
25V
X5R
C430
2
110UF6.3VX6S
C487
2
14.7UF6.3VX6S
C271
2
12.2UF10VX6S
C231
2
122UF25VX7R
D32
12
MBRS240LT3G
40V
2A
GND
1 2X7R
16V
0.15UF
C383
2
1
1%1/10W100KR881
VCC12_SW
R719
1 2
5.9K
1/10W
1%
C1391UF16VX5R
2
1
U9TQFN_40_EP
MAX15303
38
177
28272221
31
342524
16
26
20
35
36
37
40
1
10
41
11
8
2
3
14
30
9
15
32
33
1312
456
23
29
19
18
39
A
B
C
D
1234
D
C
B
A
4 3 2 1
SHEET SIZE: B
SHEET OF
VER:
REV:
DRAWN BY:
TITLE:
DATE: 1.0
01
BF
11/13/2014:10:59
PCB P/N: 1280723
TEST P/N: TSS0165SCH P/N: 0381556
ASSY P/N: 0431811
6656
VADJ 1V8 10A RegulatorSCHEM, ROHS COMPLIANTHW-U1-KCU105_REV1_0
HSG
LSG SWSW
GNDGND
GNDVPVPSW
1P8
ADDR0ADDR1
BST
CIO
DCRN
DCRP
DGND
DH
DL
EN
EPAD
GDRV
INSNS
LBI
LBO
LCFFNLCFFP
LX
LXSNS
OUTN
OUTP
PG
PGND
SALRTSCLKSDAT
SET
SYNC
TEMPX
PWR3P33P3
POL CONTROLLERINTUNE DIGITAL
MAX15301
VCC12_VADJ_1V8
R9510
1
2
R4632.00K
1
2
AGND6
R4642.00K
1 2
AGND6
AGND6
AGND6
R2312.2
1
2
R4341.00K
1
2
VADJ_1V8_FPGA
Z151 2
1
R9810
1 2
VADJ_1V8
VCC12_VADJ_1V8
L4810UH
21
Q9
FDPC8011S
710651
43298
VADJ_1V8_FPGA
PMBUS_SCLPMBUS_SDA
PMBUS_ALERT
VADJ_1V8_PGOOD
VADJ_1V8_FPGA_SNS_P
VADJ_1V8_FPGA_SNS_N
PMBUS ADDR
AT DUT PADS
2 PLACES
REMOTE SENSE CONNECTIONS
0x12
J58
1
DNP
VCC12_SW
VCC12_SW
R362
1 2
DNP
DNP
REG_SYNC
U25
4
5
3
2
1 A
BYAND
GND
VCC
SC70_5
SN74LVC1G08
REG_EN
VADJ_1V8_EN
12
HDR_1X2
J14
21
10.0KR331
2
1
1.00KR435
AGND6
1/10W
1/16W
DNP
1/10W 1/16W
1/16W
1/10W 1/16W
1/10W
DEFAULT = 1.80VDC
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
1
2
C6400.1UF25V
GND
VADJ_1V8_SYSMON_SENSE_N
VADJ_1V8_SYSMON_SENSE_P
R214 1
2
12.7K1/10W
1%
R5151
2
140K1/10W1%
2
21Z65
Z661 2
1
2X7R16V0.15UFC729
VADJ_1V8_FET_SWITCH
VADJ_1V8
VADJ_1V8_FET_SWITCH
Z471 2
21Z48
21Z16Z14
1 2
1
3
2
TO AVOID CONTRIBUTION TO CURRENT MEASUREMENTS.MINIMUM 1K LOAD REQUIRED. MUST BE CONNECTED BEFORE SENSE RESISTOR
PLACE TEMP COMPENSATION TRANSISTOR ON THE BACKSIDE OF THE BOARD DIRECTLY UNDER OUTPUT INDUCTOR
CONNECT ACROSS PINS OF OUTPUT INDUCTOR
VADJ_1V8_EN
12
3
Q25C740100PF50VX7R
2
1
VAD_1V8_TEMPX
3
VADJ_1V8
VADJ 1V8 10A Regulator
L22
21
FERRITE-96
10A
C454
2
12200PF50VX7R
C257
2
12.2UF25VX7R
VADJ_DH_R
VADJ_DL
R155 1
2
14.7K1/10W
1%
R1991
2
38.3K1/10W1%
GND
C370
2
10.01UF25VX7R
1%
1W
0.005
21R87
L3
21
1UH
GND
C1742
1
100UF6.3VX6S
D19
12
MMSZ4686T1G3.9V500MW
FMC_VADJ_ON
C423
2
110UF6.3VX6S
C480
2
14.7UF6.3VX6S
C258
2
12.2UF10VX6S
C216
2
122UF25VX7R
1
2
C215
1 2X7R
16V
0.15UF
C369
X6S
C4060.22UF6.3V2
1
UTIL_3V3
UTIL_3V3
UTIL_3V3
R712
1 2
1.4K
1/10W
1%
C1241UF16VX5R
2
1
U30
MAX15301
22
7
1
3
11109
20
32
27
26
14
16
2829
23
21
13
18
33
12
19
15
5
30
31
8
17
42
2524
6
A
B
C
D
1234
D
C
B
A
4 3 2 1
SHEET SIZE: B
SHEET OF
VER:
REV:
DRAWN BY:
TITLE:
DATE:
ASSY P/N: 0431811
6657
VCC1V2 3A RegulatorSCHEM, ROHS COMPLIANTHW-U1-KCU105_REV1_0
1.0
01
BF
11/13/2014:12:00
PCB P/N: 1280723
TEST P/N: TSS0165SCH P/N: 0381556
1 2DNPL49
AGND8
VCC1V2_FPGA
VCC1V2_FPGA_SNS_P
VCC1V2_FPGA_SNS_N
AT DUT PADSREMOTE SENSE CONNECTIONS
21
1.00K
R438
AGND8
21
Z19
AGND8
PMBUS ADDR0x14
AGND8
PMBUS_SCLPMBUS_SDA
PMBUS_ALERT
VCC1V2_PGOOD
VCC1V2_FPGA
J59
1
DNP
2
1
1.00KR436
1
R363
1 2
DNP
DNP
VCC1V2
REG_SYNC
REG_EN
AGND8
DNP
1/16W
1/16W
DEFAULT = 1.20VDC
GNDGND
GND
GND
VCC1V2_SYSMON_SENSE_N
VCC1V2_SYSMON_SENSE_P
R215 1
2
12.7K1/10W
1%
R166 1
2
21.5K1/10W
1%
R21
2
26.1K1/10W1%
1
3
2
TO AVOID CONTRIBUTION TO CURRENT MEASUREMENTS.MINIMUM 1K LOAD REQUIRED. MUST BE CONNECTED BEFORE SENSE RESISTOR
PLACE TEMP COMPENSATION TRANSISTOR ON THE BACKSIDE OF THE BOARD DIRECTLY UNDER OUTPUT INDUCTOR
CONNECT ACROSS PINS OF OUTPUT INDUCTOR
12
3
Q26C741100PF50VX7R
2
1
VCC1V2_TEMPX
3
2
21Z67
Z681 2
VCC1V2_FET_SWITCH
VCC1V2
VCC1V2_FET_SWITCH
Z181 2
21Z17
Z491 2
21Z50
2
1
1%1/10W140KR506
VCC1V2
VCC1V2 3A Regulator
2
10.015UF25VX5R
C730
SETADDR1ADDR0
SCLKSDAT
LBI
LBO
INSNS
TEMPX
BST
EN
SYNC
PG
1P8
SALRT
EPAD
CIO
DCRN
DCRP
OUTP
OUTN
3P3
LXSNS
GDRV
DGNDSGNDSGNDSGNDSGND
PGNDPGNDPGND
LXLXLXLX
PWR
PWR
POL REGULATOR
PWR
LX
INTUNE DIGITALMAX15303
PGND
GND
GND
2
1R4371.00K1/16W
VCC12_SW
C372
2
10.01UF25VX7R
1%
1W
0.005
21R142
L4
21
2.2UH
GND
D2012
MMSZ4680T1G2.2V500MW
C407
210.1UF
25V
X5R
C424
2
110UF6.3VX6S
C481
2
14.7UF6.3VX6S
C259
2
12.2UF10VX6S
C217
2
122UF25VX7R
1
2X6S4V100UFC180
D28
12
MBRS240LT3G
40V
2A
GND
1 2X7R
16V
0.15UF
C371
2
1
1%1/10W100KR877
VCC12_SW
R713
1 2
4.75K
1/10W
1%
C1261UF16VX5R
2
1
U4TQFN_40_EP
MAX15303
38
177
28272221
31
342524
16
26
20
35
36
37
40
1
10
41
11
8
2
3
14
30
9
15
32
33
1312
456
23
29
19
18
39
A
B
C
D
1234
D
C
B
A
4 3 2 1
SHEET SIZE: B
SHEET OF
VER:
REV:
DRAWN BY:
TITLE:
DATE:
TEST P/N: TSS0165SCH P/N: 0381556
ASSY P/N: 0431811
6658
MGTAVCC 5A RegulatorSCHEM, ROHS COMPLIANTHW-U1-KCU105_REV1_0
1.0
01
BF
11/13/2014:12:08
PCB P/N: 1280723
MGTAVCC_PGOOD
PMBUS_ALERT
PMBUS_SDAPMBUS_SCL
R931
1 20
VCC12_MGTAVCCVCC12_SW
GND
MGTAVCC_PWM2
MGTAVCC_PWM2
VCC12_MGTAVCC
C989
2
1
22UF
C990
2
1
22UF
1
2
1UF
C1048
1
2 1UF
C1049
GND
1
2
0.1UF
C979
1
2
0.1UF
C980
UTIL_3V3
1
2
1UF
C1050
1
2
0.1UF
C981
GND
C10782
1
100PF
R9111
2
2.15K
R9091
2
29.4K
VCC12_SW
MGTAVCC_VIN_UV
AGND9
AGND9
AGND9
AGND9
C9820.1UF
2
1
GND
C10511UF
2
1
22UF
C991
2
1
AGND9
R941
1 2
3.01K MGTAVCC_ISENSE2
MGTAVCC_A3_IN
MGTAVCC_A3_IN
Z921 2
Z93
1 2
GND
AT DUT PADSREMOTE SENSE CONNECTIONS
MGTAVCC_TS_FAULTB
MGTAVCC_ISENSE2
R945
1 2
4.7
R901
1 2
10
MGTAVCC_SLAVE_1V8
C983
2
1
0.1UF
C10742
1
1000PF
MGTAVCC_TS_FAULTB
C1072
2
1 0.22UF16V
GND
MGTAVCC
MGTAVCC_FPGA
DEFAULT = 1.00VDC
MGTAVCC_VX2
Z86
1 2
GND
GND
GND
MGTAVCC_VX2
C1079
2
1
100PF
GND
C1060
2
1
1UF
R9131
2
499
1
1 Capacitors should be placed as close as possible to Pin12 and 14
NOTES
D34
12
MMSZ4680T1G2.2V
1 J61
DNP
MGTAVCC_SYSMON_SENSE_N
MGTAVCC_SYSMON_SENSE_P
REG_EN
MGTAVCC 5A Regulator
MGTAVCC_VDD_MASTER
NC
R920
1 2
220
1%
1
225V2.2UF
C1007
1
2
C1066DNP
VCC12_MGTAVCC
R8971
2
174
C10521UF
2
1
MGTAVCC_SLAVE_1V8
C1053
1UF
21
GND
C1084
2
122PF50V
C1086
21
8200PF
R943
1 2
604
R937
1 2
332
MGTAVCC_FPGA_SNS_N
MGTAVCC_FPGA_SNS_P
1
2
C99547UF25V25V
47UFC996
2
1
X7R
1/10W
C0G, NP0
1 2
C1067
DNP
21R926
DNP
GND
1 2
10A
FERRITE-96L64
C1076DNPDNPDNP
2
1
10UFC1003
2
1
L68
3.3UH21
R916
4.99
1 2
0.022UF
C1009
21
R9182.49K
1 2
R925
DNP
DNP
1 2
R9320
1
2
R90080.6
1
2
PMBUS ADDR0x72
R92120.0K
0.5%
1
2 2
1402R935
2
1576R907
R947
12
0.0011W1%
R940
680
1 2
C1083
220PF
21
1%1/10W22.1KR9391
2
1 2
10%
210NH
L70
R902
1 2
101/10W
1%
1%
1/10W
10
21R903
MGTAVCC_FPGA
SPLIT POWER PLANE
1
2
C1088DNPDNPDNP
C1090
2
1DNPDNPDNP DNP
DNPDNP
1
2
C1091C1094
2
1DNPDNPDNP DNP
DNPDNP
1
2
C1095 C1096
2
1DNPDNPDNP
MGTAVCC_FPGA
GNDX6S10V
2.2UFC1100
2
1
C1102
0.022UF
21
R954
1.00K
1%
1/16W
1 21/16W1%
1.00K
R955
1 2
GND
0.022UF
C1103
2
1
GND
U137
35
36
34
33
32
31
30
29
28
27
26
24
23
22
21
20
19
18171615
14
131211
10
9
8
7
654321
25
37EPAD
PGND
R_REFMRAMPR_SEL0R_SEL1R_SEL2R_SEL3
GND
VDD
VR_ON
NC
PMDATAPMCLOCKPMALERTB
VIN_UV
PWM4PWM3PWM2PWM1
TS_FAULTB
ISENSE1
ISENSE2
ISENSE3
ISENSE4
PWRGD
PVX
VDD33
A3_OUT_PS
A3_OUT_NORM
A3_IN
A2B_OUT
A2_OUT
A2_IN
A1_OUT
SENSE_P
SENSE_N
MULTIPHASE MASTER
MAX20751EKX
QFN_36_C
MAX20751EKX
AGND
VDD
TS_FAULTB
VDDH
VSS
VX
BST
VCC
PWMISENSE
VSSVSSVSS
VXVXVX
GNDGNDGND
U135
15
191817
13
11
10
9876
5432
1
16
12
14
HPQFN_19_A
VT1697SBFQX
A
B
C
D
1234
D
C
B
A
4 3 2 1
SHEET SIZE: B
SHEET OF
VER:
REV:
DRAWN BY:
TITLE:
DATE:
TEST P/N: TSS0165SCH P/N: 0381556
ASSY P/N: 0431811
6659
MGTAVTT 5A RegulatorSCHEM, ROHS COMPLIANTHW-U1-KCU105_REV1_0
1.0
01
BF
11/13/2014:12:08
PCB P/N: 1280723
MGTAVTT_PGOOD
PMBUS_ALERT
PMBUS_SDAPMBUS_SCL
R933
1 20
VCC12_MGTAVTTVCC12_SW
GND
MGTAVTT_PWM2
MGTAVTT_PWM2
VCC12_MGTAVTT
C992
2
1
22UF
C993
2
1
22UF
1
2
1UF
C1054
1
2 1UF
C1055
GND
1
2
0.1UF
C984
1
2
0.1UF
C985
UTIL_3V3
1
2
1UF
C1056
1
2
0.1UF
C986
GND
C10802
1
100PF
R9121
2
2.15K
R9101
2
29.4K
VCC12_SW
MGTAVTT_VIN_UV
AGND10
AGND10
AGND10
AGND10
C9870.1UF
2
1
GND
C10571UF
2
1
22UF
C994
2
1
AGND10
R942
1 2
3.01K MGTAVTT_ISENSE2
MGTAVTT_A3_IN
MGTAVTT_A3_IN
Z941 2
Z95
1 2
GND
MGTAVTT_TS_FAULTB
MGTAVTT_ISENSE2
R946
1 2
4.7
R904
1 2
10
MGTAVTT_SLAVE_1V8
C988
2
1
0.1UF
C10752
1
1000PF
MGTAVTT_TS_FAULTB
C1073
2
1 0.22UF16V
GND
MGTAVTT
MGTAVTT_FPGA
DEFAULT = 1.20VDC
MGTAVTT_VX2
Z87
1 2
GND
PMBUS ADDR0x73
GND
GND
R9221
2
20.0K
0.5%
MGTAVTT_VX2
C1081
2
1
100PF
GND
C1061
2
1
1UF
R9141
2
499
1
1 Capacitors should be placed as close as possible to Pin12 and 14
NOTES
D35
12
MMSZ4680T1G2.2V
1 J62
DNP
MGTAVTT_SYSMON_SENSE_N
MGTAVTT_SYSMON_SENSE_P
REG_EN
MGTAVTT 5A Regulator
R9081
2
576
1%
R9491
2
1.02K
1%
MGTAVTT_VDD_MASTER
NC
1
225V2.2UF
C1008
1
2
C1070DNP
VCC12_MGTAVTT
R8981
2
174
C10581UF
2
1
MGTAVTT_SLAVE_1V8
C1059
1UF
21
R9501.02K
1%
1
22
10
R934
GND
C1085
2
122PF50V
C1087
21
8200PF
R944
1 2
604
R938
1 2
332
MGTAVTT_FPGA_SNS_N
MGTAVTT_FPGA_SNS_P
1
2
C99747UF25V25V
47UFC998
2
1
X7R
1/16W 1/10W 1/16W
C0G, NP0
1 2
C1071
DNP
21R930
DNP
GND
1 2
10A
FERRITE-96L65
C1077DNPDNPDNP
2
1
10UFC1004
2
1
L69
3.3UH21
R917
4.99
1 2
1/10W
R91524.9K
1%
1
2
0.022UF
C1010
21
R9192.49K
1 2
R929
DNP
DNP
1 2
R936
820
1 2
L71
21
210NH
10%
R948
12
0.0011W1%
C1082
100PF
21
1/10W
R899
82.5
1%
1 2
AT DUT PADSREMOTE SENSE CONNECTIONS
SPLIT POWER PLANE
R905
1 2
10
1/10W
1%
1%
1/10W
10
21R906
MGTAVTT_FPGA
1
2
C1089DNPDNPDNP
C1092
2
1DNPDNPDNP DNP
DNPDNP
1
2
C1093C1097
2
1DNPDNPDNP DNP
DNPDNP
1
2
C1098 C1099
2
1DNPDNPDNP
GND
MGTAVTT_FPGA
X6S10V
2.2UFC1101
2
1
C1104
0.022UF
21
R956
1.00K
1%
1/16W
1 21/16W1%
1.00K
R957
1 2
GND
0.022UF
C1105
2
1
GND
EPAD
PGND
R_REFMRAMPR_SEL0R_SEL1R_SEL2R_SEL3
GND
VDD
VR_ON
NC
PMDATAPMCLOCKPMALERTB
VIN_UV
PWM4PWM3PWM2PWM1
TS_FAULTB
ISENSE1
ISENSE2
ISENSE3
ISENSE4
PWRGD
PVX
VDD33
A3_OUT_PS
A3_OUT_NORM
A3_IN
A2B_OUT
A2_OUT
A2_IN
A1_OUT
SENSE_P
SENSE_N
MULTIPHASE MASTER
MAX20751EKX
U138
35
36
34
33
32
31
30
29
28
27
26
24
23
22
21
20
19
18171615
14
131211
10
9
8
7
654321
25
37
QFN_36_C
MAX20751EKX
U136
15
191817
13
11
10
9876
5432
1
16
12
14 AGND
VDD
TS_FAULTB
VDDH
VSS
VX
BST
VCC
PWMISENSE
VSSVSSVSS
VXVXVX
GNDGNDGND
HPQFN_19_A
VT1697SBFQX
A
B
C
D
1234
D
C
B
A
4 3 2 1
SHEET SIZE: B
SHEET OF
VER:
REV:
DRAWN BY:
TITLE:
DATE:
ASSY P/N: 0431811
6660
MGTVCCAUX 1A RegulatorSCHEM, ROHS COMPLIANTHW-U1-KCU105_REV1_0
1.0
01
BF
11/13/2014:12:00
PCB P/N: 1280723
TEST P/N: TSS0165SCH P/N: 0381556
DEFAULT = 1.80VDC
MGTVCCAUX 1A Regulator
NC1
IN1
IN2
IN3
IN4
RST_B
SHDN_B
SSNC3
OUT4
OUT3
OUT2
OUT1
SET
NC2
GNDPAD
MGTVCCAUX
DNP
J63
1
U134 TSSOP_16_EP
MAX8869EUE18
1710
9
11
12
13
14
15
168
7
6
5
4
3
2
1
GND
NC
NCNC
MGTVCCAUX_PGOOD
MGTAVTT_PGOOD
C1063DNPDNPDNP
2
1
UTIL_3V3
25V1UFC1047
X5R2
1
GND
X6S2
1 C100210UF6.3V
GND
PLACE NEAR U1 FPGA
R9521
2
10.2K1/10W1%
R9511
2
8.06K1/10W1%
GND
Pin 1 of 10.2K resistor must be routed as a sense line directlyto a U1 power pin
A
B
C
D
1234
D
C
B
A
4 3 2 1
SHEET SIZE: B
SHEET OF
VER:
REV:
DRAWN BY:
TITLE:
DATE: 1.0
01
BF
11/13/2014:10:59
PCB P/N: 1280723
TEST P/N: TSS0165SCH P/N: 0381556
ASSY P/N: 0431811
6661
UTIL_3V3 10A RegulatorSCHEM, ROHS COMPLIANTHW-U1-KCU105_REV1_0
1P8
ADDR0ADDR1
BST
CIO
DCRN
DCRP
DGND
DH
DL
EN
EPAD
GDRV
INSNS
LBI
LBO
LCFFNLCFFP
LX
LXSNS
OUTN
OUTP
PG
PGND
SALRTSCLKSDAT
SET
SYNC
TEMPX
PWR3P33P3
POL CONTROLLERINTUNE DIGITAL
MAX15301
HSG
LSG SWSW
GNDGND
GNDVPVPSW
R10910
1
2
R4652.00K
1
2
VCC12_SW
VCC12_SW
AGND12
R4662.00K
1 2
AGND12
AGND12
R2322.2
1
2
R11010
1 2
AGND12
R4511.00K
1
2
1
VCC12_UTIL_3V3
VCC12_UTIL_3V3
L5410UH
21
Q10FDPC8011S
710651
43298
Z32
1 2
PMBUS_SCLPMBUS_SDA
PMBUS_ALERT
UTIL_3V3_SNS_P
UTIL_3V3_SNS_N
UTIL_3V3_PGOOD
PMBUS ADDR
AT DUT PADS
2 PLACES
REMOTE SENSE CONNECTIONS
0x1B
J64
1
DNP
2
R368
DNP
1
REG_SYNC
AGND12
1/10W 1/16W
1/16W
1/10W
1/10W
1/16W
DEFAULT = 3.30VDC
GND
GND
GND
GND
GND
GND
GND
GND
R220 1
2
12.7K1/10W
1%
R5161
2
140K1/10W1%
R225 1
2
68.1K1/10W
1%
R3871
2
51.1K1/10W1%
21Z78
Z791 2
Z331 2
21Z34
1
3
2
TO AVOID CONTRIBUTION TO CURRENT MEASUREMENTS.MINIMUM 1K LOAD REQUIRED. MUST BE CONNECTED BEFORE SENSE RESISTOR
PLACE TEMP COMPENSATION TRANSISTOR ON THE BACKSIDE OF THE BOARD DIRECTLY UNDER OUTPUT INDUCTOR
CONNECT ACROSS PINS OF OUTPUT INDUCTOR
12
3
Q31C746100PF50VX7R
2
1
UTIL_3V3_TEMPX
3
UTIL_3V3 10A Regulator
1
2
C7350.15UF16VX7R
VCC12_SW
R7561
2
1.78K1/10W1%
GND
L28
21
FERRITE-96
10A
UTIL_3V3_FET_SWITCH
UTIL_3V3_FET_SWITCH
X7R50V1000PF
1
2
C455
C269
2
12.2UF
25VX7R
2
1
5%
4.7KR333
1/10W
UTIL_3V3_DL
UTIL_3V3_DH_R
C382
2
10.01UF25VX7R
L9
21
1UH
GND
C1942
1
100UF6.3VX6S
C429
2
110UF6.3VX6S
C486
2
14.7UF6.3VX6S
C270
2
12.2UF10VX6S
C230
2
122UF25VX7R
1
2
C229
1 2X7R
16V
0.15UF
C381
X6S
C4120.22UF6.3V2
1
UTIL_3V3
UTIL_3V3
UTIL_3V3
R718
1 2
1.4K
1/10W
1%
C1361UF16VX5R
2
1
U31
MAX15301
22
7
1
3
11109
20
32
27
26
14
16
2829
23
21
13
18
33
12
19
15
5
30
31
8
17
42
2524
6
A
B
C
D
1234
D
C
B
A
4 3 2 1
SHEET SIZE: B
SHEET OF
VER:
REV:
DRAWN BY:
TITLE:
DATE: 1.0
01
BF
11/13/2014:10:59
PCB P/N: 1280723
TEST P/N: TSS0165SCH P/N: 0381556
ASSY P/N: 0431811
6662
SYS_5V0 RegulatorSCHEM, ROHS COMPLIANTHW-U1-KCU105_REV1_0
GND
1
3
2BSS138Q22
360MW
2
1R54610.0K1/10W
21
R5502.00K1/16W
VCC12_SW
SYS_5V0
SYS_5V0POWER
21DS40
GND
GND
GND
GND
GND
C5364.7UF25V 2
1
VCC12_SW
R542487K1/10W
1
2
R54490.9K1/10W
1 2
1 J77
DNP
5.0V @ 1A
SYS_5V0
U82
79
10
53
8
46
1
2
11EPAD
VIN
PGND
SSVCC
RESET_B
EN_UVLO FB_VO
LX
GNDNC
TDFN_10
MAX17502_5V0
NC
NC
SYS_5V0 Regulator
C537
2
110UF25VX5R
16V1UF
C534 1
2
C539
2
13300PF50VX7R
L59
21
22UH 1A
20%
A
B
C
D
1234
D
C
B
A
4 3 2 1
SHEET SIZE: B
SHEET OF
VER:
REV:
DRAWN BY:
TITLE:
DATE:
6663
SYS_2V5 SYS_1V8 SYS_1V0 RegulatorsSCHEM, ROHS COMPLIANTHW-U1-KCU105_REV1_0
1.0
01
BF
11/13/2014:12:08
PCB P/N: 1280723
TEST P/N: TSS0165SCH P/N: 0381556
ASSY P/N: 0431811
J67
DNP
1
DNP
J70
1
GND
GND
R4672.00K
1 2
BSS138Q5
3
2
1
R33410.0K
1
2
1
3
2BSS138Q6
R33510.0K
1
2
R4682.00K
1 2
VCC12_SW
POWER
POWERSYS_2V5
SYS_1V8
1/16W
360MW
1/10W
360MW
1/10W
1/16W21
DS27
DS281 2
SYS_1V8
SYS_2V5 SYS_1V8 SYS_1V0 Regulators
SYS_1V0
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
C8741UF16V 2
1
SYS_1V8_POR_B
R83226.1K1/10W
1
2
R82110.0K1/10W
1
2C8620.1UF25V2
1
C8751UF16V 2
1
R82210.0K1/10W
1
2C8630.1UF25V2
1
SYS_1V0_POR_B
C8640.1UF25V2
1
25V0.1UFC865
2
1R8142.67K1/10W
1
2
R8054.02K1/10W
1
2
1/10W10.0KR8231
2
R8133.65K1/10W
1
2
C8785600PF50V2
1
C879560PF
50V 2
1
2 PLACES
R82410.0K1/10W
1
2
R82510.0K1/10W
1
2SYS_2V5_POR_B
SYS_1V8
DNP
J86
1
SYS_2V5
C876
2
14.7UF25VX5R
X5R25V4.7UF
1
2
C877
SYS_2V5
C866
2
122UF25VX5R
1.8V @ 1A
2.5V @ 1A
1.0V @ 2A
GND
360MWBSS138Q36
2
3
1
1/16W
R8302.00K
1 2DS461 2
POWERSYS_1V0
SYS_1V0_PGOOD
R8281
2
20K1/10W1%
SYS_1V0_PGOOD
1
2C867C868
47UF25V
2
1
NC
U124
C2
B1
A2
C1
A1
A3
B3
B2
C3 PGOOD
SKIP
EN
IN
GND
FB
LX
COMP
SS_REFIN
WLP_9
MAX15053
U125
11
10
9
7
6
3
8
1
5
4
2
IC
EN
GND
SS
FB
EP
IN
IN
IN
OUT
OUT
TDFN_10_3X3_EP
MAX15027
IC
EN
GND
SS
FB
EP
IN
IN
IN
OUT
OUT
MAX15027
TDFN_10_3X3_EP
2
4
5
1
8
3
6
7
9
10
11
U126
1
2 25V0.01UFC872
X7R
R8291
2
40.2K1/10W1%
GND
C905
2
1100UF6.3VX6S
3.3V Bulk
L63
21
1.2UH 2.6A
20%
UTIL_3V3
UTIL_3V3
UTIL_3V3
UTIL_3V3