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418 IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, VOL. 10, NO. 4, DECEMBER 2010

Reliability Issues of SiC MOSFETs: A Technologyfor High-Temperature Environments

Liangchun C. Yu, Greg T. Dunne, Kevin S. Matocha, Member, IEEE, Kin P. Cheung,John S. Suehle, and Kuang Sheng, Senior Member, IEEE

(Invited Paper)

Abstract—The wide-bandgap nature of silicon carbide (SiC)makes it an excellent candidate for applications where hightemperature is required. The metal–oxide–semiconductor (MOS)-controlled power devices are the most favorable structure; how-ever, it is widely believed that silicon oxide on SiC is physicallylimited, particularly at high temperatures. Therefore, exper-imental measurements of long-term reliability of oxide athigh temperatures are necessary. In this paper, time-dependentdielectric-breakdown measurements are performed on state-of-the-art 4H-SiC MOS capacitors and double-implanted MOSfield-effect transistors (DMOSFET) with stress temperaturesbetween 225 ◦C and 375 ◦C and stress electric fields be-tween 6 and 10 MV/cm. The field-acceleration factor is around1.5 dec/(MV/cm) for all of the temperatures. The thermal acti-vation energy is found to be ∼0.9 eV, independent of the electricfield. The area dependence of Weibull slope is discussed and shownto be a possible indication that the oxide quality has not reachedthe intrinsic regime and further oxide-reliability improvementsare possible. Since our reliability data contradict the widely ac-cepted belief that silicon oxide on SiC is fundamentally limited byits smaller conduction-band offset compared with Si, a detaileddiscussion is provided to examine the arguments of the earlypredictions.

Index Terms—Activation energy, double-implanted metal-oxide-semiconductor (MOS) field-effect transistor (MOSFET)(DMOSFET), high temperature, MOS reliability, silicon carbide(SiC), time-dependent dielectric breakdown (TDDB), Weibullslope.

Manuscript received January 23, 2010; revised May 8, 2010 and July 29,2010; accepted August 25, 2010. Date of publication September 20, 2010; dateof current version January 26, 2011. This work was supported by the Office ofMicroelectronics Programs (OMP) at the National Institute of Standards andTechnology.

L. C. Yu was with the Rutgers University, Piscataway, NJ 08854 USA. Sheis now with General Electric Global Research, Niskayuna, NY 12309 USA andalso with National Institute of Standards and Technology, Gaithersburg, MD20899 USA (e-mail: [email protected]).

G. T. Dunne and K. S. Matocha are with the General Electric GlobalResearch, Niskayuna, NY 12309 USA (e-mail: [email protected];[email protected]).

K. P. Cheung and J. S. Suehle are with the National Institute of Standardsand Technology, Gaithersburg, MD 20899 USA (e-mail: [email protected];[email protected]).

K. Sheng was with the Department of Electrical and Computer Engineering,Rutgers University, NJ 08854 USA. He is now with Zhejiang University,Zhejiang, China (e-mail: [email protected]).

Color versions of one or more of the figures in this paper are available onlineat http://ieeexplore.ieee.org.

Digital Object Identifier 10.1109/TDMR.2010.2077295

I. INTRODUCTION

HARSH environments, mainly, high temperature, areexpected in a variety of measurement and control ap-

plications, such as automotive, aerospace, energy production,and other industrial systems. Silicon-based electronics are prob-lematic when ambient temperature exceeds 200 ◦C due tohigh internal junction temperature and large leakage currents.The wide-bandgap nature of silicon carbide (SiC) produces adramatic reduction in the intrinsic carrier density (19 ordersof magnitude) and allows for more stable high-temperatureelectronics. In addition to outstanding electronic properties,SiC’s excellent mechanical and thermal stability as well aschemical inertness and radiation hardness are well suited to gassensing and UV detection in hostile environments [1]–[4].

Among all power-device structures, the metal–oxide–semiconductor (MOS)-controlled devices are favorable due totheir high input impedance and low switching losses, whichmake power electronic circuits more controllable with higherefficiency. However, studies of SiC MOS field-effect transistor(MOSFET) reliability raised significant concerns on the long-term operation of SiC MOS-based devices, particularly at hightemperatures. Lelis et al. [5] demonstrated that the thresholdvoltage is not stable due to electron tunneling into and out of theoxide traps. Gurfinkel et al. [6] showed that the conventional dcmeasurement technique underestimated the threshold-voltageinstability as fast transient trapping and detrapping events can-not be captured with a slow sweep rate. They also found thatpostoxidation annealing in NO dramatically reduces instability.Yu et al. [7] reported evidence of channel hot carrier in SiCMOSFET operated at moderate drain bias.

The most important reliability concern is gate-oxide reliabil-ity. Early experimental results of insulators on SiC suggestedthat SiO2 on SiC was not reliable at high temperatures. Lipkinand Palmour [8] investigated several dielectric materials asgate insulator on 6H-SiC. All of them showed lifetimes below1000 s at 6 MV/cm and 350 ◦C. Maranowski and Cooper [9]performed time-dependent dielectric breakdown (TDDB) mea-surements of thermal oxides on 6H-SiC. The lifetime distri-butions showed a large extrinsic population, and themean-time-to-failure (MTTF) extracted from the intrinsic fail-ures suggested that acceptable reliability can only be main-tained if the electric field is kept below 5 MV/cm, and thetemperature is kept below 150 ◦C. This precludes most of thehigh-temperature applications where SiC is expected to excel.Singh and Hefner [10] argued that if Fowler–Nordheim (FN)

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YU et al.: RELIABILITY ISSUES OF SIC MOSFETS 419

tunneling is assumed, the oxide reliability on SiC is funda-mentally limited by its smaller conduction-band offset (ΦB)compared with Si (2.7 versus 3.1 eV of Si). Agarwal et al. [11]studied the temperature dependence of FN tunneling currentin 6H- and 4H-SiC capacitors and extracted effective barrierheight (Φeff) from the FN plots to be 2.43 eV at 25 ◦Cthat is reduced significantly to 1.76 eV at 325 ◦C. With atemperature-dependent flatband voltage correction, Waters andVan Zeghbroeck [12] reported even smaller Φeff of 1.92 eVat room temperature and around 1.1 eV at 300 ◦C. Seriousconcerns have been raised about the reliability of SiC powerMOS devices operating at elevated temperatures. Long-termTDDB measurements at high temperatures are required to trulyunderstand the reliability of silicon oxide grown on SiC.

Recently, more TDDB measurements of oxide reliability onSiC showed great improvements. Matocha and Beaupre [13]reported an MTTF of 2300 h at 6 MV/cm and 250 ◦C onMOS capacitors thermally grown with N2O and NO annealing.Yu et al. [14] reported t63% of 215 h measured at 6.4 MV/cmand 375 ◦C. Using TDDB with constant current stress,Fujihira et al. [15] found that charge to breakdown (QBD)increased from 0.1 to 10 C/cm2 by employing N2O annealing.Ongoing research is being conducted to further improve oxidereliability. Suzuki et al. investigated the oxide reliability oncarbon-face 4H-SiC (000-1) substrate with N2O nitridation [16]and dry oxidation plus various pyrogenic reoxidation annealingconditions [17]. Fujihira et al. compared the reliability of ther-mal oxide and chemical-vapor-deposited oxide with constant-current-stress TDDB [18]. Extrinsic failure is also underinvestigation. Senzaki et al. correlated the oxide reliability withmetal-impurity concentration in the wafer [19] and basal planedislocations in the epitaxial layer [20], while Matocha et al.[21] showed contradictory observations that no correlation wasfound between oxide breakdown pit and the dislocations inthe epitaxial layer. Studies of oxide reliability of SiC double-implanted MOSFET (DMOSFET) showed promising results aswell. Krishnaswami et al. [22] performed TDDB measurementson 2-kV 4H-SiC DMOSFETs at 175 ◦C and extrapolated theMTTF to 3 MV/cm to be longer than 100 years. The lifetimeof the DMOSFETs was found about two orders of magnitudesmaller than that of NMOS capacitor. Matocha et al. [21] alsoobserved lower lifetime on DMOSFETs.

In most of the gate-oxide-reliability measurements, due toconstraints on the total measurement time, high electric fieldsare used to accelerate oxide breakdown, and lifetimes at lowerelectric fields (normal operating conditions) are extrapolatedusing the high-field data. Therefore, the field-accelerationmodel and the field-acceleration factor employed in the lifetimeprediction are of crucial importance. The recently observedchange of the field-acceleration factor might indicate a changeof breakdown mechanisms at around 9 MV/cm for 4H-SiCMOS devices with an oxide thickness of ∼50 nm [21]. Anatural question would be: “Is there any mechanism change atlower electric fields?” The only way to answer this question isto perform long-term reliability tests at lower electric fields.

In this paper, TDDB measurements are performed on 4H-SiCMOS capacitors and DMOSFETs with constant-voltage stressat various temperatures and electric fields. Long-term stressexperiments over seven months in duration have been done at6 MV/cm and 300 ◦C. The results indicate that high-field datacan be extrapolated to lower fields with no change in the field-

Fig. 1. Lifetimes are predicted from the measured t63% using the E model[24]. Projection of lifetime is based on data measured below 9 MV/cm. Thefield-acceleration factor is independent of temperature. The error bars indicatethe 95% confidence intervals.

acceleration factor. Weibull slopes (β) with 95% confidenceintervals are extracted from the failure distributions and usedas an indicator of oxide quality. A more accurate method toextract β using area scaling is also presented. Temperaturedependence and thermal activation energy are also reported.Since our reliability data contradict the widely accepted beliefthat silicon oxide on SiC is fundamentally limited by its smallerconduction-band offset compared with Si, a detailed discussionis provided to examine the arguments of the early predictions.

II. EXPERIMENTAL SETUP

The 4H-SiC MOS capacitors of various gate areas werefabricated on 4H-SiC Si-face 4◦ off-axis lightly doped n-typeepilayers (n ≈ 1 × 1016 cm−3). A chemical-vapor-depositedfield oxide was deposited and patterned to form the active areaof the capacitors. Next, a 47-nm silicon oxide was thermallygrown in N2O at 1250 ◦C and NO at 1150 ◦C, followed bygate-electrode formation and patterning.

The small-area high-voltage SiC power MOSFETs werefabricated using an implanted DMOS process on 4H-SiCSi-face 4◦ off-axis epiwafers. The gate-oxidation procedurewas the same as that used for the MOS capacitors describedpreviously. The power MOSFETs were completed by formingohmic contacts, including contact annealing at 1050 ◦C for 3min, and final metal deposition and patterning. The die areaof these small-area MOSFETs is 1.1 × 1.1 mm2, providing anactive area of 5.4 × 10−3 cm2.

Constant-voltage-stress TDDB at four temperatures (375 ◦C,300 ◦C, 275 ◦C, and 225 ◦C) and electric fields between 6 and10 MV/cm were investigated. For each of the stress conditions,20 or more devices were tested. The times to failure wereplotted with Weibull statistics, and the characteristic lifetime(t63%, time when 63% of the devices have failed) and Weibullslope (β, an indicator of variations within the sample set) wereextracted with 95% confidence intervals, calculated using themaximum likelihood estimation.

III. RESULTS AND DISCUSSIONS

A. Field Acceleration and Lifetime Prediction

Capacitors of size 200 μm × 200 μm were stressed at electricfields between 6 and 10 MV/cm and temperatures between

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Fig. 2. Weibull distributions of device failure measured at T = 275 ◦C andvarious electric fields on 200 μm × 200 μm capacitors. Obvious extrinsicfailures have been removed from the distributions.

225 ◦C and 375 ◦C. The characteristic lifetimes (t63%) areshown in Fig. 1 with 95% confidence intervals indicated by theerror bars. Each of the data points is extracted from the lifetimedistribution of 20 devices measured by constant-voltage-stressTDDB. Fig. 2 shows the Weibull distributions at 275 ◦C withobvious extrinsic failures removed. The Weibull probabilitydistribution is employed in the lifetime projection because,although the Weibull and lognormal distributions fit data oflimited sample number almost equally well, the Weibull sta-tistics describes the dielectric breakdown of large sample sizesbetter than the lognormal distribution [23]. As for the field-acceleration model, there has been a continuing debate over thepast three decades in the Si community on the validity of theE model [24] versus the 1/E model [25]. It is still not clearwhich one is correct. However, the E model is utilized in thispaper to project the lifetime to lower electric fields wherethe devices operate because it is more pessimistic comparedwith the 1/E model projection, and some experimental data forrelatively thick oxide are better fitted by the E model [26], [27].

In Fig. 1, the field-acceleration factor changes around9 MV/cm, which is consistent with what Matocha et al.reported [21]. The physics behind this change of field-acceleration factor is still not clear. One possible explanationis impact ionization, as discussed by Schwalke et al. [28]. Elec-trons injected into the oxide by FN tunneling are subsequentlyheated by the high electric field. The electrons in the high-energy tail of the distribution have enough energy to collidewith the lattice and generate electron–hole pairs. Each of theseimpact ionizations leaves behind a slowly moving hole. Thelocal potential in the oxide is distorted by the holes buildingup, which enhances the electric field and, hence, the tunnelingcurrent. At the same oxide electric field, electrons in the thickeroxide have a higher probability of gaining sufficient energyfor impact ionization. Therefore, reliability studies on deviceswith various oxide thicknesses may help to further understandthis issue. The change of field-acceleration factor could also becaused by a certain type of extrinsic defect in the oxide, whichhas a different electric-field dependence from the intrinsic-fielddependence.

Regardless of the mechanism behind the change, lifetimesmeasured below 8.5 MV/cm all follow a field-acceleration

TABLE IPROJECTED MAXIMUM OPERATING ELECTRIC FIELD

Fig. 3. Weibull distributions measured on capacitors with various sizes atE = 8.09 MV/cm and T = 275 ◦C. Devices with larger area exhibit longerextrinsic tails.

factor of 1.5 dec/(MV/cm) at various temperatures, includingone set of devices that lasted more than half a year with stresscondition of 6 MV/cm and 300 ◦C. The projected maximumoperating electric field corresponding to lifetimes of 10 and100 years are summarized in Table I. Compared with theexperimental data reported ten years ago [8], [9], the reliabilityof SiO2 on SiC has been significantly improved by severalorders of magnitude.

B. Weibull Slope and Area Scaling

Are these results indicative of intrinsic breakdown? Is therestill room for further improvement of oxide reliability on SiC?To answer these questions, the Weibull distribution of thefailures should be examined more closely.

The expression for Weibull distribution is given by

F (TBD) = 1 − exp

[−

(TBD

t63%

)β]

(1)

where F is the cumulative failure, t63% is the characteristictime when 63% of devices fail, and β is the Weibull slope.β is an indicator of device variation within the sample set. If theoxides in all the capacitors are intrinsic and only one breakdownmechanism leads to a device failure, a large β value shouldbe expected. The more deviation from the intrinsic quality ofthe oxide is or when multiple mechanisms dominate the oxidebreakdown, the smaller would β be.

The Weibull slope is known to be hard to determine accu-rately without a very large sample size [29]. Fig. 3 shows failuredistributions of MOS capacitors with various areas stressed at8.09 MV/cm and 275 ◦C. After removal of obvious extrinsic



Fig. 4. More accurate method to extract Weibull slope β using the area-scaling relationship of t63%. β with 95% confidence intervals fitted fromWeibull distributions are also plotted on the secondary y-axis for comparison.

Fig. 5. Weibull distributions of MOS capacitors of various sizes scaled to200 μm × 200 μm using a Weibull slope of 7.42. The stress conditions are275 ◦C and 8.09 MV/cm.

failures, the characteristic lifetimes (t63%) and Weibull slopes(β) are plotted and shown in Fig. 4 with error bars indicat-ing the 95% confidence intervals calculated by the maximumlikelihood estimation. It can be seen that β has large confidenceintervals with a sample size of 20. The large range of β, whichvaries from 3 to 14, makes it difficult to utilize β as an indicatorof oxide quality.

In order to determine β more accurately, area scaling isperformed. One unique property of the Weibull statistics is thatthe distributions obtained for two different areas are shiftedvertically by a distance proportional to the logarithm of the arearatio as shown by (2)[30]. Equation (3), derived from (2), showsthat by plotting t63% as a function of area in a log–log scale,β can be calculated from the inverse of the slope. In Fig. 4, the βvalue determined from area scaling is 7.42. The 95% confidenceintervals of t63% are relatively smaller in a log scale, so theβ value obtained from area scaling of t63% has substantiallysmaller error. Using the aforementioned β value, the Weibulldistributions are scaled to an area of 200 μm × 200 μm. Asshown in Fig. 5, all the distributions fall on top of each other,which also confirms that the β value determined using the

previous method is much more accurate than those extractedfrom the slope of the failure distributions, i.e.,

t63%t′63%

=(

A′

A

)1/β

(2)

log10 t′63% − log10 t63% = − 1β

(log10 A′ − log10 A). (3)

There is no model that can predict what should the β valuebe for thick oxides with intrinsic quality. Therefore, while themore accurate β obtained earlier can be used to compare oxidequality relatively between two processes, it still cannot answeryet the question whether the oxide is intrinsic.

Here, the area dependence of β is presented as a possibleindicator that the good reliability results reported in this paperare still not indicative of intrinsic reliability, and there is still aroom for improvement.

In Fig. 4, the Weibull slope versus capacitor area is plottedon the secondary axis. Although the 95% confidence intervalsare large, there is a trend that β peaks at the area of 100 μm ×100 μm and decreases as the area deviates from the peak point.This trend is not as expected if there is only one extrinsicfailure mechanism involved in addition to the intrinsic oxidebreakdown, in which case, as the oxide area shrinks, the chanceof involving extrinsic defects should decrease, and therefore,β should increase for smaller areas. The observed trend doesnot agree with this expectation and suggests that there mightbe more than two breakdown mechanisms contributing to thefailure distributions. In the case of three breakdown mech-anisms, tI63% < tII63% < tIII63%; tI63% is related to the obviousextrinsic tail, tIII63% is the characteristic time associated withthe intrinsic failures, and tII63% is related to another extrinsicfailure mechanism in between. After the obvious extrinsic tailis removed, the Weibull distribution of capacitors with an areaof 800 μm × 200 μm still contains failures due to mechanism I.As the area decreases, the portion of failures due tomechanism I becomes less, and hence, β increases. As the areafurther decreases, intrinsic mechanism III comes into play andmakes β smaller again. This area dependence of β can alsobe seen by inspecting the Weibull distributions. Another setof area-dependent failure distributions stressed at 9.36 MV/cmand 275 ◦C is shown in Fig. 6. As the area decreases from800 μm × 200 μm to 100 μm × 100 μm, the Weibull distrib-ution becomes steeper (i.e., β increases). Furthermore, as thearea decreases from 100 μm × 100 μm to 10 μm × 10 μm,the failure distributions show more bimodal behaviors again.This trend is consistent with the earlier discussions of multiplefailure mechanisms. This area dependence of β is observed onall of the three sets of area-scaling data measured at differentelectric fields, as shown in Fig. 7. This repeatedly observedbehavior might be an indication that the oxide quality has notreached the intrinsic regime yet, and with continued advanceson oxidation processes, the reliability of SiO2 on SiC can befurther improved.

C. Activation Energy

Both the E and 1/E models assume an Arrhenius temperaturedependence in the form of tBD ∝ exp(Ea/kT ), where Ea is



Fig. 6. Weibull distributions of MOS capacitors with various sizes. The stressconditions are 275 ◦C and 9.36 MV/cm. As the area deviates from 100 μm ×100 μm, the distributions show more bimodal characteristics.

Fig. 7. Area dependence of Weibull slope β at three different electric fieldsshows peaks at the area of 100 μm × 100 μm. This dependence is an indicationthat the oxide on SiC has not reached the intrinsic regime yet.

the thermal activation energy required for oxide breakdown.These models also predict that Ea should be dependent onelectric field. In the early studies of SiO2 on Si, Ea wasobserved to decrease as a function of applied gate voltage[31]–[33]. However, not all the oxides exhibit such a voltage de-pendence, as discussed in [32] and [33]. McPherson and Mogulalso developed a model that shows that the field-independentactivation energy can be the result of two or more disturbedbonding states [34]. While many efforts have been spent onthe characterizations of Ea in SiO2/Si system, only very fewvalues of activation energy have been reported on SiO2/SiCsystem. Senzaki et al. reported the activation energies forAl gate and poly-Si gate thermal oxides to be 0.59–0.79 eVand 0.34–0.72 eV, respectively [35].

Fig. 8 shows the Arrhenius plots for the capacitors with areaof 200 μm × 200 μm at the four temperatures investigated.Each of the data points is extracted from the lifetime distrib-ution of 20 devices. The error bars indicate 95% confidenceintervals. It can be seen that the activation energy is around0.9 eV for all of the electric fields in the range from 8.09to 9.36 MV/cm. The activation energy does not appear to

Fig. 8. Arrhenius plots at various stress fields for capacitors with area of200 μm × 200 μm. The activation energy does not exhibit dependence withinthe electric-field range shown. Error bars indicate 95% confidence intervals.

Fig. 9. Electric-field acceleration of MOS capacitors and three generations ofDMOSFETs measured at 250 ◦C.

exhibit an electric-field dependence within the electric-fieldrange investigated.

D. Oxide Reliability of DMOSFET

Studies of oxide reliability of SiC DMOSFETs have showngreat improvement in recent years. The field-dependent char-acteristic lifetimes are shown in Fig. 9 for the DMOSFETsdeveloped in years 2006, 2007, and 2008. The reliability hasbeen improved by two orders of magnitude. t63% measured atthe same temperature on 200 μm × 200 μm capacitors are alsoshown for comparison in Fig. 9. It can be seen that the reliabilityof DMOSFET is getting closer to that of the capacitor. Itshould be noted that the active area of the DMOSFET is 5.4 ×10−3 cm−2, and the area of the capacitor is 4 × 10−4 cm−2. Ifarea scaling is performed, the two reliability curves should evenbe closer.

The Weibull slopes extracted from the failure distributions of4H-SiC DMOSFETs and capacitors are shown and compared inFig. 10 with the 95% confidence intervals indicated by the errorbars. The β value in the Weibull distribution of DMOSFETfailures is significantly poorer compared with the capacitor-failure distribution. This can also be seen by inspecting theWeibull distributions shown in Figs. 11 and 12. The Weibull



Fig. 10. Weibull slopes extracted for MOS capacitors and DMOSFETs with95% confidence intervals.

Fig. 11. Weibull distributions as a function of electric fields measured on SiCMOS capacitors of size 200 μm × 200 μm at T = 250 ◦C.

Fig. 12. Weibull distributions as a function of electric fields measured on SiCDMOSFETs with an active area of 5.4 × 10−3 cm2 at T = 250 ◦C.

plots of DMOSFETs are more nonlinear than the capacitors,which is expected because additional extrinsic defects mightbe caused by the extra processing steps necessary to formthe structure of the DMOSFETs. Future work is necessary tominimize the extrinsic failures and improve the reliability ofthe SiC DMOSFETs.

Fig. 13. Improvements of oxide reliability on SiC over the past 15 years.These data are measured on 200 μm × 200 μm MOS capacitors at 350 ◦C.

E. Examination of Early Prediction on Oxide Reliability

The observed excellent lifetimes clearly demonstrate thatthe widespread belief that silicon oxide on SiC will neverbe reliable at high temperatures is incorrect. Therefore, thearguments that lead to the misconception should be reexamined.

The main observation leading to the belief that silicon oxidecannot be reliable on SiC is the early experimental data of oxidereliability as discussed in the Introduction [8], [9]. However,with continuous advances in processing technologies, the oxidelifetime on SiC has been improved steadily in the past 15 years.Fig. 13 shows lifetime projections with the MTTF measuredon state-of-the-art MOS capacitors in years 1993, 2006, and2008 with the same temperature stress of 350 ◦C. The projectedlifetimes at used condition (3 MV/cm) are 0.5 h, 3 years,and 200 years, respectively. Our data measured at 375 ◦C inthis paper are also plotted for comparison. The observed goodreliability data are strong evidence that SiO2 on SiC is reliable.Nothing fundamental is responsible for these improvementsother than better processing technology. As mentioned earlier,even these recent good results are not yet the limit, and addi-tional improvement can be expected.

The smaller conduction-band offset compared with Si leadsto the concern that oxide reliability on SiC is physically limited.While a smaller conduction-band offset should indeed leadto shorter lifetime, the question is “by how much?” Singhand Hefner [10] projected a reduction by 1.5× based on thereduction of conduction-band offset. They further reasonedthat, since the electric field is kept below 4–5 MV/cm at arated temperature of 125 ◦C for commercial Si nMOSFETs,one could expect that the electric field for the SiC systemcannot exceed 3 MV/cm. It is not clear what the basis is for the1.5× reduction prediction. For thick oxides, the intrinsic break-down process is believed to be a feedback runaway process[36]–[38]. It mainly depends on the tunneling current throughthe oxide. The oxide on SiC is as reliable as the oxide on Siwhen they have the same level of tunneling current. Fig. 14shows the FN tunneling current for the two barrier heights (as-suming identical effective mass in the substrate). If the SiO2/Sisystem has a breakdown field of 5 MV/cm, then the SiO2/SiCsystem should have a breakdown field of ∼4.1 MV/cm. If the



Fig. 14. Theoretical FN tunneling current at ΦB = 2.7 and 3.1 eV forSiC/SiO2 and Si/SiO2 systems, respectively. mSiC = 0.37m0 and mox =0.42m0 are assumed in the calculations.

Fig. 15. FN plots of gate leakage current measured at room temperature and200 ◦C. Effective barrier heights are extracted from the middle section of thecurves as it is less affected by charge trapping or system leakage.

effective mass and the impact ionization are taken into account,then the breakdown field of SiO2/SiC should get even higher. Itshould also be noted that the 5-MV/cm specification for siliconis ultraconservative, set during the time the silicon industry wasstill learning to minimize extrinsic defects [39]. More moderndata suggest that the silicon system can support higher fields[40], [41]. The previous quantitative analysis shows that thebreakdown field of SiO2 on SiC is much higher than Singh andHefner predicted [10].

Considering the concern that the effective barrier heightdecreases significantly with increasing temperature asAgarwal et al. [11] and Waters and Van Zeghbroeck [12]reported, the I–V characteristics of the capacitors are measuredat different temperatures, and Φeff values are extracted fromthe FN plot. As shown in Fig. 15, the FN curves deviatefrom the expected linear behavior at both low fields and highfields. Therefore, Φeff varies by fitting different portions of thecurve. The bending at high fields is caused by charge trapping.This is further shown in Fig. 16 where two consecutive I–Vsweeps on the same device are shown. The leakage currentin the second sweep is larger than the initial sweep exceptat very high voltages. The interpretation is that, during the

Fig. 16. I–V characteristics measured on a MOS capacitor with two consec-utive sweeps. The larger leakage current in the second sweep is due to chargetrapping in the oxide.

initial sweep, charges are trapped in the oxide when the fieldis high enough, and the trapped charge increases the leakagecurrent by modifying the tunneling barrier in the subsequentI–V measurements. The fact that the two curves merge athigh voltages indicates that during the initial sweep, the I–Vcharacteristic is already distorted by the trapped charge. Themethod of using the FN plot to extract Φeff assumes that theleakage current measured is purely due to FN tunneling. Thisis not true in the SiC-based MOS system in which substantialamount of oxide traps exist both at the interface and in the bulk.Trap-assisted tunneling as well as distorted electric fields in theoxide due to charge trapping all distort the FN plot. Therefore,the Φeff extracted using this FN method is questionable.

Even if this questionable Φeff extraction method is employedby fitting the FN plot at moderate electric fields, which areless distorted by either charge trapping at high fields or systemleakage at low fields, the effective barrier height does notchange dramatically at high temperatures. The extracted Φeff

values are 2.57 eV at room temperature and 2.36 eV at 200 ◦Cwith ΔΦeff/ΔT ∼ 1.2 meV/K, which is much smaller com-pared with the 2.6 meV/K [11] reported by Agarwal et al. and3.0 meV/K [12] reported by Waters and Van Zeghbroeck. Thismuch smaller temperature dependence of Φeff may be the resultof the significantly improved oxide quality compared with tenyears ago as the amount of traps that distorts the FN tunnelinghave been reduced greatly.

IV. SUMMARY

Constant-voltage-stress TDDB measurements have been per-formed on 4H-SiC MOS capacitors and DMOSFETs with stresstemperature between 225 ◦C and 375 ◦C and electric fieldbetween 6 and 10 MV/cm. Long-term stress experiments overseven months in duration have been done at 6 MV/cm and300 ◦C. The field-acceleration factor is around 1.5 dec/(MV/cm) for all of the temperatures. Lifetime projection sug-gests a maximum operating electric field of 3.9 MV/cm for a100-year lifetime at 375 ◦C. The thermal activation energy isfound to be ∼0.9 eV, independent of the electric field within therange investigated. The reliability of SiC DMOSFETs has been



improved significantly over the past three years. Comparedwith the MOS capacitors, the Weibull slopes of the failuredistributions of DMOSFETs are significantly poorer than thatof the capacitors due to additional processing steps. Futurework is required to minimize the extrinsic failures and improvethe reliability of SiC DMOSFETs.

Area scaling is shown to be a more accurate method to extractWeibull slope β. The area dependence of β is discussed andshown to be a possible indication that the oxide quality has notreached the intrinsic regime, and further improvements of oxidereliability is possible.

Our reliability data contradict the widely accepted belief thatsilicon oxide on SiC is fundamentally limited by its smallerconduction-band offset compared with Si. A detailed discussionhas been provided to examine the arguments of the earlypredictions.

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Liangchun C. Yu received the B.S. degree inphysics from Nanjing University, Nanjing, China, in2003, the M.S. degree in material science from theNational University of Singapore (Singapore–MITAlliance), Singapore, Singapore, in 2004, and thePh.D. degree in electrical engineering from RutgersUniversity, New Brunswick, NJ, in 2010.

From 2008 to 2010, she was a Guest Researcherwith the National Institute of Standards and Technol-ogy, Gaithersburg, MD, where she evaluated oxidereliability of SiC MOS devices and developed a

wafer-level Hall mobility measurement technique. She is currently with GeneralElectric Global Research, Niskayuna, NY. She has authored and coauthoredover 20 journal and conference papers. Her research interests include reliabilityof semiconductor devices, development of wide-bandgap power devices anddevelopment of novel characterization techniques.

Dr. Yu served as the Vice Chair for arrangements of the 2009 IEEE Interna-tional Integrated Reliability Workshop.

Greg T. Dunne received the B.S. degree in materialsscience and engineering from North Carolina StateUniversity, Raleigh, in 1996.

He has been a Process Engineer, focusing onwide-bandgap materials growth and characterization,with Northrop Grumman, Sterling Semiconductor,Aixtron, and, currently, with General Electric GlobalResearch, Niskayuna, NY.

Kevin S. Matocha (S’95–M’03) received the B.S.degree in electrical engineering from Louisiana TechUniversity, Ruston, in 1995 and the M.S. and Ph.D.degrees in electrical engineering from the RensselaerPolytechnic Institute (RPI), Troy, NY, in 1998 and2003, respectively.

As a Research Assistant with RPI, he designedadvanced Si MOS-gated thyristors and developed anoncontact technique for characterizing recombina-tion processes in SiC. His doctoral work examinedthe capabilities of GaN MOSFETs for high-voltage

switching applications. Since 2000, he has been with the General ElectricGlobal Research, Niskayuna, NY, where he develops wide-bandgap devices,including SiC and GaN power transistors.

Dr. Matocha has served as the Schenectady Section Chair of the IEEEElectron Devices Society since 2006.

Kin P. Cheung received the Ph.D. degree in physicalchemistry from New York University, New York,in 1983.

From 1983 to 1985, he was a Postdoctoral Fellowwith Bell Laboratories during which he pioneeredTerahertz Spectroscopy. From 1985 to 2001, he wasa member of the technical staff, Bell Laboratories,Murray Hill, NJ. From 2001 to 2006, he was anAssociate Professor with Rutgers University, NewBrunswick, NJ. He is currently a Project Leader withthe Semiconductor Electronics Division, National

Institute of Standards and Technology, Gaithersburg, MD. He published over150 refereed journal and conference papers. He authored a book on plasma-charging damage and a book chapter and edited three conference proceedings.He served in the committee of a number of international conferences and hasgiven tutorial in ten international conferences. His area of interest covers VLSItechnology/devices and MEMS/NEMS.

John S. Suehle received the B.S., M.S., and Ph.D.degrees in electrical engineering from the Universityof Maryland, College Park, in 1980, 1982, and 1988,respectively.

In 1981, he was with the National Institute of Stan-dards and Technology (NIST), Gaithersburg, MD, ona Graduate Research Fellowship. Since 1982, he hasbeen with the Semiconductor Electronics Division,NIST, where he is Leader of the CMOS and noveldevices group. He has authored or coauthored over200 technical papers or conference proceedings and

is the holder of five U.S. patents. His research activities include failure andwear-out mechanisms in semiconductor devices, radiation effects in microelec-tronic devices, microelectromechanical systems, and metrology issues relatingto future electronic devices.

Dr. Suehle is a member of Eta Kappa Nu. He currently serves as an Editorof the IEEE TRANSACTIONS ON ELECTRON DEVICES and has served asa guest editor of the IEEE TRANSACTIONS ON DEVICE AND MATERIALS

RELIABILITY. He served as General Chair of the 2008 International ReliabilityPhysics Symposium and has served on the management committee of the IEEEIntegrated Reliability Workshop. He also serves on the executive managementcommittee of the IEEE International Electron Devices Meeting.

Kuang Sheng (M’99–SM’08) received the B.Sc.degree in electrical engineering from Zhejiang Uni-versity, Hangzhou, China, in 1995, and the Ph.D.degree in electrical engineering from Heriot-WattUniversity, Edinburgh, U.K., in 1999.

He was a Postdoctoral Research Associate withCambridge University, Cambridge, U.K., between1999 and 2002. He was with Rutgers University,New Brunswick, NJ, where he worked as an Assis-tant Professor and a tenured Professor. He is cur-rently with Zhejiang University. He led a team that

reported the first power IC on SiC. He has published approximately 90 technicalpapers in international journals and conferences and is a holder of a patent. Hisresearch interests include all aspects of power semiconductor devices and ICson SiC and Si.

Dr. Sheng serves as an Associate Editor of the IEEE TRANSACTIONS

ON POWER ELECTRONICS and the IEEE TRANSACTIONS ON INDUSTRIAL

APPLICATIONS.


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