A low-power multi-band CMOS RF receiver front-endfor ubiquitous sensor network applications

Trung-Kien Nguyen • Hoyong Kang •

Se-Han Kim • Cheol-Sig Pyo

Received: 5 June 2009 / Revised: 12 October 2010 / Accepted: 3 January 2011 / Published online: 11 January 2011

� Springer Science+Business Media, LLC 2011

Abstract This paper presents the design and experi-

mental results of a low-power multi-band RF receiver

including a multi-band low-noise amplifier (LNA) and a

down-conversion mixer based on the IEEE 802.15.4 stan-

dard for sensor node applications. A multi-band LNA with

two inputs is tuned to two resonant frequencies by con-

trolling the voltage on a switched MOS. The implemented

RF receiver front-end achieves a maximum voltage con-

version gain of 38 and 30 dB, NF of 6.2 and 9.2 dB at the

868/915 MHz and the 2.45 GHz bands, respectively. The

RF receiver front-end dissipates total 3.0 mA (including

I/Q mixers) under supply voltage of 1.8 V at both operation

bands.

Keywords CMOS � Low-power � RF � Receiver � USN

1 Introduction

Recently, a ubiquitous sensor network (USN) is drawing a

lot of attention as a method for realizing a ubiquitous

society. The IEEE 802.15.4 was finally standardized in

2006 [1] as a low-rate wireless personal area (LR-WPAN)

network for low-complexity, low-cost, low-power short-

range wireless connectivity among inexpensive fixed,

portable, and mobile devices. Moreover, the demand for

multi-band radio transceiver implementation is rapidly

increasing.

Most conventional multi-band receiver architectures are

implemented by using multiple individual receiving paths

[2, 3], which increase the cost, power dissipation, and com-

plexity. To overcome these disadvantages, a con-current

receiver architecture which can simultaneous receives sig-

nals in a multi-band, has been developed [4]. However, this

architecture experiences a linearity problem since the spurs

in one band can corrupt signals in the other band. Also, since

there is only one input at LNA, its input matching quality

factor cannot be optimized for both bands. Consequently,

gain, noise figure, and linearity cannot be optimized.

In this paper, a multi-band RF receiver front-end is

designed by adopting a multi-band LNA with two separate

inputs [5] and using one downconversion mixer as shown in

Fig. 1, in which the first band covers the 868 and 915 MHz

bands since they are close together and have the same

physical requirements, and the second band covers the

2.45 GHz band. This multi-band receiver adopts a low-IF

architecture with 2 MHz intermediate frequency (IF),

which has been chosen by considering the 3-dB bandwidth

of both operation frequency bands. Besides, the chosen IF

frequency is well beyond the flicker noise corner, one of the

drawbacks in direct conversion receiver topology. The rest

of this paper is organized as follows. In Sect. 2, the receiver

specifications are described to get more information about

design optimization. The detail of the multi-band RF

receiver front-end design is shown in Sect. 3. Section 4

shows the experimental results of the implemented multi-

band RF receiver front-end and Sect. 5 concludes this work.

2 Receiver specifications plan

The relevant receiver specifications are sensitivity, selec-

tivity, and dynamic range. Receiver sensitivity can be

T.-K. Nguyen (&) � H. Kang � S.-H. Kim � C.-S. Pyo

RFID/USN Department, Electronics and Telecommunications

Research Institute (ETRI), Yuseong-gu, Daejeon 305-700,

South Korea

e-mail: ntkien@etri.re.kr

123

Analog Integr Circ Sig Process (2011) 68:69–76

DOI 10.1007/s10470-011-9594-9

represented as a noise figure (NF). As mentioned in IEEE

802.15.4, the required sensitivity for 868 and 915 MHz

bands are -92 dBm while it is -85 dBm in 2.45 GHz

band. Therefore, the required NF of the receiver should be

less than 24 and 25 dB in 868/915 MHz band and

2.45 GHz band, respectively [6, 7]. Selectivity can be

represented as third-order, second-order intermodulation

products as well as a filter requirement. The gain control

range presents for receiver dynamic range.

In this work, the targeted sensitivity for the

868/915 MHz and the 2.45 GHz bands are -100 and -90

dBm, respectively. Therefore, the required NFs at low and

high bands are 8 and 12 dB, respectively, where about

5 dB implementation margins and 3 dB loss of an off-chip

SAW filter are included. Considering the minimum signal

levels are -103 and -93 dBm (or 2.3 and 7 lV with 50 Xreference), which include 3 dB loss of SAW filter, at LNA

input and the required 1.0 V voltage swing at the input of

an analog-to-digital converter (ADC), the required voltage

conversion gain of receiver chain (from LNA input to ADC

input) are 113 and 103 dB for the 868/915 MHz and the

2.45 GHz bands, respectively. The receiver must be able to

receive signals up to -20 dBm at both band as specified in

IEEE 802.15.4. Considering the minimum input signals of

-110 and -100 dBm, the dynamic range of the receiver

should be 90 and 80 dB for 868/915 MHz and 2.45 GHz

bands, respectively, to avoid the saturation of the ADC.

Other radio specifications of the multi-band RF receiver are

listed in Table 1.

The next step is assigning the specifications for each

block. Here, the receiver is divided into two sections: RF

section including LNA and downconversion mixer, and IF

section including band pass filter and variable gain

amplifier. This division helps a design process more con-

venience because the signal level at the LNA input is

represented in power while it is represented in voltage level

at the mixer output. Normally, to determine the NF spec-

ification of individual block in the cascade system, Friis’s

equation is applied, we have [8]

NFtotal ¼ NFRF;RSþ

NFIF;Rout;RF� 1

AP;RFð1Þ

where NFRF,Rs, and AP,RF are noise figure and available

power gain of the RF section with respect to the source

impedance, respectively. NFIF;Rout;RFis noise figure of the IF

section with respect to the output impedance of RF section.

The available power gain of the RF section is given by

AP;RF ¼Rin;RF

RS þ Rin;RF

� �2

:A2v;RF

RS

Rout;RFð2Þ

where Rs is the source impedance, Rin,RF, Rout,RF, and Av,RF

are the input impedance, output impedance and voltage

gain of RF section, respectively.

To calculate IIP3, the following expression is used [8].

1

A2IIP3;total

� 1

A2IIP3;RF

þA2

v;RF

A2IIP3;IF

ð3Þ

As can be seen from 1–3, there are a so many possible

combinations of the section specification that meet the

requirements. A set of specifications is specified based on

our experience and the experimental results of the previous

Downmixer

LNALow-IF section

2.45 GHz

868/915 MHz

This work

LO

Fig. 1 Multi-band receiver architecture

Table 1 Summary of target

receiver specificationParameters Target specifications

868/915 MHz band 2.45 GHz band

Sensitivity [dBm] -100 -90

NF [dB] 11 15

Total gain [dB] 103 93

IIP3 [dBm]

@ high gain mode -35 -32

@ low gain mode -10 -10

IIP2 [dBm] 12.5 10.5

Gain control range [dB] 80 70

Filter requirement ?) 10 dB rejection @ 2 MHz offset

?) 40 dB rejection @ 4 MHz offset

?) 10 dB rejection @ 5 MHz offset

?) 40 dB rejection @ 10 MHz offset

70 Analog Integr Circ Sig Process (2011) 68:69–76

123

designs. Then during the design process, some of the

values are revised based on the design experimental results.

Therefore, authors believe that the given specifications

have reached a certain optimal point for low power

consumption receiver implementation.

The optimization of the receiver plan is shown in Fig. 2

where the requirements for each block in receiver chain are

described. In 868/915 MHz band, the LNA with 2 dB NF

and 28 dB maximum voltage gain are specified. Although

higher gain would relax the NF requirements of the fol-

lowing stages, high current would be required to achieve

the needed gain and linearity. 13 dB gain variable is also

assigned to make sure LNA and mixer are not saturated at

high RF input signal under low power consumption design.

In the 2.45 GHz band, the LNA with 2.5 dB NF and 24 dB

maximum voltage gain are specified considering lower

required NF compared to the 868/915 MHz band. For the

mixer, similar considerations are also taken into account. In

the 868/915 MHz band, 10 dB voltage conversion gain and

12 dB single-sideband (SSB) NF are specified while in the

2.45 GHz band they are 6 and 13 dB, respectively. The

final specifications of the individual sections are listed in

Table 2 assuming the IF section will be reused for both

bands.

3 Circuit design

3.1 Multi-band low noise amplifier

Illustrated in Fig. 3 is a simplified schematic of the pro-

posed multi-band low noise amplifier (MB-LNA) that uses

two-stage cascade configuration with a current reused

technique. The first stage uses a common-source topology

with loading resistor Rd and the second stage adopts a

cascode topology. The supply voltage of 1.8 V allows

stacking three transistors since the threshold voltage, Vth, of

RF NMOS transistor in 0.18 lm CMOS technology is

about 0.5 V. Two stages are ac coupled by on-chip MIM

capacitor Cc. Transistors M1 and M2 are the LNA inputs

where M1 is for the 868/915 MHz band and M2 is for the

2.45 GHz band. When the LNA is working in

868/915 MHz band, the PD-B1 (power down of the first

band) and PD-B2 (power down of the second band) are

turned ON and OFF, simultaneously, and vice verse. The

advantage of this configuration is that the input matching of

each band can be optimized independently. This is an

important aspect since the LNA input matching network

quality factor is key factor in determining the gain, noise,

linearity, and sensitivity to component variations.

To achieve simultaneous noise and input matching at

low power level, an external capacitor (Cex1 or Cex2) is

added at each input. This capacitor together with the

degeneration inductor Ls will bring the noise optimum

point close to the input matching optimum point. Not only

that, it also gives more freedom to optimize the input

matching [9]. An off-chip inductor (Lg1 or Lg2) in series

with each input is added to make the input impedance to be

50 X. The detail design optimization process of the first

stage was explained in [9]. With the second stage

MixerRFin

LNAIFout

Gain [dB]

Off-Chip SAW

BPF VGA

-3 13/28 010868/915MHz

2.45 GHz

10/75

NF [dB]

Gain [dB]

NF [dB]

2.0 12 15 103

17/24

13

6 0 8/73

15 102.5

-3

3

On-Chip ReceiverThis work

Fig. 2 Receiver planning

Table 2 Summary of RF and IF sections specifications

Parameters 868/915 MHz band 2.45 GHz Band

RF

section

IF

section

RF

section

IF

section

Max. voltage gain [dB] 38 75 30 73

Min. voltage gain [dB] 23 10 25 8

NF [dB] 7 20 11 20

IIP3 [dBm]

@ high gain mode -15 -30 -15 -30

@ low gain mode -8 10 -8 10

IIP2 [dBm] [20 [20 [20 [20

Gain control

range [dB]

15 65 5 65

868/915 MHz bands

M1

Cex1

VDD

Lg1

M5

Co

Vctrl

RFoutBias

Circuits

Ls

M2

Cex2

Lg2

2.45G band

To M2PD-B1

PD-B2

L1

L2

M4

M3

Rd

CcCbypass

To M3

X

Fig. 3 Schematic of a multi-band LNA

Analog Integr Circ Sig Process (2011) 68:69–76 71

123

optimization, the size of transistor M3 is equal to that of

transistor M1 in a typical single-band LNA design. How-

ever, in this work, two parallel input transistor increases the

capacitance at node X, the size of M3 should be different.

With the presence of M2 the capacitance at node X is

bigger than the case without M2 leading to lower imped-

ance at node X. Therefore the voltage gain of the first stage

is reduced. As a result the NF of given LNA is increase due

to the noise contribution of second stage. Especially at the

high working frequency the noise contribution will be

increased significantly. The simulated a minimum noise

figure, NFmin, of the given LNA as a function M3 is shown

in Fig. 4. In this simulation process, the DC bias of circuit

is fixed. As can be seen in Fig. 4, NFmin changes signifi-

cantly if size of M3 (labeled as W3) less than 70 lm, but

changes little with W3 greater than 70 lm. With small W3,

its output resistance is much larger than that of M1. Thus

the bias voltage of M3 will be much higher than the bias

voltage of M1 (or M2) making M1 (or M2) cannot work on

saturation region. If W3 is greater than 70 lm, both M1 (or

M2) and M3 will work in saturation region. However, if the

W3 is larger, the capacitance at node X increase leading to

degradation of NF, especially with the 2.45 GHz band as

mentioned above. A simulated result in Fig. 4 shows that

when the size M3 equal to 70 lm, which is about 60% of

input transistor M1 (or M2), the NF in both bands will be

optimized.

A switched resonator formed by inductors L1, L2 and

transistor M5 is utilized for band selection and gain control

of the LNA [5]. By controlling Vctrl from low to high

voltage level, the equivalent inductance (Leq) will be

changed from L1 ? L2 to L2. Consequently, a switched

resonator will work at low and high bands. The values of

L1, L2 and M5 are chosen by considering the LNA gain

requirement. In this work, the design targets for LNA

voltage gain in the 868/915 MHz and the 2.45 GHz bands

are 28 and 24 dB, respectively. In both bands, the total

current dissipation is fixed at 1 mA. The inductor L2 is

determined by tuning the circuit to 2.45 GHz band. The

size of M5 will be chosen so that the gain is at least 12 dB

when turned ON. The inductor L1 is added to tune the

circuit at the 868/915 MHz band with M5 turned OFF. The

gain control function is set as the same with the band

selection. In other words, when M5 is ON, the switched

resonator will resonate at the 2.45 GHz band and the gain

at the first band is decreased. When M5 is OFF, the LNA

output is tuned to the 868/915 MHz band and the gain at

the second band is decreased.

3.2 Downconversion mixer

The double-balanced Gilbert-type mixer topology is pre-

ferred since it suppresses the local oscillator (LO) signal.

This mixer is basically composed of the input transcon-

ductor stage, the switching stage operating in switching

mode by differential LO signals to perform frequency

conversion, and the mixer load. In the mixer design, the

high gain, low noise, high linearity, and low power con-

sumption are required, but it is not easy to achieve those

performances simultaneously. High gain and better line-

arity can be achieved by increasing the bias current through

the transconductance stage, but the power consumption

will be excessive. The larger current thought the switching

stage can cause voltage headroom problems. Larger

amount of current through the switching stage also need a

large LO drive, which is desired for more ideal switching.

Consequently, the higher power consumption is needed in a

LO signal generator leading to higher power consumption

in a transceiver implementation.

A proposed I/Q downconversion mixer consisting of two

identical double-balanced Gilbert-type without a tail cur-

rent and with a bleeding current shown in Fig. 5 can be

considered as a solution to solve the trade-off of mixer’s

performances. The tail current is removed in order to

improve the linearity due to the limited voltage headroom.

It is obvious that without the tail current, the voltage

headroom will be improved by the Vdsat of a MOS tran-

sistor if a simple current source is used. In Fig. 5, tran-

sistors M1 and M2 form a differential pair with the gate of

M2 is AC grounded by on-chip capacitor (Cbypass). Con-

sequently, this downconversion mixer can work with a

single-ended input signal while provide a fully LO sup-

pression at the output as the conventional double-balanced

mixer does. This configuration helps to reduce a total

power consumption of receiver chain since a single-ended

LNA dissipates only half of current of a differential LNA.

The implemented down -conversion mixer can operates at

two frequency bands without changing any device param-

eters. The voltage conversion gain at the 2.45 GHz band isFig. 4 Simulated NFmin of LNA shown in Fig 3 as a function of

transistor M3

72 Analog Integr Circ Sig Process (2011) 68:69–76

123

somewhat lower than that at the 868/915 MHz band due to

lower transconductance. However, this discrepancy can be

acceptable by considering the target mixer gain at the

2.45 GHz band is 4 dB lower than that at the 868/915 MHz

band.

A bleeding current Ib is introduced to improve conver-

sion gain and NF [10]. With the current bleeding technique,

the bias current through the transconductance stage can be

increased without increasing the current through the

switching transistors. While not affecting the transcon-

ductance of the transconductor stage, the bleeding current

relaxes the voltage headroom problem, and allows smaller

LO drive voltage applied to the switching stage because of

improved switching efficiency, which helps to improve the

conversion gain. The bleeding-ratio, defined as the ratio of

the current through the bleeding branch to the current

through the input transistor M1, should be carefully chosen

in order to get the best performance trade-off [11]. Figure 6

shows the simulated results of mixer conversion gain, NF,

and input 1-dB compression point, P-1 dB, as a function of

the bleeding ratio. As can be seen from Fig. 6, the con-

version gain and NF improve as the bleeding ratio

increases. The input P1dB of mixer has a peak value at a

certain amount of bleeding ratio.

Briefly, the conversion gain and NF of the mixer are

improved with the increment of current bleeding current

can be explained as the enhancements of transconductance

and switching efficiency of the transconductor stage and

switching stage, respectively. The input P-1 dB of mixer is

increased with more bleeding current since the required

drain-source voltage to maintain the saturation operation of

transconductor stage is diminished. However, the input

P1 dB decreases by a current limit as the bleeding current

exceeds certain amount. In this region, the impedance seen

from the source terminal of the switching grows larger

because the transconductance of these MOS transistor is

proportional to the square root of the bias current. This

increased impedance permits larger voltage swing at the

source terminal of the switching transistors; therefore, it

degrades the linearity of the mixer. The detail explanations

of above characteristics are presented in [11]. Based on the

simulated results in Fig. 6, a bleeding-ratio of 40% is

chosen in this design considering the trade-off between

conversion gain and linearity in this design.

4 Experimental results

The multi-band RF receiver was fabricated based on

TSMC 0.18 lm CMOS technology with a die-size of

1.5 9 0.8 mm2 including ESD pads. The testing board was

built by directly bonding the die on a four-layer FR4

substrate which is shown in Fig. 7. A differential to single-

ended conversion process at the LO ports and output IF

ports were done by using a commercial passive balun. The

losses of the baluns are de-embedded from measurement.

Illustrated in Fig. 8 are measured results of input return

loss (S11) of the implemented multi-band RF receiver

LO-I-

LO-I+ LO-I+

IF-I+ IF-I-

Vbias

RFin

M1 M2

M3 M4 M5 M6

M7 M8

R1 R1

Cc

Cbypass

C1

VDD

Q MixerIbIb

Fig. 5 Schematic of a down-conversion mixer

Fig. 6 Simulated gain, NF, and input P-1 dB of mixer shown in Fig 5

as a function of bleeding current at 868/915 MHz band (a) and

2.45 GHz band (b)

Analog Integr Circ Sig Process (2011) 68:69–76 73

123

front-end at 868/915 MHz band and 2.45 GHz band. The

obtained results show better than -14 dB at both working

bands. Figure 9 shows the measured voltage conversion

gain of the implemented RF receiver sweeping the LO

frequency across the target bands. As can be seen from

Fig. 9, the implemented shows the maximum voltage

conversion gain of 38 dB and 30 dB at the 868/915 MHz

band and the 2.45 GHz band, respectively. The NF mea-

surement process is done based on a ‘‘gain method’’

described in [12] since all the commercial Noise Figure

Analyzer equipments have a minimum frequency of

10 MHz. The obtained NF results, shown in Fig. 10, are

6.0 dB and 9.1 dB at the 868/915 MHz and the 2.45 GHz

bands, respectively. In Fig. 10, the behavior of the mea-

sured NF is in good agreement with the simulated result at

the wanted 2 MHz IF frequency. As mentioned in Table 2

in previous section, therefore, the implemented RF receiver

can satisfy the required specifications for multi-band IEEE

802.15.4 standard. The linearity such as 1-dB compression

point, IIP3 of the implemented RF receiver and other rel-

evant parameters are listed in Table 3.

5 Conclusion

Low power multi-band receiver implementations present

significant challenges to CMOS realization. In this work, a

low-power multi-band RF receiver for IEEE 802.15.4

standard-based ubiquitous sensor network applications is

designed and fabricated in 0.18 lm CMOS technology.

The implemented multi-band RF receiver having

1.5 9 0.8 mm2 die size consumes 3.0 mA under a supply

voltage of 1.8 V at all bands. A 2 MHz low-IF architecture

with two separate LNA inputs is chosen in order to mini-

mize the spurs from one band to others. The 1st input

covers the 868 and the 915 MHz bands and the 2nd input is

for the 2.45 GHz bands. The single-ended input double-

balance down-conversion mixer is applied such that the

Fig. 7 RF receiver test board

Fig. 8 Measured input return loss of the multi-band RF receiver:

868/915 MHz band (a), and 2.45 GHz band (b)

Fig. 9 Measured voltage conversion gain of the multi-band RF

receiver

74 Analog Integr Circ Sig Process (2011) 68:69–76

123

different LNA or single-ended to differential circuitry is

avoided. The implemented RF receiver front-end shows a

maximum conversion gain of 38 dB and 30 dB, and NF of

6.2 and 9.2 dB at the 868/915 MHz and the 2.45 GHz

bands, respectively.

Acknowledgments This work was supported by the IT R&D pro-

gram of MKE/KEIT [10035380, Development of Low Power Con-

sumption Sensor Network].

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Trung-Kien Nguyen was born

in Hanoi, Vietnam, in 1977. He

received the B.S. degree in ra-

diophysics in 1999 from Hanoi

National University, Hanoi,

Vietnam, M.S. and Ph.D. degrees

in electronics engineering from

Information and Communica-

tions University, Daejeon, Korea,

in 2004 and 2007, respectively.

From 1999 to Feb. 2001 he was

with Laboratory of Research and

Development of Sensor, Institute

of material Science (IMS), Viet-

namese Academy of Science and

Technology (VAST). Currently, he is with RFID/USN Research

Department, Electronics and Telecommunications Research Institute

(ETRI), Daejeon, Korea. His main research interests include analog and

RFIC design, and system-level integration and RF modeling of

transceivers.

Hoyong Kang received the B.E.

degree in electronics engineering

from Pusan National University,

Pusan, Korea, in 1989, and M.S.

degree in information and com-

munications from Chungnam

National University, Daejeon,

Korea, in 2003. From 1989 to

2000, he was engaged in the

research and development of

consumer SoC design at Daewoo

ASIC Center. In 2000, He joined

the Electronics and Telecom-

munication Research Institute,

Daejeon, Korea, where he has

been involved in wireless sensor networks and broadband communi-

cation systems including the high-speed broadband access systems. His

Fig. 10 Measured NF of the multi-band RF receiver

Table 3 Summary of RF receiver performances

868/915 MHz

Band

2.450 GHz

Band

Simulated

measured

Simulated

measured

Maximum gain [dB] 40 38 32 30

Minimum gain [dB] 24 23 24 23

NF at 2 MHz [dB] 6.0 6.2 9.0 9.2

P-1 dB at high gain [dBm] -25 -25 -20 -20

P-1 dB at low gain [dBm] -10 -5 -10 -5

IIP3 at high gain [dBm] -16 -15 -16 -15

Input return loss [dB] -20 -14 -15 -11

Supply voltage [V] 1.8 1.8

Current dissipation [mA] 3.0 3.0

Analog Integr Circ Sig Process (2011) 68:69–76 75

123

research interests include Ethernet MAC/PHY SoC design, 1.25-Gb/s

burst-mode optical transceivers, and low power WSN MAC/PHY SoC

design for USN and IT convergence applications.

Se-Han Kim received the B.S.

and M.S. degrees in computer

science and computer engineer-

ing from Korea Aviation Uni-

versity, in 1998 and 2000,

respectively. Currently, he is

Ph.D. Candidate in information

and communications from

Chungnam National University,

Daejeon, Korea. In 2000, He

was researcher engineer with

Samsung advanced institute of

technology as a network engi-

neer for one year. Since 2000,

he has been senior member of

engineering staff with the Electronics and Telecommunication

Research institute, Daejeon, Korea, where he has been involved in

ubiquitous sensor network, WiFi, and 3G mobile projects. His

research interests include low power MAC/PHY and various appli-

cation systems for USN and IT Convergence System.

Cheol-Sig Pyo was born in

Jeonbook, Korea in 1963. He

received the B.S. degree in

electronics engineering from

Yonsei University, Seoul,

Korea, in 1991, and the M.S.

degree in electrical engineering

from the Korea Advanced

Institute of Science and Tech-

nology (KAIST), Daejeon,

Korea, in 1999. Currently, he is

a Principal Researcher with

Electronics and Telecommuni-

cations Research Institute

(ETRI), Daejeon, Korea, where

he is a managing director of RFID/USN Research Department. Since

1991, he has worked on satellite communication systems, antenna,

RFID, and wireless sensor networks in ETRI. His research interests

include RFID, USN and IT convergence technology.

76 Analog Integr Circ Sig Process (2011) 68:69–76

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