Lab 5 – Getting started with analog-digital conversion

Achievements in this experiment

Practical knowledge of coding of an analog signal into a train of digital codewords in binary format using pulse code modulation (PCM), i.e., analog to digital conversion. Understanding of the decoding process, quantization issues and reconstruction of the output signal. Appreciation of the need for both bit clock and frame synchronisation .

Preliminary discussion

This lab introduces the basics of digital-analog signal conversion with the PCM ENCODER and PCM DECODER modules. The formatting of a PCM signal, will be examined in the time domain. Part 1 deals with encoding. The recovery of the analog signal is covered in Part 2.

How did the idea of PCM Encoding come about ?

Imagine you wanted to send an analog signal such as voice across a noisy channel. Naturally the received signal would be subject to a degree of additive noise, as well as other forms of signal distortion due to bandwidth limitations. It may become unrecognisable and hence useless.

By converting that analog signal into packets of digital data, we are able to benefit from the high level of noise immunity inherent in digital signals. Although digital data transmission has its own issues, mainly, bandwidth limitations, we can be certain of the ability to reconstruct the message if the digital error rate is kept within limits.

It should take you about 45 minutes to complete this experiment, not including the preparation to be done before the hands-on lab work.

Pre-requisite work

PCM ENCODER basics

The PCM ENCODER module converts an analog input into a stream of digital codewords. As investigated in Lab 12, the maximum allowable input bandwidth will depend on the sampling rate.

The amplitude range must be matched to the input range of the encoder. If excessive, overloading will occur. If too small, noise and interference will degrade signal quality. The appropriate range is within the ± 2.5 volts range. This is specified in the SIGEx User Manual.

A step-by-step description of the operation of the module follows:

i. the module is driven by an external TTL clock.

ii. the input analog signal is sampled periodically. The sample rate is determined by the external clock.

iii. the sampling process is carried out as a sample-and-hold operation, within the module. The held output ( i.e., the amplitude of the analog signal at the sampling instant) is not available on the front panel of the module 1.

iv. the PCM encoding is carried out by comparing each sample amplitude with a finite set of amplitude levels. These are distributed (uniformly, for linear sampling) within the range ± 2.5 volts. These are the system quantizing levels.

v. each quantizing level is assigned a number, starting from zero for the lowest (most negative) level, with the highest number being (L-1), where L is the available number of levels.

vi. each sample is assigned a digital (binary) code word representing the number associated with the quantizing level which is closest to the sample amplitude. The number of bits ‘n’ in the digital code word will depend upon the number of quantizing levels.

Question 1 Show that n = log2(L):

vii. the code word is assembled into a time frame together with any other bits as may be required (described below). In the PCM ENCODER (and many commercial systems) a single extra bit is added, in the least significant bit position. This is alternately a one or a zero. These bits are used for frame synchronization in the decoder.

viii. the frames are transmitted serially. They are transmitted at the same rate as the samples are taken. The serial bit stream is accessible on the front panel of the module.

1 Sampling with a sample and hold operation is introduced in Lab12 where you are able to display the "held" output.The PCM ENCODER effectively has a “sample and hold” unit within its front end.

 

 

ix. also available from the module is a synchronizing signal FS (‘frame synch’). This signals the end of each data frame.

Before proceeding with the experiment tasks, we briefly review the essential features of the ENCODER module.

Figure 1:Layout of the PCM ENCODER

The SIGEx board layout of the module is shown in Figure 1. Technical details are described in the SIGEx User Manual.

Familiarize yourself with the purpose of each of the input and output connections, and the three-position toggle switch. Counting from the top, these are:

• FS: frame synchronization, a signal which indicates the end of each data frame.

• Vin:: the analog signal to be encoded.

• PCM DATA: the output data stream, the examination of which forms the major part of this experiment.

• CLK: this is a TTL (red) input, and serves as the MASTER CLOCK for the module. Clock rate must be 20 kHz or less. For this experiment you will use a 10kHz TTL signal from the PULSE GENERATOR module.

PCM time frame

Each binary word is located in a time frame. The time frame contains eight slots, with one clock period per slot. These slots hold the bits of a binary word, numbered 7 through 0, from first to last. The least significant bit (LSB) is contained in slot 0.

 

 

Equipment

• PC with LabVIEW Runtime Engine software appropriate for the version being used.

• NI ELVIS 2 or 2+ and USB cable to suit

• EMONA SIGEx Signal & Systems add-on board

• Assorted patch leads

• Two BNC – 2mm leads

Procedure Part A – Setting up the NI ELVIS/SIGEx bundle

1. Turn off the NI ELVIS unit and its Prototyping Board switch.

2. Plug the SIGEx board into the NI ELVIS unit.

Note: This may already have been done for you.

3. Connect the NI ELVIS to the PC using the USB cable.

4. Turn on the PC (if not on already) and wait for it to fully boot up (so that it’s ready to connect to external USB devices).

5. Turn on the NI ELVIS unit but not the Prototyping Board switch yet. You should observe the USB light turn on (top right corner of ELVIS unit).The PC may make a sound to indicate that the ELVIS unit has been detected if the speakers are activated.

6. Turn on the NI ELVIS Prototyping Board switch to power the SIGEx board. Check that all three power LEDs are on. If not call the instructor for assistance.

7. Launch the SIGEx Main VI.

8. When you’re asked to select a device number, enter the number that corresponds with the NI ELVIS that you’re using.

9. You’re now ready to work with the NI ELVIS/SIGEx bundle.

10. Select the EXPT 13 tab on the SIGEx SFP.

Note: To stop the SIGEx VI when you’ve finished the experiment, it’s preferable to use the STOP button on the SIGEx SFP itself rather than the LabVIEW window STOP button at the top of the window. This will allow the program to conduct an orderly shutdown and close the various DAQmx channels it has opened.

The experiment

We are now ready to proceed. Note that the PCM ENCODER is the only module used in Part 1.

It is not necessary to become involved with how the PCM ENCODER module achieves its purpose. What will be discovered is what it does under various conditions of operation.

PCM encoding and quantisation Examination with DC input We begin with some basic aspects of the analog to digital conversion process. For this purpose we will use a constant (DC) analog input. This ensures completely stable oscilloscope displays, and enables easy identification of the quantizing levels.

11. Patch the PCM ENCODER as shown in Figure 2.

Figure 2:patching diagram for PCM ENCODER

Settings are as follows: PULSE GENERATOR: 10,000 Hz with DUTY CYCLE=0.5 (50%) SCOPE: Timebase 2ms; Rising edge trigger on CH0; Trigger level=1V

Zero input to PCM ENCODER

12. connect the PCM INPUT terminal to a GND terminal on the SIGEX board.

13. display FS on CH0. Adjust the timebase to show three frame markers. These mark the

end of each frame, that is, the last bit of the frame.

14. display the CLK signal on CH1.

Question 2 Record the number of clock periods per frame.

 

 

Question 3 Currently the analog input signal is zero volts (since INPUT is grounded). Before checking with the scope, consider what the PCM encoded output might look like. Can you assume that it will be 00000000?. What else might it be, bearing in mind that this PCM ENCODER outputs offset binary format.

Question 4 On CH1 display the signal at PCM DATA output.The display should be similar to that in Figure 3 (possibly with fewer frames). Is it in agreement with your expectations?

The same codeword appears in each frame because the analog input is constant. This codeword represents the 8-bit binary output number, corresponding to the zero volt analog input.

Figure 3: PCM Encoder input and output signals

Confirm the following three points:

1. the number of slots per frame is 8

2. the location of the least significant bit is coincident with the end of the frame

3. the binary word length is 8 bits

Variable DC input to PCM ENCODER

15. remove the ground connection, and connect the INPUT to output of the ANALOG OUTPUT: DAC 1. This programmable output is set to be a VARIABLE DC voltage, which is controlled from the control on the Lab13 TAB on the SIGEX SFP. Sweep the DC voltage slowly

 

 

backwards and forwards over its complete range, and note how the data pattern within each frame changes in discrete jumps.

Question 5 Adjust VARIABLE DC to its maximum negative value. Record the DC voltage and the pattern of the 8-bit binary number.

Question 6 Slowly increase the amplitude of the DC input signal until there is a sudden change to the PCM output signal format. Record the format of the new digital word, and the input DC voltage at which the change occurred. Use the INCREMENT arrows on the digital value entry box for a steady stable increase in DC value.

16. continue this process over the full range of the DC supply. Note a selection of DC voltages and corresponding binary output words in the table below.

Table 1: DC VOLTAGE input vs. PCM codewords

DC VOLTAGE (V) 8 bit PCM codeword

17. draw a diagram showing the quantizing levels and their associated binary numbers in the graph below.

Graph 1:DC to binary word plot

Review of the 8-bit data format

Question 7 On the basis of your observations so far, provide answers to the following:

* what is the sampling rate ? * what is the frame width ? * what is the width of a data bit ? * what is the width of a data word ? * how many quantizing levels are there ? * are the quantizing levels uniformly (linearly) spaced ? * what is the the minimum quantized level spacing ? How does this compare to theory ?

Question 8 The relationship between the sampled input voltage and the output codeword has been described above. Suggest some variations of this relationship that could be useful ?

Working with periodic signals

In this section we consider the challenge of generating a stable display of the encoded output with a conventional scope when a periodic input signal is used. Carry out the three tasks below to see the problem.

This difficulty does not arise if you have access to an instrument with signal capture capability, such as a digital scope. You can use the RUN/STOP button on the SFP to hold a single screen display of the data when necessary.

In Part 2 this issue is further examined when we display the reconstructed signal at the decoder output.

18. Take a periodic signal from the ANALOG OUTPUT: DAC0 terminal.

Question 9 Adjust the scope to display this waveform. Record its shape and frequency. Check whether this conforms with the Nyquist criterion. Show your reasoning.

19. Display the PCM DATA output on CH1. Again, synchronize the scope to the frame signal FS. Display two or three frames on CH1. Notice how they differ as expected.

20. Move the scope lead from the FS and view the INPUT signal on CH0. You are now viewing the input sinusoid as well as the output codeword as in Figure 4. Freeze the display occasionally (using RUN/STOP) and look at the relationship between input and output. See if you can see the pattern.

Figure 4: input and output from PCM ENCODER

PCM decoding and reconstruction

In this part we proceed with the decoding2 of the output of the PCM ENCODER to reconstitute the analog input. Before proceeding with the experiment tasks, we briefly review the OPERATION of the DECODER.

PCM DECODER

The operation of the PCM DECODER module is as follows:

• a frame synchronization signal FS is received from the transmitter.

• the binary number representing the coded (and quantized) amplitude of the sample from which it was derived, is extracted from the frame.

• the quantization level represented by the input codeword is determined.

• a voltage proportional to this amplitude level is generated.

• this voltage appears at the output terminal OUTPUT for the duration of the respective frame.

• signal reconstruction is completed by lowpass filtering, as seen in Lab 12. A built-in reconstruction filter is not provided in the module so that you can see the quantization steps in the output. The recovered signal will not be identical to the original due to quantizing. Other imperfections may be due to aliasing distortion, as already considered in Lab 12.

The DECODER is driven by an external clock which must be synchronized to that of the ENCODER. It is possible to “embed” the frame sync signal into the data, but this feature is outside the scope of this lab and is not included in the functionality of the SIGEx board3. An alternative to automatic frame synchronization is to steal the synchronization signal, FS, from the PCM ENCODER module. Use of this signal would assume that the clock signal to the

2 it is common practice to refer to demodulation from analog signals, and decoding from digital signals. 3 This feature is available on the EMONA DATEx Telecommunications Trainer board for NI ELVIS

PCM DECODER is of the correct phase. This is assured in this experiment, but would need adjustment if the PCM signal is transmitted via a bandlimited channel. Hence the use of embedded frame synchronization information in some systems.

The front panel of the DECODER module is shown in Figure 3. Technical details are described in the SIGEx User Manual.

Figure 5: Layout of the PCM DECODER

The following is a summary of the input and output connections :

• FS: connect an external frame sync. signal here

• PCM DATA: the PCM signal to be decoded is connected here.

• OUTPUT: the decoded signal.

• CLK: this is a TTL (red) input, and serves as the CLOCK for the module. Clock rate must be 20 kHz or less. For this experiment you will use the same clock as used for the PCM ENCODER.

Figure 6: PCM Encoding and decoding patching diagram: input from DAC 0. TLPF serves as recontruction filter

 

 

 

 

 

 

 

 

 

 

Decoder Experiments

21. The PCM ENCODER provides the digital input for the DECODER. Patch together as shown in Figure 7. Settings are as follows: PULSE GENERATOR: 10,000 Hz with DUTY CYCLE=0.5 (50%) SCOPE: Timebase 20ms; Rising edge trigger on CH0; Trigger level=1V TUNEABLE LPF: Fc set to max, GAIN set to max.

22. Connect CH1 of the SCOPE SELECTOR to the OUTPUT of the PCM DECODER, and CH0 to the INPUT signal at the ENCODER. Trigger the SCOPE on the INPUT signal. Your display should resemble Fig. 7.

Figure 7: input and output signals

The recovered analog signal & reconstruction

In this section we use a periodic signal to observe the quantized appearance of the decoder sample-hold output.The internal DAC output implements a “zero-order hold” operation, in that it holds the value for a complete clock period. This has an inherent filtering effect, prior to any reconstruction filtering.

The OUTPUT signal is distinctly different from the input signal. The output is only updated once every frame, hence there is a large step change between output samples. This difference is known as “sampling distortion”.

As well the “granularity” of the output only having 256 possible levels will contribute some error, known as “quantizing distortion”, however, it is not easily observable with this input signal. In the previous section you will have calculated the step size due to quantization by the encoder.

You can see, qualitatively, that the stepped output signal bears a resemblance to the input. We saw in Lab 12 that the use of a lowpass filter made it possible to smooth out the steps. The need for pulseshape equalization in the form of so called “x/sinx” correction was also mentioned there.

Question 10 Momentarily, vary the clock rate from 10,000 to 20,000 Hz. How does this affect the “sampling distortion” viewable in the output signal ?

An interpolation LPF is provided in the TUNEABLE LPF block.

23. Adjust the TUNEABLE LPF in the output path of the PCM DECODER to vary the filters corner frequency, and observe the reconstructed signal. Adjust the TUNEABLE LPF GAIN control to set the output signal to the same amplitude as the input. This makes the overall conversion gain equal to unity. The PCM DECODER does not have the same conversion gain as the ENCODER.

Question 11 View the input to the TUNEABLE LPF, ie the output of the PCM DECODER and compare with the INPUT sinusoid. What is the gain of the PCM DECODER itself.

Again viewing the output from the TUNEABLE LPF, which is acting as the reconstruction filter, slowly reduce the Fc until the steps are eliminated, and the original signal is recovered.

Question 12 Can you explain the source of the delay between input and output signals ? Both with and without the TUNEABLE LPF ?

Question 13 Momentarily, vary the clock rate from 10,000 to 20,000 Hz. How does this affect the required Fc needed to recover the signal without distortion ?

Tutorial Questions

Q1 from your knowledge of the PCM ENCODER module, obtained during preparation for the experiment, calculate the sampling rate of the analog input signal. What can you say about the bandwidth of an input analog signal to be encoded ?

Q2 define what is meant by the data ‘frame’ in this experiment. Draw a diagram showing the composition of a frame for the 8-bit coding scheme

Q2 quantizing distortion decreases as the number of quantizing levels is increased. Explain why an excessive increase of the number of quantizing levels may incur a bandwidth penalty: describe how to manage this trade-off. Look up Shannon's formula and show how it relates to this trade-off. Explain whether this issue could be observed in this lab ?

Q3 explain why a DC input provides a stable display of the PCM DATA output on a conventional scope. Why is the display ‘unstable’ when the input is a sine wave (for example) ?

Q4 look up “two’s complement” encoding and find out a field of application where it is used. What is the advantage of “offset binary” encoding used in this lab? Devise or look up a method to convert from offset binary to two’s complement.

Q5 carry out a brief internet search of the principles and applications of companding. Compile a summary of its advantages. Compare this with published information about the ‘A’ and ‘µ’ companding laws used respectively in Europe and the USA.

Q6 two sources of distortion in the reconstructed message have been identified; they were called sampling distortion and quantizing distortion.

a) assuming a sample-and-hold type sampler, what can be done about minimizing sampling distortion ?

b) what can be done about minimizing quantizing distortion ?

Why is “x/sinx” correction required with sample-hold interpolation? (Refer to Lab 12)

Q7 describe how to determine the specification for the reconstruction filter used in the decoder ?