AD-RI69 242 REFRACTORY METLS AND SILICIDES FOR VERY LARG SCALE 1/1INTEGRATION APPLICATIONS(U) STANFORD UINIV CA CENTER FORINTEGRATED SYSTEMS K C SARASNRT NOV 95

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,. ' Krishna C. Saraswat

Center for Integrated Systems, Stanford University, CA 94305

Continuous advancements in technology have resulted in integrated circuitswith smaller device dimensions, and larger area and complexity. The overallcircuit performance has depended primaly on the device properties. However, -the parasitic resistance and capacitance associated with interconnections andcontacts, as shown in Fig. If'a for an MOS transistor, are now beginning toinfluence the circuit performance and will be the primary factors in the evolutionof submicron VLSI technology. Fig. 1(b) - 1(d) show examples of contactresistance, shallow junctiqn series resistance and RC time delay ofinterconnections, respective*, Results of theoretical modeling indicate that

below 1 i.rn minimum feature size the impact of these parasitics will seriouslyN hurt the circuit and system performance [1]. The RC time delay, the IR voltage

drop, the power consumption and the crosstalk noise due to these parasitics willN become appreciable. Thus even with very fast devices the overall performance

of a large circuit could be seriously affected by the limitations of interconnectionsand contacts.

During the last few years a good amount of work has been done on newand innovative materials, device structures and fabrication technology toovercome these .problems. Fig 2 shows the past, present and the future status ofthe technology. "t is evident that refractory metals and siuicides are playing

" I increasingly important roles. It must also be pointed out that these materials willnot replace aluminum but compliment it.

* In order for a certain conductor to be used to form multilayerinterconnections, several requirements which are imposed by fabricationtechnology and required circuit performance must be met.

The main requirement is good conductivity, because it can substantiallyimprove the resistance and delay times of the electrical interconnection linesused for VLSI structures. In general, several other requirements are imposed oninterconnection materials by fabrication technology. In a multilayerinterconnection structure, the layers incorporated early in the process sequencemight be subjected to several fabrication steps, that layers incorporated latermight not be subjected to. The most rigorous set of requirements are, lowresistivity, ease of deposition of thin films of the material, ability to withstand thechemicals and high temperatures required in the fabrication process, goodadhesion to other layers, ability to be thermally oxidized, stability of electrical,- contacts to other layers, ability to contact shallow junctions, good MOSproperties, resistance to electromigration and ability to be defined into finepatterns.

The materials which have been used or proposed for forminginterconnections can be broadly c!Issified into four categories: heavily dopedpolysilicon, low temperature metals, high temperature refractory metals andmetal silicides. Table [1] compares properties of some of these materials

* ., showing their compatibility with present silicon fabrication technology.,

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For a long time, aluminum has been used to form the metal interconnects,however as device dimensions are scaled down, its reliability is becoming a -major issue. Some of the problems are, electromigration, high solubility of siliconleading to poor contact reliability to shallow junctions, hillock formation causingelectrical shorts between successive layers fo Al, and corrosion. Many of theseproblems have been solved by using alloys of aluminum with Si, Cu and recentlyi [2].

With the advent of silicon-gate MOS technology, polycrystalline silicon hasbeen extensively used to form gate electrodes and interconnections. Thesuccess of the silicon-gate MOS technology can be largely attributed to the useof polycrystalline silicon as an additional layer of interconnections. In manjapplications two or even three layers of polycrystalline silicon have been usedFrom numbers shown in Table [1 ]and Fig. 1(d) it is evident that the resistivity ofpolycrystalline silicon is too high and is beginning to limit the performance oflarge circuits with small dimensions. In all other respects, it is a very nicematerial to work with because basically it is silicon and therefore highlycompatible with silicon technology.

During the last few years, use of refractory metal silicides have been heavilyinvestigated for this application and for silicidation of diffusions and the resultshave been very exciting. From Table [11 it can be seen that silicides of tungsten(W), molybdenum (Mo) and tantalum (Ta) have reasonably good compatibilitywith IC fabrication technology. They have fairly high conductivity, they canwithstand all the chemicals normally encountered during the fabrication process,thermal oxidation of their silicides can be done in oxygen and steam to produce apassivating layer of SiO 2 , their contacts to shallow p-n junctions are reliable, andfine lines can be etched by plasma etching these materials. The formation of thinfilms of silicides is not as straightforward as that of aluminum and polycrystallinesilicon, but it can be done by a variety of deposition techniques. Theseproperties suggest that the silicides of W, Mo and Ta can be used in all of theapplications where polycrystalline silicon has been used so far. While TiSi 2 isvery attractive for this application, its etch rate in hydrofluoric acid (HF) is veryfast. If the use of HF can be avoided during the fabrication by employing dryetching techniques, TiSi2 can also be used successfully.

Several problems remain to be solved before silicides can be used on aroutine basis in production. Deposition techniques will have to be much morecontrollable and reproducible than those being used today. CVD technologyoffers the most promising results [3]. Silicide films as deposited by currentdeposition techniques have very low conductivity, and additional hightemperature annealing is required to increase it. These temperatures might betoo high for the VLSI technology of the the future, since these deposited films canhave tensile or compressive stress in them the type and magnitude of whichchange as a function of processing temperature. The magnitude of this stresscan be enough in some cases to cause cracks and poor adhesion. This posesserious yield and reliability problems.

During the early seventies, several attempts were made to developrefractory metal (tungsten and molybdenum) gate technology. However, incomparison to silicon gate technology it had no apparent advantage. Theminimum feature size at that time was around 10 gm and the chip area wasrather small. Therefore the RC time delay was not a big issue, and the industry'sinterest in refractory metal gate technology gradually cooled off. As circuitcomplexity and size grew, and the inadequacies of polycrystalline silicon and Alstarted surfacing, interest in refractory metals was rejuvenated. During the last

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few years, W and Mo have been successfully used to form gate electrodes andinterconnections in several VLSI applications and it appears that this trend willgrow.

These materials have very attractive properties for multilayerinterconnection applications. Their resistivities are only slightly higher than thatof Al, their melting points are much higher than silicon, the thermal expansioncoefficients are closer to that of silicon (see Table 1) and they are highly resistantto electromigration. They are inert to many chemicals allowing the use ofpatterned films of these materials as etching masks for both SiO 2 and Si3N4.They are easy to etch using the plasma technology and thus fine lines can bedefined with relative ease. At tem eratures below the silicide formationtemperature (-600"C) the solubility of silicon is negligible and thus the stability ofcontacts is excellent.

Deposition of the thin films of Mo and W has been investigated by electronbeam evaporation, sputtering and recently by chemical vapor deposition. Thefilms deposited by CVD generally have such superior properties as lowcontamination, lower resistivity, better step coverage, lower stress and bettercompatibility with batch production techniques. Selective CVD of W appears tobe a very promising technology for many VLSI applications [4].

The major disadvantage of W and Mo is that their oxides are volatile at hightemperatures (- > 400*C). Therefore these metals can be used only when all ofthe steps where exposure to high temperature oxidizing ambient might occur areover, but high temperature steps in inert ambient are still remaining. Recentwork involving the use of H2 rich H20 to avoid oxidation of W yet oxidize Siappears to be very promising and may provide the necessary ingredients of thesubmicron MOS technology [5].

References

[1] K.C. Saraswat and F. Mohammadi, "Effect of Interconnection Scaling on Time Delay of VLSICircuits", IEEE Trans. Electron Dev., Vol. ED-29, April, 1982., pp. 645-650.

[2] D.S. Gardner, T.L. Michalka, K.C. Saraswat, T.W. Barbee Jr., J.P. McVittie and J.D. Meindl,"Layered and Homogeneous Films of Al and AI/Si with Ti and W for Multilayer Interconnects" IEEETrans. Electron Dev, Vol. ED-32, February, 1985, pp. 174-183.

[3] K.C. Saraswat, D.L. Brors, J.A. Fair, K.A. Monig and R. Beyers, "Properties of Low Pressure CVDTungsten Silicide for MOS VLSI Interconnections", IEEE Trans. Electron Dev., Vol. ED-30,November, 1983, pp. 1497-1505.

[4] K.C. Saraswat, S. Swirhun and J.P. McVittie, "Selective CVD of Tungsten for VLSITechnology", VLSI Science and Technology, Electrochemical Society, 1984, pp. 409-419.

15] S. Iwata, N. Yamamoto, N. Kobayashi, T. Terada and T. Mizutani, "A New Tungsten Gate Processfor VLSI Applications," IEEE Trans. Electron Dev., Vol ED-31, pp.1174-1179, September 1984.

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