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AMC Altera 5SGXEA FPGA – AMC532 The AMC532 is an FPGA based on the Altera Stratix-V 5SGXEA. The module is compliant to the AMC.1, AMC.2, AMC.3 and/or AMC.4 specification. It has an on-board, reconfigurable FPGA which interfaces directly to the AMC backplane and FMC connectors. The FPGA has interfaces to four banks of DDR3 memory (32-bit wide per bank). This allows for large buffer sizes to be stored during processing as well as for queuing the data to the host. The AMC532 includes a sophisticated Quad PLL and M-LVDS/LVDS crossbar switch for low-jitter/low-latency clock handling with maximum flexibility between the backplane, FMC, and FPGA. The PLL has an option for Stratum-3 holdover. The AMC532 has Serial Over LAN per the IPMI specification and a hardware RNG (Random Number Generator) for secure session to redirect the console serial port of an FPGA-based soft-core CPU. VadaTech can modify this product to meet special customer requirements. Contact us to discuss your application. Benefits of Choosing VadaTech • High-performance Altera 5SGXEA FPGA • All FMC DP lanes, LA/ HA/HB pairs, and clocks are routed from the FMC to the FPGA, providing great flexibility in FMC selection and capabilities • Four banks of DDR3 memory allows large buffer sizes and queuing during processing • Design utilizes proven VadaTech subcomponents and engineering techniques • Electrical, mechanical, software, and system-level expertise in house • Full ecosystem of front and rear boards, enclosures, specialty modules, and test/dev products from one source • AS9100 and ISO9001 certified company • AMC FPGA based on Altera Stratix-V (5SGXEA) in F1932 package • Single module, mid-size or full -size • VITA 57.1 FMC HPC Connector (compatible with LPC) • All FMC LA, HA, HB pairs routed bi-directionally • AMC Ports 0-15, 17-20 and FMC ports DP0-9 are routed for high speed SERDES protocols • High-speed SERDES protocols such as PCIe x4, SRIO, XAUI, 1000Base-X, and more are FPGA programmable • On board PLL for buffering/multiplying and jitter cleaner (Stratum-3) • M-LVDS/LVDS Clock crossbar switch for flexible clock routing • 4GB of DDR3 memory to FPGA (4 channels x 1GB each) • Serial Over L AN (SOL) with hardware RNG • IPMI 2.0 compliant KEY FEATURES AMC Altera 5SGXEA FPGA Carrier

AMC Altera 5SGXEA FPGA – AMC532

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Page 1: AMC Altera 5SGXEA FPGA – AMC532

VadaTech Incorporated • 198 N. Gibson Road, Henderson, NV 89014 • Tel: (702) 896-3337 • Fax (702) 896-0332 Email: [email protected] • www.vadatech.com

AMC Altera 5SGXEA FPGA – AMC532

The AMC532 is an FPGA based on the Altera Stratix-V 5SGXEA. The module is compliant to the AMC.1, AMC.2, AMC.3 and/or AMC.4 specification. It has an on-board, reconfigurable FPGA which interfaces directly to the AMC backplane and FMC connectors.

The FPGA has interfaces to four banks of DDR3 memory (32-bit wide per bank). This allows for large buffer sizes to be stored during processing as well as for queuing the data to the host.

The AMC532 includes a sophisticated Quad PLL and M-LVDS/LVDS crossbar switch for low-jitter/low-latency clock handling with maximum flexibility between the backplane, FMC, and FPGA. The PLL has an option for Stratum-3 holdover.

The AMC532 has Serial Over LAN per the IPMI specification and a hardware RNG (Random Number Generator) for secure session to redirect the console serial port of an FPGA-based soft-core CPU.

VadaTech can modify this product to meet special customer requirements. Contact us to discuss your application.

Benefits of Choosing VadaTech • High-performance Altera 5SGXEA FPGA • All FMC DP lanes, LA/HA/HB pairs, and clocks are routed from the FMC to the FPGA, providing great flexibility in FMC selection and capabilities

• Four banks of DDR3 memory allows large buffer sizes and queuing during processing

• Design utilizes proven VadaTech subcomponents and engineering techniques

• Electrical, mechanical, software, and system-level expertise in house

• Full ecosystem of front and rear boards, enclosures, specialty modules, and test/dev products from one source

• AS9100 and ISO9001 certified company

• AMC FPGA based on Altera Stratix-V (5SGXEA) in F1932 package • Single module, mid-size or full-size • VITA 57.1 FMC HPC Connector (compatible with LPC) • All FMC LA, HA, HB pairs routed bi-directionally • AMC Ports 0-15, 17-20 and FMC ports DP0-9 are routed for high

speed SERDES protocols • High-speed SERDES protocols such as PCIe x4, SRIO, XAUI,

1000Base-X, and more are FPGA programmable • On board PLL for buffering/multiplying and jitter cleaner (Stratum-3) • M-LVDS/LVDS Clock crossbar switch for flexible clock routing • 4GB of DDR3 memory to FPGA (4 channels x 1GB each) • Serial Over L AN (SOL) with hardware RNG • IPMI 2.0 compliant

KEY FEATURES

AM

C A

ltera

5SG

XEA

FPG

A C

arrie

r

Page 2: AMC Altera 5SGXEA FPGA – AMC532

AMC Altera 5SGXEA FPGA – AMC532

[email protected] www.vadatech.com

REFERENCE DESIGN

VadaTech provides a reference design implementation for our FPGAs complete with VHDL source code and configuration binaries. The reference design focuses on the I/O ring of the FPGA to demonstrate low-level operation of the interconnections between the FPGA and other circuits on the board and/or backplane. It is geared to prove out the hardware for engineering/factory diagnostics and customer acceptance of the hardware, but it does not strive to implement a particular end application.

INTEGRATION SERVICES AND APPLICATION-READY PLATFORMS VadaTech has a full ecosystem of ATCA and μTCA products including chassis platforms, shelf managers, AMC modules, Switch and Payload Boards, Rear Transition Modules (RTM), Power Modules, and more. The company also offers integration services as well as pre-configured Application-Ready Platforms. Please contact VadaTech Sales for more information.

BLOCK DIAGRAM

LED

AMC.1/.2/.4 (x 4)

FCLKTCLKBTCLKDTCLKATCLKC

Dual GbE

Local busPCIe (x4)

AlteraStratix-V GX

MezzanineExpansionConnector

FMC (VITA 57)

Hardware RandomNumber Generator

(RNG)IPMI Controller

QorIQP2040

Clock and JitterCleaner

Flash

DDR-III

Flash

Dual bank DDR-III 32-bit wideOR

Single bank DDR-III 64-bit wideMUX

AMC.1/.2/.4 (x 4)

Figure 1: AMC532 Functional Block Diagram

Doc No. 4FM737-12 Rev 01 Version 2.0 – JULY/14

Page 3: AMC Altera 5SGXEA FPGA – AMC532

AMC Altera 5SGXEA FPGA – AMC532

[email protected] www.vadatech.com

SPECIFICATIONS

Architecture Physical Dimensions Single module, mid-size or full-size Width: 2.89” (73.5 mm) Depth 7.11” (180.6 mm) Type AMC FPGA Carrier Altera FPGA Stratix-V GX Device Single FMC slot Four banks of DDR3 (32-bit each) Standards AMC Type AMC.1, AMC.2, AMC.3, and AMC.4 (FPGA programmable) Module Management IPMI IPMI version 2.0 PCIe Lanes Dual x4 via FPGA to AMC SRIO Lanes Dual x4 via FPGA to AMC Ethernet 10 GbE and GbE Dual 10GbE (XAUI) and Dual 1000Base-BX to AMC Configuration Power AMC532 Carrier is ~16 W (without mezzanine) application specific Environmental Temperature Operating Temperature: 0° to 65°C (air flow >400LFM) Storage Temperature: -40° to +90°C Vibration Operating 9.8 m/s2 (1.0G), 5-500Hz Shock Operating 30Gs each axis Relative Humidity 5 to 95 per cent, non-condensing Front Panel Interface Connectors Front panel FMC LEDs IPMI management control 4 user defined LEDs Mechanical Hot swap ejector handle Software Support Operating System n/a Conformal Coating Humiseal 1A33 Polyurethane (Optional) Humiseal 1B31 Acrylic (Optional) Other MTBF MIL Hand book 217-F @ TBD Hrs Certifications Designed to meet FCC, CE and UL certifications where applicable Standards VadaTech is certified to both the ISO9001:2000 and AS9100B:2004 standards Warranty Two (2) years Trademarks and Disclaimer

The VadaTech logo is a registered trademark of VadaTech, Inc. Other registered trademarks are the property of their respective owners. AdvancedTCA™ and the AdvancedMC™ logo are trademarks of the PCI Industrial Computers Manufacturers Group. All rights reserved. Specification subject to change without notice

Doc No. 4FM737-12 Rev 01 Version 2.0 – JULY/14

Page 4: AMC Altera 5SGXEA FPGA – AMC532

AMC Altera 5SGXEA FPGA – AMC532

[email protected] www.vadatech.com

ORDERING OPTIONS

AMC532 – A0C – DEF – 0HJ

RELATED PRODUCTS

FMC223 High Speed FMC for DAC

AMC713 Processor AMC

ARP200 FPGA Application-Ready Platform

CONTACT US

VadaTech Corporate Office

198 N. Gibson Rd. Henderson, NV 89014

Email: [email protected] Telephone: +1 702 896-3337

Fax: +1 702 896-0332

Asia Pacific Sales Office

7 Floor, No. 2, Wenhu Street, Neihu District, Taipei 114,Taiwan

Email: [email protected] Telephone: +886-2-2627-7655

Fax: +886-2-2627-7792

VadaTech European Sales Office

Ocean Village Innovation Centre, Ocean Way, Ocean Village, Southampton, SO14 3JZ

Email: [email protected] Telephone: +44 2380 381982

Fax: +44 2380 381983

A = FPGA PCIe Option 0 = No PCIe on ports 4-11 1 = PCIe on ports 4-7 (Single x4) 2 = PCIe on ports 8-11 (Single x4) 3 =PCIe on ports 4-11 (Dual x4)

C = Front Panel Size 1 = Reserved 2 = Mid-size 3 = Full-size

J = Conformal Coating 0 = None 1 = Humiseal 1A33 Polyurethane 2 = Humiseal 1B31 Acrylic

H = Temperature Range 0 = Commercial 1 = Industrial

D = FPGA Density 0 = Reserved 1 = 5SGXA5 2 = 5SGXA7 3 = 5SGXA9 4 = 5SGXAB

E = FPGA Speed 1 = Low 2 = High

F = Clock Holdover Stability 0 = Standard (XO) 1 = Stratum-3 (TCXO)

COMMON CONFIGURATIONS AMC532-202-110-000

Doc No. 4FM737-12 Rev 01 Version 2.0 – JULY/14

mailto:[email protected]
mailto:[email protected]
mailto:[email protected]

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