8/13/2019 an-176_v-rev-new
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AN-176
HOLT INTEGRATED CIRCUITS
2
The circuit shows the implementation in more detail.
C9
.1uF
5V Local
CLKOUT
C13
.047
C5
68uF 16V
C14
.047
5V ISO
5V ISO
5V Local5V L
GND ISO
C2
.1uF
C11, C12, C13, C14 MOUNT
CLOSE AS POSSIBLE
TO I C.
Spl i t vol tage
ter mi nati on
5V Local
U2
HI-3000
TXD1
GND2
VCC3
RXD4
STB8
CANH7
CANL6
SPLIT5
AVAGO HCPL- 7723
AVAGO HCPL- 7723
U1
CLOCKOUT7
GP14
MR17
SI14
CS16
SCK13
-109
GND
SO15
8 RXD
INT18
GP25
TXEN6
STAT12
OSCOUT2
VLOGIC1
VDD/TXD11
OSCIN3
OP1
Opto Single
VDD11
VI2
NC3
GND14
GND25VO6NC
VDD28
OP2
Opto Single
VDD11
VI2
NC3
GND14
GND25 VO6 NC
VDD28
GP1
TXEN
R2
60.4
R3
60.4
C10
.1uF
C420pF
Y1
24MHz
C3 20pFINT
nCS
R11.5 Meg
SO
SI
SCK
STAT
MR
C6
.1uF
GP2
I SOLATED POWER AND GND SECTI ON
CANH
CANL
HI - 3111
SPLIT
ARI NC 825 CAN TRANSCEI VER
ARI NC 825 CAN CONTROLLER
CANH
CANH
C11
.047
CANL
C1
68uF
CANL5V ISO
SPLIT
C12
.047
LOCAL POWER AND GND SECTI ON
The Avago Technologies HCPL-7723 optocoupler was chosen for its
low propagation delay, low pulse
width distortion and propagation delay skew. The key timing
parameters on the HCPL-7723 data sheet
are shown below:
2ns max. pulse width distortion
22ns max. prop. Delay
16ns max. prop. Delay skew
Refer to the HCPL-7723 data sheet for critical PCB layout and
decoupling capacitors values.
The propagation delay and skew become very important at higher
bus speeds and needs to be carefully
considered in order to stay within the delay budget for the
desired bit rate.
