An Evolutionary Algorithm-Based Approach to Automated

336 IEEE TRANSACTIONS ON EVOLUTIONARY COMPUTATION, VOL. 11, NO. 3, JUNE 2007

An Evolutionary Algorithm-Based Approach toAutomated Design of Analog and RF Circuits

Using Adaptive Normalized Cost FunctionsAbhishek Somani, Partha P. Chakrabarti, Senior Member, IEEE, and Amit Patra

Abstract—Typical analog and radio frequency (RF) circuitsizing optimization problems are computationally hard andrequire the handling of several conflicting cost criteria. Manyresearchers have used sequential stochastic refinement methodsto solve them, where the different cost criteria can either becombined into a single-objective function to find a unique solution,or they can be handled by multiobjective optimization methods toproduce tradeoff solutions on the Pareto front. This paper presentsa method for solving the problem by the former approach. We pro-pose a systematic method for incorporating the tradeoff wisdominspired by the circuit domain knowledge in the formulation ofthe composite cost function. Key issues have been identified andthe problem has been divided into two parts: a) normalizationof objective functions and b) assignment of weights to objectivesin the cost function. A nonlinear, parameterized normalizationstrategy has been proposed and has been shown to be better thantraditional linear normalization functions. Further, the designers’problem specific knowledge is assembled in the form of a partiallyordered set, which is used to construct a hierarchical cost graphfor the problem. The scalar cost function is calculated based onthis graph. Adaptive mechanisms have been introduced to dynam-ically change the structure of the graph to improve the chances ofreaching the near-optimal solution. A correlated double samplingoffset-compensated switched capacitor analog integrator circuitand an RF low-noise amplifier in an industry-standard 0.18 mCMOS technology have been chosen for experimental study.Optimization results have been shown for both the traditional andthe proposed methods. The results show significant improvementin both the chosen design problems.

Index Terms—Analog, circuits, genetic algorithms (GAs), opti-mization, sizing.

NOMENCLATURE

Normalization Function:

Normalization function.

Objective function, normalized objectivefunction.

Minimum possible value of and .

Maximum possible value of and .

Target optimal value of and ..

.Set of integers.

Manuscript received February 21, 2005; revised April 26, 2006.The authors are with the Indian Institute of Technology, Kharagpur 721302,

West Bengal, India (e-mail: [email protected]).Digital Object Identifier 10.1109/TEVC.2006.882434

Set of integers modulo x.

Normalization sensitivity.

Optimization Formulation:

Linear normalization flat cost function.

Nonlinear normalization flat costfunction.Hierarchical approach (nonlinearnormalization hierarchical cost function).HA with Hierarchical cost graph (HCG)mutation.

Design Objectives:

Dynamic range.

Settling time.

Settling error.

Output voltage range.

Noise figure.

Third intercept point (measure of linearity).

I. INTRODUCTION

AUTOMATING the design of analog and radio frequency(RF) circuits has generally been considered a difficult

problem. Quite a number of attempts have been made in the pastto build generic analog synthesis systems. However, the stiffgenerality-complexity tradeoffs inherent to the problem haveresisted wide acceptance of any particular synthesis method-ology. On a parallel note, the advent of the deep-submicronCMOS era has made manual optimization of the performanceof analog and RF circuits exceedingly difficult. Few practicaloptimization problems bring forth the issue of effectively han-dling multiple, usually noncommensurate and often conflictingobjectives as prominently as the problem of optimization ofanalog and RF circuits. A typical analog circuit like an opera-tional amplifier has objectives like Gain, Bandwidth, Slew Rate,Phase Margin, CMRR, PSRR, Dynamic Range, Output Range,Power, and Area. The order of the numerical values of theseobjectives, as well as their individual ranges can be diverse.

One of the earliest analog circuit synthesis methods waspresented in OPASYN [1] which is a design-equation-basedopAmp generator that uses decision tree and heuristic pruningfor topology selection and steepest descent method for devicesizing. This problem has also been formulated as a con-strained optimization problem [2]. Notable among various

1089-778X/$20.00 © 2006 IEEE

SOMANI et al.: AN EVOLUTIONARY ALGORITHM-BASED APPROACH TO AUTOMATED DESIGN OF ANALOG AND RF CIRCUITS 337

other approaches which use SPICE or some other commer-cial circuit simulator in an optimization-based framework areDELIGHT.SPICE [3], which uses a gradient search-basedapproach, ASTRX/OBLX [4], which uses asymptotic wave-form evaluation [5] to expedite the linear simulations andsimulated annealing to optimize, Maelstrom [6], which uses acombined genetic/annealing optimization algorithm, and Ana-conda [7], which combines ideas from evolutionary algorithmand pattern search. Many of these methods use sequentialstochastic refinement methods for solving global optimizationproblems. In all these approaches, different objectives arecombined to form a scalarized objective function, and it isusually difficult for the optimization algorithm to find a uniquesolution that optimizes all the different performance parameterssimultaneously. Usually, there is a tradeoff situation, whereit is only possible to improve one performance at the cost ofanother, a situation which can be handled effectively by theconcept of Pareto-optimality [8]. The idea is that if the entireset of “equally optimal” or nondominated points, i.e., of thePareto-optimal front could be produced, it would help to pickone distinct solution deliberately. Also, comparatively neweranalog systems design methodologies [9], [10], require designof component circuits with optimal design surfaces instead ofan optimal design point. At the circuit level, this translates intoa problem of optimization to obtain parameterized behaviorof circuits. This necessitates a methodology for generatingmultiple optimal solutions for the circuits in the entire rangeof the parameterized variables/specifications. The applicationof sequential stochastic refinement methods like genetic al-gorithms (GAs) [11] for this problem has been successfullyreported in WATSON [12].

GAs mimic the laws of natural evolution and work with pop-ulations of solutions manipulated by genetic operators like se-lection, crossover, mutation, etc., over successive generations.GAs have found wide applications in solving optimization prob-lems. Analog circuit optimization problems can be formulatedin a GA framework in one of the following two ways.

1) A single-objective, constrained optimization problem,where different performance objectives are combined toform a single scalar objective, and which produces onesolution.

2) A multiobjective optimization problem, where the conceptof Pareto-optimality is used to produce multiple tradeoffsolutions on a design decision surface.

Usually, for an analog circuit optimization problem with threeor more objectives, we have found the first approach to be com-putationally cheaper than the second approach. However, theprospect of obtaining multiple tradeoff solutions using a mul-tiobjective optimization method looks attractive, as it providesthe circuit designer with multiple design choices in a single runof the optimization routine. Unfortunately, we found during ourexperiments that the application of standard, off-the-shelf algo-rithms for both of these options to analog circuit optimizationproblems produced poor results. The single-objective approachusually ends up with solutions which are not acceptable with re-spect to all the performance objectives. On the other hand, thedifficulty of obtaining solutions that are reasonably diverse aswell as close to the near-optimal Pareto-front, at the expense of

modest computational resources, is an issue for multiobjectiveapproaches. In general, the tradeoff surfaces produced are foundto lack solutions in some important parts of the required subsetof the solution space. This observation brings forth two pos-sible directions, where the analog circuits domain knowledgecould be effectively used: a) combining multiple performanceobjectives in an appropriate single-objective framework to pro-duce a single solution which is acceptable with respect to allthe objectives, or b) development of special diversity preservingmechanisms in a multiobjective framework, which produce de-sign decision surfaces of good diversity and proximity to thenear-optimal Pareto-front. This work takes the former approachwhere we identify the difficulties with current methods for for-mulating the composite cost function and propose a systematicmethod for incorporating the analog circuits domain knowledgein the optimization process. Our aim is to provide the user amethod that is better than the currently available off-the-shelfmultiobjective methods, within reasonable computational effortand that can produce single solutions quickly and also producemultiple solution surfaces.

In order to devise a mechanism for effective single-objectiveoptimization of analog circuits using GAs, we identify two sub-stantially important issues, namely: 1) normalization of objec-tive functions and 2) cost function formulation methodology.We discuss them in the following subsections.

A. Normalization

Traditional normalization techniques essentially use linear orlogarithmic scaling. These require the user to supply reason-able estimates of maximum and minimum values for the per-formance metric being normalized. The normalization equationtypically used is

(1)

where and . Here, is theoriginal data value of the objective function or its logarithm, de-pending upon the range of in the feasible objective functionspace, and is the corresponding normalized variable. This in-troduces two difficulties.

1) Estimating both the absolute minimum and maximumvalues may be nontrivial for certain types of circuit per-formance metrics. The general approach is to overestimate(underestimate) the extremes which result in lower sensi-tivity (inadequate coverage) of with respect to . Thismay adversely affect the speed of convergence of thesolution.

2) An equal change in the value of is reflected by an equalchange in , regardless of the distance between the currentvalue of and the desired target value of . This is not fa-vorable since the relative qualitative improvement is morefor solutions closer to the desired value of and the quan-titative normalization of should reflect this.

Some early hints on using nonlinear normalization techniquescan be found in [1] and [13]. However, a method for evaluatingthe quality of such techniques with respect to optimization prob-lems is needed. We try to address this issue in our work.


B. Cost Function Aggregation

For a system with objective functions whosenormalized values are , respectively, the scalar ob-jective function is traditionally defined as

(2)

where is the relative preference or weight associated with theth objective function. We call the method of assigning fixed nu-

merical values to ’s a flat cost function approach. The primarydifficulties with this approach are as follows.

1) The requirement of the optimization program to satisfy allthe objectives at the end of the optimization run, suggeststhat all the different objectives be weighted equally.

2) For a given problem, some of the objectives may be moredifficult to attain than some others. Thus, if a classifica-tion among the objectives is possible on grounds of relativedifficulty of attainment, one would like to give higher nu-merical weights to the difficult objectives than the others.Koza [14] suggested the classification of the circuit perfor-mance specifications into groups, where the lower groupsconsisted of constraints which ensure basic circuit func-tionality, and the higher groups consisted of objectives rep-resenting targeted circuit performance specifications. TheGA is made to evolve in phases through these groups,but the work does not delve into methods for adaptiveweights generation for objectives within a group. An al-ternate method [15] would be to hierarchically rank the so-lutions. However, such a method involves keeping track ofall the objectives and becomes computationally almost asexpensive as a multiobjective approach.

3) In any optimization problem, the determination of theright set of weights for properly shaping the search spaceis a nontrivial task and can be heavily dependent on theproblem-at-hand with no direct way of finding them.

4) The first two items in the list contradict each other in a flatcost function approach. [16] suggests starting with greaterweight values for important objectives and changing theweight values in subsequent iterations by monitoring thevalue of each objective function and their contribution tothe total in subsequent iterations. However, for nonlinearoptimization problems like analog circuit sizing, where thedifferent objectives have nonlinear dependence upon eachother, a systematic method of weights adjustment has beenlacking.

C. Contribution of This Work

This work explores the possibility of obtaining near-optimumsolutions to analog and RF circuit design problems by firstshowing the effects of the above problems in practical circuitsand then proposing methods to remedy them. Specifically, thiswork contributes in the following ways.

1) Definition of a metric for quality assessment of normal-ization functions and proposition of a new parameterizednormalization strategy for objective functions in real-pa-rameter GAs.

2) Proposition of a pruned partially ordered graph-based rep-resentation of the problem-domain knowledge and a newformulation of the composite cost function in multiple-ob-jective problems.

3) Proposition of a systematic weights-adjustment strategywhich dynamically modifies the shape of the objectivefunction space to rescue the optimization process fromlocally optimal solutions.

We have developed an elite-preserving, real-parameterGA-based optimization platform using the proposed normaliza-tion and dynamic weight adjustment strategies. We demonstratethe generality and problem-independence of the proposed tech-niques by applying them to two different problems: 1) analogswitched-capacitor integrator and 2) RF low-noise amplifier(LNA) circuit, for a range of tight performance specifications.Good results were obtained by the proposed method for caseswhere a GA based on traditional methods failed. For the six-ob-jective integrator problem, while a maximum of five objectiveswere achieved by just 5% of the instances using traditionalmethods, the proposed methods enabled 72.5% instances toachieve all six objectives. Further, biobjective tradeoff curvescreated by applying the proposed algorithm to different circuitspecifications were found to be better than the Pareto-frontsobtained by multiobjective methods using comparable compu-tational effort. Similarly, for the five-objective LNA problem,86.7% cases achieved all five objectives using the new methods,which is in sharp contrast with just 6.7% cases achieving amaximum of three objectives using traditional methods.

The paper is organized as follows. In Section II, we describean example analog circuit and its formulation into an optimiza-tion problem. This is followed by results obtained by applicationof traditionally popular single- and multiple-objective optimiza-tion methods. We then provide insight into the requirements ofa good normalization method and propose one such method inSection III. The proposed partially ordered graph-based rep-resentation of problem domain knowledge and online weightsadjustment strategy is discussed and comparative results are col-lated in Section IV. Section V describes an RF LNA circuitdesign problem and discusses the results obtained by applyingthe proposed technique to this problem. The conclusion is pre-sented in Section VI.

II. SWITCHED CAPACITOR INTEGRATOR CIRCUIT:INITIAL EXPERIMENTS

Our first example subcircuit is a correlated double sampling(CDS) offset-compensated switched-capacitor integrator [17]which is the basic building block for sigma-delta modulatorsand is used extensively to build filters and data converters. Fig. 1shows a typical CDS offset-compensated integrator with sam-pling, feedback, and offset cancellation capacitors in the differ-ential configuration. The two-stage opAmp topology used in theintegrator for our work is shown in Fig. 2.

All significant layout-dependent parasitic capacitances andresistances are included in parameterized form in the schematicrepresentation of the circuit. The process and supply voltagevariability are included as essential steps in the evaluationof the circuits. After initial topology-based reduction of de-sign parameters, the optimization problem is framed with 15


Fig. 1. CDS offset-compensated switched-capacitor integrator.

Fig. 2. Two-stage operational amplifier.

design parameters, which are as follows:

.Here, and are the channel width and length, respectively,of transistor . The problem had the following constraints.

• DC biasing condition: All the transistors are required tobe in the saturation region with a predefined safety margin.

• Underdamped transient response: Constraints on thedamping coefficient of the circuit was enforced to makethe transient response slightly underdamped for fastersettling.

• Robustness: The yield is calculated as in [18] and is re-quired to be above a predefined threshold.

The different objectives of the problem are: dynamic range(DR), settling time (ST), settling error (SE), output voltagerange (OR), power, and area. In the next two subsections, we

show the performance of standard single- and multiple-objec-tive optimization methods for the above problem.

A. Single-Objective Optimization

We term the combination of linear normalization func-tion and flat cost function approach as the LF approach

. We assignedequal weights to all the objectives in the formation of thescalarized cost function. The benchmark test-suite consistedof 40 different circuit specifications graded by their level ofdifficulty, and the ranges of the individual specifications asfollows: – dB, s,

– volts, PowermWatts (where, and

are parameters dependent upon technology and supply voltage.In our examples, and ), Area


TABLE IINTEGRATOR: TOLERANCE LEVELS ON OBJECTIVES

Fig. 3. Success count for LF approach applied to integrator problem.

m . The Power constraint is obtained by conser-vative first-order power estimates for integrators [19]. Thoughvery approximate, it provides a good upper limit on acceptablepower dissipation of the circuit. These specifications formedthe six objective functions of the 15-parameter optimizationproblem.

Details of GA: An elite-preserving real-parameter GA with asteady-state population size of 200 was used. The crossover andmutation probabilities were kept at 0.9 and 0.04, respectively. Aroulette wheel-based selection mechanism was used for creatingnew solutions in every generation.

Interpretation of Results: For every test case, the number ofobjectives successfully achieved at the end of the optimizationcycle is called the Success Count for that case. Also, an objectiveis considered to have been achieved if its obtained value fallswithin the tolerance levels specified in Table I.

The GA was evolved for 300 generations in each case and theresults are shown in the form of success count in Fig. 3. It is ob-served that there was not a single case, where all the objectiveswere achieved. Success counts of 5, 4, 3, 2, and 1 were achievedin 2, 9, 18, 10, and 1 cases, respectively. Investigations revealedthat the major reason for such performance was the presenceof multiple locally optimal solutions for the chosen scalariza-tion function of the six objectives in the 15-dimensional (15-D)parameter-space. Even a population size as high as 3500 and a

high mutation probability of 0.07 was not enough to produceacceptable solutions for a sizable fraction of the chosen cases.

B. Multiobjective Optimization

Population-based evolutionary multiobjective optimizationmethods present an extremely powerful option for designspace exploration. We selected a popular algorithm namednondominated sorting GA-II (NSGA-II) [20] and applied it tothe problem at hand. The crossover and mutation probabilitieswere kept at 0.9 and 0.05, respectively. Our motivation was tostudy the effectiveness of NSGA-II as a function of the requirednumber of circuit evaluations and the number of objectives.Our initial experiments with the integrator problem formulatedas a six-objective optimization problem produced poor resultswith respect to both the quality and diversity of the solutions.Even after 500 generations of a 5000-strength population,no solutions were found in the region of performance spacedefined by dB, . Thisis a fairly important part of the design space from a designer’sperspective. Hence, we performed detailed experiments witha lesser number of objectives, where the remaining circuitspecifications were converted into inequality constraints, asdescribed next.

One major issue encountered was the inability to estimate anupper limit on the population size which would produce solu-tions with good diversity and cover the entire portion of the de-sired subset of the solution space. Fig. 4 shows the Pareto-frontsfor two different population sizes in a representative biobjectiveproblem. It can be observed that the spread of the Pareto-frontsimproves when the population size is increased. However, anestimation of the population size for the biobjective version ofthe problem, which will ensure that the Pareto-front covers apredefined region of the solution space, is not known. Later,we found that a front obtained by application of an improvedsingle-objective optimization method for multiple specificationsets was much better in quality than the Pareto-front obtainedby NSGA-II at comparable computational cost.

C. Summary

The results in this section clearly show the shortcomings ofthe traditional methods of both single- and multiple-objectivemethods, when applied to analog circuit optimization problems.Even the Pareto-front obtained by multiple calls to the single-objective optimization routine was not of acceptable quality.Starting from the following section, we first propose a nonlinearnormalization scheme and a method for systematic inclusion ofproblem domain knowledge in the formulation of the compositecost function. Later, we propose a dynamic weights adjustmentstrategy for allowing escape from local optima.

III. NORMALIZATION FUNCTION

A. Desirable Properties

Typically, an objective function has multiple locally optimalsolutions in the problem parameter space, and only one of themis the desired globally optimal solution. We argue that if theobjective function surface can be shaped such that the desiredglobally optimal region is emphasized more than the other local


Fig. 4. Results for biobjective optimization: 1) MO1: NSGA-II with 500 pop-ulation size and 500 generations and 2) MO2: NSGA-II with 1000 populationsize and 500 generations.

optima, then the chances of the search algorithm escaping localoptima and reaching the globally optimal solution can be im-proved. This would require a transformation of the objectivefunction. In this work, we propose to combine this transforma-tion with the normalization process of the objective function, sothat their combined effect can be produced by a single normal-ization function.

Further, if there exists a locally optimal solution inthe range with normalized value , then theglobal optimum at can be emphasized if

Since can be at any point between and , wecan say in general that

Among all such normalization functions, we consider only thosewhich are monotonic in the range , and if

, they satisfy the following condition:

(3)

The above condition can be expressed in a more compact formwith the help of the concept of Normalization Sensitivity.

Definition 1: The Normalization Sensitivity of an objectivefunction is defined as the derivative of with respect to , i.e.,

, where .Elaborating on the definition of from the nomenclature

table, we have

Thus, (3) simply means that the Normalization Sensitivity ismore for points closer to than those farther away, i.e.,

The above arguments also hold for the rest of the objective func-tion space, which covers the region between and .It should also be noted that there exist tradeoffs in designing thecurvature of the normalization function. If the function is madetoo steep in the vicinity of , then the search algorithm maycompletely miss the desired target region. On the other hand, de-creasing the value of this steepness beyond certain levels tendsto increase the impact of locally optimal basins in the objec-tive function space. This requirement of a nonlinear normal-ization function with parameterized steepness control has beenaddressed in the next subsection.

B. Classification of Objective Functions

The objective functions that we propose in this work, are di-vided into two groups based on the nature of their specification,viz., Soft and Hard objectives, where:

• Soft Objectives model inequality specifications, i.e., max-imization and minimization problems. We propose to usethe following:

(4)

where for maximization problems, andfor minimization problems. Here, is


Fig. 5. Soft objective: �y labeled as ybar.

Fig. 6. Hard objective: �y labeled as ybar.

the steepness controlling parameter. Fig. 5 shows the func-tion for different values of .

• Hard Objectives model equality specifications. We proposeto use

(5)

Here, when and when . Fig. 6 showsthe changing shape of the function as is changed.

Fig. 7 shows the effect of the proposed normalization tech-nique on a simple bimodal function with a global minimum andanother local minimum. The normalized function increases thestrength of the global minimum basin in comparison with thelocal minimum basin.

This scheme compares favorably with the traditional schemein (1) in the following ways.

1) Often, in a multiple-objective conflicting scenario inpractical problems like an analog circuit sizing problem,the overachievement of many specifications like dynamicrange, settling time, and error come at the cost of increasein power, area, etc. Hard objectives provide a way of

Fig. 7. Result of normalization on a bimodal function.

avoiding overachievement by translating these specifica-tions into equality constraints.

2) In case of traditional methods, we have ,whereas the proposed normalization function en-sures for all paired tuplesfor which either, or,

is true. Fig. 8 shows thenormalization sensitivity as a function of for both softand hard objectives.

3) In case of soft objectives, underachievement causespenalty, while overachieving the target results in “re-wards” which tend to saturate beyond significant values ofoverachievement.

The objectives in the chosen integrator circuit optimizationproblem can be classified as follows.

• Hard Objectives: Dynamic range (DR), settling time (ST),and settling error (SE).

• Soft Objectives: Power, area, and output voltage range(OR).

The normalization function in LF approach is replaced by thenonlinear functions proposed in this section to arrive at whatwe term as the NLF approach (nonlinear normalization flatcost function). Studies were performed to observe the effect ofapplying different weight sets to the scalarized objective func-tion in NLF. No single weight-set could be found which ob-tained satisfactory solutions for any significant fraction of the40 cases. Table II shows the result for one of the many cases,where none of the chosen weight sets worked well for all theobjectives. It was observed that the results for any performanceobjective were not only related to its own relative weight, but tothe weights assigned to other objectives also. Hence, it becameextremely difficult to arrive at a consistent set of weight values.Consequently, the experiments for NLF were done with equalweights for all objectives.

NLF was tested for the chosen benchmark test-suite of 40specifications for the integrator circuit and Fig. 9 shows the re-sults in the form of success count and compares them with thatobtained from LF. It can be seen that NLF performs slightly


Fig. 8. Normalization sensitivity.

TABLE IIEFFECT OF DIFFERENT WEIGHT SETS ON INTEGRATOR PROBLEM

better than LF. NLF produced a success count of 5, 4, 3, and2 for 3, 10, 24, and 3 cases, respectively. The performance canbe further improved by introducing a proper weight-selectionmechanism for objectives and one such method is discussed inthe next section.

IV. HIERARCHICAL ADJUSTMENT

OF COST FUNCTION WEIGHTS

In this section, we propose a method for the online adjustmentof weights during the runtime of the optimization program. Thetarget here is to expedite the optimization process by utilizingsome general knowledge about the problem domain. The weightadjustment strategy works on a knowledge-base of the quali-tative relative difficulty of achieving different objectives for agiven problem. This knowledge is used to create a partially or-dered set or poset , containing all the normalizedobjectives in the problem. A partial order on is a binary re-lation “ ” on that is reflexive, antisymmetric, and transitive,i.e., for :

• ;• ;• .

Fig. 9. Success count for NLF approach and its comparison with LF when ap-plied to integrator problem.

In designers’ terminology, means objective is eithermore important or more difficult to achieve than objective .This poset is used to create a partially ordered graph


, which is a directed graph of vertex set con-taining all the objectives . The edge setcontains edges corresponding to all ordered pairs of verticesin , i.e., there is an edge if , where

. Next, is pruned to form a hierarchicalcost graph (HCG) by deleting all transitive edges if thereexits , such that and holds. Based onthe HCG thus produced, the weights for all the objectives arecomputed for each candidate solution in every iteration, usingthe algorithm FindGraphWeight given next.

Algorithm 1: FindGraph Weight

: Hierarchical Cost Graph;

for all nodes vertex set , such thatoutdegree do

findWeight

end for

Algorithm 2: FindWeight

: node number;

: Weight for Objective at node ;

: Value of Objective function at node ;

if indegree then

else

indegree

findparents( ,numparent, )

for all to numparent do

FindWeight

minimum

end for

end if

Thus, the overall score is obtained as . Wedefine the cost as , where is some constant. Byusing the minimum operator for objectives sitting at nodes withindegree , every node effectively sees just one incomingpath. Thus, the properties of various nodes in a general HCGwould be similar to those in a relatively simplified case of HCG,where the entire graph is linearly ordered, that is, reduced to justone path , where is an objective withhigher priority that . The concept of HCG was introducedin this work as a tool to use the qualitative relative prioritiesof different objective functions to create a composite objectivefunction such that all objectives can be achieved with a reason-able level of satisfaction. Thus, by observing the properties ofa linearly ordered HCG, we wish to understand if their abovestated purpose is fulfilled. In particular, we want to compare the

Fig. 10. Hierarchical cost graph for integrator circuit.

HCG-based composite score function with a flat score functionwith respect to the situations where a subset of objectives are un-derachieved due to overachievement of those in another subset.In order to have some quantitative feel of this comparison, theconcept of Starvation Threshold is developed next.

Definition 2: Starvation Threshold, of an objectivefor global overachievement is defined as its maximum dif-

ference from the optimal score, which when combined with thescores of the other objectives (which are overachieved byan equal amount ), makes the total score greater than or equalto the score when all the objectives are optimally achieved(i.e., zero global overachievement).

Thus, if , then, for a hierarchical weightsassignment strategy

and for a flat score function strategy with all the weights equal,if , then


Fig. 11. Transformation of cost surface by HA.

Fig. 12. Comparison of success count for HA, NLF, and LF approach appliedto the integrator problem.

When all the objectives are normalized to assume values be-tween 0 and 2, with optimal value at 1, then the above definitionyields the following properties.

Property 1: For .Proof: We want to show that

(6)

This is equivalent to showing that

(7)

Since, , for , the expression simplifies to

(8)

Thus, .

Interpretation: Since the Starvation Threshold for the highestpriority objective in HCG is less than that in a flat score func-tion strategy, its chances of getting underachieved are also less.Thus, priority is a mechanism by which we can impose a partialorder on objectives by their level of importance or, difficulty ofattainment by traditional methods. Such priority can be decidedby insights into the problem domain and/or experience, whilewe carry out optimization using traditional methods.

Property 2: For and , then there existssuch that .

Proof: Here, we want to find some , for which

(9)

This is equivalent to solving for from the inequality

(10)

Upon assumption of small values of (valid because), the inequality simplifies to

(11)

Interpretation: Since, the Starvation Threshold for some low-priority objectives can be more in HCG than that in a flat scorefunction strategy, these objectives have greater chance of under-achievement in HCG. However, the priority-based structure ofHCG ensures that about half of all the objectives (with higherpriority) are protected from getting more underachieved thanin the flat score function. The lack of any priority-based in-formation makes all the objectives equally vulnerable to under-achievement in the flat score function strategy.

Corollary: For the second property, a more realistic situationwould be when objectives for are overachieved atthe cost of underachievement of , and the rest of objectives


Fig. 13. Success count for HCGM2 approach and its comparison with all otherapproaches for the integrator problem.

Fig. 14. Comparison of HCGM1 and HCGM2 for the integrator problem.

with lower priority than are either underachieved or optimallyachieved. There are a large number of possible combinations ofthe objective function values, which come under this category.In this paper, we discuss three such distinct cases to provide anoverall impression of the properties of the HCG. The behavior ofthe HCG in most practical cases would be somewhere betweenthese extremes.

1) Case I: Objectives with priority lower than that of areoptimally achieved, i.e.,

(12)

(13)

(14)

Interpretation: Here, about 3/4 of all the objectives in theHCG are prone to more underachievement in contrast toonly 1/2 in Property 2. However, 1/4 of the objectives in theHCG are still guaranteed for lesser underachievement than

Fig. 15. Comparison of evolution of best solution in HA and HCGM2.

in the flat score function, while every objective is prone togetting underachieved in the flat score function strategy.

2) Case II: Objectives are equally under-achieved by

(15)

(16)

Thus, is true only when

(17)

(18)

If in the above expression, then

Interpretation: In this case, only the first four to five highestpriority objectives are protected from more underachieve-ment in the HCG than in the flat score function, and allother objectives are prone to higher underachievement thanin the flat score function strategy.

3) Case III: Objectives with priorities lower than are badlyunderachieved, i.e.,

(19)

(20)

Thus, is true if , provided .Interpretation: For , all the objectives in theHCG are guaranteed for lesser underachievement than inthe flat score function strategy.

All practical situations during evolutionary optimizationwould be a mix of the above mentioned cases and in all suchsituations, a sizeable fraction of the objectives in the HCG


Fig. 16. Comparative evolution plots for LF, NLF, HA, and HCGM2.

would be prone to underachievement. However, another frac-tion of objectives in the HCG (usually, the higher priorityobjectives) would be guaranteed for lesser underachievementthan in the flat score function strategy.

We term the combination of HCG driven cost function withthe proposed nonlinear normalization function as the hierar-chical approach (HA). In HA, the steepness controlling param-eter is made smaller for objectives with higher priority, i.e.,if , then . Such a gradation of the steepnesscontrolling parameter based upon the problem domain knowl-edge allows faster exploration for easy objectives and slowerand more gradual exploration for difficult objectives. We usedthe following strategy for assigning the values of .

1) Objectives corresponding to nodes with zero indegree inthe HCG were given the minimum value of , i.e., .

2) Those corresponding to nodes with zero outdegree weregiven the maximum value of , i.e., .

3) All the directed paths in the HCG were identified. For anysuch path, , the valueof for node was assigned the value

. For nodes lying on multiple paths, the leastamong all the values of assigned to it was selected.

We always kept . No appreciable difference inthe quality of solutions was observed for .However, values of smaller than 0.2 were found to makethe optimization process slower, while values higher than 1.0were found to produce solutions with lesser success count (es-pecially, underachievement of lower priority objectives).

Based on the knowledge about the example integrator sizingproblem, the HCG is prepared, as shown in Fig. 10.

Fig. 11 shows how the cost surface is transformed by HA ina small subspace of the 15-D integrator parameter space, in theneighborhood of the globally optimal point.

A comparative view of the performance of HA, NLF, and LFis given in Fig. 12. Clearly, HA performs better than NLF with 3and 18 cases having a success count of 6 and 5, respectively. Fur-ther, success count of 4 and 3 is registered by 14 and 5 cases, re-spectively. It was observed that the underachievement of lowerpriority objectives caused a number of cases to miss the globallynear-optimal solutions by one or two objectives. In these situa-tions, a rearrangement in the relative priority of the objectiveswould rescue the poorly achieved objectives. We next proposea method to introduce such shuffling in the HCG based uponsome statistics of the solution population in the process of evo-


lution. We call this the method of hierarchical cost graph mu-tation (HCGM).

A. Algorithm for Cost Graph Mutation

HCGM monitors the best solutions in the population witha tag associated with each such solution showing the genera-tion in which it was produced. We interpret stagnation or lackin improvement of the evolution, if the number of new solu-tions in the slot of the top solutions falls below a predefinedthreshold over a sliding window of generations. This is fol-lowed by the swapping of a pair of neighboring nodes in theHCG. A candidate edge in the HCG, around which this swap-ping would take place, is chosen after the swappings around allthe edges at higher positions in the graph have been tried. Thus,every instance of mutation in the HCG modifies the cost func-tion surface slightly and provides potential opportunity for thesolutions to escape from locally optimal regions.

The important features of this algorithm are as follows.1) An instance of mutation does not make any drastic change

in the overall shape of the design space, since exchange isallowed only between neighboring objectives in the costgraph.

2) A maximum of one mutation is allowed in a generation.3) After an instance of mutation, no mutation is allowed for a

number of generations, defined by the gestation period.4) Mutations at positions lower in the graph should be allowed

only after mutations at higher positions fail to provide sig-nificant improvement in the score.

The algorithms Mutate Level and MutateCostGraph areoutlined next.

Algorithm 3: MutateCostGraph

Global Variable : Generation (Iteration) number;

: window size in number of generations for stagnation;

gest: gestation period in number of generations;

: Number of members entering the top slots;

: Lower threshold for for generations;

: Probability of mutation at a chosen location;

: Array containing edges in Graph which are candidatesfor mutation;

initialize All outedges of vertices with 0indegree

for all to numedge do

produced in generation

if and andthen

if andthen

a previously unvisited outedge ofparent

if NULL then

else

update with a randomly chosenoutedge of child

end if

end if

if success then

end if

end if

end for

Algorithm 4: Mutate Level

: Edge of Cost Graph; : Probability of mutation;

if random then

Exchange the positions of parent and child

return true

else

return false

end if

We conducted our experiments with two flavors of HCGM.• HCGM1 is HCGM applied to objectives with linear nor-

malization.• HCGM2 is HCGM applied to objectives after nonlinear

normalization as suggested in Section III.Both HCGM1 and HCGM2 were given the following param-

eter values: .The overall results produced by HCGM2 are shown in Fig. 13. Asuccess count of 6 was achieved for 29 out of 40 cases. We our-selves examined the remaining 11 cases and tried to hand-designthem by applying conventional circuit design wisdom. However,we could not achieve success for these cases even by manualdesign. The two-stage opamp topology used for the integratorcircuit has its own limitations and our experiments have helpedus to locate and verify these limits. However, the possibility ofobtaining better results for some of these cases by allowing aslower evolution and increasing the number of allowable circuitevaluations cannot be completely ruled out.

Fig. 14 shows a comparison between HCGM1 and HCGM2.While HCGM1 performs better than LF with success countof 3, 4, and 5 registered by 20, 14, and 6 cases, respectively,it is greatly inferior to HCGM2. All the above observationshave helped us establish the individual merits of the proposednonlinear normalization technique, the HCG-based formulation


of the circuit optimization problem and the algorithm for costgraph mutation, as well as their combined strength.

Fig. 15 provides further insights into the working of HCGM2algorithm. It shows the evolution of the composite objectivefunction score for the best solution in HA and HCGM2 forspecification no. 22 ( dB, s,

mW,m ). HA (marked by dotted line), which does not

guide the optimization during the evolution process, tends toget stuck in some local optimum and the best solution (this isan elite-preserving approach) improves very slowly after that.HCGM2 (marked by solid line) keeps monitoring the evolutionand if the solutions get trapped in such a local optimum for morethan a predefined number of generations (iterations), then thealgorithm changes the objective function space by allowing aninstance of mutation in the cost graph in such a way that the par-ticular local optimum ceases to exist. In this example, the costgraph mutates in the 140th (cost graph mutation, i.e., CGM In-stance 1) and the 220th (CGM instance 2) generations and theoptimal solution is achieved in 300 generations. The plots ofthe individual performance objectives of the best solutions forall the four approaches for this case are shown in Fig. 16. Theexample clearly shows how HCGM manages to get out fromvarious local optima by modifying the objective function space,an ability which is lacking in the other approaches.

B. Comparison With Multiobjective Methods

As mentioned in Section II, even with considerable computa-tional effort, NSGA-II failed to produce solutions in some veryimportant parts of the performance space for the six-objectiveversion of the problem. Hence, we perform all comparisons withNSGA-II applied to the much simpler biobjective version of theproblem. We used repeated evaluations of HCGM2 for differentspecifications to obtain the Pareto-front. A comparison of thequality of the two fronts is shown in Fig. 17. The total com-putational effort (in terms of CPU hours of a Intel 3.2 GHz,4 GB machine) for obtaining the eight points in the Pareto-frontfrom HCGM2 was 12.61 hours, while that required by MO2was 11.92 hours. Fig. 17 indicates that multiobjective methodsneed to be significantly improved to obtain better quality solu-tion fronts. It was also found that providing more time for mul-tiobjective optimization does not lead to an improvement in thequality of the results in the same proportion as the time invested.On the other hand, an HCGM2 front with a higher number ofsolutions can be obtained with a proportional increase in thenumber of evaluations of HCGM2. However, the eight solu-tions for the entire range of DR is usually adequate from a de-signer’s perspective. Thus, HCGM2 can be used to obtain goodquality design surfaces of required density at modest computa-tional cost, and the designer’s control over the specifications forindividual solution points helps in avoiding gaps in important re-gions of the Pareto front. It should also be noted that a single runof HCGM2 takes about 1.57 hours, and its multiple runs can beused to produce a design surface in any number of dimensions,depending upon the users requirement and time-budget.

Fig. 17. Results for biobjective optimization: 1) MO1: NSGA-II with 500 pop-ulation size and 500 generations; 2) MO2: NSGA-II with 1000 population sizeand 500 generations; and 3) HCGM2: Each solution point required 200 popula-tion size and 300 generations.

V. RF LOW-NOISE AMPLIFIER (LNA)

We now move on to a different class of circuits, viz., RF cir-cuits and show the efficacy of our methods in this domain also.RF LNA are essential building blocks used at the front-end ofRF receivers. LNA provides tuned amplification to the essen-tially noisy signal coming from the receiver antenna. In addition,an LNA needs to be designed so that it adds minimal possibledevice noise to the amplified signal for a given power budgetand provides good linearity and input matching to the receivedsignal. Use of GAs for LNA optimization has been reported in[21].

Fig. 18 shows a popular CMOS LNA topology [22]. In ad-dition to sizing the transistors M1, M2, and M3, design deci-sions have to be made for the passive elements in the circuit, themost important being the three inductors , and . In-tegrated inductors in CMOS technology are, generally, planar


Fig. 18. LNA circuit to be optimized.

Fig. 19. Hierarchical cost graph for LNA circuit.

spiral structures drawn on the topmost metal layer available.However, they bring along with them a host of parasitics, whichreduce the quality factors of the inductors and make the designoptimization of LNAs nontrivial. The native design parameters

TABLE IIILNA: TOLERANCE LEVELS ON OBJECTIVES

for such inductors are number of turns, inner and outer radius,and width of metal line.

The optimization problem for LNA design was formulatedwith 15 design parameters (which include physical parametersfor inductors, transistors and capacitances) and the followingconstraints and objectives.

• Constraints: Upper limits on physical dimensions of in-ductors, lower limits on gate overdrive.

• Objectives: Noise figure (NF), , linearity (IIP3),voltage gain, and quiescent current.

The design methodology includes in the utmost detail, all sig-nificant parasitic effects and their mutual couplings. The equiv-


TABLE IVEFFECT OF DIFFERENT WEIGHT SETS ON LNA PROBLEM: ONE

TABLE VEFFECT OF DIFFERENT WEIGHT SETS ON LNA PROBLEM: TWO

Fig. 20. Comparative success of different algorithms for LNA circuit optimization problem.

alent circuits for inductors were obtained with the help of thepopular integrated inductor simulation tool ASITIC [23], [24].Experienced designers’ knowledge was used to build the HCGshown in Fig. 19.

As in the integrator problem, we created a set of 30 designtargets for a 1.8 GHz LNA in 0.18 m CMOS technology andran LF, NLF, HA, HCGM1, and HCGM2 for all these problems.

All the parameter values for HA and HCGM were kept the sameas in the integrator problem. The tolerance levels for differentobjectives, for acceptance of solutions are shown in Table III.We started off with equal weights assigned to all the five ob-jectives for LF and NLF approaches. But such a weight com-bination did not produce satisfactory results for any of the 30test cases. Studies with different weight sets were performed for


the problem framed as NLF (results for some of the weight setsare shown for two specifications in Tables IV and V) and thefollowing weights for the objectives were found to be slightlybetter than the rest

the same weight set was used for the LF approach, as well.A summary of the comparative results for the four approaches

is shown in Fig. 20. As with the integrator problem, NLF per-formed slightly better than LF. HA achieved a success count of5 and 4 for 17 and 11 cases, respectively. Powered by the graphmutation algorithm, HCGM2 achieved all the 5 objectives for 26cases. We found it difficult to manually design the LNA for theremaining four cases because these specifications demanded in-tegrated inductors that were better than could be provided by thechosen technology. HCGM1, though better than LF, performedworse than HCGM2.

VI. CONCLUSION

The optimization of analog and RF circuits belongs to a classof problems with multiple, nonlinear, and conflicting objectiveshaving strong nonlinear interdependence. Sequential stochasticrefinement methods like GAs are used frequently to solve suchproblems. The formulation of the single-objective cost functionfrom multiple objectives has deep implications on the qualityof the final solution obtained. This work presented a novelapproach for the design of cost functions for such problems.The problem was divided into two phases, viz., objectivefunction normalization and dynamic weights adjustment inthe composite cost function. A method for classification ofobjectives was proposed and a nonlinear normalization functionwas shown to be superior to the traditional linear normaliza-tion function. A new method for systematically incorporatingexperience-based knowledge about the problem-domain waspresented and a novel hierarchical cost graph mutation-basedstrategy for dynamic adjustment of the weights of the differentobjectives was proposed. A CDS offset-compensated analogswitched-capacitor integrator and RF LNA circuits were chosenas case studies. Tight specifications of the circuits were cre-ated as test-benches. The proposed techniques were shown toproduce acceptable solutions in most cases, where traditionalapproaches failed. Exploration of techniques for producinggood quality design decision surfaces using multiobjectiveoptimization methods may be a worthwhile direction for futureefforts.

ACKNOWLEDGMENT

The authors would like to thank the reviewers for their valu-able comments, which helped in improving this paper.

REFERENCES

[1] H. Y. Koh, C. H. Sequin, and P. R. Gray, “OPASYN: A compiler forMOS operational amplifiers,” IEEE Trans. Comput.-Aided Des., vol. 9,pp. 113–125, Feb. 1990.

[2] P. C. Maulik, L. R. Carley, and D. J. Allstot, “Sizing of cell-levelanalog circuits using constrained optimization techniques,” IEEE J.Solid-State Circuits, vol. 28, no. 3, pp. 233–241, Mar. 1993.

[3] W. Nye, D. C. Riley, and A. Sangiovanni-Vincentelli, “DELIGHT.SPICE: An optimization-based system for the design of integrated cir-cuits,” IEEE Trans. Comput.-Aided Des., vol. 7, no. 4, pp. 501–518,Apr. 1988.

[4] E. S. Ochotta, R. A. Rutenbar, and L. R. Carley, “Synthesis of high-performance analog circuits in ASTRX/OBLX,” IEEE Trans. Comput.-Aided Des., vol. 15, no. 3, pp. 273–294, Mar. 1996.

[5] L. T. Pillage and R. A. Rohrer, “Asymptotic waveform evaluation fortiming analysis,” IEEE Trans. Comput.-Aided Des., vol. 9, no. 4, pp.352–366, Apr. 1990.

[6] M. Krasnicki, R. Phelps, R. A. Rutenbar, and L. R. Carley,“MAELSTROM: Efficient simulation-based synthesis for customanalog cells,” in Proc. Des. Autom. Conf., New Orleans, LA, 1999,pp. 945–950.

[7] R. Phelps, M. Krasnicki, R. A. Rutenbar, L. R. Carley, and J. R.Hellums, “ANACONDA: Robust synthesis of analog circuits viastochastic pattern search,” IEEE Trans. Comput.-Aided Des., vol. 19,pp. 703–717, Jun. 2000.

[8] K. Deb, Multi-Objective Optimization Using Evolutionary Algo-rithms. New York: Wiley, 2003.

[9] A. Doboli, A. N. Aldana, N. Dhanwada, S. Ganesan, and R. Vemuri,“Behavioral synthesis of analog systems using two-layered designspace exploration,” in Proc. Des. Autom. Conf., New Orleans, LA,1999, pp. 951–957.

[10] F. D. Bernardinis and A. S. Vincentelli, “A methodology for system-level analog design space exploration,” in Proc. Des. Autom. Test inEurope, 2004, pp. 676–677.

[11] J. H. Holland, Adaptation in Natural and Artificial Systems: An Intro-ductory Analysis with Applications to Biology, Control, and ArtificialIntelligence, 2nd ed. Cambridge, MA: The MIT Press, 1992.

[12] D. Smedt and G. Gielen, “WATSON: Design space boundary explo-ration and model generation for analog and RFIC design,” IEEE Trans.Comput.-Aided Des., vol. 22, no. 2, pp. 213–224, Feb. 2003.

[13] A. Torralba, J. Chavez, and L. Franquelo, “FASY: A fuzzy-logic basedtool for analog synthesis,” IEEE Trans. Comput.-Aided Des., vol. 15,no. 7, pp. 705–715, Jul. 1996.

[14] J. R. Koza, L. W. Jones, M. A. Keane, M. J. Streeter, and S. H.Al-Sakran, “Toward automated design of industrial-strength analogcircuits by means of genetic programming,” Genetic ProgrammingTheory and Practice II, pp. 121–142, 2004.

[15] M. Yoshikawa, H. Terai, T. Fujita, and H. Yamuchi, “A novel timing-driven placement using genetic algorithms,” in Proc. South-West Symp.Mixed-Signal Des., 2003, pp. 237–242.

[16] G. Alpaydin, S. Balkir, and G. Düdar, “An evolutionary approach toautomatic synthesis of high-performance analog integrated circuits,”IEEE Trans. Evol. Comput., vol. 7, no. 3, pp. 240–252, Jun. 2003.

[17] K. Lam and M. A. Copeland, “Noise-cancelling switched-capac-itor sampling technique,” Electron. Lett., vol. 19, pp. 810–811, Sep.1983.

[18] D. Smedt and G. Gielen, “Holmes: Capturing the yield optimized de-sign space boundaries of analog and RF integrated circuits,” in Proc.Des. Autom. Test in Europe, 2003, pp. 10-256–10-263.

[19] A. L. Coban, “A low-voltage high resolution audio delta sigma mod-ulator,” Ph.D. dissertation, Georgia Institute of Technology, Atlanta,GA, May 1998.

[20] K. Deb, A. Pratap, S. Agarwal, and T. Meyarivan, “A fast and elitistmultiobjective genetic algorithm: NSGA-II,” IEEE Trans. Evol.Comput., vol. 6, no. 2, pp. 182–197, Apr. 2002.

[21] M. S. P. Vancorenland, C. De Ranter, and G. Gielen, “Optimal RF de-sign using smart evolutionary algorithms,” in Proc. Des. Autom. Conf.,2000, pp. 7–10.

[22] T. H. Lee, The Design of CMOS Radio-Frequency Integrated Cir-cuits. Cambridge, U.K.: Cambridge Univ. Press, 1998.

[23] R. A. M. Niknejad, “Analysis, design, and optimization of spiral induc-tors and transformers for Si RF ICs,” IEEE J. Solid-State Circuits, vol.33, pp. 1470–1481, Oct. 1998.

[24] A. M. Niknejad, “ASITIC: Analysis and simulation of spiral induc-tors and transformers for ICs,” Free tool. [Online]. Available: http://rfic.eecs.berkeley.edu/ niknejad/asitic.htm


Abhishek Somani received the B.Tech. degreein electrical engineering from the Indian Instituteof Technology (IIT), Kharagpur, in 2001. He iscurrently working on the Ph.D. degree at the De-partment of Computer Science and Engineering,IIT. His doctoral thesis is titled “New Methodsin Optimization and Design Space Exploration ofAnalog Circuits.”

He is currently working with Cadence Design Sys-tems, Noida, India. His areas of interest include CADfor VLSI, analog circuits, and algorithm design.

Mr. Somani has received the Jagadish Bose National Science Talent Searchaward and scholarship.

Partha P. Chakrabarti (M’89–SM’04) received theB.Tech. and Ph.D. degrees in computer science andengineering from the Indian Institute of Technology(IIT), Kharagpur, in 1985 and 1988, respectively.

He joined the Department of Computer Scienceand Engineering, IIT, as a faculty member in 1988and is currently a Professor of the Computer Scienceand Engineering Department. He currently holds theposition of Dean (Sponsored Research and IndustrialConsultancy). His areas of interest include artificialintelligence, CAD for VLSI, and algorithm design.

Dr. Chakrabarti has received the President of India Gold Medal, the Swarna-jayanti Fellowship, and the Shanti Swarup Bhatnagar Prize from the Govern-ment of India, for his contributions.

Amit Patra received the B.Tech., M.Tech., and Ph.D.degrees from the Indian Institute of Technology (IIT),Kharagpur in 1984, 1986, and 1990, respectively.

During 1992–1993, he visited the Ruhr-Univer-sity, Bochum, Germany, as a Postdoctoral Fellowof the Alexander von Humboldt Foundation. Hejoined the Department of Electrical Engineering,IIT, in 1987 as a faculty member, and is currently aProfessor. He is also the Professor-In-Charge of theAdvanced VLSI Design Laboratory, IIT. His currentresearch interests include design and testing of VLSI

circuits, power management circuits, analog CAD, and fault tolerant control ofindustrial processes.

Dr. Patra received the Young Engineer Award of the Indian National Academyof Engineering in 1996 and the Young Teachers’ Career Award from the AllIndia Council for Technical Education in 1995.

本文献由“学霸图书馆-文献云下载”收集自网络，仅供学习交流使用。

学霸图书馆（www.xuebalib.com）是一个“整合众多图书馆数据库资源，

提供一站式文献检索和下载服务”的24 小时在线不限IP

图书馆。

图书馆致力于便利、促进学习与科研，提供最强文献下载服务。

图书馆导航：

图书馆首页文献云下载图书馆入口外文数据库大全疑难文献辅助工具

http://www.xuebalib.com/cloud/

http://www.xuebalib.com/

http://www.xuebalib.com/cloud/


http://www.xuebalib.com/vip.html

http://www.xuebalib.com/db.php

http://www.xuebalib.com/zixun/2014-08-15/44.html


Documents

An Evolutionary Algorithm-Based Approach to Automated