AN5161, Powering an i.MX 6SX-based system using the PF3000 PMIC - Application Note© 2016 NXP B.V.
1 Introduction The PF3000 is a highly integrated Power Management IC ideally suited to power NXP's i.MX 6SX, i.MX 6SL, i.MX 6S, i.MX 6DL, i.MX 6UL and the i.MX 7 series of applications processors. This Application Note discusses the power tree configuration for powering an i.MX 6SX based system using the PF3000.
NXP analog ICs are manufactured using the SMARTMOS process, a combinational BiCMOS manufacturing flow that integrates precision analog, power functions and dense CMOS logic together on a single cost-effective die.
Contents
3 i.MX 6SX power management using the PF3000 . . . . . . . . 3
4 PF3000 power input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
5 PF3000 layout guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
6 PF3000 software support . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
7 Schematics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
8 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
PF3000 voltage regulators
Powering an i.MX 6SX-based system using the PF3000 PMIC, Rev. 1.0 NXP Semiconductors 2
2 PF3000 voltage regulators Table 1 shows a summary of the voltage regulators in the PF3000. Output voltage and startup sequence of the regulators is programmed into the PMIC through One Time Programmable (OTP) memory. For more details, refer to the product datasheet.
Table 1. PF3000 voltage regulators
Regulator Output voltage range Load current rating
SW1A 0.7 V to 1.425 V 1.8 V 3.3 V
1000 mA
SW1B 0.7 V to 1.475 V 1750 mA
SW2 1.5 V to 1.85 V 2.5 V to 3.3 V
1250 mA
VSNVS 3.0 V 1.0 mA
VLDO1 1.8 V to 3.3 V 100 mA
VLDO2 0.8 V to 1.55 V 250 mA
VLDO3 1.8 V to 3.3 V 100 mA
VLDO4 1.8 V to 3.3 V 350 mA
VCC_SD 1.8 V to 1.85 V 2.85 V to 3.3 V
100 mA
VREFDDR VINREFDDR/2 10 mA
i.MX 6SX power management using the PF3000
Powering an i.MX 6SX-based system using the PF3000 PMIC, Rev. 1.0 NXP Semiconductors 3
3 i.MX 6SX power management using the PF3000 The i.MX 6SX processor features NXP's advanced implementation of the a single ARM® Cortex®-A9 MPCore™ multicore processor, which operates at speeds up to 1 GHz. Table 2 shows how PF3000 can be used to power an i.MX 6SX based system. This include the voltage rails required by the processor as well as memory and common peripherals. As a programming PMIC, the PF3000 can be used in a number of ways to power the i.MX 6SX. Table 2 lists one of the many possibilities. The power tree can be optimized based on specific application requirements.
Table 2. PF3000 + i.MX 6SX power tree
Regulator Voltage Sequence Load domain
SW1A 1.375 V 2 VDDCORE
SW1B 1.375 V 2 VDDSOC
SW2 3.3 V 4 NVCC_SD4, NVCC_NAND, NVCC_GPIO, NVCC_KEY, NVCC_QSPI, NVCC_LCD1, NVCC_HIGH (SD3), LCD Connector, CAN, Sensors, SD3 (SD3.0 Card), SD4 (SD Card-boot), QSPI Flash
SW3 1.35 V 3 DDR3L
SWBST 5.0 V Off N/A
VSNVS 3.0 V 0 VDD_SNVS_IN
VLDO1 3.3 V Off N/A
VLDO2 1.5 V Off Camera Connector, MPCIE
VLDO3 2.5 V Off Camera Connector, Audio Codec
VLDO4 1.8 V 4 NVCC_LOW(SD3), NVCC_CSI
VCC_SD 3.3 V 5 VDD_AFE_3P3, VDDA_ADC_3P3 (12-bit ADC), ADC_VREFH (12-bit ADC)
V33 3.0 V 1 VDD_HIGH_IN,VDD_HIGH_CAP
VREFDDR 0.625 V 3 DRAM_VREF
PF3000 power input
Powering an i.MX 6SX-based system using the PF3000 PMIC, Rev. 1.0 NXP Semiconductors 4
4 PF3000 power input PF3000 input voltage range is 2.8 V to 4.5 V or 3.7 V to 5.5 V. 2.8 V to 4.5 V when VIN is used at input. 3.7 V to 5.5 V when VPWR is used as input.
For non-battery operated applications, when the input supply voltage exceeds 4.5 V, the front-end LDO can be activated by populating the external PMOS pass FET Q16 in Figure 1 and connecting the VPWR pin to the main supply. In this case, the LDO control block self-starts with a local bandgap reference.
Figure 1. PF3000 5.0 V input circuit
LDOG GATE SOURCE
PF3000 layout guidelines
Powering an i.MX 6SX-based system using the PF3000 PMIC, Rev. 1.0 NXP Semiconductors 5
In a battery operated application, BC3770 input is connected directly to the adapter. BC3770 is a fully programmable switching charger with dual-path output. One output path connect to PF3000 VIN as the system power supply. The other output path is for single-cell Li-Ion and Li-Polymer battery. (See Figure 2.) In this case, the PMOS pass FET Q16 should not be populated and VPWR pin should be grounded externally.
Figure 2. BC3770 lithium charger
5 PF3000 layout guidelines The Application Note AN5094 provides best practices for the layout of the PF3000 device on printed circuit boards. To download AN5094, click on the following link: http://www.nxp.com/files/analog/doc/app_note/AN5094.pdf
6 PF3000 software support NXP offers PF3000 code support for a custom i.MX 6 board at the NXP Community site https://community.nxp.com/docs/DOC-105064).
I2C ADDR: 0x92
Main PWR LED
7 Schematics
Figure 3. Schematic part 1
P o w e r T r e e D i a g r a m
L e g e n d :
0 - A l w a y s O n
1 - F i r s t s t a r t - u p s u p p l y r a i l
N o t e :
( * 1 ) - S W 2 o f P F 3 0 0 0 c a n b e c h a n g e d t o 3 . 1 V
a f t e r b o o t - u p ( b y S W ) t o l o w e r p o w e r c o n s u m p t i o n
( * 2 ) - N o S W 1 C a n d S W 4 i n P F 3 0 0 0 .
Schematics
Powering an i.MX 6SX-based system using the PF3000 PMIC, Rev. 1.0 NXP Semiconductors 7
Figure 4. Schematic part 2
O v e r V o l t a g e
P r o t e c t i o n
N o t e :
O v e r - v o l t a g e p r o t e c t i o n i s d e s i g n e d
t o p r o t e c t u p t o + 2 0 V .
M a i n P W R S w i t c h
L i t h i u m C h a r g e r
L i t h i u m s i n g l e c e l l
b a t t e r y c o n n e c t o r s
M a i n P W R
L E D
N o t e :
I f s o l d e r P F 3 0 0 0 5 V i n p u t c i r c u i t i n p a g e 4
f o r , t h e n t h i s p a r t i s n o n e e d e d .
W AL
L_ O
V_ CT
L W
AL L_
O V_
BA SE
W AL
L_ O
VP _L
Schematics
Powering an i.MX 6SX-based system using the PF3000 PMIC, Rev. 1.0 NXP Semiconductors 8
Figure 5. Schematic part 3
P M I C - O N
L E D
S W 2
S W 3
L D O d e c o u p l e s a r e 4 . 7 u F
f o r B O M c o n s o l i d a t i o n .
S W N o t e :
D e f a u l t p o w e r - u p v o l t a g e o f S W 2 _ 3 V 3 i s 3 . 3 V .
N e e d t o c h a n g e i t t o 3 . 1 V a f t e r b o o t - u p
t o l o w e r p o w e r c o n s u m p t i o n .
M a x o u t p u t c u r r e n t f r o m
N C P 6 9 2 i s 1 A
L D O o u t p u t s 1 . 2 V o r a d d i n g a s c h o t t k y d i o d e
i n s e r i e s o n V G E N 2 _ 1 V 5 r a i l t o g e n e r a t e 1 . 2 V
P F 3 0 0 0 5 V i n p u t c i r c u i t
T P S 7 6 9 1 2 1 . 2 V / 0 . 1 A
N o t e :
T h i s b l o c k i s u s e d t o c o m p e n s a t e t h e w e a k
o u t p u t d r i v e o f P M I C _ O N _ R E Q i n T O 1 . 0 .
T O 1 . 2 o r l a t e r d o e s n o t n e e d t h i s .
P1 V3
75 _V
D D
AR M
_S W
Schematics
Powering an i.MX 6SX-based system using the PF3000 PMIC, Rev. 1.0 NXP Semiconductors 9
Figure 6. Schematic part 4
VD D
_H IG
H _I
L D O _ P C I E
L D O _ 2 P 5
L D O _ 1 P 1
L D O _ S N V S
U 1A
PC IM
X6 X4
EV M
10 AB
VS S1
A 1
VS S2
A 6
VS S3
A 23
VS S4
Schematics
Powering an i.MX 6SX-based system using the PF3000 PMIC, Rev. 1.0 NXP Semiconductors 10
Figure 7. Schematic part 5
Pin G15 & G16 share the same de-coupling capacitor on Pin G14.
Pin G11 & G12 share the same de-coupling capacitor.
Note: When U40 is populated, need to populate these four termination resistors (HCSL-to-LVDS) for PCIe reference clock to i.MX6SX.
RTC_XTALO RTC_XTALI
XTALI XTALO
JTAG_TRST_B <17> JTAG_MOD <17>
SD3_CLK <9> SD3_CMD <9>
SD3_DATA0 <9> SD3_DATA1 <9> SD3_DATA2 <9> SD3_DATA3 <9> SD3_DATA4 <9> SD3_DATA5 <9> SD3_DATA6 <9> SD3_DATA7 <9>
SD4_CLK <9> SD4_CMD <9> SD4_RST_B <9>
SD4_DATA0 <9> SD4_DATA1 <9> SD4_DATA2 <9> SD4_DATA3 <9> SD4_DATA4 <9,13> SD4_DATA5 <9,13> SD4_DATA6 <9> SD4_DATA7 <9>
QSPI2A_DATA2 <10> QSPI2A_DATA3 <10>
QSPI2A_SS0_B <10> QSPI2A_SCLK <10> QSPI2B_DATA3 <10> QSPI2B_DATA2 <10> QSPI2A_DATA0 <10> QSPI2A_DATA1 <10>
QSPI2B_DATA1 <10> QSPI2B_DATA0 <10> QSPI2B_SCLK <10> QSPI2B_SS0_B <10>
QSPI1A_SS1_B <10,14>
QSPI1A_DQS <10,14>
QSPI1B_SS1_B <10,14>
QSPI1B_DQS <10,14>
I2C2_SCL <22> I2C2_SDA <22>
SD3_CMD W13SD3_CLK Y12
ADC2_IN0 <18> ADC2_IN1 <18> ADC2_IN2 <18> ADC2_IN3 <18>
C306 0.1uF
0402_cc 25V
Schematics
Powering an i.MX 6SX-based system using the PF3000 PMIC, Rev. 1.0 NXP Semiconductors 11
Figure 8. Schematic part 6
P i n R 1 8 & T 1 8 s h a r e t h e s a m e d e - c o u p l i n g c a p a c i t o r .
N o t e :
T h i s b l o c k i s r e s e r v e d f o r t e s t i n g
e x t e r n a l E N E T r e f e r e n c e c l o c k t o i . M X 6 S X
O SC
_3 2K
EN ET
_R EF
_C LK
_I N
PE RI
_3 V3
G N
Schematics
Powering an i.MX 6SX-based system using the PF3000 PMIC, Rev. 1.0 NXP Semiconductors 12
Figure 9. Schematic part 7
N ot
e: CL
K te
rm in
at io
n: P
la ce
R 54
c lo
se to
U 2
N ot
e: Te
st p
oi nt
s fo
Schematics
Powering an i.MX 6SX-based system using the PF3000 PMIC, Rev. 1.0 NXP Semiconductors 13
Figure 10. Schematic part 8
5 5
4 4
3 3
2 2
t S D
S D 3 - F o r P r i m a r y E x t e r n a l C a r d
S l o t ( S D 3 . 0 )
BO O
T SD
C A
RD
S D 4 - F o r B o o t C o d e
Fo r W
iF i
S D 2 - f o r W i F i a n d S D A c c e s s o r i e s
N o t e :
i ) P l a c e n e x t t o J 4 .
i i ) R e m o v e R 8 8 a n d R 8 9 w h e n p o p u l a t e U 4 .
e M M C 4 . 5 F o o t p r i n t
P o w e r s w i t c h c i r c u i t f o r E x t e r n a l S D C a r d
( S D 3 )
R 5 1 i s t h e V C C _ S D 3 d i s c h a r g e p a t h
w h e n Q 1 2 i s o f f
E i t h e r S D C a r d o n S D 4 o r
e M M C o n S D 4 i s u s e d a s b o o t d e v i c e
R e m o v e R 5 1 w h e n R 2 5 i s p o p u l a t e d .
T h e s e a r e r e s e r v e d f o r e M M C 5 . 0 p a r t .
R 4 6 4 i s r e s e r v e d f o r
t e s t i n g o n l y - t u r n i n g
o n Q 1 1 b y d e f a u l t .
SD 3_
C O
N _C
Schematics
Powering an i.MX 6SX-based system using the PF3000 PMIC, Rev. 1.0 NXP Semiconductors 14
Figure 11. Schematic part 9
2 x 2 5 6 M b i t Q S P I F L A S H
S P I E E P R O M F O O T P R I N T
T h e s e f o u r s i g n a l s a r e r o u t e d t o C A N t r a n s c e i v e r s
a l s o . F o r S P I E E P R O M t e s t , t h e 0 - o h m j u m p e r s
o n C A N t r a n s c e i v e r s i d e a r e r e q u i r e d t o b e
r e m o v e d .
EC SP
I5 _M
IS O
EC SP
I5 _M
O SI
EC SP
I5 _S
C LK
EC SP
I5 _S
P
Schematics
Powering an i.MX 6SX-based system using the PF3000 PMIC, Rev. 1.0 NXP Semiconductors 15
Figure 12. Schematic part 10
M i c r o U S B - A B R e c e p t a c l e
U S B H o s t P o r t
U S B B o o t / H o s t / D e v i c e P o r t
U S B 5 V C o n t r o l
N e e d t o u s e M I C 5 2 2 5 f o r
c e r a m i c o u t p u t c a p .
M a x o u t p u t c u r r e n t f r o m
M I C 5 2 2 5 i s 1 5 0 m A
V o = 1 . 2 4 V x ( 1 + R a / R b )
R b
R a
T h i s b l o c k i s r e s e r v e d f o r U S B O T G c e r t i f i c a t i o n t e s t .
U SB
H O
ST _D
P
Schematics
Powering an i.MX 6SX-based system using the PF3000 PMIC, Rev. 1.0 NXP Semiconductors 16
Figure 13. Schematic part 11
L a y o u t n o t e :
C 6 6 & C 6 7 c l o s e t o H P J a c k , f o r E M I p u r p o s e
S p e a k e r
O u t
L a y o u t n o t e :
Z o b e l N e t w o r k s ( C 6 4 , C 6 5 , R 7 7 , R 7 8 ) c l o s e t o W M 8 9 6 2
A u d i o C O D E C
L a y o u t n o t e :
W i d e n t h e t r a c e S P K V D D
M a x ~ 0 . 6 A
H e a d P h o n e
o r W M - 6 3 P R
o r C M C - 2 2 4 2 P B L - A
l a y o u t n o t e :
C 7 4 s h o u l d b e a s c l o s e t o t h e W M 8 9 6 2 a s p o s s i b l e .
S P K V D D
H PO
U TR
IN 3R
H PO
U TL
Schematics
Powering an i.MX 6SX-based system using the PF3000 PMIC, Rev. 1.0 NXP Semiconductors 17
Figure 14. Schematic part 12
L V D S
T h e c a m e r a c o n n e c t o r ( J 1 3 ) a n d t h e L C D E x p a n s i o n
c o n n e c t o r ( J 1 1 ) s h a r e t h e s a m e s i g n a l s a n d
C A N N O T b e u s e d a t t h e s a m e t i m e .
O n e o f t h e s e t w o p e r i p h e r a l s M U S T B E R E M O V E D
w h e n a d e v e l o p e r w i s h e s t o u s e t h e o t h e r .
L a y o u t : R o u t e 1 0 0 o h m D I F F
5 1 E X P _ C S I _ D 0
5 1 E X P _ C S I _ D 1
5 1 E X P _ C S I _ D 2
5 1 E X P _ C S I _ D 3
5 1 E X P _ C S I _ D 4
5 1 E X P _ C S I _ D 5
5 1 E X P _ C S I _ D 6
5 1 E X P _ C S I _ D 7
5 1 E X P _ C S I _ D 8
5 1 E X P _ C S I _ D 9
5 1 E X P _ C S I _ M C L K
5 1 E X P _ C S I _ P I X C L K
5 1 E X P _ C S I _ H S Y N C
5 1 E X P _ C S I _ V S Y N C
5 1 E X P _ G P I O
5 1 E X P _ C A M _ P W D N
5 1 E X P _ R E S E T
5 1 E X P _ S P D I F _ O U T
L C D E x p a n s i o n P o r t
C S I _ P I X C L K
C S I _ V S Y N C
C S I _ H S Y N C
C S I _ D 9
C S I _ D 8
C S I _ D 7
C S I _ D 6
C S I _ D 5
C S I _ D 4
C S I _ D 3
C S I _ D 2
C S I _ D 1
C S I _ D 0
C M O S _ D V D D
C M O S _ M C L K
C a m e r a E x p a n s i o n C o n n e c t o r
U s e O m n i v i s i o n O V 5 6 4 0 / 5 6 4 2 5 M P i x e l
S e n s o r w i t h t h i s c o n n e c t o r ( n o t
i n c l u d e d )
D O V D D
5 1 E X P _ U A R T 2 _ T X
5 1 E X P _ U A R T 2 _ R X
H D M I _ S P D I F _ O U T
5 1 E X P _ C S I _ S D A
5 1 E X P _ C S I _ S C L
N o t e : P i n # 3 3 i s N C o n M C I M X 2 8 L C D
C S I _ P W D N
C S I _ R S T _ B
L V D S _ T X 3 _ P
L V D S _ T X 3 _ N
N o t e :
R e m o v e R 8 8 a n d R 8 9 w h e n p o p u l a t e e M M C ( U 4 )
LV D
S_ VL
45
46
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39
R2 41
04 02
_c c
25 V
J1 2
CO N
3 0
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
S1 S2
Schematics
Powering an i.MX 6SX-based system using the PF3000 PMIC, Rev. 1.0 NXP Semiconductors 18
Figure 15. Schematic part 13
C A N
T h e s e f o u r s i g n a l s a r e r o u t e d t o S P I E E P R O M
a l s o . F o r C A N t e s t , t h e 0 - o h m j u m p e r s
o n S P I E E P R O M s i d e a r e r e q u i r e d t o b e
r e m o v e d .
U P P E R P O R T
L O W E R P O R T
C A
N 1L
C A
N 1H
C A
N 1_
10 22
R3 56
20 21
C 34
7 1u
Schematics
Powering an i.MX 6SX-based system using the PF3000 PMIC, Rev. 1.0 NXP Semiconductors 19
Figure 16. Schematic part 14
CG ND
i s
a sm
al l
is ol
at ed
G ND
pl an
e wh
ic h
sh ou
ld e
xt en
d un
de r
RJ 45
co nn
ec to
7
Schematics
Powering an i.MX 6SX-based system using the PF3000 PMIC, Rev. 1.0 NXP Semiconductors 20
Figure 17. Schematic part 15
L a y o u t N o t e :
i ) P l a c e t e r m i n a t i o n r e s i s t o r s , R 1 7 9 , R 1 8 0 , R 4 4 2 & R 4 4 3 ,
a s c l o s e t o t h e m P C I e c o n n e c t o r a s p o s s i b l e .
i i ) P l a c e C 1 4 9 , C 1 5 0 , C 1 5 1 a n d C 1 5 2 c l o s e t o m P C I e c o n n e c t o r .
i i i ) P l a c e R 4 5 4 , R 4 5 5 c l o s e t o C 1 4 9 a n d C 1 5 0 .
i v ) P l a c e C 3 6 8 , C 3 7 7 c l o s e t o C 1 4 9 a n d C 1 5 0 .
L a y o u t : R o u t e 8 5 o h m D I F F f o r P C I E _ T X / R X
M i n i - P C I E
V o = 0 . 6 V x ( 1 + R a / R b )
R a R b
S t e p - d o w n D C D C f o r
m P C I e + 3 . 3 V
P l a c e C 1 5 5 c l o s e t o
V C C A p i n ( # 8 )
M a x o u t p u t c u r r e n t f r o m V G E N 2 _ 1 V 5
i s 2 5 0 m A
M a x o u t p u t c u r r e n t f r o m
N C P 1 5 9 3 A i s 3 A
N o t e :
A l l c o m p o n e n t s i n t h i s b l o c k a r e n e e d e d
t o b e p o p u l a t e d f o r P C I e G E N 2 c l o c k j i t t e r t e s t .
W h e n U 4 0 i s p o p u l a t e d -
i ) R e m o v e R 4 4 2 , R 4 4 3 , R 1 7 9 , R 1 8 0 , C 1 4 9 , C 1 5 0 ,
a n d u s e U 4 0 t o o u t p u t P C I e r e f c l k t o
i . M X 6 S X a n d m P C I e c o n n e c t o r .
i i ) M o u n t R 4 5 9 - R 4 6 2 o n i . M X 6 S X s i d e f o r t e r m i n a t i o n .
L a y o u t : R o u t e 1 0 0 o h m D I F F f o r C L K 1 _ P / N
PC IE
_C RE
FC LK
Schematics
Powering an i.MX 6SX-based system using the PF3000 PMIC, Rev. 1.0 NXP Semiconductors 21
Figure 18. Schematic part 16
D e b u g U A R T t o U S B C o n v e r t e r
L a y o u t n o t e :
9 0 o h m d i f f p a i r s
J T A G _ P W R
J T A G
D e b u g U A R T f o r A 9
D e b u g U A R T f o r M 4
U AR
T1 _R
X2 32
U AR
T1 _T
X2 32
D EB
U G
_S H
L_ G
N D
D EB
U G
_U SB
_5 V
JT AG
_D AC
Schematics
Powering an i.MX 6SX-based system using the PF3000 PMIC, Rev. 1.0 NXP Semiconductors 22
Figure 19. Schematic part 17
3 - A X I S A C C
A m b i e n t L i g h t S e n s o r
D i g i t a l e C o m p a s s
1 2 - b i t A D C C o n n e c t o r
A l l i n t e r r u p t s a r e r o u t e d t o
I N T 2 b y d e f a u l t .
( A c t i v e H i g h )
( A c t i v e H i g h )
( A c t i v e L o w )
S W N o t e :
E n a b l e b u i l t - i n P u l l - u p f o r n o r m a l o p e r a t i o n ;
D i s a b l e b u i l t - i n P u l l - u p d u r i n g D S M .
AC CL
_A 0
AC C_
3V 3
AL S_
RE XT
AL S_
3V 3
AC CL
_B YP
CO M
P_ 3V
R2 21
49 9.
0K 1%
Schematics
Powering an i.MX 6SX-based system using the PF3000 PMIC, Rev. 1.0 NXP Semiconductors 23
Figure 20. Schematic part 18
B L U E T O O T H C A B L E C O N N E C T O R
N O T E :
P i n 1 o f t h e c a b l e c o n n e c t o r o n
t h e S m a r t D e v i c e b o a r d
i s o p p o s i t e P i n 2 0 o f t h e W I F I / B T
m o d u l e . F o r t h e F F C t o l i e f l a t , t h e
p i n o r d e r n u m b e r n e e d s t o b e
r e v e r s e d o n t h e s c h e m a t i c s .
C a b l e P i n 1
C a b l e P i n 2 0
O u t p u t f r o m B T
I n p u t t o B T
I n p u t t o B T
O u t p u t f r o m B T
B T _ W A K E U P i s n o t u s e d i n c u r r e n t S W d r i v e r .
SI LE
X_ BT
_D IS
A BL
E SI
LE X_
BT _W
A KE
U P
BT _U
A RT
_R XD
BT _U
A RT
_T XD
BT _U
A RT
0
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
TP 11
3 R3
27 0
D N
Schematics
Powering an i.MX 6SX-based system using the PF3000 PMIC, Rev. 1.0 NXP Semiconductors 24
Figure 21. Schematic part 19
B u t t o n s
O n / O f f
O N
/O FF
FU N
N o t e :
T h i s b l o c k i s a d d e d i n R e v . C f o r t w o p u r p o s e s -
i ) F i x t h e S W r e b o o t i s s u e b y t o g l i n g W D O G _ B
t o i s s u e p o w e r r e s e t ( E N G R 0 0 3 3 8 0 6 7 ) .
i i ) D e l a y t h e P M I C _ P W R O N > 5 0 0 m s f o r t h e
1 s t - t i m e p o w e r - o n ( V S N V S _ 3 V 0 i s f i r s t a p p l i e d ) ,
t o e n s u r e 3 2 . 7 6 8 k H z x t a l o s c o u t p u t i s s t a b l e .
P O R R e s e t
S e e N o t e ( i i ) b e l o w
S e e N o t e ( i ) b e l o w
T h i s R C a d d s ~ 4 0 0 m s o n t o p o f t h e d e f a u l t
d e l a y s e t i n S T M 6 7 7 9 Y W B 6 F ( 2 1 0 m s ( t y p ) ) .
R E S E T b u t t o n i s f a r a w a y f r o m
r e s e t c i r c u i t . T h i s R C i s u s e d t o
e n h a n c e t h e E M C s u s c e p t i b i l i t y .
RE SE
1K
Schematics
Powering an i.MX 6SX-based system using the PF3000 PMIC, Rev. 1.0 NXP Semiconductors 25
Figure 22. Schematic part 20
N o t e :
i . M X 6 S X r e a d s v a l u e s a p p r o x i m a t e l y
3 0 0 u S t o 1 m S a f t e r r e s e t r e l e a s e d .
B u f f e r s a r e a c t i v e w h i l e u n i t i s i n
r e s e t a n d 1 m s - 1 0 m s a f t e r r e s e t i s
r e l e a s e d .
S W D e s i g n N o t e :
L C D _ D A T A l i n e s s h o u l d b e s e t a t I n p u t w i t h K e e p e r e n a b l e
d u r i n g D e e p S l e e p M o d e .
B O O T M O D E
N o t e :
i ) S W 1 0 s e t t i n g s a r e a l l " 0 " .
i i ) B T _ C F G 1 m u s t b e " 1 " f o r S D 3 o p e r a t i o n o n S D B ,
a s i t h a s a p o w e r s w i t c h c o n t r o l f o r V C C _ S D 3 .
BT _C
FG 24
BT _C
FG 25
BT _C
FG 26
BT _C
FG 27
BT _C
FG 28
BT _C
FG 29
BT _C
FG 30
BT _C
FG 31
BT _C
FG 2
BT _C
FG 3
BT _C
FG 6
BT _C
FG 7
BT _C
FG 4
BT _C
FG 5
BT _C
FG 10
BT _C
FG 11
BT _C
FG 14
BT _C
FG 15
BT _C
FG 12
BT _C
FG 13
BT _C
FG 8
BT _C
FG 9
BT _C
FG 0
BT _C
FG 1
G N
C3 33
0. 1u
C1 75
0. 1u
R3 03
33 K
R3 01
33 K
R2 70
4. 7K
R3 05
33 K
R2 37
R3 64
10 K
D N
Schematics
Powering an i.MX 6SX-based system using the PF3000 PMIC, Rev. 1.0 NXP Semiconductors 26
Figure 23. Schematic part 21
I 2 C 1
N o t e : P u l l - u p r e s i s t o r m u s t b e
s i z e d t o m e e t t h e s i g n a l r i s e
t i m e s a n d a l s o t h e V i l s p e c o f
a l l t h e b u s c o m p o n e n t s .
D u e t o b o a r d l o a d i n g s t h i s
r e s i s t o r w a s r e d u c e d .
V a l i d a t e y o u r d e s i g n , w i t h t h e
l a r g e s t a l l o w a b l e r e s i s t o r t o
r e d u c e c u r r e n t c o n s u m p t i o n .
4 C
2 I
3 C
2 I
2 C
2 I
U s e n o n - c o n d u c t i n g n u t / b o l t s t o m o u n t t h e b o a r d o n a
m e t a l l i c c h a s i s c o n n e c t e d t o e x t e r n a l G N D . N o t d o i n g s o
m a y c a u s e b o a r d d a m a g e d u e t o G N D p o t e n t i a l d i f f e r e n c e .
I M P O R T A N T N O T E :
Bo ar
d M
ou nt
in g
H ol
es fo




C G N D i s c o n n e c t e d t o t h e c o n n e c t o r s e n c l o s u r e o r c h a s s i s .
R e s i s t o r a n d c a p a c i t o r f o o t p r i n t s a r e a r r a n g e d f o r E S D t e s t .
Sy st
em G
N D
a nd
C ha
ss is
G N
D C
on ne
ct io
0
References
Powering an i.MX 6SX-based system using the PF3000 PMIC, Rev. 1.0 NXP Semiconductors 27
8 References Following are URLs where you can obtain information on related NXP products and application solutions:
Support pages Description URL
PF3000 Product Summary Page http://www.nxp.com/webapp/sps/site/prod_summary.jsp?code=PF3000
Revision history
Powering an i.MX 6SX-based system using the PF3000 PMIC, Rev. 1.0 NXP Semiconductors 28
9 Revision history
Revision Date Description
7/2016 • Updated to NXP document form and style
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1 Introduction
4 PF3000 power input
5 PF3000 layout guidelines
6 PF3000 software support