ANALYSIS AND DESIGN OF A THREE-PHASE HIGH POWER FACTOR RECTIFIER BASED ON THE SEPIC CONVERTER OPERATING IN

DISCONTINUOUS CONDUCTION MODE

Gabriel Tibola, Ivo Barbi Federal University of Santa Catarina – UFSC

Power Electronics Institute – INEP Florianópolis, SC, BRAZIL

gabriel@inep.ufsc.br, ivobarbi@inep.ufsc.br

Abstract – The analysis and design of a single-stage three-phase high power factor rectifier, with high-frequency isolation and regulated load voltage are detailed in this paper. The circuit operation is presented, being based on the DC-DC SEPIC converter operating in the discontinuous conduction mode. This operational mode provides to the rectifier a high input power factor feature, with sinusoidal input current, without the use of any current sensors and current control loop. The paper presents the theoretical analysis, design example and experimental results for a 4 kW, 380 V line-to-line input voltage, 400 V output voltage, 0.998 power factor, 40 kHz switching frequency and 4% input current THD laboratory prototype. The rectifier can operate in the step-up or in the step-down modes.

Keywords – AC-DC converter, discontinuous

conduction mode, power factor correction, SEPIC converter, three-phase rectifier.

I. INTRODUCTION

In the last decades, the growing use of UPS and power supplies for several applications has become evident. Their growing demand required the converters power rate rise without a considerable volume increase and, also, due to the international regulamentation imposed restrictions, input current harmonic mitigation is necessary, in order to obtain a resulting high power factor.

In the power factor correction field, the most usual solution for single-phase systems is the DC-DC Boost converter connected to a full-wave diode bridge rectifier, with the proper control, providing sinusoidal input current and regulated output voltage.

In medium and high power applications, single-phase solutions are not suitable, and three-phase topologies are required [1]. Three-phase high power factor rectifiers solutions have been exhaustively discussed in the literature, [2, 3].

Uncontrolled diode rectifiers have a significant importance in several industry applications, providing a multipurpose DC-bus. The major drawback of this structure is the high input current harmonic content. A usual solution to solve this problem consists in associating passive filters to the three-phase full-bridge rectifier, in order to reduce the input current harmonic content. For this situation, the isolation can be achieved using a low-frequency transformer,

which is a robust solution, but adds a considerable cost and volume to the structure.

In [1], different techniques for rectifiers input current harmonic mitigation are proposed, along with a solution that “naturally” provides power factor correction using an 18-pulse isolated rectifier with output voltage regulation.

Another solution for the input current harmonic content reduction is the use of PWM rectifiers, which demands a large quantity of circuitry and presents a considerable complexity on the control, modulation and soft-switching techniques. Many PWM rectifier applications require isolation between the AC source and the load. In most cases, this isolation is accomplished by two stages, the first one being a PWM rectifier – Buck or Boost topology – and the second one being an isolated DC-DC converter cascaded with the first one.

In this paper, a single-stage three-phase rectifier unit is propose, with step-up and step-down characteristic, high-frequency isolation and regulated output voltage, based on the SEPIC DC-DC converter operating in discontinuous conduction mode (DCM), which provides unity power factor, without the use of any current sensor and currents control loop.

II. PROPOSED SYSTEM

The proposed system, depicted in Fig. 1, consists on a three-phase rectifier, composed by three modules based on the SEPIC DC-DC converter operating in the DCM.

Fig. 1. Proposed three-phase rectifier structure power stage and

loop control.

The employment of single-phase modules of DC-DC basic converters to compose a three-phase system is also proposed in [4], in which single-phase full-bridge DC-DC converter

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modules are used. The power factor is close to the unit when it operates on the DCM. In comparison to this structure, the system proposed here presents a lower number of components, the absence of input filters and output inductors in each module. Besides, the input current waveform is sinusoidal when the DCM operation of the SEPIC modules is guaranteed, without the use of any current sensor and currents control loop. Moreover, the converter can operate in the step-up and the step-down modes.

The SEPIC DCM operation is defined by the current discontinuity on the output diode, when the switch is blocked. Therefore, in addition to the two operation stages existing on the SEPIC DC-DC converter operating in the continuous conduction mode (CCM), there is a third stage, before the switch conduction, for which the output diode current is zero, as in Fig. 2.

Fig. 2. SEPIC DC-DC converter main waveforms.

The detailed analysis of the SEPIC DC-DC converter, in both conduction modes, is discussed in [5, 6]. This converter application as a power factor pre-regulator in single-phase systems is well known in literature [7-9], especially in the CCM operation.

Three-phase topologies with analog power stage structures are presented in [10-14]. However, these topologies operate in the CCM and, therefore, the input currents control loop is necessary. In [10], the proposed structure is based on the VIENNA converter [15]. In this case, the isolation between the AC source and the load is not possible and, also, a DC-bus middle-point is required, increasing the structure control complexity.

On the other hand, in [11], the proposed SEPIC converters association is only possible without the connection between the AC input sources.

In the three-phase system, the discontinuous conduction mode is characterized by the same criteria of the DC-DC SEPIC converter. Then, to obtain the converter operation in the DCM, it is necessary to ensure the three output diodes discontinuous currents.

For the expected operation of the proposed system, Fig. 1, the input current waveform of a single phase is depicted in Fig. 3, along with the output inductors and diodes currents waveforms. Considering that the three controlled switches

are commanded at the same time, with the same duty-cycle, there are five operation stages for a switching period, also shown in Fig. 3.

The proposed system equivalent circuit, obtained for each operation stage, results in a linear system of equations which, when solved, gives all the system solutions. The system’s phase interaction can be observed in the input current waveform, Fig. 3, in which, differently from a single-phase converter, Fig. 2, there is a behavior change of this current between the active switch turn-off and following turn-on, evidenced by stages 2 throw 5. The three-phase system was solved, mathematically, considering the complete system, but the important results are the ones related to the average values, detailed in this paper.

Fig. 3. Three-phase converter operation staged analysis.

The resulting average value of output current is given by (1). This expression confirms that the three-phase system is equivalent to three single-phase systems connected in parallel. The parameter Leq results from the parallel association of the input and output inductances.

2 23

4= p

oo s eq

V DI

V f L (1)

The parameterized average output current expression, considering the transformer turns ratio n, is given by (2) and the output voltage is given by (3).

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2

po

o

D VI

V n= = γ (2)

3

4o

o ps eq

RV V D

f L= (3)

Where:

Vp - Peak value of line-to-neutral input voltage. Vo - Output voltage. Ro - Load resistance. fs - Switching frequency. D - Duty cycle.

By the exposed, when connecting a single-phase full-

bridge diode rectifier, the proposed converter is capable of emulating a resistance, due to the load characteristic, Fig. 4. Therefore, the input currents present a sinusoidal waveform, in phase with the AC source input voltages.

Thus, the three-phase converter resulting static gain, as a function of the parameterized output current, is the same as the one from the SEPIC DC-DC converter, Fig. 4.

From the abacus presented in Fig. 4, for a certain design specification, it is possible to obtain the converter critical parameters, which ensure the converter operation in the desired mode. By that, once the system solution is known, current and voltage levels, for the entire system, can be obtained analytically or by simulation, and the proposed converter design can be developed.

Fig. 4. Load characteristic: static gain in function of the

parameterized average output current.

III. DESIGN CRITERIA

The main remarks regarding the converter design are related to the SEPIC capacitors selection. The capacitors must be designed in order to present a low high-frequency voltage ripple but, however, they must also reproduce the rectified input voltages, resulting in the expected structure operation.

Due to the fact that the proposed structure is isolated, the transformers leakage inductances must be minimized, with the purpose of reducing, or even avoiding, the use of dissipative or non-dissipative snubbers/clampers in the semiconductors components.

The input inductors can be allocated on the AC or DC converter side, but there are advantages on applying them to the AC side, since the generator inductances, or even the grid line inductances can be exploited. The maximum ripple input current value is defined by the input inductance, according to (4).

pLi

i s

V DI

L fΔ = (4)

The modulator applied to the presented proposal consists on a conventional comparator with a single-carrier. The usage of phase shifted carrier improves the input current ripple and reduces the output current peak. This last modulator configuration will be studied by the authors in a future work. One of the main advantages achieved with this solution is the output currents peak shifting, reducing the output capacitor current stresses. In Fig. 5, the interleaving phenomenon is exemplified, and the system behavior can be verified.

Fig. 5. Output diodes current waveforms for phase-shifting.

The output capacitor has been designed to meet effective current and hold-up time criteria.

The output voltage control applies a simple controller, which does not demand much effort on its design, since the output voltage behavior for duty-cycle perturbations is first-order defined.

This work presents the results obtained for open-loop operation of the proposed rectifier, in order to evaluate the operating principles. The main simulation results for the proposed circuit has been previously presented in [16].

IV. EXPERIMENTAL RESULTS

In order to confirm the described operating principle of the proposed structure, and validate the mathematical analysis, a converter design example was developed, with the following specifications: rated power – 4 kW; DC-bus voltage – 400 V; switching frequency – 40 kHz; AC input source peak voltage – 311 V; AC source line frequency – 60 Hz.

Due to the system isolation, a clamping circuit has been applied, in order to prevent overvoltage on the switches, resulted from the leakage transformer inductance (Ld) stored energy. The proposed dissipative clamper does not optimize the converter losses, and it has been applied to this work for purpose of the topology experimental validation. Further studies of snubber solutions should be developed.

In Fig. 6, the complete proposed system schematic, including the clamping circuit, is detailed. The components

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specifications (parameter values, current and voltage limits) were obtained using the system specifications, the resulting load characteristic (Fig. 4), the system equations and numerical simulations. The details are presented in Table I.

Fig. 6. Power stage of the proposed three-phase rectifier structure

with the dissipative clamping circuit.

TABLE I Design Parameters

Power Stage Details Project duty cycle (Dmax) 0.523 Duty cycle at rated power (D) 0.459 Input inductances (Li(1-3)) 3.631 mH Output inductances (Lo(1-3)) 97.7 μH SEPIC capacitances (Cs(1-3)) 1.5 μF (320 V / 9 A*) Switch stresses (S(1-3)) 650 V / 40 A (peak) Output diode stresses (D(1-3)) 850 V / 30 A (peak) Bridge diode stresses (Db(1-3)(a-d)) 650 V / 12 A (peak) Output capacitance (Co) 2000 μF (450 V / 15 A*) Clamper capacitances (Cg(1-3)) 500 nF (850 V / 1 A*) Clamper resistances (Rg(1-3)) 10 kΩ Clamper diode stresses (Dg(1-3)) 1000 V / 40 A (peak)

* Values in rms Transformers Design Details

Turns ratio (n) 0.776 Primary number of turns (Np) 24 Secondary number of turns (Ns) 31 Measurement leakage inductance (Ld) 1 μH Gap (lLo) 3 mm

Inductors Design Details Number of turns (NLi) 111 Gap (lLi) 2.75 mm

A laboratory prototype has been built, Fig. 7, in order to

obtain experimental results which validate the theoretical analysis and the simulation results, according to the specifications previously presented. The main results are depicted from Fig. 8 to Fig. 15.

Fig. 7. Picture of the 4kW three-phase SEPIC rectifier prototype.

In Fig. 8 and Fig. 9, the voltage and current waveforms for the switch and output diode, respectively, are shown. The voltage and current levels obtained are in accordance to the expected results. It can be observed that the maximum switch voltage stress is equal to the sum of the line-to-neutral input voltage peak and the transformer primary side reflected output voltage values, requiring the use of switches with high voltage feature.

Fig. 8. Experimental waveforms of the switch: voltage (500V/div)

and current (20A/div).

Fig. 9. Experimental waveforms of the output diode: voltage

(500V/div) and current (20A/div).

In Fig. 10, the transformer primary-side voltage and current waveforms are shown.

Fig. 10. Experimental waveforms of the transformer primary-side :

voltage (500V/div) and current (20A/div).

From the theoretical analysis of this converter, previously presented, to achieve an input current in phase with its corresponding input voltage, each module of the three-phase converter must operate in the DCM. In order to accomplish

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this requirement, the SEPIC capacitors must be able to reproduce the rectified input voltage from its module. Observing the result presented in Fig. 11, this operation is confirmed.

Fig. 11. Experimental waveforms: SEPIC capacitor voltage

(200V/div) and input phase voltage (200V/div).

Moreover, regarding the operational mode, every converter module must operate in the DCM. Therefore, this condition is evaluated by the output diodes current waveforms, Fig. 12, which reaches the zero value before the next switch conduction. The load current, before filtering, is given by the three diodes current adding, as shown in Fig. 12. Note that the diode currents peaks occur at the same time, since the switching of the three modules are accomplished together, resulting in a high output current value.

Fig. 12. Experimental waveforms: switch base-emitter voltage (50V/div), output diodes current sum (20A/div), output diodes

current (20A/div).

The rectifier input currents waveforms are presented in Fig. 13, revealing that the converter operation is appropriate, reproducing sinusoidal input current without the use of any current control loop.

The input voltage and current waveforms, for one phase, can be observed in Fig. 14. It is confirmed that the input current presents a sinusoidal waveform in phase with the input voltage, resulting in a unity power factor of the structure. The effective input line-to-neutral voltage and

current values obtained in this experiment were about 225 V and 6.77 A, respectively.

The input current harmonic spectrum is depicted in Fig. 15. The harmonic component amplitude is represented as a percentage value of the fundamental component. As expected, the structure input power factor is close to the unit, and the total harmonic distortion, considering the first 31 harmonic components, is close to 4%.

Fig. 13. Experimental waveforms: input current for each phase

(5A/div).

Fig. 14. Experimental waveforms: input voltage (200V/div), input

current (10A/div).

Fig. 15. Experimental result: input current harmonic spectrum.

V. CONCLUSION

This paper has presented a three-phase high power factor rectifier topology, based on the SEPIC DC-DC converter operating in the DCM. Theoretical analysis was detailed, summarizing the converter operation. Moreover, a design example was described.

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Finally, the experimental results obtained from the implemented prototype validated the proposed structure analysis, which presented a unit power factor without the use of any current sensors and current control loop. The high voltage and current levels in the switches are considered a major drawback of this structure. Therefore, the cost added to these components can become higher than the saving with no current sensors and control usage, depending on the power value of the application.

ACKNOWLEDGMENT

The authors would like to thanks the CNPq by the financial support.

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