“Why Embedded Die?” - NMI · PCB /SMT manufacturing processes • Large panel size 12 x 18” or 18” x 24” • Woven glass re-enforced PCB laminates • Laser direct imaging

© 2016 Microsemi Corporation. Company Proprietary 1

Power Matters.TM

“Why Embedded Die?” Piers Tremlett Microsemi 22/9/16

Power Matters.TM 2 © 2016 Microsemi Corporation. Company Proprietary

This presentation:

• Outlines our journey to make miniaturised SiP modules

• Compares :

– Embedded Die Technology (EDT)

– With Fan Out Wafer Level Packages (FOWLP)

• Why Microsemi developed an embedded die process

Introduction

Deca

Technologies

StJude


Pacemakers

StJude

Medical


Doctor Patient

Microsemi’s Radio Communication Module

Now an Internet

of Things device

WiFi

3 metre

range

Microsemi RF

module


Miniaturization • Patient comfort, aesthetics and wound healing

Wireless Telemetry • Remote monitoring and communication

Low power • 8 – 10 year life on one battery = fewer operations

Lower cost • Needed to increase sales

• Only 1 in 9 patients in emerging markets requiring pacemakers

receive one

These drivers are very similar to mobile phones!

Market Drivers for “Hidden” medical devices


Access to High Density die packaging

Pacemaker vs mobile phone packaging requirements

• Lower volumes (2000 x smaller, 1M / year)

Off shore subcontractors Don’t want these smaller volumes This limits access to high density packaging eg 2.5D, TSV

Hence Microsemi have created a miniaturised SiP process


Miniaturising Microsemi’s radio module


2009 Miniaturisation Concept

Place the die under the SMT components

Could we embed the die in the PCB?

Our target

Size: 9mm x 20mm


Embedded die packaging from EU SHIFT project

Cross section of a PCB

Early Embedded Die

Embedded die

PCB


Embedded die Radio Module

The result: • 4.5mm x 5.5mm

Our target

Size: 9mm x 20mm


Fan Out Wafer Level Package (FOWLP) and

Embedded Die Technology(EDT) compared


Although single die packages exist (eg GaN Systems)

Microsemi make SiP packages • And SiP also makes a good case study for the virtues of EDT

Existing EDT products

Texas Instruments

TPS82674SIPT

DC/DC step-down power

supply

GaN Systems

GS66506T

650V transistor

Microsemi

ZL70323

RF transceiver


System in a Package (SiP) as a case study

Images courtesy of TI


What SiP is good for

Modularising and simplifying complex products • eg mobile phones, pacemakers

Physical shape is important • Track length / impedance (RF/ high speed digital)

• Miniaturisation

• Power

When you opt for a SiP • Smaller

• BOM component count reduction

• It’s a functional, tested, working block

• Less design support/ easier customer implementation


What package format for a SiP?


Any package can be used if space requirements are low • From PCB with pins

• To BGA packages

Where space is a premium • Fan Out Wafer Level Package

• Embedded die

What package format for a SiP?


Uses Semiconductor & Packaging processes: • Wafer carrier

• Uses moulding compound

• RDL with tracks >2um

• Made with a mask aligner and mask

Additional passive SMT components are not common, limited types.

FOWLP

Source: Yole and

Infineon

The Murata GRU

series' copper

plated

terminations are

designed for

copper via

connection


PCB /SMT manufacturing processes

• Large panel size 12 x 18” or 18” x 24”

• Woven glass re-enforced PCB laminates

• Laser direct imaging (“software” mask)

• Wet etching and plating with

>75um wide tracks (but 15 – 50um thick)

• Optimised for adding SMT components

Embedded die technology


Large master panels

300 radio modules in one panel

Embedded Die Process


Positives • High density tracking

• Slim

• Very suited to high tracking density single die and multi die

Areas for consideration • Moulding compound / silicon die interface is a point of stress

• Limited capability for passive components

Many high volumes suppliers

FOWLP Deca Technologies


Positives • Rugged and reliable

• Capable of more current carrying – thicker tracks

• More adapted to additional SMT components (eg reflowed)

• Easy to provide several layer of die

Areas for consideration • Less track resolution

• Often requires additional processing of the die

– Eg RDL

Suppliers tend to be used to low volume • fast turn around, lower NRE

EDT


SiP : FOWLP and EDT

System in a

Package

Requirement for

functional circuit

block

FOWLP

Semiconductor

and Packaging

industry processes

Dense tracks / pins

Slim

2D only (except PoP)

eg digital?

EDT

PCB and SMT

industry processes

Reflowable SMT components

Higher reliability spec.’s

Higher current / thermals

eg analogue?

RF and power?

Deca

Technologies

Covergence

Eg LDI, large

panels


EDT suppliers

Competencies:

- Functional test

- Die placement

- SMT

PCB industry

Embedded die

COB / SMT

industry

Convergence

Competencies:

- Substrate manufacturing


The design flexibility of EDT


Embedded Die Offers Design Flexibility


Design Flexibility: - Layering

Heat sinking • to solderable Cu pad

Short interconnect • Low parasitics>low inductance

• Favours: power packages, RF

Miniaturisation


No Fixed Tooling

Odd shapes and sizes

• 250mm embedded sensor ring

Any package foot print • Also top components

Low NRE – no fixed tooling eg moulds • Lower costs at lower volumes

Fast turnarounds


Heterogeneous Component Mix

Any termination • SMT

• Edge connectors

• Soldered wires

Any components • Microelectronics

• SMT

• Through hole

From: • single die packages

• many die

• to System in a Package 3 x 3 die

package

Wire bonded embedded die


summary


• Low costs at lower volumes, fast turnaround

• Great design flexibility

– Miniaturisation

– Any size and any shape

– Single die to System in a Package

• Rugged and reliable

• Tends to suit:

– lower track density

– lower pin counts

– analogue circuits eg RF, power

Embedded die offers


Microsemi Corporation (Nasdaq: MSCC) offers a comprehensive portfolio of semiconductor and system solutions for

aerospace & defense, communications, data center and industrial markets. Products include high-performance and

radiation-hardened analog mixed-signal integrated circuits, FPGAs, SoCs and ASICs; power management products;

timing and synchronization devices and precise time solutions, setting the world's standard for time; voice processing

devices; RF solutions; discrete components; enterprise storage and communication solutions, security technologies and

scalable anti-tamper products; Ethernet solutions; Power-over-Ethernet ICs and midspans; as well as custom design

capabilities and services. Microsemi is headquartered in Aliso Viejo, Calif., and has approximately 4,800 employees

globally. Learn more at www.microsemi.com

©2016 Microsemi Corporation. All rights reserved.

Microsemi and the Microsemi logo are registered

trademarks of Microsemi Corporation. All other

trademarks and service marks are the property of

their respective owners.

Microsemi makes no warranty, representation, or guarantee regarding the information contained herein or the suitability of its products and services for

any particular purpose, nor does Microsemi assume any liability whatsoever arising out of the application or use of any product or circuit. The products

sold hereunder and any other products sold by Microsemi have been subject to limited testing and should not be used in conjunction with mission-critical

equipment or applications. Any performance specifications are believed to be reliable but are not verified, and Buyer must conduct and complete all

performance and other testing of the products, alone and together with, or installed in, any end-products. Buyer shall not rely on any data and

performance specifications or parameters provided by Microsemi. It is the Buyer’s responsibility to independently determine suitability of any products and

to test and verify the same. The information provided by Microsemi hereunder is provided “as is, where is” and with all faults, and the entire risk

associated with such information is entirely with the Buyer. Microsemi does not grant, explicitly or implicitly, to any party any patent rights, licenses, or any

other IP rights, whether with regard to such information itself or anything described by such information. Information provided in this document is

proprietary to Microsemi, and Microsemi reserves the right to make any changes to the information in this document or to any products and services at

any time without notice.

Microsemi Corporate Headquarters

One Enterprise, Aliso Viejo, CA 92656 USA

Within the USA: +1 (800) 713-4113

Outside the USA: +1 (949) 380-6100

Sales: +1 (949) 380-6136

Fax: +1 (949) 215-4996

email: [email protected]

www.microsemi.com

Thank You Piers Tremlett

Microsemi

[email protected]

Documents

“Why Embedded Die?” - NMI · PCB /SMT manufacturing processes • Large panel size 12 x 18” or 18” x 24” • Woven glass re-enforced PCB laminates • Laser direct imaging