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ASP-DAC 2019 Advance Program 24th Asia and South Pacific Design Automation Conference Date: January, 21-24, 2019 Place: Tokyo Odaiba Waterfront, Tokyo, Japan Highlights Opening and Keynote I Tuesday, January 22, 2019, 9:30-10:30 Tao Zhang (Tsinghua University, China) “Development trend of artificial intelligence technology and its application in the field of robotics” Keynote II Wednesday, January 23, 2019, 9:00-10:00 Satoshi Matsuoka (RIKEN, Japan) “Post-K: A Game-changing Supercomputer with Groundbreaking A64fx High Perfor- mance Arm Processor” Keynote III Thursday, January 24, 2019, 9:00-10:00 Steve Trimberger (Renesas Electronics, Japan) “Hardware and Software Security Technologies to Enable Future Connected Cars” Special Sessions 1A: (Presentation + Poster Discussion) University Design Contest Tuesday, January 22, 2019, 10:45-12:00 2A (SS-1): (Invited Talks) Reverse Engineering: growing more mature — and facing powerful countermeasures Tuesday, January 22, 2019, 13:30-15:35 3A (SS-2): (Invited Talks) Design, testing, and fault tol- erance of Neuromorphic systems Tuesday, January 22, 2019, 15:55-17:10 4A (SS-3): (Invited Talks) Modern Mask Optimization: From Shallow To Deep Learning Wednesday, January 23, 2019, 10:20-12:00 7A (SS-4): (Invited Talks) Security of Machine Learning and Machine Learning for Security: Progress and Chal- lenges for Secure, Machine Intelligent Mobile Systems Thursday, January 24, 2019, 10:20-12:00 10A (SS-5): (Invited Talks) The Resurgence of Reconfig- urable Computing in the Post Moore Era Thursday, January 24, 2019, 16:25-17:40 Designers’ Forum 5A (DF-1): (Oral Session) Robotics: From System De- sign to Application Wednesday, January 23, 2019, 13:50-15:05 6A (DF-2): (Oral Session) Advanced Imaging Technolo- gies and Applications Wednesday, January 23, 2019, 15:35-17:15 8A (DF-3): (Oral Session) Emerging Technologies for Tokyo Olympic 2020 Thursday, January 24, 2019, 13:15-14:30 9A (DF-4): (Oral Session) Beyond the Virtual Reality World Thursday, January 24, 2019, 14:50-16:05 Tutorials Tutorial-1: Integrating Hardware and Algorithm Ad- vances for Cognitive Systems Monday, January 21, 2019, 9:30-12:30 Organizer: Hai Li (Duke University) Speakers: Kaushik Roy (Purdue University) Hai Li (Duke University) Tutorial-2: Enablement of No-Human-in-the-Loop IC Design: Status and Directions Monday, January 21, 2019, 9:30-12:30 Organizer: Andrew B. Kahng (University of California, San Diego) Speakers: David White, Senior (Cadence Design Systems, Inc.) Shankar Sadasivam (Qualcomm Inc.) Andrew B. Kahng (University of California, San Diego) Tutorial-3: Energy-Efficient Processing and Machine Learning at the Edge: from Sensing to Sensemaking Monday, January 21, 2019, 9:30-12:30 Organizer/Speaker: Massimo Alioto (National University of Singapore) Tutorial-4: Design for Reliability in the Nano-CMOS Era: New Holistic Methodologies for Reliability Mod- eling and Optimization Monday, January 21, 2019, 9:30-12:30 Organizers/Speakers: Sheldon Tan (University of California, Riverside) Hussam Amrouch (Karlsruhe Institute of Technology) Tutorial-5: Machine Learning in Test Monday, January 21, 2019, 9:30-12:30 Organizer/Speaker: Yu Huang (Mentor, A Siemens Business) Tutorial-6: Recent Development and Future Perspective of Quantum Annealing Monday, January 21, 2019, 14:00-17:00 Organizer: Shu Tanaka (Waseda University) Speakers: Shu Tanaka (Waseda University) Yoshiki Matsuda (Fixstars Corporation) Kotaro Tanahashi (Recruit Communications Co., Ltd.) Yuya Seki (National Institute of Advanced Industrial Science and Technology, Japan) Tutorial-7: Embedded Heterogeneous Computing: Ar- chitectural Landscape and Software Challenges Monday, January 21, 2019, 14:00-17:00 Organizer/Speaker: Tulika Mitra (National University of Singapore) Tutorial-8: Smart Image Sensor Systems Monday, January 21, 2019, 14:00-17:00 Organizers/Speakers: Marilyn Wolf (Georgia Institute of Technology) Saibal Mukhopodhyay (Georgia Institute of Technology) Tutorial-9: Machine Learning for Reliability of ICs and Systems Monday, January 21, 2019, 14:00-17:00 Organizer: Mehdi B. Tahoori (Karlsruhe Institute of Technology) Speakers: Mehdi B. Tahoori (Karlsruhe Institute of Technology) Krishnendu Chakrabarty (Duke University)

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Page 1: ASP-DAC 2019 Advance Program · Monday, January 21, 2019 ASP-DAC 2019 offers attendees a set of three-hour intense introductions to specific topics. If you register for tutorials,

ASP-DAC 2019 Advance Program24th Asia and South Pacific Design Automation Conference

Date: January, 21-24, 2019Place: Tokyo Odaiba Waterfront, Tokyo, Japan

HighlightsOpening and Keynote I

Tuesday, January 22, 2019, 9:30-10:30

Tao Zhang (Tsinghua University, China) “Development trend ofartificial intelligence technology and its application in thefield of robotics”

Keynote IIWednesday, January 23, 2019, 9:00-10:00

Satoshi Matsuoka (RIKEN, Japan) “Post-K: A Game-changingSupercomputer with Groundbreaking A64fx High Perfor-mance Arm Processor”

Keynote IIIThursday, January 24, 2019, 9:00-10:00

Steve Trimberger (Renesas Electronics, Japan) “Hardware andSoftware Security Technologies to Enable Future ConnectedCars”

Special Sessions1A: (Presentation + Poster Discussion) University DesignContest

Tuesday, January 22, 2019, 10:45-12:00

2A (SS-1): (Invited Talks) Reverse Engineering: growingmore mature — and facing powerful countermeasures

Tuesday, January 22, 2019, 13:30-15:35

3A (SS-2): (Invited Talks) Design, testing, and fault tol-erance of Neuromorphic systems

Tuesday, January 22, 2019, 15:55-17:10

4A (SS-3): (Invited Talks) Modern Mask Optimization:From Shallow To Deep Learning

Wednesday, January 23, 2019, 10:20-12:00

7A (SS-4): (Invited Talks) Security of Machine Learningand Machine Learning for Security: Progress and Chal-lenges for Secure, Machine Intelligent Mobile Systems

Thursday, January 24, 2019, 10:20-12:00

10A (SS-5): (Invited Talks) The Resurgence of Reconfig-urable Computing in the Post Moore Era

Thursday, January 24, 2019, 16:25-17:40

Designers’ Forum5A (DF-1): (Oral Session) Robotics: From System De-sign to Application

Wednesday, January 23, 2019, 13:50-15:05

6A (DF-2): (Oral Session) Advanced Imaging Technolo-gies and Applications

Wednesday, January 23, 2019, 15:35-17:15

8A (DF-3): (Oral Session) Emerging Technologies forTokyo Olympic 2020

Thursday, January 24, 2019, 13:15-14:30

9A (DF-4): (Oral Session) Beyond the Virtual RealityWorld

Thursday, January 24, 2019, 14:50-16:05

TutorialsTutorial-1: Integrating Hardware and Algorithm Ad-vances for Cognitive Systems

Monday, January 21, 2019, 9:30-12:30Organizer:Hai Li (Duke University)

Speakers:Kaushik Roy (Purdue University)Hai Li (Duke University)

Tutorial-2: Enablement of No-Human-in-the-Loop ICDesign: Status and Directions

Monday, January 21, 2019, 9:30-12:30Organizer:Andrew B. Kahng (University of California, San Diego)

Speakers:David White, Senior (Cadence Design Systems, Inc.)Shankar Sadasivam (Qualcomm Inc.)Andrew B. Kahng (University of California, San Diego)

Tutorial-3: Energy-Efficient Processing and MachineLearning at the Edge: from Sensing to Sensemaking

Monday, January 21, 2019, 9:30-12:30Organizer/Speaker:Massimo Alioto (National University of Singapore)

Tutorial-4: Design for Reliability in the Nano-CMOSEra: New Holistic Methodologies for Reliability Mod-eling and Optimization

Monday, January 21, 2019, 9:30-12:30Organizers/Speakers:Sheldon Tan (University of California, Riverside)Hussam Amrouch (Karlsruhe Institute of Technology)

Tutorial-5: Machine Learning in TestMonday, January 21, 2019, 9:30-12:30

Organizer/Speaker:Yu Huang (Mentor, A Siemens Business)

Tutorial-6: Recent Development and Future Perspectiveof Quantum Annealing

Monday, January 21, 2019, 14:00-17:00Organizer:Shu Tanaka (Waseda University)

Speakers:Shu Tanaka (Waseda University)Yoshiki Matsuda (Fixstars Corporation)Kotaro Tanahashi (Recruit Communications Co., Ltd.)Yuya Seki (National Institute of Advanced Industrial Science and Technology,

Japan)

Tutorial-7: Embedded Heterogeneous Computing: Ar-chitectural Landscape and Software Challenges

Monday, January 21, 2019, 14:00-17:00Organizer/Speaker:Tulika Mitra (National University of Singapore)

Tutorial-8: Smart Image Sensor SystemsMonday, January 21, 2019, 14:00-17:00

Organizers/Speakers:Marilyn Wolf (Georgia Institute of Technology)Saibal Mukhopodhyay (Georgia Institute of Technology)

Tutorial-9: Machine Learning for Reliability of ICs andSystems

Monday, January 21, 2019, 14:00-17:00Organizer:Mehdi B. Tahoori (Karlsruhe Institute of Technology)

Speakers:Mehdi B. Tahoori (Karlsruhe Institute of Technology)Krishnendu Chakrabarty (Duke University)

Page 2: ASP-DAC 2019 Advance Program · Monday, January 21, 2019 ASP-DAC 2019 offers attendees a set of three-hour intense introductions to specific topics. If you register for tutorials,

Monday, January 21, 2019

ASP-DAC 2019 offers attendees a set of three-hour intense introductions to specific topics. If you register for tutorials, you have the option to select two out of the nine topics. This year, eachtutorial will be presented once.

Registration (8:00 - )

Room Saturn Room Uranus Room Venus Room Mars Room Mercury

9:30 Tutorial 1: Integrating Hardware andAlgorithm Advances for Cognitive Sys-tems

Tutorial 2: Enablement of No-Human-in-the-Loop IC Design: Status and Di-rections

Tutorial 3: Energy-Efficient Process-ing and Machine Learning at the Edge:from Sensing to Sensemaking

Tutorial 4: Design for Reliability inthe Nano-CMOS Era: New HolisticMethodologies for Reliability Model-ing and Optimization

Tutorial 5: Machine Learning in Test

Organizers:Hai Li (Duke University)

Organizer:Andrew B. Kahng (University of California,

San Diego)

Organizer:Massimo Alioto (National University of Sin-

gapore)

Organizers:Sheldon Tan (University of California, River-

side)Hussam Amrouch (Karlsruhe Institute of

Technology)

Organizer:Yu Huang (Mentor, A Siemens Business)

12:30

Speakers:Kaushik Roy (Purdue University)Hai Li (Duke University)

Speakers:David White, Senior (Cadence Design Sys-

tems, Inc.)Shankar Sadasivam (Qualcomm Inc.)Andrew B. Kahng (University of California,

San Diego)

Speaker:Massimo Alioto (National University of Sin-

gapore)

Speakers:Sheldon Tan (University of California, River-

side)Hussam Amrouch (Karlsruhe Institute of

Technology)

Speaker:Yu Huang (Mentor, A Siemens Business)

Lunch Break (12:30 - 14:00)

14:00 Tutorial 6: Recent Development andFuture Perspective of Quantum An-nealing

Tutorial 7: Embedded HeterogeneousComputing: Architectural Landscapeand Software Challenges

Tutorial 8: Smart Image Sensor Sys-tems

Tutorial 9: Machine Learning for Reli-ability of ICs and Systems

Organizer:Shu Tanaka (Waseda University)

Organizer:Tulika Mitra (National University of Singapore)

Organizers:Marilyn Wolf (Georgia Institute of Technol-

ogy)Saibal Mukhopodhyay (Georgia Institute of

Technology)

Organizer:mehdi b. tahoori (karlsruhe institute of tech-

nology)

17:00

Speakers:Shu Tanaka (Waseda University)Yoshiki Matsuda (Fixstars Corporation)Kotaro Tanahashi (Recruit Communications

Co., Ltd.)Yuya Seki (National Institute of Advanced In-

dustrial Science and Technology)

Speaker:Tulika Mitra (National University of Singapore)

Speakers:Marilyn Wolf (Georgia Institute of Technol-

ogy)Saibal Mukhopodhyay (Georgia Institute of

Technology)

Speakers:mehdi b. tahoori (karlsruhe institute of tech-

nology)Krishnendu Chakrabarty (Duke University)

Page 3: ASP-DAC 2019 Advance Program · Monday, January 21, 2019 ASP-DAC 2019 offers attendees a set of three-hour intense introductions to specific topics. If you register for tutorials,

Tuesday, January 22, 2019

Registration (7:00 - )

9:00 1K: Opening & Keynote IChair: Toshiyuki Shibuya (Fujitsu Labs., Japan)

Tao Zhang (Tsinghua Univ., China) “Development trend of artificial intelligence technology and its application in the field of robotics”

Coffee break (10:30 - 10:45)

10:45 1A: University Design Contest 1B: Real-time Embedded Software 1C: Hardware and System Security 1D: Thermal- and Power-Aware Design and Op-timization

Chairs: Kousuke Miyaji (Shinshu Univ., Japan), AkiraTsuchiya (Univ. of Shiga Prefecture, Japan)

Chairs: Zhaoyan Shen (Shandong Univ.), Zebo Peng(Linkping Univ., Sweden)

Chairs: Ray C.C. Cheung (City Univ. of Hong Kong, HongKong), Hai Zhou (Northwestern Univ., U.S.A.)

Chairs: Hussam Amrouch (Karlsruhe Inst. of Tech. (KIT),Germany), Jiang Hu (Texas A&M)

(The titles of the presentations are listed in the nextpage)

1B-1: “Towards Limiting the Impact of TimingAnomalies in Complex Real-Time Processors” Pe-dro Benedicte (Barcelona Supercomputing Center and Univ.Politecnica de Catalunya, Spain), Jaume Abella, CarlesHernandez, Enrico Mezzetti (Barcelona SupercomputingCenter, Spain), Francisco J. Cazorla (Barcelona Supercom-puting Center and IIIA-CSIC, Spain)

1C-1: “Layout Recognition Attacks on Split Manu-facturing” Wenbin Xu, Lang Feng, Jeyavijayan Ra-jendran, Jiang Hu (Texas A&M Univ., U.S.A.)

1D-1: “Leakage-Aware Thermal Management forMulti-Core Systems Using Piecewise Linear ModelBased Predictive Control” Xingxing Guo, HaiWang, Chi Zhang, He Tang, Yuan Yuan (Univ. of Elec-tronic Science and Tech. of China, China)

1B-2: “SeRoHAL: Generation of Selectively RobustHardware Abstraction Layers for Efficient Protec-tion of Mixed-criticality Systems” Petra R. Klee-berger, Juana Rivera, Daniel Mueller-Gritschneder,Ulf Schlichtmann (Tech. Univ. Mnchen, Germany)

1C-2: “Execution of Provably Secure Assays onMEDA Biochips to Thwart Attacks” Tung-CheLiang (Duke Univ., U.S.A.), Mohammed Shayan (NewYork Univ., U.S.A.), Krishnendu Chakrabarty (Duke Univ.,U.S.A.), Ramesh Karri (New York Univ., U.S.A.)

1D-2: “Multi-Angle Bended Heat Pipe Design us-ing X-Architecture Routing with Dynamic ThermalWeight on Mobile Devices” Hsuan-Hsuan Hsiao,Hong-Wen Chiou, Yu-Min Lee (National Chiao TungUniv., Taiwan)

12:00

1B-3: “Partitioned and Overhead-Aware Schedulingof Mixed-Criticality Real-Time Systems” YuanbinZhou, Soheil Samii, Petru Eles, Zebo Peng (LinkpingUniv., Sweden)

1C-3: “TAD: Time Side-Channel Attack Defenseof Obfuscated Source Code” Alexander Fell, HungThinh Pham, Siew Kei Lam (Nanyang Technological Univ.,Singapore)

1D-3: “Fully-automated Synthesis of Power Man-agement Controllers from UPF” Dustin Peterson,Oliver Bringmann (Univ. of Tuebingen, Germany)

Lunch Break (12:00 - 13:30)University LSI Design Contest Poster Presentation [Food will be served] (12:00 - 13:30)

Page 4: ASP-DAC 2019 Advance Program · Monday, January 21, 2019 ASP-DAC 2019 offers attendees a set of three-hour intense introductions to specific topics. If you register for tutorials,

10:45 1A: University Design ContestChairs: Kousuke Miyaji (Shinshu Univ., Japan), Akira Tsuchiya (Univ. of Shiga Prefecture, Japan)

<Oral Presentation>1A-1: “A Wide Conversion Ratio, 92.8% Efficiency, 3-Level Buck Converter with Adaptive On/Off-Time Control and Shared Charge Pump Intermediate Voltage Regulator” Kousuke Miyaji, Yuki Karasawa, TakanobuFukuoka (Shinshu Univ., Japan)

1A-2: “A Three-Dimensional Millimeter-Wave Frequency-Shift Based CMOS Biosensor using Vertically Stacked Spiral Inductors in LC Oscillators” Maya Matsunaga, Taiki Nakanishi, Atsuki Kobayashi (NagoyaUniv., Japan), Kiichi Niitsu (Nagoya Univ./JST PRESTO, Japan)

1A-3: “Design of 385 x 385 m2 0.165V 270pW Fully-Integrated Supply-Modulated OOK Transmitter in 65nm CMOS for Glasses-Free, Self-Powered, and Fuel-Cell-Embedded Continuous Glucose MonitoringContact Lens” Kenya Hayashi, Shigeki Arata, Ge Xu, Shunya Murakami, Cong Dang Bui, Takuyoshi Doike, Maya Matsunaga, Atsuki Kobayashi, Kiichi Niitsu (Nagoya Univ., Japan)

1A-4: “2D Optical Imaging Using Photosystem I Photosensor Platform with 32x32 CMOS Biosensor Array” Kiichi Niitsu, Taichi Sakabe (Nagoya Univ., Japan), Mariko Miyachi, Yoshinori Yamanoi, Hiroshi Nishihara(Univ. of Tokyo, Japan), Tatsuya Tomo (Tokyo Univ. of Science, Japan), Kazuo Nakazato (Nagoya Univ., Japan)

1A-5: “Design of Gate-Leakage-Based Timer Using an Amplifier-Less Replica-Bias Switching Technique in 55-nm DDC CMOS” Atsuki Kobayashi, Yuya Nishio, Kenya Hayashi, Shigeki Arata (Nagoya Univ., Japan),Kiichi Niitsu (Nagoya Univ./JST PRESTO, Japan)

1A-6: “A Low-Voltage CMOS Electrophoresis IC Using Electroless Gold Plating for Small-Form-Factor Biomolecule Manipulation” Kiichi Niitsu, Yuuki Yamaji, Atsuki Kobayashi, Kazuo Nakazato (Nagoya Univ.,Japan)

1A-7: “A Low-Voltage Low-Power Multi-Channel Neural Interface IC Using Level-Shifted Feedback Technology” Liangjian Lyu, Yu Wang (Fudan Univ., China), Chixiao Chen, C. -J. Richard Shi (Univ. of Washington, U.S.A.)

1A-8: “Development of a High Stability, Low Standby Power Six-Transistor CMOS SRAM Employing a Single Power Supply” Nobuaki Kobayashi (Nihon Univ., Japan), Tadayoshi Enomoto (Chuo Univ., Japan)

1A-9: “Design of Heterogeneously-integrated Memory System with Storage Class Memories and NAND Flash Memories” Chihiro Matsui, Ken Takeuchi (Chuo Univ., Japan)

1A-10: “A 65-nm CMOS Fully-Integrated Circulating Tumor Cell and Exosome Analyzer Using an On-Chip Vector Network Analyzer and a Transmission-Line-Based Detection Window” Kiichi Niitsu (Nagoya Univ.,Japan)

1A-11: “Low Standby Power CMOS Delay Flip-Flop with Data Retention Capability” Nobuaki Kobayashi (Nihon Univ., Japan), Tadayoshi Enomoto (Chuo Univ., Japan)

1A-12: “Accelerate Pattern Recognition for Cyber Security Analysis” Mohammad Tahghighi, Wei Zhang (Hong Kong Univ. of Science and Tech., Hong Kong)

12:00

1A-13: “FPGA Laboratory System supporting Power Measurement for Low-Power Digital Design” Marco Winzker, Andrea Schwandt (Bonn-Rhein-Sieg Univ., Germany)

Lunch Break (12:00 - 13:30)University LSI Design Contest Poster Presentation [Food will be served] (12:00 - 13:30)

Page 5: ASP-DAC 2019 Advance Program · Monday, January 21, 2019 ASP-DAC 2019 offers attendees a set of three-hour intense introductions to specific topics. If you register for tutorials,

13:30 2A: (SS-1) Reverse Engineering: growing moremature - and facing powerful countermeasures

2B: All about PIM 2C: Design for Reliability 2D: New Advances in Emerging ComputingParadigms

Chair: Naehyuck Chang (KAIST, Republic of Korea) Chairs: Guangyu Sun (Peking Univ., China), WanliChang (Univ. of York, U.K.)

Chairs: Shigeki Nojima (Toshiba Memory, Japan), BeiYu (Chinese Univ. of Hong Kong, Hong Kong)

Chairs: Shigeru Yamashita (Ritsumeikan Univ., Japan),Xiaoming Chen (Chinese Academy of Sciences, China)

2A-1: “Integrated Flow for Reverse Engineeringof Nanoscale Technologies” Bernhard Lippmann,Aayush Singla, Niklas Unverricht, Peter Egger, AnjaDubotzky, Michael Werner (Infineon Technologies AG,Germany), Horst Gieser (Fraunhofer EMFT, Germany), Mar-tin Rasche, Oliver Kellermann (Raith GmbH, Germany),Helmut Grab (TUM, Germany)

2B-1: “GraphSAR: A Sparsity-Aware Processing-in-Memory Architecture for Large-Scale Graph Pro-cessing on ReRAMs” Guohao Dai (Tsinghua Univ.,China), Tianhao Huang (Massachusetts Inst. of Tech., U.S.A.),Yu Wang, Huazhong Yang (Tsinghua Univ., China), JohnWawrzynek (Univ. of California, Berkeley, U.S.A.)

2C-1: “IR-ATA: IR Annotated Timing Analysis, AFlow for Closing the LoopBetween PDN design,IR Analysis & Timing Closure” Ashkan Vakil,Houman Homayoun, Avesta Sasan (George Mason Univ.,U.S.A.)

2D-1: “Compiling SU(4) Quantum Circuits to IBMQX Architectures” Alwin Zulehner, Robert Wille(Johannes Kepler Univ. Linz, Austria)

2A-2: “NETA: When IP Fails, Secrets Leak” TravisMeade, Jason Portillo, Shaojie Zhang (Univ. of CentralFlorida, U.S.A.), Yier Jin (Univ. of Florida, U.S.A.)

2B-2: “ParaPIM: A Parallel Processing-in-MemoryAccelerator for Binary-Weight Deep Neural Net-works” Shaahin Angizi, Zhezhi He, Deliang Fan(Univ. of Central Florida, U.S.A.)

2C-2: “Learning-Based Prediction of PackagePower Delivery Network Quality” Yi Cao (QualcommTechnologies, U.S.A.), Andrew B. Kahng (UC San Diego,U.S.A.), Joseph Li, Abinash Roy, Vaishnav Srinivas(Qualcomm Technologies, U.S.A.), Bangqi Xu (UC San Diego,U.S.A.)

2D-2: “Quantum Circuit Compilers Using GateCommutation Rules” Toshinari Itoko, Rudy Ray-mond, Takashi Imamichi, Atsushi Matsuo (IBM Re-search, Japan), Andrew W. Cross (IBM Research, U.S.A.)

2A-3: “Machine Learning and Structural Charac-teristics for Reverse Engineering” Johanna Baehr,Alessandro Bernardini, Georg Sigl, Ulf Schlicht-mann (Tech. Univ. of Munich, Germany)

2B-3: “CompRRAE: RRAM-based ConvolutionalNeural Network Accelerator with Reduced Com-putations through a Runtime Activation Estima-tion” Xizi Chen, Jingyang Zhu, Jingbo Jiang, ChiYing Tsui (Hong Kong Univ. of Science and Tech., Hong Kong)

2C-3: “Tackling Signal Electromigration withLearning-Based Detection and Multistage Mitiga-tion” Wei Ye, Mohamed Baker Alawieh, Yibo Lin,David Z. Pan (Univ. of Texas, Austin, U.S.A.)

2D-3: “Scalable Design for Field-coupledNanocomputing Circuits” Marcel Walter (Univ.of Bremen, Germany), Robert Wille (Johannes Kepler Univ.Linz, Austria), Frank Sill Torres (DFKI GmbH, Germany),Daniel Große, Rolf Drechsler (Univ. of Bremen, Germany)

2A-4: “Towards Cognitive Obfuscation: ImpedingHardware Reverse Engineering Based on Psycho-logical Insights” Carina Wiesen, Steffen Becker,Nils Albartus, Max Hoffmann, Sebastian Wallat,Marc Fyrbiak, Nikol Rummel, Christof Paar (RuhrUniv. Bochum, Germany)

2B-4: “CuckooPIM: An Efficient and Less-blockingCoherence Mechanism for Processing-in-MemorySystems” Sheng Xu, Xiaoming Chen, Ying Wang,Yinhe Han, Xiaowei Li (Chinese Academy of Sciences,China)

2C-4: “ROBIN: Incremental Oblique InterleavedECC for Reliability Improvement in STT-MRAMCaches” Elham Cheshmikhani (Sharif Univ. of Tech.,Iran), Hamed Farbeh (Amirkabir Univ. of Tech., Iran), Hos-sein Asadi (Sharif Univ. of Tech., Iran)

2D-4: “BDD-based Synthesis of Optical Logic Cir-cuits Exploiting Wavelenngth Division Multiplex-ing” Ryosuke Matsuo, Jun Shiomi, Tohru Ishi-hara, Hidetoshi Onodera (Kyoto Univ., Japan), AkihikoShinya, Masaya Notomi (NTT, Japan)

15:35

2A-5: “Insights to the Mind of a Trojan De-signer: The Challenge to Integrate a Trojanin the Bitstream” Maik Ender, Paul MartinKnopp, Christof Paar, Pawel Swierczynski, Sebas-tian Wallert, Matthias Wilhelm (Ruhr Univ. Bochum, Ger-many)

2B-5: “AERIS: Area/Energy-Efficient 1T2RReRAM Based Processing-in-Memory NeuralNetwork System-on-a-Chip” Jinshan Yue, YongpanLiu, Fang Su (Tsinghua Univ., China), Shuangchen Li(Univ. of California, Santa Barbara, U.S.A.), Zhe Yuan, ZhiboWang, Wenyu Sun, Xueqing Li, Huazhong Yang(Tsinghua Univ., China)

2C-5: “Aging-aware Chip Health Prediction Adopt-ing an Innovative Monitoring Strategy” Yun-TingWang (National Tsing Hua Univ., Taiwan), Kai-Chiang Wu(National Chiao Tung Univ., Taiwan), Chung-Han Chou(Feng Chia Univ., Taiwan), Shih-Chieh Chang (National Ts-ing Hua Univ., Taiwan)

2D-5: “Hybrid Binary-Unary Hardware Accelera-tor” S. Rasoul Faraji, Kia Bazargan (Univ. of Minnesota,U.S.A.)

Coffee break (15:35 - 15:55)

Page 6: ASP-DAC 2019 Advance Program · Monday, January 21, 2019 ASP-DAC 2019 offers attendees a set of three-hour intense introductions to specific topics. If you register for tutorials,

15:55 3A: (SS-2) Design, testing, and fault tolerance ofNeuromorphic systems

3B: Memory-Centric Design and Synthesis 3C: Efficient Modeling of Analog, Mixed Signaland Arithmetic Circuits

3D: Logic and Precision Optimization for NeuralNetwork Designs

Chair: Chenchen Liu (Clarkson Univ., U.S.A.) Chairs: Shouyi Yin (Tsinghua Univ., China), MatthewZiegler (IBM)

Chairs: Jun Tao (Fudan Univ., China), Shobha Vasude-van (Univ. of Illinois, Urbana-Champaign, U.S.A.)

Chairs: Massanori Muroyama (Tohoku Univ., Japan),Younghyun Kim (Univ. of Wisconsin, U.S.A.)

3A-1: “Fault Tolerance in Neuromorphic Com-puting Systems” Yu Wang (Tsinghua Univ., China),Mengyun Liu, Krishnendu Chakrabarty (Duke Univ.,U.S.A.), Lixue Xia (Tsinghua Univ., China)

3B-1: “A Staircase Structure for Scalable and Effi-cient Synthesis of Memristor-Aided Logic” AlwinZulehner (Johannes Kepler Univ. Linz, Austria), KamalikaDatta (National Inst. of Tech. Meghalaya, India), IndranilSengupta (Indian Inst. of Tech. Kharagpur, India), RobertWille (Johannes Kepler Univ. Linz, Austria)

3C-1: “Efficient Sparsification of dense circuit ma-trices in Model Order Reduction” CharalamposAntoniadis, Nestor Evmorfopoulos, Georgios Sta-moulis (Univ. of Thessaly, Greece)

3D-1: “Energy-Efficient, Low-Latency Realizationof Neural Networks through Boolean Logic Mini-mization” Mahdi Nazemi, Ghasem Pasandi, Mas-soud Pedram (USC, U.S.A.)

3A-2: “Build Reliable and Efficient NeuromorphicDesign with Memristor Technology” Bing Li, Bo-nan Yan (Duke Univ., U.S.A.), Chenchen Liu (ClarksonUniv., U.S.A.), Hai Li (Duke Univ., U.S.A.)

3B-2: “On-chip Memory Optimization for High-level Synthesis of Multi-dimensional Data onFPGA” Daewoo Kim, Sugil Lee, Jongeun Lee (Ul-san National Inst. of Science and Tech., Republic of Korea)

3C-2: “Spectral Approach to Verifying Non-linearArithmetic Circuits” CUNXI YU (EPFL, Switzerland),Tiankai Su, Atif Yasin, Maciej Ciesielski (UMassAmherst, U.S.A.)

3D-2: “Log-Quantized Stochastic Comput-ing for Memory and Computation EfficientDNNs” Hyeonuk Sim, Jongeun Lee (Ulsan NationalInst. of Science and Tech., Republic of Korea)

17:10

3A-3: “Reliable In-Memory Neuromorphic Com-puting Using Spintronics” Christopher Muench, Ra-jendra Bishnoi, Mehdi Tahoori (KIT, Germany)

3B-3: “HUBPA: High Utilization BidirectionalPipeline Architecture for Neuromorphic Comput-ing” Houxiang Ji, Li Jiang, Tianjian Li, NaifengJing, Jing Ke, Xiaoyao Liang (Shanghai Jiao Tong Univ.,China)

3C-3: “S2PM: Semi-Supervised Learning for Effi-cient Performance Modeling of Analog and MixedSignal Circuits” Mohamed Baker Alawieh, XiyuanTang, David Z. Pan (Univ. of Texas, Austin, U.S.A.)

3D-3: “Cell Division: Weight Bit-Width ReductionTechnique for Convolutional Neural Network Hard-ware Accelerators” Hanmin Park, Kiyoung Choi(Seoul National Univ., Republic of Korea)

ACM SIGDA Student Research Forum at ASP-DAC 2019 [Food will be served] (18:00 - 20:00)(The title of the posters are listed in the next page)

Page 7: ASP-DAC 2019 Advance Program · Monday, January 21, 2019 ASP-DAC 2019 offers attendees a set of three-hour intense introductions to specific topics. If you register for tutorials,

18:00 ACM SIGDA Student Research Forum at ASP-DAC 2019

SRF-1: “New Views for Stochastic Computing: From Time-Encoding to Deterministic Processing” M. Hassan Najafi (University of Minnesota-Twin Cities )

SRF-2: “A Multi-Phase Intellectual Property Core Watermarking Approach during Architectural Synthesis” Dipanjan Roy (Indian Institute of Technology Indore )

SRF-3: “Automatic Design Environment using High-level Synthesis for Reconfigurable 3D Sound Processor” Saya Ohira (Nihon University )

SRF-4: “VLSI Design for Manufacturability based on Dictionary Learning Framework” Hao Geng (The Chinese University of Hong Kong )

SRF-5: “Computer-Aided Design for Quantum Computing” Alwin Zulehner (Johannes Kepler University Linz )

SRF-6: “Enhancing VLSI Design for Manufacturability with Machine Learning Techniques” Haoyu Yang (The Chinese University of Hong Kong )

SRF-7: “A Model-driven Framework with Assertion Based Verification (ABV) Support for Embedded Systems Design Automation” Muhammad Waseem Anwar (National University of Sciences and Technology )

SRF-8: “Optimization of Multi-Target Sample Preparation On-Demand with Digital Microfluidic Biochips” Sudip Poddar (Indian Statistical Institute )

SRF-9: “Clustering for Reduction of Power Consumption and Area on Post-Silicon Delay Tuning” Kota Muroi (The University of Aizu )

SRF-10: “Task and Data Co-Allocation for MPSoCs with 3D-stacked Memories to Optimize Performance under Thermal Constraints” Chia-Yin Liu (National Chi Nan University )

SRF-11: “The Accurate Power Consumption Model For Rotary UAVs” Dooyoung Hong (Korea Advanced Institute of Science and Technology )

SRF-12: “Modulo 2n+1 arithmetic based on signed-digit and binary number addition algorithm” Yuuki Suzuki (Gunma University )

SRF-13: “A Data Transfer Optimization in Non-Binary to Binary Conversion Circuit in Non-Binary Cyclic ADC” Yuji Shindo (Tokyo City University )

20:00SRF-14: “A Decision Network Design for Efficient Semantic Segmentation Computation in Edge Computing” Xin-Yu Kuo (National Tsing Hua University )

Page 8: ASP-DAC 2019 Advance Program · Monday, January 21, 2019 ASP-DAC 2019 offers attendees a set of three-hour intense introductions to specific topics. If you register for tutorials,

Wednesday, January 23, 2019

Registration (7:30 - )

9:00 2K: Keynote IIChair: Hidetoshi Onodera (Kyoto Univ., Japan)

10:00Satoshi Matsuoka (RIKEN, Japan) “Post-K: A Game-changing Supercomputer with Groundbreaking A64fx High Performance Arm Processor”

Coffee break (10:00 - 10:20)

10:20 4A: (SS-3) Modern Mask Optimization: FromShallow To Deep Learning

4B: System Level Modelling Methods I 4C: Testing and Design for Security 4D: Network-Centric Design and System

Chairs: Evangeline F. Y. Young (Chinese Univ. of HongKong, Hong Kong), Atsushi Takahashi (Tokyo Inst. of Tech.,Japan)

Chair: Sri Parameswaran (Univ. of New South Wales,Australia)

Chairs: Michihiro Shintani (NAIST, Japan), KoheiMiyase (Kyushu Inst. of Tech., Japan)

Chairs: Keiji Kimura (Waseda Univ., Japan), Yaoyao Ye(Shanghai Jiao Tong Univ., China)

4A-1: “LithoROC: Lithography Hotspot Detectionwith Explicit ROC Optimization” Wei Ye, Yibo Lin,Meng Li, Qiang Liu, David Z. Pan (Univ. of Texas,Austin, U.S.A.)

4B-1: “AxDNN:Towards the Cross-layer Design ofApproximate DNNs” Yinghui Fan, Xiaoxi Wu, Jiy-ing Dong, Zhi Qi (Southeast Univ., China)

4C-1: “Improving Scan Chain Diagnostic AccuracyUsing Multi-Stage Artificial Neural Networks” Ma-son Chern, Shih-Wei Lee, Shi-Yu Huang (National Ts-ing Hua Univ., Taiwan), Yu Huang, Gaurav Veda, Kun-Han Tsia, Wu-Tung Cheng (Mentor, A Siemens Business,U.S.A.)

4D-1: “Routing in Optical Network-on-Chip: Mini-mizing Contention with Guaranteed Thermal Relia-bility” Mengquan Li (Chongqing Univ., China), WeichenLiu (Nanyang Technological Univ., Singapore), Lei Yang,Peng Chen, Duo Liu (Chongqing Univ., China), Nan Guan(Hong Kong Polytechnic Univ., Hong Kong)

4A-2: “Detecting Multi-Layer Layout Hotspots withAdaptive Squish Patterns” Haoyu Yang (Chinese Univ.of Hong Kong, Hong Kong), Piyush Pathak, Frank Gen-nari, Ya-Chieh Lai (Cadence Design Systems, U.S.A.), BeiYu (Chinese Univ. of Hong Kong, Hong Kong)

4B-2: “Simulate-the-hardware: Training AccurateBinarized Neural Networks for Low-Precision Neu-ral Accelerators” Jiajun Li (Univ. of Chinese Academyof Sciences/Chinese Academy of Sciences, China), Ying Wang(Chinese Academy of Sciences, China), Bosheng Liu (Univ.of Chinese Academy of Sciences/Chinese Academy of Sciences,China), Yinhe Han, Xiaowei Li (Chinese Academy of Sci-ences, China)

4C-2: “Testing Stuck-Open Faults of PriorityAddress Encoder in Content Addressable Memo-ries” Tsai-Ling Tsai, Jin-Fu Li (National Central Univ.,Taiwan), Chun-Lung Hsu, Chi-Tien Sun (ITRI, Taiwan)

4D-2: “Bidirectional Tuning of Microring-BasedSilicon Photonic Transceivers for Optimal EnergyEfficiency” Yuyang Wang (Univ. of California, Santa Bar-bara, U.S.A.), M. Ashkan Seyedi, Jared Hulme, MarcoFiorentino, Raymond G. Beausoleil (Hewlett PackardLabs, U.S.A.), Kwang-Ting Cheng (Hong Kong Univ. of Sci-ence and Tech., Hong Kong)

4A-3: “A Local Optimal Method on DSA Guid-ing Template Assignment with Redundant/DummyVia Insertion” Xingquan Li (Fuzhou Univ., China), BeiYu (Chinese Univ. of Hong Kong, Hong Kong), Jianli Chen,Wenxing Zhu (Fuzhou Univ., China)

4B-3: “An N-Way Group Association Architectureand Sparse Data Group Association Load BalancingAlgorithm for Sparse CNN Accelerators” JingyuWang, Zhe Yuan, Ruoyang Liu, Huazhong Yang,Yongpan Liu (Tsinghua Univ., China)

4C-3: “ScanSAT: Unlocking Obfuscated ScanChains” Lilas Alrahis (Khalifa Univ., United Arab Emi-rates), Muhammad Yasin (Tandon school of engineering,New York university, U.S.A.), Hani Saleh, Baker Moham-mad, Mahmoud Al-Qutayri (Khalifa Univ., United ArabEmirates), Ozgur Sinanoglu (New York Univ. Abu Dhabi,United Arab Emirates)

4D-3: “Redeeming Chip-level Power Efficiency byCollaborative Management of the Computation andCommunication” Ning Lin, Hang Lu, Xin Wei,Xiaowei Li (Chinese Academy of Sciences/Univ. of ChineseAcademy of Sciences, China)

12:00

4A-4: “Deep Learning-Based Framework for Com-prehensive Mask Optimization” Bo-Yi Yu, YongZhong, Shao-Yun Fang, Hung-Fei Kuo (National Tai-wan Univ. of Science and Tech., Taiwan)

4B-4: “Maximizing Power State Cross Coveragein Firmware-based Power Management” VladimirHerdt, Hoang M. Le (Univ. of Bremen, Germany), DanielGroße, Rolf Drechsler (Univ. of Bremen, DFKI GmbH, Ger-many)

4C-4: “CycSAT-Unresolvable Cyclic Logic Encryp-tion Using Unreachable States” Amin Rezaei, YouLi, Yuanqi Shen, Shuyu Kong, Hai Zhou (NorthwesternUniv., U.S.A.)

4D-4: “A High-Level Modeling and SimulationApproach Using Test-Driven Cellular Automatafor Fast Performance Analysis of RTL NoC De-signs” Moon Gi Seok (Arizona State Univ., U.S.A.), Dae-jin Park (Kyungpook National Univ., Republic of Korea), Hes-sam S. Sarjoughian (Arizona State Univ., U.S.A.)

Lunch Break (12:00 - 13:50)Supporters’ Session [Food will be served] (12:00 - 13:50)

Page 9: ASP-DAC 2019 Advance Program · Monday, January 21, 2019 ASP-DAC 2019 offers attendees a set of three-hour intense introductions to specific topics. If you register for tutorials,

13:50 5A: (DF-1) Robotics: From System Design to Ap-plication

5B: Advanced Memory Systems 5C: Learning: Make Patterning Light and Right 5D: Design and CAD for Emerging Memories

Organizer: Koji Inoue (Kyushu Univ., Japan), Orga-nizer/Chair: Yuji Ishikawa (Toshiba Device & Storage,Japan)

Chairs: Jaehyun Park (Univ. of Ulsan, Republic of Korea),Chenchen Liu (Clarkson Univ.)

Chairs: Tetsuaki Matsunawa (Toshiba Memory),Hidetoshi Matsuoka (Fujitsu Labs.)

Chair: Li Jiang (Shanghai Jiao Tong Univ., China)

5A-1: “Computer-Aided Support System for Mini-mally Invasive Surgery Using 3D Organ Shape Mod-els” Ken’ichi Morooka (Kyusyu Univ., Japan)

5B-1: “A Sharing-Aware L1.5D Cache for DataReuse in GPGPUs” Jianfei Wang, Li Jiang, Jing Ke,Xiaoyao Liang, Naifeng Jing (Shanghai Jiao Tong Univ.,China)

5C-1: “SRAF Insertion via Supervised DictionaryLearning” Hao Geng, Haoyu Yang, Yuzhe Ma (Chi-nese Univ. of Hong Kong, Hong Kong), Joydeep Mitra (Ca-dence, U.S.A.), Bei Yu (Chinese Univ. of Hong Kong, HongKong)

5D-1: “Exploring emerging CNFET for EfficientLast Level Cache Design” Dawen Xu, Li Li (HefeiUniv. of Tech., China), Ying Wang, Cheng Liu, HuaweiLi (Chinese Academy of Sciences, China)

5A-2: “ROS and mROS: How to accelerate the de-velopment of robot systems and integrate embeddeddevices” Hideki Takase (Kyoto Univ./JST PRESTO, Japan)

5B-2: “NeuralHMC: An Efficient HMC-Based Ac-celerator for Deep Neural Networks” Chuhan Min(Univ. of Pittsburgh, U.S.A.), Jiachen Mao, Hai Li, YiranChen (Duke Univ., U.S.A.)

5C-2: “A Fast Machine Learning-based Mask Print-ability Predictor for OPC Acceleration” BentianJiang (Chinese Univ. of Hong Kong, Hong Kong), HangZhang (Cornell Univ., U.S.A.), Jinglei Yang (Univ. of Cali-fornia, Santa Barbara, U.S.A.), Evangeline F. Y. Young (Chi-nese Univ. of Hong Kong, Hong Kong)

5D-2: “Mosaic: An Automated Synthesis Flow forBoolean Logic Based on Memristor Crossbar” LeiXie (Southeast Univ., China)

15:05

5A-3: “Rapid Development of Robotics technol-ogy using Robot Contest and Open Collabora-tion” Masaki Yamamoto (AI Solution Center, Panasonic,Japan)

5A-3: “Rapid Development of Robotics technol-ogy using Robot Contest and Open Collabora-tion” Masaki Yamamoto (AI Solution Center, Panasonic,Japan)

5B-3: “Boosting Chipkill Capability underRetention-Error Induced Reliability Emer-gency” Xianwei Zhang (AMD, U.S.A.), RujiaWang, Youtao Zhang, Jun Yang (Univ. of Pittsburgh,U.S.A.)

5C-3: “Semi-Supervised Hotspot Detection withSelf-Paced Multi-Task Learning” Ying Chen (Chi-nese Academy of Sciences/Univ. of Chinese Academy of Sciences,China), Yibo Lin (Univ. of Texas, Austin, U.S.A.), TianyangGai (Chinese Academy of Sciences/Univ. of Chinese Academyof Sciences, China), Yajuan Su (Chinese Academy of Sciences,China), Yayi Wei (Chinese Academy of Sciences/Univ. of Chi-nese Academy of Sciences, China), David Z. Pan (Univ. ofTexas, Austin, U.S.A.)

Coffee break (15:05 - 15:35)

Page 10: ASP-DAC 2019 Advance Program · Monday, January 21, 2019 ASP-DAC 2019 offers attendees a set of three-hour intense introductions to specific topics. If you register for tutorials,

15:35 6A: (DF-2) Advanced Imaging Technologies andApplications

6B: Optimized Training for Neural Networks 6C: New Trends in Biochips 6D: Power-efficient Machine Learning HardwareDesign

Organizer: Masaki Sakakibara (Sony SemiconductorSolutions, Japan), Organizer/Chair: Shinichi Shibahara(Renesas Electronics, Japan)

Chairs: Deliang Fan (Univ. of Central Florida, U.S.A.),Raymond (Ruirui) Huang (Alibaba Cloud, U.S.A.)

Chair: Tsun-Ming Tseng (Tech. Univ. of Munich, Ger-many)

Chairs: Hai Wang (UESTC, China), Sheldon Tan (Univ.of California, Riverside, U.S.A.)

6A-1: “NIR Lock-in Pixel Image Sensors for Re-mote Heart Rate Detection” Shoji Kawahito, CaoChen, Leyi Tan, Keiichiro Kagawa, Keita Yasutomi(Shizuoka Univ., Japan), Norimichi Tsumura (Chiba Univ.,Japan)

6B-1: “CAPTOR: A Class Adaptive Filter Prun-ing Framework for Convolutional Neural Networksin Mobile Applications” Zhuwei Qin, Fuxun Yu(George Mason Univ., U.S.A.), ChenChen Liu (ClarksonUniv., U.S.A.), Xiang Chen (George Mason Univ., U.S.A.)

6C-1: “Factorization Based Dilution of Bio-chemical Fluids with Micro-Electrode-Dot-ArrayBiochips” Sohini Saha (IIEST, Shibpur, India), De-braj Kundu, Sudip Roy (IIT Roorkee, India), SukantaBhattacharjee (New York Univ., United Arab Emirates), Kr-ishnendu Chakrabarty (Duke Univ., U.S.A.), Partha P.Chakrabarti (IIT Kharagpur, India), Bhargab B. Bhat-tacharya (ISI Kolkata, India)

6D-1: “SAADI: A Scalable Accuracy Approxi-mate Divider for Dynamic Energy-Quality Scal-ing” Setareh Behroozi, Jingjie Li, Jackson Melchert,Younghyun Kim (Univ. of Wisconsin-Madison, U.S.A.)

6A-2: “A TDC/ADC Hybrid LiDAR SoC for 200mRange Detection with High Image Resolution under100klux Sunlight” Kentaro Yoshioka (Toshiba, Japan)

6B-2: “TNPU: An Efficient Accelerator Archi-tecture for Training Convolutional Neural Net-works” Jiajun Li, Guihai Yan, Wenyan Lu, ShuhaoJiang, Shijun Gong, Jingya Wu, Junchao Yan, Xi-aowei Li (Chinese Academy of Sciences, China)

6C-2: “Sample Preparation for Multiple-Reactant Bioassays on Micro-Electrode-Dot-ArrayBiochips” Tung-Che Liang (Duke Univ., U.S.A.),Yun-Sheng Chan (National Chiao Tung Univ., Taiwan),Tsung-Yi Ho (National Tsing Hua Univ., Taiwan), Krish-nendu Chakrabarty (Duke Univ., U.S.A.), Chen-Yi Lee(National Chiao Tung Univ., Taiwan)

6D-2: “SeFAct: Selective Feature Activation andEarly Classification for CNNs” Farhana SharminSnigdha, Ibrahim Ahmed, Susmita Dey Manasi,Meghna G. Mankalale (Univ. of Minnesota, U.S.A.), JiangHu (Texas A&M Univ., U.S.A.), Sachin S. Sapatnekar(Univ. of Minnesota, U.S.A.)

6A-3: “A 1/4-inch 3.9Mpixel Low Power Event-driven Back-illuminated Stacked CMOS Image sen-sor” Oichi Kumagai (Sony Semiconductor Solutions, Japan)

6B-3: “REIN: A Robust Training Method for En-hancing Generalization Ability of Neural Networksin Autonomous Driving Systems” Fuxun Yu (GeorgeMason Univ., U.S.A.), Chenchen Liu (Clarkson Univ., U.S.A.),Xiang Chen (George Mason Univ., U.S.A.)

6C-3: “Robust Sample Preparation on Low-CostDigital Microfluidic Biochips” Zhanwei Zhong(Duke Univ., U.S.A.), Robert Wille (Johannes Kepler Univ.Linz, Austria), Krishnendu Chakrabarty (Duke Univ.,U.S.A.)

6D-3: “FACH: FPGA-based Acceleration of Hy-perdimensional Computing by Reducing Computa-tional Complexity” Mohsen Imani, Sahand Salamat,Saransh Gupta, Jiani Huang, Tajana Rosing (UC SanDiego, U.S.A.)

17:15

6A-4: “Next-Generation Fundus Camera with Full-Color Image Acquisition in 0-lx Visible Light us-ing BSI CMOS Image Sensor with Advanced NIRMulti-Spectral Imaging System -Application FieldDevelopment of Dynamic Intelligent Systems Us-ing High-Speed Vision-” Hirofumi Sumi, HironariTakehara (NAIST, Japan), Norimasa Kishi (Univ. of Tokyo,Japan), Jun Ohta (NAIST, Japan), Masatoshi Ishikawa(Univ. of Tokyo, Japan)

Banquet (18:30 - 20:30)

Page 11: ASP-DAC 2019 Advance Program · Monday, January 21, 2019 ASP-DAC 2019 offers attendees a set of three-hour intense introductions to specific topics. If you register for tutorials,

Thursday, January 24, 2019

Registration (7:30 - )

9:00 3K: Keynote IIIChair: Shinji Kimura (Waseda Univ., Japan)

10:00Yasuhisa Shimazaki (Renesas Electronics, Japan) “Hardware and Software Security Technologies to Enable Future Connected Cars”

Coffee break (10:00 - 10:20)

10:20 7A: (SS-4) Security of Machine Learning andMachine Learning for Security: Progress andChallenges for Secure, Machine Intelligent Mo-bile Systems

7B: System Level Modelling Methods II 7C: Placement 7D: Algorithms and Architectures for EmergingApplications

Chairs: Xiang Chen (George Mason Univ., U.S.A.),Yanzhi Wang (Northeastern Univ., U.S.A.)

Chair: Naehyuck Chang (KAIST, Republic of Korea) Chairs: Ting-Chi Wang (National Tsing Hua Univ.), Ya-suhiro Takashima (Univ. of Kitakyushu, Japan)

Chair: Taewhan Kim (Seoul National Univ., Republic ofKorea)

7A-1: “ADMM Attack: An Enhanced AdversarialAttack for Deep Neural Networks with UndetectableDistortions” Pu Zhao, Kaidi Xu (Northeastern Univ.,U.S.A.), Sijia Liu (IBM Research, U.S.A.), Yanzhi Wang,Xue Lin (Northeastern Univ., U.S.A.)

7B-1: “SIMULTime: Context-Sensitive TimingSimulation on Intermediate Code Representationfor Rapid Platform Explorations” Alessandro Cor-naglia, Alexander Viehl (FZI Research Center for Informa-tion Technology, Germany), Oliver Bringmann, WolfgangRosenstiel (Univ. of Tbingen, Germany)

7C-1: “Diffusion Break-Aware Leakage Power Op-timization and Detailed Placement in Sub-10nmVLSI” Sun ik Heo (Samsung Electronics, Republic of Ko-rea), Andrew B. Kahng, Minsoo Kim, Lutong Wang(UC San Diego, U.S.A.)

7D-1: “An Approximation Algorithm to the Op-timal Switch Control of Reconfigurable BatteryPacks” Shih-Yu Chen, Jie-Hong Jiang (National Tai-wan Univ., Taiwan), Shou-Hung Ling, Shih-Hao Liang,Mao-Cheng Huang (ITRI, Taiwan)

7A-2: “A System-level Perspective to Understandthe Vulnerability of Deep Learning Systems” TaoLiu, Nuo Xu, Qi Liu (Florida International Univ., U.S.A.),Yanzhi Wang (Northeastern Univ., U.S.A.), Wujie Wen(Florida International Univ., U.S.A.)

7B-2: “Modeling Processor Idle Times in MP-SoC Platforms to Enable Integrated DPM, DVFS,and Task Scheduling Subject to a Hard Dead-line” Amirhossein Esmaili, Mahdi Nazemi, Mas-soud Pedram (Univ. of Southern California, U.S.A.)

7C-2: “MDP-trees: Multi-Domain Macro Place-ment for Ultra Large-Scale Mixed-Size De-signs” Yen-Chun Liu (National Taiwan Univ., Taiwan),Tung-Chieh Chen (Maxeda Technology, Taiwan), Yao WenChang, Sy-Yen Kuo (National Taiwan Univ., Taiwan)

7D-2: “Autonomous Vehicle Routing In Multiple In-tersections” Sheng-Hao Lin, Tsung-Yi Ho (NationalTsing Hua Univ., Taiwan)

7A-3: “High-Performance Adaptive Mobile Secu-rity Enhancement against Malicious Speech and Im-age Recognition” Zirui Xu, Fuxun Yu (George MasonUniv., U.S.A.), Chenchen Liu (Clarkson Univ., U.S.A.), Xi-ang Chen (George Mason Univ., U.S.A.)

7B-3: “Phone-nomenon: A System-Level ThermalSimulator for Handheld Devices” Hong-Wen Chiou,Yu-Min Lee, Shin-Yu Shiau (National Chiao Tung Univ.,Taiwan), Chi-Wen Pan, Tai-Yu Chen (Mediatek, Taiwan)

7C-3: “A Shape-Driven Spreading AlgorithmUsing Linear Programming for Global Place-ment” Shounak Dhar (Univ. of Texas, Austin, U.S.A.),Love Singhal, Mahesh A. Iyer (Intel, U.S.A.), David Z.Pan (Univ. of Texas, Austin, U.S.A.)

7D-3: “GRAM: Graph Processing in a ReRAM-based Computational Memory” Minxuan Zhou,Mohsen Imani, Saransh Gupta, Yeseong Kim, Ta-jana Rosing (Univ. of California, San Diego, U.S.A.)

12:00

7A-4: “AdverQuil: an Efficient Adversarial Detec-tion and Alleviation Technique for Black-Box Neu-romorphic Computing Systems” Hsin-Pai Cheng,Juncheng Shen, Huanrui Yang (Duke Univ., U.S.A.),Qing Wu (Air Force Research Laboratory, U.S.A.), Hai Li,Yiran Chen (Duke Univ., U.S.A.)

7A-4: “AdverQuil: an Efficient Adversarial Detec-tion and Alleviation Technique for Black-Box Neu-romorphic Computing Systems” Hsin-Pai Cheng,Juncheng Shen, Huanrui Yang (Duke Univ., U.S.A.),Qing Wu (Air Force Research Laboratory, U.S.A.), Hai Li,Yiran Chen (Duke Univ., U.S.A.)

7B-4: “Virtual Prototyping of HeterogeneousAutomotive Applications: Matlab, SystemC, orboth?” Xiao Pan, Carna Zivkovic, Christoph Grimm(Univ. of Kaiserslautern, Germany)

7C-4: “Finding Placement-Relevant Clusters WithFast Modularity-Based Clustering” Mateus Fogaca(Univ. Federal do Rio Grande do Sul, Brazil), Andrew B.Kahng (Univ. of California, San Diego, U.S.A.), Ricardo Au-gusto da Luz Reis (Univ. Federal do Rio Grande do Sul,Brazil), Lutong Wang (Univ. of California, San Diego, U.S.A.)

Lunch Break (12:00 - 13:15)

Page 12: ASP-DAC 2019 Advance Program · Monday, January 21, 2019 ASP-DAC 2019 offers attendees a set of three-hour intense introductions to specific topics. If you register for tutorials,

13:15 8A: (DF-3) Emerging Technologies for TokyoOlympic 2020

8B: Embedded Software for Parallel Architecture 8C: Machine Learning and Hardware Security 8D: Memory Architecture for Efficient NeuralNetwork Computing

Organizer/Chair: Koichiro Yamashita (Fujitsu, Japan),Organizer: Akihiko Inoue (Panasonic, Japan)

Chairs: Mengying Zhao (Shandong Univ., China), We-ichen Liu (Nanyang Technological Univ.)

Chairs: Dong Kyue Kim (Hanyang Univ., Republic ofKorea), Ray C.C. Cheung (City Univ. of Hong Kong, HongKong)

Chairs: Jongeun Lee (UNIST, Republic of Korea), Bei Yu(Chinese Univ. of Hong Kong, Hong Kong)

8A-1: “Walking assistive powered-wear ’HIMICO’with wire-driven assist” Kenta Murakami (Panasonic,Japan)

8B-1: “Efficient Sporadic Task Handling in Paral-lel AUTOSAR Applications Using Runnable Migra-tion” Milan Copic, Rainer Leupers, Gerd Ascheid(RWTH Aachen Univ., Germany)

8C-1: “Towards Practical Homomorphic EmailFiltering: A Hardware-Accelerated Secure NaiveBayesian Filter” Song Bian, Masayuki Hiromoto,Takashi Sato (Kyoto Univ., Japan)

8D-1: “Sparsity for ReRAM: Pruning and MappingSparse Neural Network for ReRAM based Acceler-ator” Jilan Lin (UCSB/Tsinghua Univ., China), ZhenhuaZhu, Yu Wang (Tsinghua Univ., China), Yuan Xie (UCSB,U.S.A.)

8A-2: “Deep Scene Recognition with Object Detec-tion” Zhiming Tan (Fujitsu R&D Center, China)

8B-2: “A Heuristic for Multi Objective Soft-ware Application Mappings on Heterogeneous MP-SoCs” Gereon Onnebrink, Ahmed Hallawa, RainerLeupers, Gerd Ascheid (RWTH Aachen Univ., Germany),Awaid-Ud-Din Shaheen (Silexica GmbH, Germany)

8D-2: “In-Memory Batch-Normalization for Resis-tive Memory based Binary Neural Network Hard-ware” Hyungjun Kim, Yulhwa Kim, Jae-Joon Kim(POSTECH, Republic of Korea)

8C-2: “A 0.16pJ/bit Recurrent Neural NetworkBased PUF for Enhanced Machine Learning AttackResistance” Nimesh Kirit Shah (Nanyang TechnologicalUniv., Singapore), Manaar Alam (Indian Inst. of Tech. Kharag-pur, India), Durga Prasad Sahoo (Robert Bosch Engineeringand Business Solutions Private, India), Debdeep Mukhopad-hyay (Indian Inst. of Tech. Kharagpur, India), Arindam Basu(Nanyang Technological Univ., Singapore)

14:30

8A-3: “Spatial and battery sensing solutions forsmart cities leading to 2020 Olympics” HiroyukiTsujikawa (Panasonic, Japan)

8B-3: “ReRam-based Processing-in-Memory Ar-chitecture for Blockchain Platforms” Fang Wang(Hong Kong Polytechnic Univ., Hong Kong), Zhaoyan Shen(Shandong Univ., China), Lei Han (Hong Kong PolytechnicUniv., Hong Kong), Zili Shao (Chinese Univ. of Hong Kong,Hong Kong)

8C-3: “P3M: A PIM-based Neural Network ModelProtection Scheme for Deep Learning Accelera-tor” Wen Li, Ying Wang, Huawei Li, Xiaowei Li(Chinese Academy of Sciences, China)

8D-3: “Exclusive On-Chip Memory Architec-ture for Energy-Efficient Deep Learning Accelera-tion” Hyeonuk Sim (UNIST, Republic of Korea), JasonAnderson (Univ. of Toronto, Canada), Jongeun Lee (UNIST,Republic of Korea)

Coffee break (14:30 - 14:50)

Page 13: ASP-DAC 2019 Advance Program · Monday, January 21, 2019 ASP-DAC 2019 offers attendees a set of three-hour intense introductions to specific topics. If you register for tutorials,

14:50 9A: (DF-4) Beyond the Virtual Reality World 9B: Logic-Level Security and Synthesis 9C: Analysis and Algorithms for Digital DesignVerification

9D: FPGA and Optics-Based Neural Network De-signs

Organizer: Hiroe Iwasaki (NTT, Japan), Orga-nizer/Chair: Masaru Kokubo (Hitachi, Japan)

Chairs: Akash Kumar (TU Dresden), Tsutomu Sasao(Meiji Univ.)

Chairs: Mark Po-Hung Lin (National Chung Cheng Univ.,Taiwan), Andreas G. Veneris (Univ. of Toronto, Canada)

Chair: Taewhan Kim (Seoul National Univ., Republic ofKorea)

9A-1: “The World of VR2.0” Michitaka Hirose(Univ. of Tokyo, Japan)

9B-1: “BeSAT: Behavioral SAT-based Attack onCyclic Logic Encryption” Yuanqi Shen, You Li,Amin Rezaei, Shuyu Kong, David Dlott, Hai Zhou(Northwestern Univ., U.S.A.)

9C-1: “A Figure of Merit for Assertions in Ver-ification” Samuel Hertz, Debjit Pal, Spencer Of-fenberger, Shobha Vasudevan (Univ. of Illinois, Urbana-Champaign, U.S.A.)

9D-1: “Implementing Neural Machine Translationwith Bi-Directional GRU and Attention Mechanismon FPGAs Using HLS” Qin Li, Xiaofan Zhang (Univ.of Illinois, Urbana-Champaign, U.S.A.), Jinjun Xiong (IBM,U.S.A.), Wen-mei Hwu, Deming Chen (Univ. of Illinois,Urbana-Champaign, U.S.A.)

9A-2: “Optical fiber scanning system for ultra-lightweight wearable display” Takahiro Matsuda(Hitachi, Japan)

9B-2: “Structural Rewriting in XOR-MajorityGraphs” Zhufei Chu (Ningbo Univ., China), Math-ias Soeken (EPFL, Switzerland), Yinshui Xia, LunyaoWang (Ningbo Univ., China), Giovanni De Micheli (EPFL,Switzerland)

9C-2: “Suspect2vec: A Suspect Prediction Modelfor Directed RTL Debugging” Neil Veira, ZissisPoulos, Andreas Veneris (Univ. of Toronto, Canada)

9D-2: “Efficient FPGA Implementation of Lo-cal Binary Convolutional Neural Network” AidynZhakatayev, Jongeun Lee (Ulsan National Inst. of Scienceand Tech., Republic of Korea)

16:05

9A-3: “Superreal Video Representation for En-hanced Sports Experiences - R&D on VR x AI tech-nologies -” Hideaki Kimata (NTT, Japan)

9B-3: “Design Automation for Adiabatic Cir-cuits” Alwin Zulehner (Johannes Kepler Univ. Linz, Aus-tria), Micheal Frank (Sandia National Labs, U.S.A.), RobertWille (Johannes Kepler Univ. Linz, Austria)

9C-3: “Path Controllability Analysis for High Qual-ity Designs” Li-Jie Chen (National Taiwan Univ., Taiwan),Hong-Zu Chou, Kai-Hui Chang (Avery Design Systems,U.S.A.), Sy-Yen Kuo (National Taiwan Univ., Taiwan), Chi-lai Huang (Avery Design Systems, U.S.A.)

9D-3: “Hardware-software Co-design of SlimmedOptical Neural Networks” Zheng Zhao, Derong Liu,Meng Li, Zhoufeng Ying, Biying Xu (Univ. of Texas,Austin, U.S.A.), Lu Zhang, Bei Yu (Chinese Univ. of HongKong, Hong Kong), Ray T. Chen, David Z. Pan (Univ. ofTexas, Austin, U.S.A.)

Coffee break (16:05 - 16:25)

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16:25 10A: (SS-5) The Resurgence of ReconfigurableComputing in the Post Moore Era

10B: Hardware Acceleration 10C: Routing

Chair: Antonino Tumeo (Pacific Northwest National Lab-oratory, U.S.A.)

Chairs: Yongpan Liu (Tsinghua Univ., China), XiangChen (George Mason Univ., U.S.A.)

Chairs: Hunng-Ming Chen (NCTU), Kohira Yuki-hide (Univ. of Aizu)

10A-1: “Software Defined Architectures for DataAnalytics” Vito Giovanni Castellana, Marco Min-utoli, Antonino Tumeo (Pacific Northwest National Labo-ratory, U.S.A.), Pietro Fezzardi, Marco Lattuada, Fab-rizio Ferrandi (Politecnico di Milano, Italy)

10B-1: “Addressing the Issue of Processing Ele-ment Under-Utilization in General-Purpose SystolicDeep Learning Accelerators” Bosheng Liu (Univ.of Chinese Academy of Sciences/Chinese Academy of Sciences,China), Xiaoming Chen, Ying Wang, Yinhe Han (Chi-nese Academy of Sciences, China), Jiajun Li, Haobo Xu(Univ. of Chinese Academy of Sciences, China), Xiaowei Li(Chinese Academy of Sciences, China)

10C-1: “Detailed Routing by Sparse Grid Graphand Minimum-Area-Captured Path Search” GengjieChen, Chak-Wa Pui, Haocheng Li, Jingsong Chen,Bentian Jiang, Evangeline F. Y. Young (Chinese Univ.of Hong Kong, Hong Kong)

10A-2: “Runtime Reconfigurable Memory Hierar-chy in Embedded Scalable Platforms” Davide Giri,Paolo Mantovani, Luca P. Carloni (Columbia Univ.,U.S.A.)

10B-2: “ALook: Adaptive Lookup for GPGPU Ac-celeration” Daniel Peroni, Mohsen Imani, TajanaRosing (Univ. of California, San Diego, U.S.A.)

10C-2: “Thermal-aware 3D Symmetrical BufferedClock Tree Synthesis” Deok Keun Oh, Mu JunChoi, Ju Ho Kim (Sogang Univ., Republic of Korea)

17:40

10A-3: “XPPE: Cross-Platform Performance Esti-mation of Hardware Accelerators Using MachineLearning” Hosein Mohamamdi Makrani, HosseinSayadi, Tinoosh Mohsenin, Avesta Sasan, HoumanHomayoun, Setareh Rafatirad (George Mason Univ.,U.S.A.)

10B-3: “Collaborative Accelerators for In-MemoryMapReduce on Scale-up Machines” Abraham Ad-disie, Valeria Bertacco (Univ. of Michigan, U.S.A.)

10C-3: “Latency Constraint Guided Buffer Sizingand Layer Assignment for Clock Trees with Use-ful Skew” Necati Uysal (Univ. of Central Florida, U.S.A.),Wen-Hao Liu (Cadence Design Systems, U.S.A.), RickardEwetz (Univ. of Central Florida, U.S.A.)

Page 15: ASP-DAC 2019 Advance Program · Monday, January 21, 2019 ASP-DAC 2019 offers attendees a set of three-hour intense introductions to specific topics. If you register for tutorials,

ASP-DAC 2019 Advance Program24th Asia and South Pacific Design Automation Conference

Date: January, 21-24, 2019Place: Tokyo Odaiba Waterfront, Tokyo, Japan

HighlightsOpening and Keynote I

Tuesday, January 22, 2019, 9:30-10:30

Tao Zhang (Tsinghua University, China) “The development trendof artificial intelligence technology and its application in thefield of robotics”

Keynote IIWednesday, January 23, 2019, 9:00-10:00

Satoshi Matsuoka (RIKEN, Japan) “A Game-changing Super-computer with Groundbreaking A64fx High PerformanceArm Processor”

Keynote IIIThursday, January 24, 2019, 9:00-10:00

Steve Trimberger (Renesas Electronics, Japan) “Hardware andSoftware Security Technologies to Enable Future ConnectedCars”

Special Sessions1A: (Presentation + Poster Discussion) University DesignContest

Tuesday, January 22, 2019, 10:45-12:00

2A (SS-1): (Invited Talks) Reverse Engineering: growingmore mature — and facing powerful countermeasures

Tuesday, January 22, 2019, 13:30-15:35

3A (SS-2): (Invited Talks) Design, testing, and fault tol-erance of Neuromorphic systems

Tuesday, January 22, 2019, 15:55-17:10

4A (SS-3): (Invited Talks) Modern Mask Optimization:From Shallow To Deep Learning

Wednesday, January 23, 2019, 10:20-12:00

7A (SS-4): (Invited Talks) Security of Machine Learningand Machine Learning for Security: Progress and Chal-lenges for Secure, Machine Intelligent Mobile Systems

Thursday, January 24, 2019, 10:20-12:00

10A (SS-5): (Invited Talks) The Resurgence of Reconfig-urable Computing in the Post Moore Era

Thursday, January 24, 2019, 16:25-17:40

Designers’ Forum5A (DF-1): (Oral Session) Robotics: From System De-sign to Application

Wednesday, January 23, 2019, 13:50-15:05

6A (DF-2): (Oral Session) Advanced Imaging Technolo-gies and Applications

Wednesday, January 23, 2019, 15:35-17:15

8A (DF-3): (Oral Session) Emerging Technologies forTokyo Olympic 2020

Thursday, January 24, 2019, 13:15-14:30

9A (DF-4): (Oral Session) Beyond the Virtual RealityWorld

Thursday, January 24, 2019, 14:50-16:05

TutorialsTutorial-1: Integrating Hardware and Algorithm Ad-vances for Cognitive Systems

Monday, January 21, 2019, 9:30-12:30Speakers:Kaushik Roy (Purdue University)Hai Li (Duke University)

Tutorial-2: Enablement of No-Human-in-the-Loop ICDesign: Status and Directions

Monday, January 21, 2019, 9:30-12:30Organizer:Andrew B. Kahng (University of California, San Diego)

Speakers:David White, Senior (Cadence Design Systems, Inc.)Shankar Sadasivam (Qualcomm Inc.)Andrew B. Kahng (University of California, San Diego)

Tutorial-3: Energy-Efficient Processing and MachineLearning at the Edge: from Sensing to Sensemaking

Monday, January 21, 2019, 9:30-12:30Organizer/Speaker:Massimo Alioto (National University of Singapore)

Tutorial-4: Design for Reliability in the Nano-CMOSEra: New Holistic Methodologies for Reliability Mod-eling and Optimization

Monday, January 21, 2019, 9:30-12:30Organizers/Speakers:Sheldon Tan (University of California, Riverside)Hussam Amrouch (Karlsruhe Institute of Technology)

Tutorial-5: Machine Learning in TestMonday, January 21, 2019, 9:30-12:30

Organizer/Speaker:Yu Huang (Mentor, A Siemens Business)

Tutorial-6: Recent Development and Future Perspectiveof Quantum Annealing

Monday, January 21, 2019, 14:00-17:00Organizer:Shu Tanaka (Waseda University)

Speakers:Shu Tanaka (Waseda University)Yoshiki Matsuda (Fixstars Corporation)Kotaro Tanahashi (Recruit Communications Co., Ltd.)Yuya Seki (National Institute of Advanced Industrial Science and Technology,

Japan)

Tutorial-7: Embedded Heterogeneous Computing: Ar-chitectural Landscape and Software Challenges

Monday, January 21, 2019, 14:00-17:00Organizer/Speaker:Tulika Mitra (National University of Singapore)

Tutorial-8: Smart Image Sensor SystemsMonday, January 21, 2019, 14:00-17:00

Organizers/Speakers:Marilyn Wolf (Georgia Institute of Technology)Saibal Mukhopodhyay (Georgia Institute of Technology)

Tutorial-9: Machine Learning for Reliability of ICs andSystems

Monday, January 21, 2019, 14:00-17:00Speakers:Mehdi B. Tahoori (Karlsruhe Institute of Technology)Krishnendu Chakrabarty (Duke University)

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Monday, January 21, 2019

ASP-DAC 2019 offers attendees a set of three-hour intense introductions to specific topics. If you register for tutorials, you have the option to select two out of the nine topics. This year, eachtutorial will be presented once.

Registration (8:00 - )

Room Saturn Room Uranus Room Venus Room Mars Room Mercury

9:30 Tutorial 1: Integrating Hardware andAlgorithm Advances for Cognitive Sys-tems

Tutorial 2: Enablement of No-Human-in-the-Loop IC Design: Status and Di-rections

Tutorial 3: Energy-Efficient Process-ing and Machine Learning at the Edge:from Sensing to Sensemaking

Tutorial 4: Design for Reliability inthe Nano-CMOS Era: New HolisticMethodologies for Reliability Model-ing and Optimization

Tutorial 5: Machine Learning in Test

Organizer:Andrew B. Kahng (University of California,

San Diego)

Organizers:Sheldon Tan (University of California, River-

side)Hussam Amrouch (Karlsruhe Institute of

Technology)

Organizer:Yu Huang (Mentor, A Siemens Business)

12:30

Speakers:Kaushik Roy (Purdue University)Hai Li (Duke University)

Speakers:David White, Senior (Cadence Design Sys-

tems, Inc.)Shankar Sadasivam (Qualcomm Inc.)Andrew B. Kahng (University of California,

San Diego)

Speaker:Massimo Alioto (National University of Sin-

gapore)

Speakers:Sheldon Tan (University of California, River-

side)Hussam Amrouch (Karlsruhe Institute of

Technology)

Speaker:Yu Huang (Mentor, A Siemens Business)

Lunch Break (12:30 - 14:00)

14:00 Tutorial 6: Recent Development andFuture Perspective of Quantum An-nealing

Tutorial 7: Embedded HeterogeneousComputing: Architectural Landscapeand Software Challenges

Tutorial 8: Smart Image Sensor Sys-tems

Tutorial 9: Machine Learning for Reli-ability of ICs and Systems

Organizer:Shu Tanaka (Waseda University)

Organizers:Marilyn Wolf (Georgia Institute of Technol-

ogy)Saibal Mukhopodhyay (Georgia Institute of

Technology)

17:00

Speakers:Shu Tanaka (Waseda University)Yoshiki Matsuda (Fixstars Corporation)Kotaro Tanahashi (Recruit Communications

Co., Ltd.)Yuya Seki (National Institute of Advanced In-

dustrial Science and Technology)

Speaker:Tulika Mitra (National University of Singapore)

Speakers:Marilyn Wolf (Georgia Institute of Technol-

ogy)Saibal Mukhopodhyay (Georgia Institute of

Technology)

Speakers:Mehdi B. Tahoori (Karlsruhe Institute of

Technology)Krishnendu Chakrabarty (Duke University)

Page 17: ASP-DAC 2019 Advance Program · Monday, January 21, 2019 ASP-DAC 2019 offers attendees a set of three-hour intense introductions to specific topics. If you register for tutorials,

Tuesday, January 22, 2019

Registration (7:00 - )

9:00 1K: Opening & Keynote I

Tao Zhang (Tsinghua Univ., China) “The development trend of artificial intelligence technology and its application in the field of robotics”

Coffee break (10:30 - 10:45)

10:45 1A: University Design Contest 1B: Real-time Embedded Software 1C: Hardware and System Security 1D: Thermal- and Power-Aware Design and Op-timization

Chairs: Kousuke Miyaji (Shinshu Univ., Japan), AkiraTsuchiya (Univ. of Shiga Prefecture, Japan)

Chairs: Zhaoyan Shen (Shandong Univ.), Zebo Peng(Linkping Univ., Sweden)

Chairs: Ray C.C. Cheung (City Univ. of Hong Kong, HongKong), Hai Zhou (Northwestern Univ., U.S.A.)

Chairs: Hussam Amrouch (Karlsruhe Inst. of Tech. (KIT),Germany), Jiang Hu (Texas A&M)

(The titles of the presentations are listed in the nextpage)

1B-1: “Towards Limiting the Impact of TimingAnomalies in Complex Real-Time Processors” Pe-dro Benedicte (Barcelona Supercomputing Center and Univ.Politecnica de Catalunya, Spain), Jaume Abella, CarlesHernandez, Enrico Mezzetti (Barcelona SupercomputingCenter, Spain), Francisco J. Cazorla (Barcelona Supercom-puting Center and IIIA-CSIC, Spain)

1C-1: “Layout Recognition Attacks on Split Manu-facturing” Wenbin Xu, Lang Feng, Jeyavijayan Ra-jendran, Jiang Hu (Texas A&M Univ., U.S.A.)

1D-1: “Leakage-Aware Thermal Management forMulti-Core Systems Using Piecewise Linear ModelBased Predictive Control” Xingxing Guo, HaiWang, Chi Zhang, He Tang, Yuan Yuan (Univ. of Elec-tronic Science and Tech. of China, China)

1B-2: “SeRoHAL: Generation of Selectively RobustHardware Abstraction Layers for Efficient Protec-tion of Mixed-criticality Systems” Petra R. Klee-berger, Juana Rivera, Daniel Mueller-Gritschneder,Ulf Schlichtmann (Tech. Univ. Mnchen, Germany)

1C-2: “Execution of Provably Secure Assays onMEDA Biochips to Thwart Attacks” Tung-CheLiang (Duke Univ., U.S.A.), Mohammed Shayan (NewYork Univ., U.S.A.), Krishnendu Chakrabarty (Duke Univ.,U.S.A.), Ramesh Karri (New York Univ., U.S.A.)

1D-2: “Multi-Angle Bended Heat Pipe Design us-ing X-Architecture Routing with Dynamic ThermalWeight on Mobile Devices” Hsuan-Hsuan Hsiao,Hong-Wen Chiou, Yu-Min Lee (National Chiao TungUniv., Taiwan)

12:00

1B-3: “Partitioned and Overhead-Aware Schedulingof Mixed-Criticality Real-Time Systems” YuanbinZhou, Soheil Samii, Petru Eles, Zebo Peng (LinkpingUniv., Sweden)

1C-3: “TAD: Time Side-Channel Attack Defenseof Obfuscated Source Code” Alexander Fell, HungThinh Pham, Siew Kei Lam (Nanyang Technological Univ.,Singapore)

1D-3: “Fully-automated Synthesis of Power Man-agement Controllers from UPF” Dustin Peterson,Oliver Bringmann (Univ. of Tuebingen, Germany)

Lunch Break (12:00 - 13:30)University LSI Design Contest Poster Presentation [Food will be served] (12:00 - 13:30)

Page 18: ASP-DAC 2019 Advance Program · Monday, January 21, 2019 ASP-DAC 2019 offers attendees a set of three-hour intense introductions to specific topics. If you register for tutorials,

10:45 1A: University Design ContestChairs: Kousuke Miyaji (Shinshu Univ., Japan), Akira Tsuchiya (Univ. of Shiga Prefecture, Japan)

<Oral Presentation>1A-1: “A Wide Conversion Ratio, 92.8% Efficiency, 3-Level Buck Converter with Adaptive On/Off-Time Control and Shared Charge Pump Intermediate Voltage Regulator” Kousuke Miyaji, Yuki Karasawa, TakanobuFukuoka (Shinshu Univ., Japan)

1A-2: “A Three-Dimensional Millimeter-Wave Frequency-Shift Based CMOS Biosensor using Vertically Stacked Spiral Inductors in LC Oscillators” Maya Matsunaga, Taiki Nakanishi, Atsuki Kobayashi (NagoyaUniv., Japan), Kiichi Niitsu (Nagoya Univ./JST PRESTO, Japan)

1A-3: “Design of 385 x 385 m2 0.165V 270pW Fully-Integrated Supply-Modulated OOK Transmitter in 65nm CMOS for Glasses-Free, Self-Powered, and Fuel-Cell-Embedded Continuous Glucose MonitoringContact Lens” Kenya Hayashi, Shigeki Arata, Ge Xu, Shunya Murakami, Cong Dang Bui, Takuyoshi Doike, Maya Matsunaga, Atsuki Kobayashi, Kiichi Niitsu (Nagoya Univ., Japan)

1A-4: “2D Optical Imaging Using Photosystem I Photosensor Platform with 32x32 CMOS Biosensor Array” Kiichi Niitsu, Taichi Sakabe (Nagoya Univ., Japan), Mariko Miyachi, Yoshinori Yamanoi, Hiroshi Nishihara(Univ. of Tokyo, Japan), Tatsuya Tomo (Tokyo Univ. of Science, Japan), Kazuo Nakazato (Nagoya Univ., Japan)

1A-5: “Design of Gate-Leakage-Based Timer Using an Amplifier-Less Replica-Bias Switching Technique in 55-nm DDC CMOS” Atsuki Kobayashi, Yuya Nishio, Kenya Hayashi, Shigeki Arata (Nagoya Univ., Japan),Kiichi Niitsu (Nagoya Univ./JST PRESTO, Japan)

1A-6: “A Low-Voltage CMOS Electrophoresis IC Using Electroless Gold Plating for Small-Form-Factor Biomolecule Manipulation” Kiichi Niitsu, Yuuki Yamaji, Atsuki Kobayashi, Kazuo Nakazato (Nagoya Univ.,Japan)

1A-7: “A Low-Voltage Low-Power Multi-Channel Neural Interface IC Using Level-Shifted Feedback Technology” Liangjian Lyu, Yu Wang (Fudan Univ., China), Chixiao Chen, C. -J. Richard Shi (Univ. of Washington, U.S.A.)

1A-8: “Development of a High Stability, Low Standby Power Six-Transistor CMOS SRAM Employing a Single Power Supply” Nobuaki Kobayashi (Nihon Univ., Japan), Tadayoshi Enomoto (Chuo Univ., Japan)

1A-9: “Design of Heterogeneously-integrated Memory System with Storage Class Memories and NAND Flash Memories” Chihiro Matsui, Ken Takeuchi (Chuo Univ., Japan)

1A-10: “A 65-nm CMOS Fully-Integrated Circulating Tumor Cell and Exosome Analyzer Using an On-Chip Vector Network Analyzer and a Transmission-Line-Based Detection Window” Kiichi Niitsu (Nagoya Univ.,Japan)

1A-11: “Low Standby Power CMOS Delay Flip-Flop with Data Retention Capability” Nobuaki Kobayashi (Nihon Univ., Japan), Tadayoshi Enomoto (Chuo Univ., Japan)

1A-12: “Accelerate Pattern Recognition for Cyber Security Analysis” Mohammad Tahghighi, Wei Zhang (Hong Kong Univ. of Science and Tech., Hong Kong)

12:00

1A-13: “FPGA Laboratory System supporting Power Measurement for Low-Power Digital Design” Marco Winzker, Andrea Schwandt (Bonn-Rhein-Sieg Univ., Germany)

Lunch Break (12:00 - 13:30)University LSI Design Contest Poster Presentation [Food will be served] (12:00 - 13:30)

Page 19: ASP-DAC 2019 Advance Program · Monday, January 21, 2019 ASP-DAC 2019 offers attendees a set of three-hour intense introductions to specific topics. If you register for tutorials,

13:30 2A: (SS-1) Reverse Engineering: growing moremature - and facing powerful countermeasures

2B: All about PIM 2C: Design for Reliability 2D: New Advances in Emerging ComputingParadigms

Chair: Naehyuck Chang (KAIST, Republic of Korea) Chairs: Guangyu Sun (Peking Univ., China), WanliChang (Univ. of York, U.K.)

Chairs: Shigeki Nojima (Toshiba Memory, Japan), BeiYu (Chinese Univ. of Hong Kong, Hong Kong)

Chairs: Shigeru Yamashita (Ritsumeikan Univ., Japan),Xiaoming Chen (Chinese Academy of Sciences, China)

2A-1: “Integrated Flow for Reverse Engineeringof Nanoscale Technologies” Bernhard Lippmann,Aayush Singla, Niklas Unverricht, Peter Egger, AnjaDubotzky, Michael Werner (Infineon Technologies AG,Germany), Horst Gieser (Fraunhofer EMFT, Germany), Mar-tin Rasche, Oliver Kellermann (Raith GmbH, Germany),Helmut Grab (TUM, Germany)

2B-1: “GraphSAR: A Sparsity-Aware Processing-in-Memory Architecture for Large-Scale Graph Pro-cessing on ReRAMs” Guohao Dai (Tsinghua Univ.,China), Tianhao Huang (Massachusetts Inst. of Tech., U.S.A.),Yu Wang, Huazhong Yang (Tsinghua Univ., China), JohnWawrzynek (Univ. of California, Berkeley, U.S.A.)

2C-1: “IR-ATA: IR Annotated Timing Analysis, AFlow for Closing the LoopBetween PDN design,IR Analysis & Timing Closure” Ashkan Vakil,Houman Homayoun, Avesta Sasan (George Mason Univ.,U.S.A.)

2D-1: “Compiling SU(4) Quantum Circuits to IBMQX Architectures” Alwin Zulehner, Robert Wille(Johannes Kepler Univ. Linz, Austria)

2A-2: “NETA: When IP Fails, Secrets Leak” TravisMeade, Jason Portillo, Shaojie Zhang (Univ. of CentralFlorida, U.S.A.), Yier Jin (Univ. of Florida, U.S.A.)

2B-2: “ParaPIM: A Parallel Processing-in-MemoryAccelerator for Binary-Weight Deep Neural Net-works” Shaahin Angizi, Zhezhi He, Deliang Fan(Univ. of Central Florida, U.S.A.)

2C-2: “Learning-Based Prediction of PackagePower Delivery Network Quality” Yi Cao (QualcommTechnologies, U.S.A.), Andrew B. Kahng (UC San Diego,U.S.A.), Joseph Li, Abinash Roy, Vaishnav Srinivas(Qualcomm Technologies, U.S.A.), Bangqi Xu (UC San Diego,U.S.A.)

2D-2: “Quantum Circuit Compilers Using GateCommutation Rules” Toshinari Itoko, Rudy Ray-mond, Takashi Imamichi, Atsushi Matsuo (IBM Re-search, Japan), Andrew W. Cross (IBM Research, U.S.A.)

2A-3: “Machine Learning and Structural Charac-teristics for Reverse Engineering” Johanna Baehr,Alessandro Bernardini, Georg Sigl, Ulf Schlicht-mann (Tech. Univ. of Munich, Germany)

2B-3: “CompRRAE: RRAM-based ConvolutionalNeural Network Accelerator with Reduced Com-putations through a Runtime Activation Estima-tion” Xizi Chen, Jingyang Zhu, Jingbo Jiang, ChiYing Tsui (Hong Kong Univ. of Science and Tech., Hong Kong)

2C-3: “Tackling Signal Electromigration withLearning-Based Detection and Multistage Mitiga-tion” Wei Ye, Mohamed Baker Alawieh, Yibo Lin,David Z. Pan (Univ. of Texas, Austin, U.S.A.)

2D-3: “Scalable Design for Field-coupledNanocomputing Circuits” Marcel Walter (Univ.of Bremen, Germany), Robert Wille (Johannes Kepler Univ.Linz, Austria), Frank Sill Torres (DFKI GmbH, Germany),Daniel Große, Rolf Drechsler (Univ. of Bremen, Germany)

2A-4: “Towards Cognitive Obfuscation: ImpedingHardware Reverse Engineering Based on Psycho-logical Insights” Carina Wiesen, Steffen Becker,Nils Albartus, Max Hoffmann, Sebastian Wallat,Marc Fyrbiak, Nikol Rummel, Christof Paar (RuhrUniv. Bochum, Germany)

2B-4: “CuckooPIM: An Efficient and Less-blockingCoherence Mechanism for Processing-in-MemorySystems” Sheng Xu, Xiaoming Chen, Ying Wang,Yinhe Han, Xiaowei Li (Chinese Academy of Sciences,China)

2C-4: “ROBIN: Incremental Oblique InterleavedECC for Reliability Improvement in STT-MRAMCaches” Elham Cheshmikhani (Sharif Univ. of Tech.,Iran), Hamed Farbeh (Amirkabir Univ. of Tech., Iran), Hos-sein Asadi (Sharif Univ. of Tech., Iran)

2D-4: “BDD-based Synthesis of Optical Logic Cir-cuits Exploiting Wavelenngth Division Multiplex-ing” Ryosuke Matsuo, Jun Shiomi, Tohru Ishi-hara, Hidetoshi Onodera (Kyoto Univ., Japan), AkihikoShinya, Masaya Notomi (NTT, Japan)

15:35

2A-5: “Insights to the Mind of a Trojan De-signer: The Challenge to Integrate a Trojanin the Bitstream” Maik Ender, Paul MartinKnopp, Christof Paar, Pawel Swierczynski, Sebas-tian Wallert, Matthias Wilhelm (Ruhr Univ. Bochum, Ger-many)

2B-5: “AERIS: Area/Energy-Efficient 1T2RReRAM Based Processing-in-Memory NeuralNetwork System-on-a-Chip” Jinshan Yue, YongpanLiu, Fang Su (Tsinghua Univ., China), Shuangchen Li(Univ. of California, Santa Barbara, U.S.A.), Zhe Yuan, ZhiboWang, Wenyu Sun, Xueqing Li, Huazhong Yang(Tsinghua Univ., China)

2C-5: “Aging-aware Chip Health Prediction Adopt-ing an Innovative Monitoring Strategy” Yun-TingWang (National Tsing Hua Univ., Taiwan), Kai-Chiang Wu(National Chiao Tung Univ., Taiwan), Chung-Han Chou(Feng Chia Univ., Taiwan), Shih-Chieh Chang (National Ts-ing Hua Univ., Taiwan)

2D-5: “Hybrid Binary-Unary Hardware Accelera-tor” S. Rasoul Faraji, Kia Bazargan (Univ. of Minnesota,U.S.A.)

Coffee break (15:35 - 15:55)

Page 20: ASP-DAC 2019 Advance Program · Monday, January 21, 2019 ASP-DAC 2019 offers attendees a set of three-hour intense introductions to specific topics. If you register for tutorials,

15:55 3A: (SS-2) Design, testing, and fault tolerance ofNeuromorphic systems

3B: Memory-Centric Design and Synthesis 3C: Efficient Modeling of Analog, Mixed Signaland Arithmetic Circuits

3D: Logic and Precision Optimization for NeuralNetwork Designs

Chair: Chenchen Liu (Clarkson Univ., U.S.A.) Chairs: Shouyi Yin (Tsinghua Univ., China), MatthewZiegler (IBM)

Chairs: Jun Tao (Fudan Univ., China), Shobha Vasude-van (Univ. of Illinois, Urbana-Champaign, U.S.A.)

Chairs: Massanori Muroyama (Tohoku Univ., Japan),Younghyun Kim (Univ. of Wisconsin, U.S.A.)

3A-1: “Fault Tolerance in Neuromorphic Com-puting Systems” Yu Wang (Tsinghua Univ., China),Mengyun Liu, Krishnendu Chakrabarty (Duke Univ.,U.S.A.), Lixue Xia (Tsinghua Univ., China)

3B-1: “A Staircase Structure for Scalable and Effi-cient Synthesis of Memristor-Aided Logic” AlwinZulehner (Johannes Kepler Univ. Linz, Austria), KamalikaDatta (National Inst. of Tech. Meghalaya, India), IndranilSengupta (Indian Inst. of Tech. Kharagpur, India), RobertWille (Johannes Kepler Univ. Linz, Austria)

3C-1: “Efficient Sparsification of dense circuit ma-trices in Model Order Reduction” CharalamposAntoniadis, Nestor Evmorfopoulos, Georgios Sta-moulis (Univ. of Thessaly, Greece)

3D-1: “Energy-Efficient, Low-Latency Realizationof Neural Networks through Boolean Logic Mini-mization” Mahdi Nazemi, Ghasem Pasandi, Mas-soud Pedram (USC, U.S.A.)

3A-2: “Build Reliable and Efficient NeuromorphicDesign with Memristor Technology” Bing Li, Bo-nan Yan (Duke Univ., U.S.A.), Chenchen Liu (ClarksonUniv., U.S.A.), Hai Li (Duke Univ., U.S.A.)

3B-2: “On-chip Memory Optimization for High-level Synthesis of Multi-dimensional Data onFPGA” Daewoo Kim, Sugil Lee, Jongeun Lee (Ul-san National Inst. of Science and Tech., Republic of Korea)

3C-2: “Spectral Approach to Verifying Non-linearArithmetic Circuits” CUNXI YU (EPFL, Switzerland),Tiankai Su, Atif Yasin, Maciej Ciesielski (UMassAmherst, U.S.A.)

3D-2: “Log-Quantized Stochastic Comput-ing for Memory and Computation EfficientDNNs” Hyeonuk Sim, Jongeun Lee (Ulsan NationalInst. of Science and Tech., Republic of Korea)

17:10

3A-3: “Reliable In-Memory Neuromorphic Com-puting Using Spintronics” Christopher Muench, Ra-jendra Bishnoi, Mehdi Tahoori (KIT, Germany)

3B-3: “HUBPA: High Utilization BidirectionalPipeline Architecture for Neuromorphic Comput-ing” Houxiang Ji, Li Jiang, Tianjian Li, NaifengJing, Jing Ke, Xiaoyao Liang (Shanghai Jiao Tong Univ.,China)

3C-3: “S2PM: Semi-Supervised Learning for Effi-cient Performance Modeling of Analog and MixedSignal Circuits” Mohamed Baker Alawieh, XiyuanTang, David Z. Pan (Univ. of Texas, Austin, U.S.A.)

3D-3: “Cell Division: Weight Bit-Width ReductionTechnique for Convolutional Neural Network Hard-ware Accelerators” Hanmin Park, Kiyoung Choi(Seoul National Univ., Republic of Korea)

ACM SIGDA Student Research Forum at ASP-DAC 2019 [Food will be served] (18:00 - 20:00)(The title of the posters are listed in the next page)

Page 21: ASP-DAC 2019 Advance Program · Monday, January 21, 2019 ASP-DAC 2019 offers attendees a set of three-hour intense introductions to specific topics. If you register for tutorials,

18:00 ACM SIGDA Student Research Forum at ASP-DAC 2019

SRF-1: “New Views for Stochastic Computing: From Time-Encoding to Deterministic Processing” M. Hassan Najafi (University of Minnesota-Twin Cities )

SRF-2: “A Multi-Phase Intellectual Property Core Watermarking Approach during Architectural Synthesis” Dipanjan Roy (Indian Institute of Technology Indore )

SRF-3: “Automatic Design Environment using High-level Synthesis for Reconfigurable 3D Sound Processor” Saya Ohira (Nihon University )

SRF-4: “VLSI Design for Manufacturability based on Dictionary Learning Framework” Hao Geng (The Chinese University of Hong Kong )

SRF-5: “Computer-Aided Design for Quantum Computing” Alwin Zulehner (Johannes Kepler University Linz )

SRF-6: “Enhancing VLSI Design for Manufacturability with Machine Learning Techniques” Haoyu Yang (The Chinese University of Hong Kong )

SRF-7: “A Model-driven Framework with Assertion Based Verification (ABV) Support for Embedded Systems Design Automation” Muhammad Waseem Anwar (National University of Sciences and Technology )

SRF-8: “Optimization of Multi-Target Sample Preparation On-Demand with Digital Microfluidic Biochips” Sudip Poddar (Indian Statistical Institute )

SRF-9: “Clustering for Reduction of Power Consumption and Area on Post-Silicon Delay Tuning” Kota Muroi (The University of Aizu )

SRF-10: “Task and Data Co-Allocation for MPSoCs with 3D-stacked Memories to Optimize Performance under Thermal Constraints” Chia-Yin Liu (National Chi Nan University )

SRF-11: “The Accurate Power Consumption Model For Rotary UAVs” Dooyoung Hong (Korea Advanced Institute of Science and Technology )

SRF-12: “Modulo 2n+1 arithmetic based on signed-digit and binary number addition algorithm” Yuuki Suzuki (Gunma University )

SRF-13: “A Data Transfer Optimization in Non-Binary to Binary Conversion Circuit in Non-Binary Cyclic ADC” Yuji Shindo (Tokyo City University )

20:00SRF-14: “A Decision Network Design for Efficient Semantic Segmentation Computation in Edge Computing” Xin-Yu Kuo (National Tsing Hua University )

Page 22: ASP-DAC 2019 Advance Program · Monday, January 21, 2019 ASP-DAC 2019 offers attendees a set of three-hour intense introductions to specific topics. If you register for tutorials,

Wednesday, January 23, 2019

Registration (7:30 - )

9:00 2K: Keynote II

10:00Satoshi Matsuoka (RIKEN, Japan) “A Game-changing Supercomputer with Groundbreaking A64fx High Performance Arm Processor”

Coffee break (10:00 - 10:20)

10:20 4A: (SS-3) Modern Mask Optimization: FromShallow To Deep Learning

4B: System Level Modelling Methods I 4C: Testing and Design for Security 4D: Network-Centric Design and System

Chairs: Evangeline F. Y. Young (Chinese Univ. of HongKong, Hong Kong), Atsushi Takahashi (Tokyo Inst. of Tech.,Japan)

Chair: Sri Parameswaran (Univ. of New South Wales,Australia)

Chairs: Michihiro Shintani (NAIST, Japan), KoheiMiyase (Kyushu Inst. of Tech., Japan)

Chairs: Keiji Kimura (Waseda Univ., Japan), Yaoyao Ye(Shanghai Jiao Tong Univ., China)

4A-1: “LithoROC: Lithography Hotspot Detectionwith Explicit ROC Optimization” Wei Ye, Yibo Lin,Meng Li, Qiang Liu, David Z. Pan (Univ. of Texas,Austin, U.S.A.)

4B-1: “AxDNN:Towards the Cross-layer Design ofApproximate DNNs” Yinghui Fan, Xiaoxi Wu, Jiy-ing Dong, Zhi Qi (Southeast Univ., China)

4C-1: “Improving Scan Chain Diagnostic AccuracyUsing Multi-Stage Artificial Neural Networks” Ma-son Chern, Shih-Wei Lee, Shi-Yu Huang (National Ts-ing Hua Univ., Taiwan), Yu Huang, Gaurav Veda, Kun-Han Tsia, Wu-Tung Cheng (Mentor, A Siemens Business,U.S.A.)

4D-1: “Routing in Optical Network-on-Chip: Mini-mizing Contention with Guaranteed Thermal Relia-bility” Mengquan Li (Chongqing Univ., China), WeichenLiu (Nanyang Technological Univ., Singapore), Lei Yang,Peng Chen, Duo Liu (Chongqing Univ., China), Nan Guan(Hong Kong Polytechnic Univ., Hong Kong)

4A-2: “Detecting Multi-Layer Layout Hotspots withAdaptive Squish Patterns” Haoyu Yang (Chinese Univ.of Hong Kong, Hong Kong), Piyush Pathak, Frank Gen-nari, Ya-Chieh Lai (Cadence Design Systems, U.S.A.), BeiYu (Chinese Univ. of Hong Kong, Hong Kong)

4B-2: “Simulate-the-hardware: Training AccurateBinarized Neural Networks for Low-Precision Neu-ral Accelerators” Jiajun Li (Univ. of Chinese Academyof Sciences/Chinese Academy of Sciences, China), Ying Wang(Chinese Academy of Sciences, China), Bosheng Liu (Univ.of Chinese Academy of Sciences/Chinese Academy of Sciences,China), Yinhe Han, Xiaowei Li (Chinese Academy of Sci-ences, China)

4C-2: “Testing Stuck-Open Faults of PriorityAddress Encoder in Content Addressable Memo-ries” Tsai-Ling Tsai, Jin-Fu Li (National Central Univ.,Taiwan), Chun-Lung Hsu, Chi-Tien Sun (ITRI, Taiwan)

4D-2: “Bidirectional Tuning of Microring-BasedSilicon Photonic Transceivers for Optimal EnergyEfficiency” Yuyang Wang (Univ. of California, Santa Bar-bara, U.S.A.), M. Ashkan Seyedi, Jared Hulme, MarcoFiorentino, Raymond G. Beausoleil (Hewlett PackardLabs, U.S.A.), Kwang-Ting Cheng (Hong Kong Univ. of Sci-ence and Tech., Hong Kong)

4A-3: “A Local Optimal Method on DSA Guid-ing Template Assignment with Redundant/DummyVia Insertion” Xingquan Li (Fuzhou Univ., China), BeiYu (Chinese Univ. of Hong Kong, Hong Kong), Jianli Chen,Wenxing Zhu (Fuzhou Univ., China)

4B-3: “An N-Way Group Association Architectureand Sparse Data Group Association Load BalancingAlgorithm for Sparse CNN Accelerators” JingyuWang, Zhe Yuan, Ruoyang Liu, Huazhong Yang,Yongpan Liu (Tsinghua Univ., China)

4C-3: “ScanSAT: Unlocking Obfuscated ScanChains” Lilas Alrahis (Khalifa Univ., United Arab Emi-rates), Muhammad Yasin (Tandon school of engineering,New York university, U.S.A.), Hani Saleh, Baker Moham-mad, Mahmoud Al-Qutayri (Khalifa Univ., United ArabEmirates), Ozgur Sinanoglu (New York Univ. Abu Dhabi,United Arab Emirates)

4D-3: “Redeeming Chip-level Power Efficiency byCollaborative Management of the Computation andCommunication” Ning Lin, Hang Lu, Xin Wei,Xiaowei Li (Chinese Academy of Sciences/Univ. of ChineseAcademy of Sciences, China)

12:00

4A-4: “Deep Learning-Based Framework for Com-prehensive Mask Optimization” Bo-Yi Yu, YongZhong, Shao-Yun Fang, Hung-Fei Kuo (National Tai-wan Univ. of Science and Tech., Taiwan)

4B-4: “Maximizing Power State Cross Coveragein Firmware-based Power Management” VladimirHerdt, Hoang M. Le (Univ. of Bremen, Germany), DanielGroße, Rolf Drechsler (Univ. of Bremen, DFKI GmbH, Ger-many)

4C-4: “CycSAT-Unresolvable Cyclic Logic Encryp-tion Using Unreachable States” Amin Rezaei, YouLi, Yuanqi Shen, Shuyu Kong, Hai Zhou (NorthwesternUniv., U.S.A.)

4D-4: “A High-Level Modeling and SimulationApproach Using Test-Driven Cellular Automatafor Fast Performance Analysis of RTL NoC De-signs” Moon Gi Seok (Arizona State Univ., U.S.A.), Dae-jin Park (Kyungpook National Univ., Republic of Korea), Hes-sam S. Sarjoughian (Arizona State Univ., U.S.A.)

Lunch Break (12:00 - 13:50)Supporters’ Session [Food will be served] (12:00 - 13:50)

Page 23: ASP-DAC 2019 Advance Program · Monday, January 21, 2019 ASP-DAC 2019 offers attendees a set of three-hour intense introductions to specific topics. If you register for tutorials,

13:50 5A: (DF-1) Robotics: From System Design to Ap-plication

5B: Advanced Memory Systems 5C: Learning: Make Patterning Light and Right 5D: Design and CAD for Emerging Memories

Organizer: Koji Inoue (Kyushu Univ., Japan), Orga-nizer/Chair: Yuji Ishikawa (Toshiba Device & Storage,Japan)

Chairs: Jaehyun Park (Univ. of Ulsan, Republic of Korea),Chenchen Liu (Clarkson Univ.)

Chairs: Tetsuaki Matsunawa (Toshiba Memory),Hidetoshi Matsuoka (Fujitsu Labs.)

Chair: Li Jiang (Shanghai Jiao Tong Univ., China)

5A-1: “Computer-Aided Support System for Mini-mally Invasive Surgery Using 3D Organ Shape Mod-els” Ken’ichi Morooka (Kyusyu Univ., Japan)

5B-1: “A Sharing-Aware L1.5D Cache for DataReuse in GPGPUs” Jianfei Wang, Li Jiang, Jing Ke,Xiaoyao Liang, Naifeng Jing (Shanghai Jiao Tong Univ.,China)

5C-1: “SRAF Insertion via Supervised DictionaryLearning” Hao Geng, Haoyu Yang, Yuzhe Ma (Chi-nese Univ. of Hong Kong, Hong Kong), Joydeep Mitra (Ca-dence, U.S.A.), Bei Yu (Chinese Univ. of Hong Kong, HongKong)

5D-1: “Exploring emerging CNFET for EfficientLast Level Cache Design” Dawen Xu, Li Li (HefeiUniv. of Tech., China), Ying Wang, Cheng Liu, HuaweiLi (Chinese Academy of Sciences, China)

5A-2: “ROS and mROS: How to accelerate the de-velopment of robot systems and integrate embeddeddevices” Hideki Takase (Kyoto Univ./JST PRESTO, Japan)

5B-2: “NeuralHMC: An Efficient HMC-Based Ac-celerator for Deep Neural Networks” Chuhan Min(Univ. of Pittsburgh, U.S.A.), Jiachen Mao, Hai Li, YiranChen (Duke Univ., U.S.A.)

5C-2: “A Fast Machine Learning-based Mask Print-ability Predictor for OPC Acceleration” BentianJiang (Chinese Univ. of Hong Kong, Hong Kong), HangZhang (Cornell Univ., U.S.A.), Jinglei Yang (Univ. of Cali-fornia, Santa Barbara, U.S.A.), Evangeline F. Y. Young (Chi-nese Univ. of Hong Kong, Hong Kong)

5D-2: “Mosaic: An Automated Synthesis Flow forBoolean Logic Based on Memristor Crossbar” LeiXie (Southeast Univ., China)

15:05

5A-3: “Rapid Development of Robotics technol-ogy using Robot Contest and Open Collabora-tion” Masaki Yamamoto (AI Solution Center, Panasonic,Japan)

5A-3: “Rapid Development of Robotics technol-ogy using Robot Contest and Open Collabora-tion” Masaki Yamamoto (AI Solution Center, Panasonic,Japan)

5B-3: “Boosting Chipkill Capability underRetention-Error Induced Reliability Emer-gency” Xianwei Zhang (AMD, U.S.A.), RujiaWang, Youtao Zhang, Jun Yang (Univ. of Pittsburgh,U.S.A.)

5C-3: “Semi-Supervised Hotspot Detection withSelf-Paced Multi-Task Learning” Ying Chen (Chi-nese Academy of Sciences/Univ. of Chinese Academy of Sciences,China), Yibo Lin (Univ. of Texas, Austin, U.S.A.), TianyangGai (Chinese Academy of Sciences/Univ. of Chinese Academyof Sciences, China), Yajuan Su (Chinese Academy of Sciences,China), Yayi Wei (Chinese Academy of Sciences/Univ. of Chi-nese Academy of Sciences, China), David Z. Pan (Univ. ofTexas, Austin, U.S.A.)

Coffee break (15:05 - 15:35)

Page 24: ASP-DAC 2019 Advance Program · Monday, January 21, 2019 ASP-DAC 2019 offers attendees a set of three-hour intense introductions to specific topics. If you register for tutorials,

15:35 6A: (DF-2) Advanced Imaging Technologies andApplications

6B: Optimized Training for Neural Networks 6C: New Trends in Biochips 6D: Power-efficient Machine Learning HardwareDesign

Organizer: Masaki Sakakibara (Sony SemiconductorSolutions, Japan), Organizer/Chair: Shinichi Shibahara(Renesas Electronics, Japan)

Chairs: Deliang Fan (Univ. of Central Florida, U.S.A.),Raymond (Ruirui) Huang (Alibaba Cloud, U.S.A.)

Chair: Tsun-Ming Tseng (Tech. Univ. of Munich, Ger-many)

Chairs: Hai Wang (UESTC, China), Sheldon Tan (Univ.of California, Riverside, U.S.A.)

6A-1: “NIR Lock-in Pixel Image Sensors for Re-mote Heart Rate Detection” Shoji Kawahito, CaoChen, Leyi Tan, Keiichiro Kagawa, Keita Yasutomi(Shizuoka Univ., Japan), Norimichi Tsumura (Chiba Univ.,Japan)

6B-1: “CAPTOR: A Class Adaptive Filter Prun-ing Framework for Convolutional Neural Networksin Mobile Applications” Zhuwei Qin, Fuxun Yu(George Mason Univ., U.S.A.), ChenChen Liu (ClarksonUniv., U.S.A.), Xiang Chen (George Mason Univ., U.S.A.)

6C-1: “Factorization Based Dilution of Bio-chemical Fluids with Micro-Electrode-Dot-ArrayBiochips” Sohini Saha (IIEST, Shibpur, India), De-braj Kundu, Sudip Roy (IIT Roorkee, India), SukantaBhattacharjee (New York Univ., United Arab Emirates), Kr-ishnendu Chakrabarty (Duke Univ., U.S.A.), Partha P.Chakrabarti (IIT Kharagpur, India), Bhargab B. Bhat-tacharya (ISI Kolkata, India)

6D-1: “SAADI: A Scalable Accuracy Approxi-mate Divider for Dynamic Energy-Quality Scal-ing” Setareh Behroozi, Jingjie Li, Jackson Melchert,Younghyun Kim (Univ. of Wisconsin-Madison, U.S.A.)

6A-2: “A TDC/ADC Hybrid LiDAR SoC for 200mRange Detection with High Image Resolution under100klux Sunlight” Kentaro Yoshioka (Toshiba, Japan)

6B-2: “TNPU: An Efficient Accelerator Archi-tecture for Training Convolutional Neural Net-works” Jiajun Li, Guihai Yan, Wenyan Lu, ShuhaoJiang, Shijun Gong, Jingya Wu, Junchao Yan, Xi-aowei Li (Chinese Academy of Sciences, China)

6C-2: “Sample Preparation for Multiple-Reactant Bioassays on Micro-Electrode-Dot-ArrayBiochips” Tung-Che Liang (Duke Univ., U.S.A.),Yun-Sheng Chan (National Chiao Tung Univ., Taiwan),Tsung-Yi Ho (National Tsing Hua Univ., Taiwan), Krish-nendu Chakrabarty (Duke Univ., U.S.A.), Chen-Yi Lee(National Chiao Tung Univ., Taiwan)

6D-2: “SeFAct: Selective Feature Activation andEarly Classification for CNNs” Farhana SharminSnigdha, Ibrahim Ahmed, Susmita Dey Manasi,Meghna G. Mankalale (Univ. of Minnesota, U.S.A.), JiangHu (Texas A&M Univ., U.S.A.), Sachin S. Sapatnekar(Univ. of Minnesota, U.S.A.)

6A-3: “A 1/4-inch 3.9Mpixel Low Power Event-driven Back-illuminated Stacked CMOS Image sen-sor” Oichi Kumagai (Sony Semiconductor Solutions, Japan)

6B-3: “REIN: A Robust Training Method for En-hancing Generalization Ability of Neural Networksin Autonomous Driving Systems” Fuxun Yu (GeorgeMason Univ., U.S.A.), Chenchen Liu (Clarkson Univ., U.S.A.),Xiang Chen (George Mason Univ., U.S.A.)

6C-3: “Robust Sample Preparation on Low-CostDigital Microfluidic Biochips” Zhanwei Zhong(Duke Univ., U.S.A.), Robert Wille (Johannes Kepler Univ.Linz, Austria), Krishnendu Chakrabarty (Duke Univ.,U.S.A.)

6D-3: “FACH: FPGA-based Acceleration of Hy-perdimensional Computing by Reducing Computa-tional Complexity” Mohsen Imani, Sahand Salamat,Saransh Gupta, Jiani Huang, Tajana Rosing (UC SanDiego, U.S.A.)

17:15

6A-4: “Next-Generation Fundus Camera with Full-Color Image Acquisition in 0-lx Visible Light us-ing BSI CMOS Image Sensor with Advanced NIRMulti-Spectral Imaging System -Application FieldDevelopment of Dynamic Intelligent Systems Us-ing High-Speed Vision-” Hirofumi Sumi, HironariTakehara (NAIST, Japan), Norimasa Kishi (Univ. of Tokyo,Japan), Jun Ohta (NAIST, Japan), Masatoshi Ishikawa(Univ. of Tokyo, Japan)

Banquet (18:30 - 20:30)

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Thursday, January 24, 2019

Registration (7:30 - )

9:00 3K: Keynote III

10:00Yasuhisa Shimazaki (Renesas Electronics, Japan) “Hardware and Software Security Technologies to Enable Future Connected Cars”

Coffee break (10:00 - 10:20)

10:20 7A: (SS-4) Security of Machine Learning andMachine Learning for Security: Progress andChallenges for Secure, Machine Intelligent Mo-bile Systems

7B: System Level Modelling Methods II 7C: Placement 7D: Algorithms and Architectures for EmergingApplications

Chairs: Xiang Chen (George Mason Univ., U.S.A.),Yanzhi Wang (Northeastern Univ., U.S.A.)

Chair: Naehyuck Chang (KAIST, Republic of Korea) Chairs: Ting-Chi Wang (National Tsing Hua Univ.), Ya-suhiro Takashima (Univ. of Kitakyushu, Japan)

Chair: Taewhan Kim (Seoul National Univ., Republic ofKorea)

7A-1: “ADMM Attack: An Enhanced AdversarialAttack for Deep Neural Networks with UndetectableDistortions” Pu Zhao, Kaidi Xu (Northeastern Univ.,U.S.A.), Sijia Liu (IBM Research, U.S.A.), Yanzhi Wang,Xue Lin (Northeastern Univ., U.S.A.)

7B-1: “SIMULTime: Context-Sensitive TimingSimulation on Intermediate Code Representationfor Rapid Platform Explorations” Alessandro Cor-naglia, Alexander Viehl (FZI Research Center for Informa-tion Technology, Germany), Oliver Bringmann, WolfgangRosenstiel (Univ. of Tbingen, Germany)

7C-1: “Diffusion Break-Aware Leakage Power Op-timization and Detailed Placement in Sub-10nmVLSI” Sun ik Heo (Samsung Electronics, Republic of Ko-rea), Andrew B. Kahng, Minsoo Kim, Lutong Wang(UC San Diego, U.S.A.)

7D-1: “An Approximation Algorithm to the Op-timal Switch Control of Reconfigurable BatteryPacks” Shih-Yu Chen, Jie-Hong Jiang (National Tai-wan Univ., Taiwan), Shou-Hung Ling, Shih-Hao Liang,Mao-Cheng Huang (ITRI, Taiwan)

7A-2: “A System-level Perspective to Understandthe Vulnerability of Deep Learning Systems” TaoLiu, Nuo Xu, Qi Liu (Florida International Univ., U.S.A.),Yanzhi Wang (Northeastern Univ., U.S.A.), Wujie Wen(Florida International Univ., U.S.A.)

7B-2: “Modeling Processor Idle Times in MP-SoC Platforms to Enable Integrated DPM, DVFS,and Task Scheduling Subject to a Hard Dead-line” Amirhossein Esmaili, Mahdi Nazemi, Mas-soud Pedram (Univ. of Southern California, U.S.A.)

7C-2: “MDP-trees: Multi-Domain Macro Place-ment for Ultra Large-Scale Mixed-Size De-signs” Yen-Chun Liu (National Taiwan Univ., Taiwan),Tung-Chieh Chen (Maxeda Technology, Taiwan), Yao WenChang, Sy-Yen Kuo (National Taiwan Univ., Taiwan)

7D-2: “Autonomous Vehicle Routing In Multiple In-tersections” Sheng-Hao Lin, Tsung-Yi Ho (NationalTsing Hua Univ., Taiwan)

7A-3: “High-Performance Adaptive Mobile Secu-rity Enhancement against Malicious Speech and Im-age Recognition” Zirui Xu, Fuxun Yu (George MasonUniv., U.S.A.), Chenchen Liu (Clarkson Univ., U.S.A.), Xi-ang Chen (George Mason Univ., U.S.A.)

7B-3: “Phone-nomenon: A System-Level ThermalSimulator for Handheld Devices” Hong-Wen Chiou,Yu-Min Lee, Shin-Yu Shiau (National Chiao Tung Univ.,Taiwan), Chi-Wen Pan, Tai-Yu Chen (Mediatek, Taiwan)

7C-3: “A Shape-Driven Spreading AlgorithmUsing Linear Programming for Global Place-ment” Shounak Dhar (Univ. of Texas, Austin, U.S.A.),Love Singhal, Mahesh A. Iyer (Intel, U.S.A.), David Z.Pan (Univ. of Texas, Austin, U.S.A.)

7D-3: “GRAM: Graph Processing in a ReRAM-based Computational Memory” Minxuan Zhou,Mohsen Imani, Saransh Gupta, Yeseong Kim, Ta-jana Rosing (Univ. of California, San Diego, U.S.A.)

12:00

7A-4: “AdverQuil: an Efficient Adversarial Detec-tion and Alleviation Technique for Black-Box Neu-romorphic Computing Systems” Hsin-Pai Cheng,Juncheng Shen, Huanrui Yang (Duke Univ., U.S.A.),Qing Wu (Air Force Research Laboratory, U.S.A.), Hai Li,Yiran Chen (Duke Univ., U.S.A.)

7A-4: “AdverQuil: an Efficient Adversarial Detec-tion and Alleviation Technique for Black-Box Neu-romorphic Computing Systems” Hsin-Pai Cheng,Juncheng Shen, Huanrui Yang (Duke Univ., U.S.A.),Qing Wu (Air Force Research Laboratory, U.S.A.), Hai Li,Yiran Chen (Duke Univ., U.S.A.)

7B-4: “Virtual Prototyping of HeterogeneousAutomotive Applications: Matlab, SystemC, orboth?” Xiao Pan, Carna Zivkovic, Christoph Grimm(Univ. of Kaiserslautern, Germany)

7C-4: “Finding Placement-Relevant Clusters WithFast Modularity-Based Clustering” Mateus Fogaca(Univ. Federal do Rio Grande do Sul, Brazil), Andrew B.Kahng (Univ. of California, San Diego, U.S.A.), Ricardo Au-gusto da Luz Reis (Univ. Federal do Rio Grande do Sul,Brazil), Lutong Wang (Univ. of California, San Diego, U.S.A.)

Lunch Break (12:00 - 13:15)

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13:15 8A: (DF-3) Emerging Technologies for TokyoOlympic 2020

8B: Embedded Software for Parallel Architecture 8C: Machine Learning and Hardware Security 8D: Memory Architecture for Efficient NeuralNetwork Computing

Organizer/Chair: Koichiro Yamashita (Fujitsu, Japan),Organizer: Akihiko Inoue (Panasonic, Japan)

Chairs: Mengying Zhao (Shandong Univ., China), We-ichen Liu (Nanyang Technological Univ.)

Chairs: Dong Kyue Kim (Hanyang Univ., Republic ofKorea), Ray C.C. Cheung (City Univ. of Hong Kong, HongKong)

Chairs: Jongeun Lee (UNIST, Republic of Korea), Bei Yu(Chinese Univ. of Hong Kong, Hong Kong)

8A-1: “Walking assistive powered-wear ’HIMICO’with wire-driven assist” Kenta Murakami (Panasonic,Japan)

8B-1: “Efficient Sporadic Task Handling in Paral-lel AUTOSAR Applications Using Runnable Migra-tion” Milan Copic, Rainer Leupers, Gerd Ascheid(RWTH Aachen Univ., Germany)

8C-1: “Towards Practical Homomorphic EmailFiltering: A Hardware-Accelerated Secure NaiveBayesian Filter” Song Bian, Masayuki Hiromoto,Takashi Sato (Kyoto Univ., Japan)

8D-1: “Sparsity for ReRAM: Pruning and MappingSparse Neural Network for ReRAM based Acceler-ator” Jilan Lin (UCSB/Tsinghua Univ., China), ZhenhuaZhu, Yu Wang (Tsinghua Univ., China), Yuan Xie (UCSB,U.S.A.)

8A-2: “Deep Scene Recognition with Object Detec-tion” Zhiming Tan (Fujitsu R&D Center, China)

8B-2: “A Heuristic for Multi Objective Soft-ware Application Mappings on Heterogeneous MP-SoCs” Gereon Onnebrink, Ahmed Hallawa, RainerLeupers, Gerd Ascheid (RWTH Aachen Univ., Germany),Awaid-Ud-Din Shaheen (Silexica GmbH, Germany)

8D-2: “In-Memory Batch-Normalization for Resis-tive Memory based Binary Neural Network Hard-ware” Hyungjun Kim, Yulhwa Kim, Jae-Joon Kim(POSTECH, Republic of Korea)

8C-2: “A 0.16pJ/bit Recurrent Neural NetworkBased PUF for Enhanced Machine Learning AttackResistance” Nimesh Kirit Shah (Nanyang TechnologicalUniv., Singapore), Manaar Alam (Indian Inst. of Tech. Kharag-pur, India), Durga Prasad Sahoo (Robert Bosch Engineeringand Business Solutions Private, India), Debdeep Mukhopad-hyay (Indian Inst. of Tech. Kharagpur, India), Arindam Basu(Nanyang Technological Univ., Singapore)

14:30

8A-3: “Spatial and battery sensing solutions forsmart cities leading to 2020 Olympics” HiroyukiTsujikawa (Panasonic, Japan)

8B-3: “ReRam-based Processing-in-Memory Ar-chitecture for Blockchain Platforms” Fang Wang(Hong Kong Polytechnic Univ., Hong Kong), Zhaoyan Shen(Shandong Univ., China), Lei Han (Hong Kong PolytechnicUniv., Hong Kong), Zili Shao (Chinese Univ. of Hong Kong,Hong Kong)

8C-3: “P3M: A PIM-based Neural Network ModelProtection Scheme for Deep Learning Accelera-tor” Wen Li, Ying Wang, Huawei Li, Xiaowei Li(Chinese Academy of Sciences, China)

8D-3: “Exclusive On-Chip Memory Architec-ture for Energy-Efficient Deep Learning Accelera-tion” Hyeonuk Sim (UNIST, Republic of Korea), JasonAnderson (Univ. of Toronto, Canada), Jongeun Lee (UNIST,Republic of Korea)

Coffee break (14:30 - 14:50)

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14:50 9A: (DF-4) Beyond the Virtual Reality World 9B: Logic-Level Security and Synthesis 9C: Analysis and Algorithms for Digital DesignVerification

9D: FPGA and Optics-Based Neural Network De-signs

Organizer: Hiroe Iwasaki (NTT, Japan), Orga-nizer/Chair: Masaru Kokubo (Hitachi, Japan)

Chairs: Akash Kumar (TU Dresden), Tsutomu Sasao(Meiji Univ.)

Chairs: Mark Po-Hung Lin (National Chung Cheng Univ.,Taiwan), Andreas G. Veneris (Univ. of Toronto, Canada)

Chair: Taewhan Kim (Seoul National Univ., Republic ofKorea)

9A-1: “The World of VR2.0” Michitaka Hirose(Univ. of Tokyo, Japan)

9B-1: “BeSAT: Behavioral SAT-based Attack onCyclic Logic Encryption” Yuanqi Shen, You Li,Amin Rezaei, Shuyu Kong, David Dlott, Hai Zhou(Northwestern Univ., U.S.A.)

9C-1: “A Figure of Merit for Assertions in Ver-ification” Samuel Hertz, Debjit Pal, Spencer Of-fenberger, Shobha Vasudevan (Univ. of Illinois, Urbana-Champaign, U.S.A.)

9D-1: “Implementing Neural Machine Translationwith Bi-Directional GRU and Attention Mechanismon FPGAs Using HLS” Qin Li, Xiaofan Zhang (Univ.of Illinois, Urbana-Champaign, U.S.A.), Jinjun Xiong (IBM,U.S.A.), Wen-mei Hwu, Deming Chen (Univ. of Illinois,Urbana-Champaign, U.S.A.)

9A-2: “Optical fiber scanning system for ultra-lightweight wearable display” Takahiro Matsuda(Hitachi, Japan)

9B-2: “Structural Rewriting in XOR-MajorityGraphs” Zhufei Chu (Ningbo Univ., China), Math-ias Soeken (EPFL, Switzerland), Yinshui Xia, LunyaoWang (Ningbo Univ., China), Giovanni De Micheli (EPFL,Switzerland)

9C-2: “Suspect2vec: A Suspect Prediction Modelfor Directed RTL Debugging” Neil Veira, ZissisPoulos, Andreas Veneris (Univ. of Toronto, Canada)

9D-2: “Efficient FPGA Implementation of Lo-cal Binary Convolutional Neural Network” AidynZhakatayev, Jongeun Lee (Ulsan National Inst. of Scienceand Tech., Republic of Korea)

16:05

9A-3: “Superreal Video Representation for En-hanced Sports Experiences - R&D on VR x AI tech-nologies -” Hideaki Kimata (NTT, Japan)

9B-3: “Design Automation for Adiabatic Cir-cuits” Alwin Zulehner (Johannes Kepler Univ. Linz, Aus-tria), Micheal Frank (Sandia National Labs, U.S.A.), RobertWille (Johannes Kepler Univ. Linz, Austria)

9C-3: “Path Controllability Analysis for High Qual-ity Designs” Li-Jie Chen (National Taiwan Univ., Taiwan),Hong-Zu Chou, Kai-Hui Chang (Avery Design Systems,U.S.A.), Sy-Yen Kuo (National Taiwan Univ., Taiwan), Chi-lai Huang (Avery Design Systems, U.S.A.)

9D-3: “Hardware-software Co-design of SlimmedOptical Neural Networks” Zheng Zhao, Derong Liu,Meng Li, Zhoufeng Ying, Biying Xu (Univ. of Texas,Austin, U.S.A.), Lu Zhang, Bei Yu (Chinese Univ. of HongKong, Hong Kong), Ray T. Chen, David Z. Pan (Univ. ofTexas, Austin, U.S.A.)

Coffee break (16:05 - 16:25)

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16:25 10A: (SS-5) The Resurgence of ReconfigurableComputing in the Post Moore Era

10B: Hardware Acceleration 10C: Routing

Chair: Antonino Tumeo (Pacific Northwest National Lab-oratory, U.S.A.)

Chairs: Yongpan Liu (Tsinghua Univ., China), XiangChen (George Mason Univ., U.S.A.)

Chairs: Hunng-Ming Chen (NCTU), Kohira Yuki-hide (Univ. of Aizu)

10A-1: “Software Defined Architectures for DataAnalytics” Vito Giovanni Castellana, Marco Min-utoli, Antonino Tumeo (Pacific Northwest National Labo-ratory, U.S.A.), Pietro Fezzardi, Marco Lattuada, Fab-rizio Ferrandi (Politecnico di Milano, Italy)

10B-1: “Addressing the Issue of Processing Ele-ment Under-Utilization in General-Purpose SystolicDeep Learning Accelerators” Bosheng Liu (Univ.of Chinese Academy of Sciences/Chinese Academy of Sciences,China), Xiaoming Chen, Ying Wang, Yinhe Han (Chi-nese Academy of Sciences, China), Jiajun Li, Haobo Xu(Univ. of Chinese Academy of Sciences, China), Xiaowei Li(Chinese Academy of Sciences, China)

10C-1: “Detailed Routing by Sparse Grid Graphand Minimum-Area-Captured Path Search” GengjieChen, Chak-Wa Pui, Haocheng Li, Jingsong Chen,Bentian Jiang, Evangeline F. Y. Young (Chinese Univ.of Hong Kong, Hong Kong)

10A-2: “Runtime Reconfigurable Memory Hierar-chy in Embedded Scalable Platforms” Davide Giri,Paolo Mantovani, Luca P. Carloni (Columbia Univ.,U.S.A.)

10B-2: “ALook: Adaptive Lookup for GPGPU Ac-celeration” Daniel Peroni, Mohsen Imani, TajanaRosing (Univ. of California, San Diego, U.S.A.)

10C-2: “Thermal-aware 3D Symmetrical BufferedClock Tree Synthesis” Deok Keun Oh, Mu JunChoi, Ju Ho Kim (Sogang Univ., Republic of Korea)

17:40

10A-3: “XPPE: Cross-Platform Performance Esti-mation of Hardware Accelerators Using MachineLearning” Hosein Mohamamdi Makrani, HosseinSayadi, Tinoosh Mohsenin, Avesta Sasan, HoumanHomayoun, Setareh Rafatirad (George Mason Univ.,U.S.A.)

10B-3: “Collaborative Accelerators for In-MemoryMapReduce on Scale-up Machines” Abraham Ad-disie, Valeria Bertacco (Univ. of Michigan, U.S.A.)

10C-3: “Latency Constraint Guided Buffer Sizingand Layer Assignment for Clock Trees with Use-ful Skew” Necati Uysal (Univ. of Central Florida, U.S.A.),Wen-Hao Liu (Cadence Design Systems, U.S.A.), RickardEwetz (Univ. of Central Florida, U.S.A.)

Page 29: ASP-DAC 2019 Advance Program · Monday, January 21, 2019 ASP-DAC 2019 offers attendees a set of three-hour intense introductions to specific topics. If you register for tutorials,

ASP-DAC 2019 Advance Program24th Asia and South Pacific Design Automation Conference

Date: January, 21-24, 2019Place: Tokyo Odaiba Waterfront, Tokyo, Japan

HighlightsOpening and Keynote I

Tuesday, January 22, 2019, 9:30-10:30

Tao Zhang (Tsinghua University, China) “The development trendof artificial intelligence technology and its application in thefield of robotics”

Keynote IIWednesday, January 23, 2019, 9:00-10:00

Satoshi Matsuoka (RIKEN, Japan) “A Game-changing Super-computer with Groundbreaking A64fx High PerformanceArm Processor”

Keynote IIIThursday, January 24, 2019, 9:00-10:00

Steve Trimberger (Renesas Electronics, Japan) “Hardware andSoftware Security Technologies to Enable Future ConnectedCars”

Special Sessions1A: (Presentation + Poster Discussion) University DesignContest

Tuesday, January 22, 2019, 10:45-12:00

2A (SS-1): (Invited Talks) Reverse Engineering: growingmore mature — and facing powerful countermeasures

Tuesday, January 22, 2019, 13:30-15:35

3A (SS-2): (Invited Talks) Design, testing, and fault tol-erance of Neuromorphic systems

Tuesday, January 22, 2019, 15:55-17:10

4A (SS-3): (Invited Talks) Modern Mask Optimization:From Shallow To Deep Learning

Wednesday, January 23, 2019, 10:20-12:00

7A (SS-4): (Invited Talks) Security of Machine Learningand Machine Learning for Security: Progress and Chal-lenges for Secure, Machine Intelligent Mobile Systems

Thursday, January 24, 2019, 10:20-12:00

10A (SS-5): (Invited Talks) The Resurgence of Reconfig-urable Computing in the Post Moore Era

Thursday, January 24, 2019, 16:25-17:40

Designers’ Forum5A (DF-1): (Oral Session) Robotics: From System De-sign to Application

Wednesday, January 23, 2019, 13:50-15:05

6A (DF-2): (Oral Session) Advanced Imaging Technolo-gies and Applications

Wednesday, January 23, 2019, 15:35-17:15

8A (DF-3): (Oral Session) Emerging Technologies forTokyo Olympic 2020

Thursday, January 24, 2019, 13:15-14:30

9A (DF-4): (Oral Session) Beyond the Virtual RealityWorld

Thursday, January 24, 2019, 14:50-16:05

TutorialsTutorial-1: Integrating Hardware and Algorithm Ad-vances for Cognitive Systems

Monday, January 21, 2019, 9:30-12:30Speakers:

Kaushik Roy (Purdue University)Hai Li (Duke University)

Tutorial-2: Enablement of No-Human-in-the-Loop ICDesign: Status and Directions

Monday, January 21, 2019, 9:30-12:30Organizer:Andrew B. Kahng (University of California, San Diego)

Speakers:David White, Senior (Cadence Design Systems, Inc.)Shankar Sadasivam (Qualcomm Inc.)Andrew B. Kahng (University of California, San Diego)

Tutorial-3: Energy-Efficient Processing and MachineLearning at the Edge: from Sensing to Sensemaking

Monday, January 21, 2019, 9:30-12:30Organizer/Speaker:Massimo Alioto (National University of Singapore)

Tutorial-4: Design for Reliability in the Nano-CMOSEra: New Holistic Methodologies for Reliability Mod-eling and Optimization

Monday, January 21, 2019, 9:30-12:30Organizers/Speakers:

Sheldon Tan (University of California, Riverside)Hussam Amrouch (Karlsruhe Institute of Technology)

Tutorial-5: Machine Learning in TestMonday, January 21, 2019, 9:30-12:30

Organizer/Speaker:Yu Huang (Mentor, A Siemens Business)

Tutorial-6: Recent Development and Future Perspectiveof Quantum Annealing

Monday, January 21, 2019, 14:00-17:00Organizer:

Shu Tanaka (Waseda University)Speakers:

Shu Tanaka (Waseda University)Yoshiki Matsuda (Fixstars Corporation)Kotaro Tanahashi (Recruit Communications Co., Ltd.)Yuya Seki (National Institute of Advanced Industrial Science and Technology,

Japan)

Tutorial-7: Embedded Heterogeneous Computing: Ar-chitectural Landscape and Software Challenges

Monday, January 21, 2019, 14:00-17:00Organizer/Speaker:

Tulika Mitra (National University of Singapore)

Tutorial-8: Smart Image Sensor SystemsMonday, January 21, 2019, 14:00-17:00

Organizers/Speakers:Marilyn Wolf (Georgia Institute of Technology)Saibal Mukhopodhyay (Georgia Institute of Technology)

Tutorial-9: Machine Learning for Reliability of ICs andSystems

Monday, January 21, 2019, 14:00-17:00Speakers:

Mehdi B. Tahoori (Karlsruhe Institute of Technology)Krishnendu Chakrabarty (Duke University)

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Monday, January 21, 2019

ASP-DAC 2019 offers attendees a set of three-hour intense introductions to specific topics. If you register for tutorials, you have the option to select two out of the nine topics. This year, eachtutorial will be presented once.

Registration (8:00 - )

Room Saturn Room Uranus Room Venus Room Mars Room Mercury

9:30 Tutorial 1: Integrating Hardware andAlgorithm Advances for Cognitive Sys-tems

Tutorial 2: Enablement of No-Human-in-the-Loop IC Design: Status and Di-rections

Tutorial 3: Energy-Efficient Process-ing and Machine Learning at the Edge:from Sensing to Sensemaking

Tutorial 4: Design for Reliability inthe Nano-CMOS Era: New HolisticMethodologies for Reliability Model-ing and Optimization

Tutorial 5: Machine Learning in Test

Organizer:Andrew B. Kahng (University of California,

San Diego)

Organizers:Sheldon Tan (University of California, River-

side)Hussam Amrouch (Karlsruhe Institute of

Technology)

Organizer:Yu Huang (Mentor, A Siemens Business)

12:30

Speakers:Kaushik Roy (Purdue University)Hai Li (Duke University)

Speakers:David White, Senior (Cadence Design Sys-

tems, Inc.)Shankar Sadasivam (Qualcomm Inc.)Andrew B. Kahng (University of California,

San Diego)

Speaker:Massimo Alioto (National University of Sin-

gapore)

Speakers:Sheldon Tan (University of California, River-

side)Hussam Amrouch (Karlsruhe Institute of

Technology)

Speaker:Yu Huang (Mentor, A Siemens Business)

Lunch Break (12:30 - 14:00)

14:00 Tutorial 6: Recent Development andFuture Perspective of Quantum An-nealing

Tutorial 7: Embedded HeterogeneousComputing: Architectural Landscapeand Software Challenges

Tutorial 8: Smart Image Sensor Sys-tems

Tutorial 9: Machine Learning for Reli-ability of ICs and Systems

Organizer:Shu Tanaka (Waseda University)

Organizers:Marilyn Wolf (Georgia Institute of Technol-

ogy)Saibal Mukhopodhyay (Georgia Institute of

Technology)

17:00

Speakers:Shu Tanaka (Waseda University)Yoshiki Matsuda (Fixstars Corporation)Kotaro Tanahashi (Recruit Communications

Co., Ltd.)Yuya Seki (National Institute of Advanced In-

dustrial Science and Technology)

Speaker:Tulika Mitra (National University of Singapore)

Speakers:Marilyn Wolf (Georgia Institute of Technol-

ogy)Saibal Mukhopodhyay (Georgia Institute of

Technology)

Speakers:Mehdi B. Tahoori (Karlsruhe Institute of

Technology)Krishnendu Chakrabarty (Duke University)

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Tuesday, January 22, 2019

Registration (7:00 - )

9:00 1K: Opening & Keynote I

Tao Zhang (Tsinghua Univ., China) “The development trend of artificial intelligence technology and its application in the field of robotics”

Coffee break (10:30 - 10:45)

10:45 1A: University Design Contest 1B: Real-time Embedded Software 1C: Hardware and System Security 1D: Thermal- and Power-Aware Design and Op-timization

Chairs: Kousuke Miyaji (Shinshu Univ., Japan), AkiraTsuchiya (Univ. of Shiga Prefecture, Japan)

Chairs: Zhaoyan Shen (Shandong Univ.), Zebo Peng(Linkping Univ., Sweden)

Chairs: Ray C.C. Cheung (City Univ. of Hong Kong, HongKong), Hai Zhou (Northwestern Univ., U.S.A.)

Chairs: Hussam Amrouch (Karlsruhe Inst. of Tech. (KIT),Germany), Jiang Hu (Texas A&M)

(The titles of the presentations are listed in the nextpage)

1B-1: “Towards Limiting the Impact of TimingAnomalies in Complex Real-Time Processors” Pe-dro Benedicte (Barcelona Supercomputing Center and Univ.Politecnica de Catalunya, Spain), Jaume Abella, CarlesHernandez, Enrico Mezzetti (Barcelona SupercomputingCenter, Spain), Francisco J. Cazorla (Barcelona Supercom-puting Center and IIIA-CSIC, Spain)

1C-1: “Layout Recognition Attacks on Split Manu-facturing” Wenbin Xu, Lang Feng, Jeyavijayan Ra-jendran, Jiang Hu (Texas A&M Univ., U.S.A.)

1D-1: “Leakage-Aware Thermal Management forMulti-Core Systems Using Piecewise Linear ModelBased Predictive Control” Xingxing Guo, HaiWang, Chi Zhang, He Tang, Yuan Yuan (Univ. of Elec-tronic Science and Tech. of China, China)

1B-2: “SeRoHAL: Generation of Selectively RobustHardware Abstraction Layers for Efficient Protec-tion of Mixed-criticality Systems” Petra R. Klee-berger, Juana Rivera, Daniel Mueller-Gritschneder,Ulf Schlichtmann (Tech. Univ. Mnchen, Germany)

1C-2: “Execution of Provably Secure Assays onMEDA Biochips to Thwart Attacks” Tung-CheLiang (Duke Univ., U.S.A.), Mohammed Shayan (NewYork Univ., U.S.A.), Krishnendu Chakrabarty (Duke Univ.,U.S.A.), Ramesh Karri (New York Univ., U.S.A.)

1D-2: “Multi-Angle Bended Heat Pipe Design us-ing X-Architecture Routing with Dynamic ThermalWeight on Mobile Devices” Hsuan-Hsuan Hsiao,Hong-Wen Chiou, Yu-Min Lee (National Chiao TungUniv., Taiwan)

12:00

1B-3: “Partitioned and Overhead-Aware Schedulingof Mixed-Criticality Real-Time Systems” YuanbinZhou, Soheil Samii, Petru Eles, Zebo Peng (LinkpingUniv., Sweden)

1C-3: “TAD: Time Side-Channel Attack Defenseof Obfuscated Source Code” Alexander Fell, HungThinh Pham, Siew Kei Lam (Nanyang Technological Univ.,Singapore)

1D-3: “Fully-automated Synthesis of Power Man-agement Controllers from UPF” Dustin Peterson,Oliver Bringmann (Univ. of Tuebingen, Germany)

Lunch Break (12:00 - 13:30)University LSI Design Contest Poster Presentation [Food will be served] (12:00 - 13:30)

Page 32: ASP-DAC 2019 Advance Program · Monday, January 21, 2019 ASP-DAC 2019 offers attendees a set of three-hour intense introductions to specific topics. If you register for tutorials,

10:45 1A: University Design ContestChairs: Kousuke Miyaji (Shinshu Univ., Japan), Akira Tsuchiya (Univ. of Shiga Prefecture, Japan)

<Oral Presentation>1A-1: “A Wide Conversion Ratio, 92.8% Efficiency, 3-Level Buck Converter with Adaptive On/Off-Time Control and Shared Charge Pump Intermediate Voltage Regulator” Kousuke Miyaji, Yuki Karasawa, TakanobuFukuoka (Shinshu Univ., Japan)

1A-2: “A Three-Dimensional Millimeter-Wave Frequency-Shift Based CMOS Biosensor using Vertically Stacked Spiral Inductors in LC Oscillators” Maya Matsunaga, Taiki Nakanishi, Atsuki Kobayashi (NagoyaUniv., Japan), Kiichi Niitsu (Nagoya Univ./JST PRESTO, Japan)

1A-3: “Design of 385 x 385 m2 0.165V 270pW Fully-Integrated Supply-Modulated OOK Transmitter in 65nm CMOS for Glasses-Free, Self-Powered, and Fuel-Cell-Embedded Continuous Glucose MonitoringContact Lens” Kenya Hayashi, Shigeki Arata, Ge Xu, Shunya Murakami, Cong Dang Bui, Takuyoshi Doike, Maya Matsunaga, Atsuki Kobayashi, Kiichi Niitsu (Nagoya Univ., Japan)

1A-4: “2D Optical Imaging Using Photosystem I Photosensor Platform with 32x32 CMOS Biosensor Array” Kiichi Niitsu, Taichi Sakabe (Nagoya Univ., Japan), Mariko Miyachi, Yoshinori Yamanoi, Hiroshi Nishihara(Univ. of Tokyo, Japan), Tatsuya Tomo (Tokyo Univ. of Science, Japan), Kazuo Nakazato (Nagoya Univ., Japan)

1A-5: “Design of Gate-Leakage-Based Timer Using an Amplifier-Less Replica-Bias Switching Technique in 55-nm DDC CMOS” Atsuki Kobayashi, Yuya Nishio, Kenya Hayashi, Shigeki Arata (Nagoya Univ., Japan),Kiichi Niitsu (Nagoya Univ./JST PRESTO, Japan)

1A-6: “A Low-Voltage CMOS Electrophoresis IC Using Electroless Gold Plating for Small-Form-Factor Biomolecule Manipulation” Kiichi Niitsu, Yuuki Yamaji, Atsuki Kobayashi, Kazuo Nakazato (Nagoya Univ.,Japan)

1A-7: “A Low-Voltage Low-Power Multi-Channel Neural Interface IC Using Level-Shifted Feedback Technology” Liangjian Lyu, Yu Wang (Fudan Univ., China), Chixiao Chen, C. -J. Richard Shi (Univ. of Washington, U.S.A.)

1A-8: “Development of a High Stability, Low Standby Power Six-Transistor CMOS SRAM Employing a Single Power Supply” Nobuaki Kobayashi (Nihon Univ., Japan), Tadayoshi Enomoto (Chuo Univ., Japan)

1A-9: “Design of Heterogeneously-integrated Memory System with Storage Class Memories and NAND Flash Memories” Chihiro Matsui, Ken Takeuchi (Chuo Univ., Japan)

1A-10: “A 65-nm CMOS Fully-Integrated Circulating Tumor Cell and Exosome Analyzer Using an On-Chip Vector Network Analyzer and a Transmission-Line-Based Detection Window” Kiichi Niitsu (Nagoya Univ.,Japan)

1A-11: “Low Standby Power CMOS Delay Flip-Flop with Data Retention Capability” Nobuaki Kobayashi (Nihon Univ., Japan), Tadayoshi Enomoto (Chuo Univ., Japan)

1A-12: “Accelerate Pattern Recognition for Cyber Security Analysis” Mohammad Tahghighi, Wei Zhang (Hong Kong Univ. of Science and Tech., Hong Kong)

12:00

1A-13: “FPGA Laboratory System supporting Power Measurement for Low-Power Digital Design” Marco Winzker, Andrea Schwandt (Bonn-Rhein-Sieg Univ., Germany)

Lunch Break (12:00 - 13:30)University LSI Design Contest Poster Presentation [Food will be served] (12:00 - 13:30)

Page 33: ASP-DAC 2019 Advance Program · Monday, January 21, 2019 ASP-DAC 2019 offers attendees a set of three-hour intense introductions to specific topics. If you register for tutorials,

13:30 2A: (SS-1) Reverse Engineering: growing moremature - and facing powerful countermeasures

2B: All about PIM 2C: Design for Reliability 2D: New Advances in Emerging ComputingParadigms

Chair: Naehyuck Chang (KAIST, Republic of Korea) Chairs: Guangyu Sun (Peking Univ., China), WanliChang (Univ. of York, U.K.)

Chairs: Shigeki Nojima (Toshiba Memory, Japan), BeiYu (Chinese Univ. of Hong Kong, Hong Kong)

Chairs: Shigeru Yamashita (Ritsumeikan Univ., Japan),Xiaoming Chen (Chinese Academy of Sciences, China)

2A-1: “Integrated Flow for Reverse Engineeringof Nanoscale Technologies” Bernhard Lippmann,Aayush Singla, Niklas Unverricht, Peter Egger, AnjaDubotzky, Michael Werner (Infineon Technologies AG,Germany), Horst Gieser (Fraunhofer EMFT, Germany), Mar-tin Rasche, Oliver Kellermann (Raith GmbH, Germany),Helmut Grab (TUM, Germany)

2B-1: “GraphSAR: A Sparsity-Aware Processing-in-Memory Architecture for Large-Scale Graph Pro-cessing on ReRAMs” Guohao Dai (Tsinghua Univ.,China), Tianhao Huang (Massachusetts Inst. of Tech., U.S.A.),Yu Wang, Huazhong Yang (Tsinghua Univ., China), JohnWawrzynek (Univ. of California, Berkeley, U.S.A.)

2C-1: “IR-ATA: IR Annotated Timing Analysis, AFlow for Closing the LoopBetween PDN design,IR Analysis & Timing Closure” Ashkan Vakil,Houman Homayoun, Avesta Sasan (George Mason Univ.,U.S.A.)

2D-1: “Compiling SU(4) Quantum Circuits to IBMQX Architectures” Alwin Zulehner, Robert Wille(Johannes Kepler Univ. Linz, Austria)

2A-2: “NETA: When IP Fails, Secrets Leak” TravisMeade, Jason Portillo, Shaojie Zhang (Univ. of CentralFlorida, U.S.A.), Yier Jin (Univ. of Florida, U.S.A.)

2B-2: “ParaPIM: A Parallel Processing-in-MemoryAccelerator for Binary-Weight Deep Neural Net-works” Shaahin Angizi, Zhezhi He, Deliang Fan(Univ. of Central Florida, U.S.A.)

2C-2: “Learning-Based Prediction of PackagePower Delivery Network Quality” Yi Cao (QualcommTechnologies, U.S.A.), Andrew B. Kahng (UC San Diego,U.S.A.), Joseph Li, Abinash Roy, Vaishnav Srinivas(Qualcomm Technologies, U.S.A.), Bangqi Xu (UC San Diego,U.S.A.)

2D-2: “Quantum Circuit Compilers Using GateCommutation Rules” Toshinari Itoko, Rudy Ray-mond, Takashi Imamichi, Atsushi Matsuo (IBM Re-search, Japan), Andrew W. Cross (IBM Research, U.S.A.)

2A-3: “Machine Learning and Structural Charac-teristics for Reverse Engineering” Johanna Baehr,Alessandro Bernardini, Georg Sigl, Ulf Schlicht-mann (Tech. Univ. of Munich, Germany)

2B-3: “CompRRAE: RRAM-based ConvolutionalNeural Network Accelerator with Reduced Com-putations through a Runtime Activation Estima-tion” Xizi Chen, Jingyang Zhu, Jingbo Jiang, ChiYing Tsui (Hong Kong Univ. of Science and Tech., Hong Kong)

2C-3: “Tackling Signal Electromigration withLearning-Based Detection and Multistage Mitiga-tion” Wei Ye, Mohamed Baker Alawieh, Yibo Lin,David Z. Pan (Univ. of Texas, Austin, U.S.A.)

2D-3: “Scalable Design for Field-coupledNanocomputing Circuits” Marcel Walter (Univ.of Bremen, Germany), Robert Wille (Johannes Kepler Univ.Linz, Austria), Frank Sill Torres (DFKI GmbH, Germany),Daniel Große, Rolf Drechsler (Univ. of Bremen, Germany)

2A-4: “Towards Cognitive Obfuscation: ImpedingHardware Reverse Engineering Based on Psycho-logical Insights” Carina Wiesen, Steffen Becker,Nils Albartus, Max Hoffmann, Sebastian Wallat,Marc Fyrbiak, Nikol Rummel, Christof Paar (RuhrUniv. Bochum, Germany)

2B-4: “CuckooPIM: An Efficient and Less-blockingCoherence Mechanism for Processing-in-MemorySystems” Sheng Xu, Xiaoming Chen, Ying Wang,Yinhe Han, Xiaowei Li (Chinese Academy of Sciences,China)

2C-4: “ROBIN: Incremental Oblique InterleavedECC for Reliability Improvement in STT-MRAMCaches” Elham Cheshmikhani (Sharif Univ. of Tech.,Iran), Hamed Farbeh (Amirkabir Univ. of Tech., Iran), Hos-sein Asadi (Sharif Univ. of Tech., Iran)

2D-4: “BDD-based Synthesis of Optical Logic Cir-cuits Exploiting Wavelenngth Division Multiplex-ing” Ryosuke Matsuo, Jun Shiomi, Tohru Ishi-hara, Hidetoshi Onodera (Kyoto Univ., Japan), AkihikoShinya, Masaya Notomi (NTT, Japan)

15:35

2A-5: “Insights to the Mind of a Trojan De-signer: The Challenge to Integrate a Trojanin the Bitstream” Maik Ender, Paul MartinKnopp, Christof Paar, Pawel Swierczynski, Sebas-tian Wallert, Matthias Wilhelm (Ruhr Univ. Bochum, Ger-many)

2B-5: “AERIS: Area/Energy-Efficient 1T2RReRAM Based Processing-in-Memory NeuralNetwork System-on-a-Chip” Jinshan Yue, YongpanLiu, Fang Su (Tsinghua Univ., China), Shuangchen Li(Univ. of California, Santa Barbara, U.S.A.), Zhe Yuan, ZhiboWang, Wenyu Sun, Xueqing Li, Huazhong Yang(Tsinghua Univ., China)

2C-5: “Aging-aware Chip Health Prediction Adopt-ing an Innovative Monitoring Strategy” Yun-TingWang (National Tsing Hua Univ., Taiwan), Kai-Chiang Wu(National Chiao Tung Univ., Taiwan), Chung-Han Chou(Feng Chia Univ., Taiwan), Shih-Chieh Chang (National Ts-ing Hua Univ., Taiwan)

2D-5: “Hybrid Binary-Unary Hardware Accelera-tor” S. Rasoul Faraji, Kia Bazargan (Univ. of Minnesota,U.S.A.)

Coffee break (15:35 - 15:55)

Page 34: ASP-DAC 2019 Advance Program · Monday, January 21, 2019 ASP-DAC 2019 offers attendees a set of three-hour intense introductions to specific topics. If you register for tutorials,

15:55 3A: (SS-2) Design, testing, and fault tolerance ofNeuromorphic systems

3B: Memory-Centric Design and Synthesis 3C: Efficient Modeling of Analog, Mixed Signaland Arithmetic Circuits

3D: Logic and Precision Optimization for NeuralNetwork Designs

Chair: Chenchen Liu (Clarkson Univ., U.S.A.) Chairs: Shouyi Yin (Tsinghua Univ., China), MatthewZiegler (IBM)

Chairs: Jun Tao (Fudan Univ., China), Shobha Vasude-van (Univ. of Illinois, Urbana-Champaign, U.S.A.)

Chairs: Massanori Muroyama (Tohoku Univ., Japan),Younghyun Kim (Univ. of Wisconsin, U.S.A.)

3A-1: “Fault Tolerance in Neuromorphic Com-puting Systems” Yu Wang (Tsinghua Univ., China),Mengyun Liu, Krishnendu Chakrabarty (Duke Univ.,U.S.A.), Lixue Xia (Tsinghua Univ., China)

3B-1: “A Staircase Structure for Scalable and Effi-cient Synthesis of Memristor-Aided Logic” AlwinZulehner (Johannes Kepler Univ. Linz, Austria), KamalikaDatta (National Inst. of Tech. Meghalaya, India), IndranilSengupta (Indian Inst. of Tech. Kharagpur, India), RobertWille (Johannes Kepler Univ. Linz, Austria)

3C-1: “Efficient Sparsification of dense circuit ma-trices in Model Order Reduction” CharalamposAntoniadis, Nestor Evmorfopoulos, Georgios Sta-moulis (Univ. of Thessaly, Greece)

3D-1: “Energy-Efficient, Low-Latency Realizationof Neural Networks through Boolean Logic Mini-mization” Mahdi Nazemi, Ghasem Pasandi, Mas-soud Pedram (USC, U.S.A.)

3A-2: “Build Reliable and Efficient NeuromorphicDesign with Memristor Technology” Bing Li, Bo-nan Yan (Duke Univ., U.S.A.), Chenchen Liu (ClarksonUniv., U.S.A.), Hai Li (Duke Univ., U.S.A.)

3B-2: “On-chip Memory Optimization for High-level Synthesis of Multi-dimensional Data onFPGA” Daewoo Kim, Sugil Lee, Jongeun Lee (Ul-san National Inst. of Science and Tech., Republic of Korea)

3C-2: “Spectral Approach to Verifying Non-linearArithmetic Circuits” CUNXI YU (EPFL, Switzerland),Tiankai Su, Atif Yasin, Maciej Ciesielski (UMassAmherst, U.S.A.)

3D-2: “Log-Quantized Stochastic Comput-ing for Memory and Computation EfficientDNNs” Hyeonuk Sim, Jongeun Lee (Ulsan NationalInst. of Science and Tech., Republic of Korea)

17:10

3A-3: “Reliable In-Memory Neuromorphic Com-puting Using Spintronics” Christopher Muench, Ra-jendra Bishnoi, Mehdi Tahoori (KIT, Germany)

3B-3: “HUBPA: High Utilization BidirectionalPipeline Architecture for Neuromorphic Comput-ing” Houxiang Ji, Li Jiang, Tianjian Li, NaifengJing, Jing Ke, Xiaoyao Liang (Shanghai Jiao Tong Univ.,China)

3C-3: “S2PM: Semi-Supervised Learning for Effi-cient Performance Modeling of Analog and MixedSignal Circuits” Mohamed Baker Alawieh, XiyuanTang, David Z. Pan (Univ. of Texas, Austin, U.S.A.)

3D-3: “Cell Division: Weight Bit-Width ReductionTechnique for Convolutional Neural Network Hard-ware Accelerators” Hanmin Park, Kiyoung Choi(Seoul National Univ., Republic of Korea)

ACM SIGDA Student Research Forum at ASP-DAC 2019 [Food will be served] (18:00 - 20:00)(The title of the posters are listed in the next page)

Page 35: ASP-DAC 2019 Advance Program · Monday, January 21, 2019 ASP-DAC 2019 offers attendees a set of three-hour intense introductions to specific topics. If you register for tutorials,

18:00 ACM SIGDA Student Research Forum at ASP-DAC 2019

SRF-1: “New Views for Stochastic Computing: From Time-Encoding to Deterministic Processing” M. Hassan Najafi (University of Minnesota-Twin Cities )

SRF-2: “A Multi-Phase Intellectual Property Core Watermarking Approach during Architectural Synthesis” Dipanjan Roy (Indian Institute of Technology Indore )

SRF-3: “Automatic Design Environment using High-level Synthesis for Reconfigurable 3D Sound Processor” Saya Ohira (Nihon University )

SRF-4: “VLSI Design for Manufacturability based on Dictionary Learning Framework” Hao Geng (The Chinese University of Hong Kong )

SRF-5: “Computer-Aided Design for Quantum Computing” Alwin Zulehner (Johannes Kepler University Linz )

SRF-6: “Enhancing VLSI Design for Manufacturability with Machine Learning Techniques” Haoyu Yang (The Chinese University of Hong Kong )

SRF-7: “A Model-driven Framework with Assertion Based Verification (ABV) Support for Embedded Systems Design Automation” Muhammad Waseem Anwar (National University of Sciences and Technology )

SRF-8: “Optimization of Multi-Target Sample Preparation On-Demand with Digital Microfluidic Biochips” Sudip Poddar (Indian Statistical Institute )

SRF-9: “Clustering for Reduction of Power Consumption and Area on Post-Silicon Delay Tuning” Kota Muroi (The University of Aizu )

SRF-10: “Task and Data Co-Allocation for MPSoCs with 3D-stacked Memories to Optimize Performance under Thermal Constraints” Chia-Yin Liu (National Chi Nan University )

SRF-11: “The Accurate Power Consumption Model For Rotary UAVs” Dooyoung Hong (Korea Advanced Institute of Science and Technology )

SRF-12: “Modulo 2n+1 arithmetic based on signed-digit and binary number addition algorithm” Yuuki Suzuki (Gunma University )

SRF-13: “A Data Transfer Optimization in Non-Binary to Binary Conversion Circuit in Non-Binary Cyclic ADC” Yuji Shindo (Tokyo City University )

20:00SRF-14: “A Decision Network Design for Efficient Semantic Segmentation Computation in Edge Computing” Xin-Yu Kuo (National Tsing Hua University )

Page 36: ASP-DAC 2019 Advance Program · Monday, January 21, 2019 ASP-DAC 2019 offers attendees a set of three-hour intense introductions to specific topics. If you register for tutorials,

Wednesday, January 23, 2019

Registration (7:30 - )

9:00 2K: Keynote II

10:00Satoshi Matsuoka (RIKEN, Japan) “A Game-changing Supercomputer with Groundbreaking A64fx High Performance Arm Processor”

Coffee break (10:00 - 10:20)

10:20 4A: (SS-3) Modern Mask Optimization: FromShallow To Deep Learning

4B: System Level Modelling Methods I 4C: Testing and Design for Security 4D: Network-Centric Design and System

Chairs: Evangeline F. Y. Young (Chinese Univ. of HongKong, Hong Kong), Atsushi Takahashi (Tokyo Inst. of Tech.,Japan)

Chair: Sri Parameswaran (Univ. of New South Wales,Australia)

Chairs: Michihiro Shintani (NAIST, Japan), KoheiMiyase (Kyushu Inst. of Tech., Japan)

Chairs: Keiji Kimura (Waseda Univ., Japan), Yaoyao Ye(Shanghai Jiao Tong Univ., China)

4A-1: “LithoROC: Lithography Hotspot Detectionwith Explicit ROC Optimization” Wei Ye, Yibo Lin,Meng Li, Qiang Liu, David Z. Pan (Univ. of Texas,Austin, U.S.A.)

4B-1: “AxDNN:Towards the Cross-layer Design ofApproximate DNNs” Yinghui Fan, Xiaoxi Wu, Jiy-ing Dong, Zhi Qi (Southeast Univ., China)

4C-1: “Improving Scan Chain Diagnostic AccuracyUsing Multi-Stage Artificial Neural Networks” Ma-son Chern, Shih-Wei Lee, Shi-Yu Huang (National Ts-ing Hua Univ., Taiwan), Yu Huang, Gaurav Veda, Kun-Han Tsia, Wu-Tung Cheng (Mentor, A Siemens Business,U.S.A.)

4D-1: “Routing in Optical Network-on-Chip: Mini-mizing Contention with Guaranteed Thermal Relia-bility” Mengquan Li (Chongqing Univ., China), WeichenLiu (Nanyang Technological Univ., Singapore), Lei Yang,Peng Chen, Duo Liu (Chongqing Univ., China), Nan Guan(Hong Kong Polytechnic Univ., Hong Kong)

4A-2: “Detecting Multi-Layer Layout Hotspots withAdaptive Squish Patterns” Haoyu Yang (Chinese Univ.of Hong Kong, Hong Kong), Piyush Pathak, Frank Gen-nari, Ya-Chieh Lai (Cadence Design Systems, U.S.A.), BeiYu (Chinese Univ. of Hong Kong, Hong Kong)

4B-2: “Simulate-the-hardware: Training AccurateBinarized Neural Networks for Low-Precision Neu-ral Accelerators” Jiajun Li (Univ. of Chinese Academyof Sciences/Chinese Academy of Sciences, China), Ying Wang(Chinese Academy of Sciences, China), Bosheng Liu (Univ.of Chinese Academy of Sciences/Chinese Academy of Sciences,China), Yinhe Han, Xiaowei Li (Chinese Academy of Sci-ences, China)

4C-2: “Testing Stuck-Open Faults of PriorityAddress Encoder in Content Addressable Memo-ries” Tsai-Ling Tsai, Jin-Fu Li (National Central Univ.,Taiwan), Chun-Lung Hsu, Chi-Tien Sun (ITRI, Taiwan)

4D-2: “Bidirectional Tuning of Microring-BasedSilicon Photonic Transceivers for Optimal EnergyEfficiency” Yuyang Wang (Univ. of California, Santa Bar-bara, U.S.A.), M. Ashkan Seyedi, Jared Hulme, MarcoFiorentino, Raymond G. Beausoleil (Hewlett PackardLabs, U.S.A.), Kwang-Ting Cheng (Hong Kong Univ. of Sci-ence and Tech., Hong Kong)

4A-3: “A Local Optimal Method on DSA Guid-ing Template Assignment with Redundant/DummyVia Insertion” Xingquan Li (Fuzhou Univ., China), BeiYu (Chinese Univ. of Hong Kong, Hong Kong), Jianli Chen,Wenxing Zhu (Fuzhou Univ., China)

4B-3: “An N-Way Group Association Architectureand Sparse Data Group Association Load BalancingAlgorithm for Sparse CNN Accelerators” JingyuWang, Zhe Yuan, Ruoyang Liu, Huazhong Yang,Yongpan Liu (Tsinghua Univ., China)

4C-3: “ScanSAT: Unlocking Obfuscated ScanChains” Lilas Alrahis (Khalifa Univ., United Arab Emi-rates), Muhammad Yasin (Tandon school of engineering,New York university, U.S.A.), Hani Saleh, Baker Moham-mad, Mahmoud Al-Qutayri (Khalifa Univ., United ArabEmirates), Ozgur Sinanoglu (New York Univ. Abu Dhabi,United Arab Emirates)

4D-3: “Redeeming Chip-level Power Efficiency byCollaborative Management of the Computation andCommunication” Ning Lin, Hang Lu, Xin Wei,Xiaowei Li (Chinese Academy of Sciences/Univ. of ChineseAcademy of Sciences, China)

12:00

4A-4: “Deep Learning-Based Framework for Com-prehensive Mask Optimization” Bo-Yi Yu, YongZhong, Shao-Yun Fang, Hung-Fei Kuo (National Tai-wan Univ. of Science and Tech., Taiwan)

4B-4: “Maximizing Power State Cross Coveragein Firmware-based Power Management” VladimirHerdt, Hoang M. Le (Univ. of Bremen, Germany), DanielGroße, Rolf Drechsler (Univ. of Bremen, DFKI GmbH, Ger-many)

4C-4: “CycSAT-Unresolvable Cyclic Logic Encryp-tion Using Unreachable States” Amin Rezaei, YouLi, Yuanqi Shen, Shuyu Kong, Hai Zhou (NorthwesternUniv., U.S.A.)

4D-4: “A High-Level Modeling and SimulationApproach Using Test-Driven Cellular Automatafor Fast Performance Analysis of RTL NoC De-signs” Moon Gi Seok (Arizona State Univ., U.S.A.), Dae-jin Park (Kyungpook National Univ., Republic of Korea), Hes-sam S. Sarjoughian (Arizona State Univ., U.S.A.)

Lunch Break (12:00 - 13:50)Supporters’ Session [Food will be served] (12:00 - 13:50)

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13:50 5A: (DF-1) Robotics: From System Design to Ap-plication

5B: Advanced Memory Systems 5C: Learning: Make Patterning Light and Right 5D: Design and CAD for Emerging Memories

Organizer: Koji Inoue (Kyushu Univ., Japan), Orga-nizer/Chair: Yuji Ishikawa (Toshiba Device & Storage,Japan)

Chairs: Jaehyun Park (Univ. of Ulsan, Republic of Korea),Chenchen Liu (Clarkson Univ.)

Chairs: Tetsuaki Matsunawa (Toshiba Memory),Hidetoshi Matsuoka (Fujitsu Labs.)

Chair: Li Jiang (Shanghai Jiao Tong Univ., China)

5A-1: “Computer-Aided Support System for Mini-mally Invasive Surgery Using 3D Organ Shape Mod-els” Ken’ichi Morooka (Kyusyu Univ., Japan)

5B-1: “A Sharing-Aware L1.5D Cache for DataReuse in GPGPUs” Jianfei Wang, Li Jiang, Jing Ke,Xiaoyao Liang, Naifeng Jing (Shanghai Jiao Tong Univ.,China)

5C-1: “SRAF Insertion via Supervised DictionaryLearning” Hao Geng, Haoyu Yang, Yuzhe Ma (Chi-nese Univ. of Hong Kong, Hong Kong), Joydeep Mitra (Ca-dence, U.S.A.), Bei Yu (Chinese Univ. of Hong Kong, HongKong)

5D-1: “Exploring emerging CNFET for EfficientLast Level Cache Design” Dawen Xu, Li Li (HefeiUniv. of Tech., China), Ying Wang, Cheng Liu, HuaweiLi (Chinese Academy of Sciences, China)

5A-2: “ROS and mROS: How to accelerate the de-velopment of robot systems and integrate embeddeddevices” Hideki Takase (Kyoto Univ./JST PRESTO, Japan)

5B-2: “NeuralHMC: An Efficient HMC-Based Ac-celerator for Deep Neural Networks” Chuhan Min(Univ. of Pittsburgh, U.S.A.), Jiachen Mao, Hai Li, YiranChen (Duke Univ., U.S.A.)

5C-2: “A Fast Machine Learning-based Mask Print-ability Predictor for OPC Acceleration” BentianJiang (Chinese Univ. of Hong Kong, Hong Kong), HangZhang (Cornell Univ., U.S.A.), Jinglei Yang (Univ. of Cali-fornia, Santa Barbara, U.S.A.), Evangeline F. Y. Young (Chi-nese Univ. of Hong Kong, Hong Kong)

5D-2: “Mosaic: An Automated Synthesis Flow forBoolean Logic Based on Memristor Crossbar” LeiXie (Southeast Univ., China)

15:05

5A-3: “Rapid Development of Robotics technol-ogy using Robot Contest and Open Collabora-tion” Masaki Yamamoto (AI Solution Center, Panasonic,Japan)

5A-3: “Rapid Development of Robotics technol-ogy using Robot Contest and Open Collabora-tion” Masaki Yamamoto (AI Solution Center, Panasonic,Japan)

5B-3: “Boosting Chipkill Capability underRetention-Error Induced Reliability Emer-gency” Xianwei Zhang (AMD, U.S.A.), RujiaWang, Youtao Zhang, Jun Yang (Univ. of Pittsburgh,U.S.A.)

5C-3: “Semi-Supervised Hotspot Detection withSelf-Paced Multi-Task Learning” Ying Chen (Chi-nese Academy of Sciences/Univ. of Chinese Academy of Sciences,China), Yibo Lin (Univ. of Texas, Austin, U.S.A.), TianyangGai (Chinese Academy of Sciences/Univ. of Chinese Academyof Sciences, China), Yajuan Su (Chinese Academy of Sciences,China), Yayi Wei (Chinese Academy of Sciences/Univ. of Chi-nese Academy of Sciences, China), David Z. Pan (Univ. ofTexas, Austin, U.S.A.)

Coffee break (15:05 - 15:35)

Page 38: ASP-DAC 2019 Advance Program · Monday, January 21, 2019 ASP-DAC 2019 offers attendees a set of three-hour intense introductions to specific topics. If you register for tutorials,

15:35 6A: (DF-2) Advanced Imaging Technologies andApplications

6B: Optimized Training for Neural Networks 6C: New Trends in Biochips 6D: Power-efficient Machine Learning HardwareDesign

Organizer: Masaki Sakakibara (Sony SemiconductorSolutions, Japan), Organizer/Chair: Shinichi Shibahara(Renesas Electronics, Japan)

Chairs: Deliang Fan (Univ. of Central Florida, U.S.A.),Raymond (Ruirui) Huang (Alibaba Cloud, U.S.A.)

Chair: Tsun-Ming Tseng (Tech. Univ. of Munich, Ger-many)

Chairs: Hai Wang (UESTC, China), Sheldon Tan (Univ.of California, Riverside, U.S.A.)

6A-1: “NIR Lock-in Pixel Image Sensors for Re-mote Heart Rate Detection” Shoji Kawahito, CaoChen, Leyi Tan, Keiichiro Kagawa, Keita Yasutomi(Shizuoka Univ., Japan), Norimichi Tsumura (Chiba Univ.,Japan)

6B-1: “CAPTOR: A Class Adaptive Filter Prun-ing Framework for Convolutional Neural Networksin Mobile Applications” Zhuwei Qin, Fuxun Yu(George Mason Univ., U.S.A.), ChenChen Liu (ClarksonUniv., U.S.A.), Xiang Chen (George Mason Univ., U.S.A.)

6C-1: “Factorization Based Dilution of Bio-chemical Fluids with Micro-Electrode-Dot-ArrayBiochips” Sohini Saha (IIEST, Shibpur, India), De-braj Kundu, Sudip Roy (IIT Roorkee, India), SukantaBhattacharjee (New York Univ., United Arab Emirates), Kr-ishnendu Chakrabarty (Duke Univ., U.S.A.), Partha P.Chakrabarti (IIT Kharagpur, India), Bhargab B. Bhat-tacharya (ISI Kolkata, India)

6D-1: “SAADI: A Scalable Accuracy Approxi-mate Divider for Dynamic Energy-Quality Scal-ing” Setareh Behroozi, Jingjie Li, Jackson Melchert,Younghyun Kim (Univ. of Wisconsin-Madison, U.S.A.)

6A-2: “A TDC/ADC Hybrid LiDAR SoC for 200mRange Detection with High Image Resolution under100klux Sunlight” Kentaro Yoshioka (Toshiba, Japan)

6B-2: “TNPU: An Efficient Accelerator Archi-tecture for Training Convolutional Neural Net-works” Jiajun Li, Guihai Yan, Wenyan Lu, ShuhaoJiang, Shijun Gong, Jingya Wu, Junchao Yan, Xi-aowei Li (Chinese Academy of Sciences, China)

6C-2: “Sample Preparation for Multiple-Reactant Bioassays on Micro-Electrode-Dot-ArrayBiochips” Tung-Che Liang (Duke Univ., U.S.A.),Yun-Sheng Chan (National Chiao Tung Univ., Taiwan),Tsung-Yi Ho (National Tsing Hua Univ., Taiwan), Krish-nendu Chakrabarty (Duke Univ., U.S.A.), Chen-Yi Lee(National Chiao Tung Univ., Taiwan)

6D-2: “SeFAct: Selective Feature Activation andEarly Classification for CNNs” Farhana SharminSnigdha, Ibrahim Ahmed, Susmita Dey Manasi,Meghna G. Mankalale (Univ. of Minnesota, U.S.A.), JiangHu (Texas A&M Univ., U.S.A.), Sachin S. Sapatnekar(Univ. of Minnesota, U.S.A.)

6A-3: “A 1/4-inch 3.9Mpixel Low Power Event-driven Back-illuminated Stacked CMOS Image sen-sor” Oichi Kumagai (Sony Semiconductor Solutions, Japan)

6B-3: “REIN: A Robust Training Method for En-hancing Generalization Ability of Neural Networksin Autonomous Driving Systems” Fuxun Yu (GeorgeMason Univ., U.S.A.), Chenchen Liu (Clarkson Univ., U.S.A.),Xiang Chen (George Mason Univ., U.S.A.)

6C-3: “Robust Sample Preparation on Low-CostDigital Microfluidic Biochips” Zhanwei Zhong(Duke Univ., U.S.A.), Robert Wille (Johannes Kepler Univ.Linz, Austria), Krishnendu Chakrabarty (Duke Univ.,U.S.A.)

6D-3: “FACH: FPGA-based Acceleration of Hy-perdimensional Computing by Reducing Computa-tional Complexity” Mohsen Imani, Sahand Salamat,Saransh Gupta, Jiani Huang, Tajana Rosing (UC SanDiego, U.S.A.)

17:15

6A-4: “Next-Generation Fundus Camera with Full-Color Image Acquisition in 0-lx Visible Light us-ing BSI CMOS Image Sensor with Advanced NIRMulti-Spectral Imaging System -Application FieldDevelopment of Dynamic Intelligent Systems Us-ing High-Speed Vision-” Hirofumi Sumi, HironariTakehara (NAIST, Japan), Norimasa Kishi (Univ. of Tokyo,Japan), Jun Ohta (NAIST, Japan), Masatoshi Ishikawa(Univ. of Tokyo, Japan)

Banquet (18:30 - 20:30)

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Thursday, January 24, 2019

Registration (7:30 - )

9:00 3K: Keynote III

10:00Yasuhisa Shimazaki (Renesas Electronics, Japan) “Hardware and Software Security Technologies to Enable Future Connected Cars”

Coffee break (10:00 - 10:20)

10:20 7A: (SS-4) Security of Machine Learning andMachine Learning for Security: Progress andChallenges for Secure, Machine Intelligent Mo-bile Systems

7B: System Level Modelling Methods II 7C: Placement 7D: Algorithms and Architectures for EmergingApplications

Chairs: Xiang Chen (George Mason Univ., U.S.A.),Yanzhi Wang (Northeastern Univ., U.S.A.)

Chair: Naehyuck Chang (KAIST, Republic of Korea) Chairs: Ting-Chi Wang (National Tsing Hua Univ.), Ya-suhiro Takashima (Univ. of Kitakyushu, Japan)

Chair: Taewhan Kim (Seoul National Univ., Republic ofKorea)

7A-1: “ADMM Attack: An Enhanced AdversarialAttack for Deep Neural Networks with UndetectableDistortions” Pu Zhao, Kaidi Xu (Northeastern Univ.,U.S.A.), Sijia Liu (IBM Research, U.S.A.), Yanzhi Wang,Xue Lin (Northeastern Univ., U.S.A.)

7B-1: “SIMULTime: Context-Sensitive TimingSimulation on Intermediate Code Representationfor Rapid Platform Explorations” Alessandro Cor-naglia, Alexander Viehl (FZI Research Center for Informa-tion Technology, Germany), Oliver Bringmann, WolfgangRosenstiel (Univ. of Tbingen, Germany)

7C-1: “Diffusion Break-Aware Leakage Power Op-timization and Detailed Placement in Sub-10nmVLSI” Sun ik Heo (Samsung Electronics, Republic of Ko-rea), Andrew B. Kahng, Minsoo Kim, Lutong Wang(UC San Diego, U.S.A.)

7D-1: “An Approximation Algorithm to the Op-timal Switch Control of Reconfigurable BatteryPacks” Shih-Yu Chen, Jie-Hong Jiang (National Tai-wan Univ., Taiwan), Shou-Hung Ling, Shih-Hao Liang,Mao-Cheng Huang (ITRI, Taiwan)

7A-2: “A System-level Perspective to Understandthe Vulnerability of Deep Learning Systems” TaoLiu, Nuo Xu, Qi Liu (Florida International Univ., U.S.A.),Yanzhi Wang (Northeastern Univ., U.S.A.), Wujie Wen(Florida International Univ., U.S.A.)

7B-2: “Modeling Processor Idle Times in MP-SoC Platforms to Enable Integrated DPM, DVFS,and Task Scheduling Subject to a Hard Dead-line” Amirhossein Esmaili, Mahdi Nazemi, Mas-soud Pedram (Univ. of Southern California, U.S.A.)

7C-2: “MDP-trees: Multi-Domain Macro Place-ment for Ultra Large-Scale Mixed-Size De-signs” Yen-Chun Liu (National Taiwan Univ., Taiwan),Tung-Chieh Chen (Maxeda Technology, Taiwan), Yao WenChang, Sy-Yen Kuo (National Taiwan Univ., Taiwan)

7D-2: “Autonomous Vehicle Routing In Multiple In-tersections” Sheng-Hao Lin, Tsung-Yi Ho (NationalTsing Hua Univ., Taiwan)

7A-3: “High-Performance Adaptive Mobile Secu-rity Enhancement against Malicious Speech and Im-age Recognition” Zirui Xu, Fuxun Yu (George MasonUniv., U.S.A.), Chenchen Liu (Clarkson Univ., U.S.A.), Xi-ang Chen (George Mason Univ., U.S.A.)

7B-3: “Phone-nomenon: A System-Level ThermalSimulator for Handheld Devices” Hong-Wen Chiou,Yu-Min Lee, Shin-Yu Shiau (National Chiao Tung Univ.,Taiwan), Chi-Wen Pan, Tai-Yu Chen (Mediatek, Taiwan)

7C-3: “A Shape-Driven Spreading AlgorithmUsing Linear Programming for Global Place-ment” Shounak Dhar (Univ. of Texas, Austin, U.S.A.),Love Singhal, Mahesh A. Iyer (Intel, U.S.A.), David Z.Pan (Univ. of Texas, Austin, U.S.A.)

7D-3: “GRAM: Graph Processing in a ReRAM-based Computational Memory” Minxuan Zhou,Mohsen Imani, Saransh Gupta, Yeseong Kim, Ta-jana Rosing (Univ. of California, San Diego, U.S.A.)

12:00

7A-4: “AdverQuil: an Efficient Adversarial Detec-tion and Alleviation Technique for Black-Box Neu-romorphic Computing Systems” Hsin-Pai Cheng,Juncheng Shen, Huanrui Yang (Duke Univ., U.S.A.),Qing Wu (Air Force Research Laboratory, U.S.A.), Hai Li,Yiran Chen (Duke Univ., U.S.A.)

7A-4: “AdverQuil: an Efficient Adversarial Detec-tion and Alleviation Technique for Black-Box Neu-romorphic Computing Systems” Hsin-Pai Cheng,Juncheng Shen, Huanrui Yang (Duke Univ., U.S.A.),Qing Wu (Air Force Research Laboratory, U.S.A.), Hai Li,Yiran Chen (Duke Univ., U.S.A.)

7B-4: “Virtual Prototyping of HeterogeneousAutomotive Applications: Matlab, SystemC, orboth?” Xiao Pan, Carna Zivkovic, Christoph Grimm(Univ. of Kaiserslautern, Germany)

7C-4: “Finding Placement-Relevant Clusters WithFast Modularity-Based Clustering” Mateus Fogaca(Univ. Federal do Rio Grande do Sul, Brazil), Andrew B.Kahng (Univ. of California, San Diego, U.S.A.), Ricardo Au-gusto da Luz Reis (Univ. Federal do Rio Grande do Sul,Brazil), Lutong Wang (Univ. of California, San Diego, U.S.A.)

Lunch Break (12:00 - 13:15)

Page 40: ASP-DAC 2019 Advance Program · Monday, January 21, 2019 ASP-DAC 2019 offers attendees a set of three-hour intense introductions to specific topics. If you register for tutorials,

13:15 8A: (DF-3) Emerging Technologies for TokyoOlympic 2020

8B: Embedded Software for Parallel Architecture 8C: Machine Learning and Hardware Security 8D: Memory Architecture for Efficient NeuralNetwork Computing

Organizer/Chair: Koichiro Yamashita (Fujitsu, Japan),Organizer: Akihiko Inoue (Panasonic, Japan)

Chairs: Mengying Zhao (Shandong Univ., China), We-ichen Liu (Nanyang Technological Univ.)

Chairs: Dong Kyue Kim (Hanyang Univ., Republic ofKorea), Ray C.C. Cheung (City Univ. of Hong Kong, HongKong)

Chairs: Jongeun Lee (UNIST, Republic of Korea), Bei Yu(Chinese Univ. of Hong Kong, Hong Kong)

8A-1: “Walking assistive powered-wear ’HIMICO’with wire-driven assist” Kenta Murakami (Panasonic,Japan)

8B-1: “Efficient Sporadic Task Handling in Paral-lel AUTOSAR Applications Using Runnable Migra-tion” Milan Copic, Rainer Leupers, Gerd Ascheid(RWTH Aachen Univ., Germany)

8C-1: “Towards Practical Homomorphic EmailFiltering: A Hardware-Accelerated Secure NaiveBayesian Filter” Song Bian, Masayuki Hiromoto,Takashi Sato (Kyoto Univ., Japan)

8D-1: “Sparsity for ReRAM: Pruning and MappingSparse Neural Network for ReRAM based Acceler-ator” Jilan Lin (UCSB/Tsinghua Univ., China), ZhenhuaZhu, Yu Wang (Tsinghua Univ., China), Yuan Xie (UCSB,U.S.A.)

8A-2: “Deep Scene Recognition with Object Detec-tion” Zhiming Tan (Fujitsu R&D Center, China)

8B-2: “A Heuristic for Multi Objective Soft-ware Application Mappings on Heterogeneous MP-SoCs” Gereon Onnebrink, Ahmed Hallawa, RainerLeupers, Gerd Ascheid (RWTH Aachen Univ., Germany),Awaid-Ud-Din Shaheen (Silexica GmbH, Germany)

8D-2: “In-Memory Batch-Normalization for Resis-tive Memory based Binary Neural Network Hard-ware” Hyungjun Kim, Yulhwa Kim, Jae-Joon Kim(POSTECH, Republic of Korea)

8C-2: “A 0.16pJ/bit Recurrent Neural NetworkBased PUF for Enhanced Machine Learning AttackResistance” Nimesh Kirit Shah (Nanyang TechnologicalUniv., Singapore), Manaar Alam (Indian Inst. of Tech. Kharag-pur, India), Durga Prasad Sahoo (Robert Bosch Engineeringand Business Solutions Private, India), Debdeep Mukhopad-hyay (Indian Inst. of Tech. Kharagpur, India), Arindam Basu(Nanyang Technological Univ., Singapore)

14:30

8A-3: “Spatial and battery sensing solutions forsmart cities leading to 2020 Olympics” HiroyukiTsujikawa (Panasonic, Japan)

8B-3: “ReRam-based Processing-in-Memory Ar-chitecture for Blockchain Platforms” Fang Wang(Hong Kong Polytechnic Univ., Hong Kong), Zhaoyan Shen(Shandong Univ., China), Lei Han (Hong Kong PolytechnicUniv., Hong Kong), Zili Shao (Chinese Univ. of Hong Kong,Hong Kong)

8C-3: “P3M: A PIM-based Neural Network ModelProtection Scheme for Deep Learning Accelera-tor” Wen Li, Ying Wang, Huawei Li, Xiaowei Li(Chinese Academy of Sciences, China)

8D-3: “Exclusive On-Chip Memory Architec-ture for Energy-Efficient Deep Learning Accelera-tion” Hyeonuk Sim (UNIST, Republic of Korea), JasonAnderson (Univ. of Toronto, Canada), Jongeun Lee (UNIST,Republic of Korea)

Coffee break (14:30 - 14:50)

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14:50 9A: (DF-4) Beyond the Virtual Reality World 9B: Logic-Level Security and Synthesis 9C: Analysis and Algorithms for Digital DesignVerification

9D: FPGA and Optics-Based Neural Network De-signs

Organizer: Hiroe Iwasaki (NTT, Japan), Orga-nizer/Chair: Masaru Kokubo (Hitachi, Japan)

Chairs: Akash Kumar (TU Dresden), Tsutomu Sasao(Meiji Univ.)

Chairs: Mark Po-Hung Lin (National Chung Cheng Univ.,Taiwan), Andreas G. Veneris (Univ. of Toronto, Canada)

Chair: Taewhan Kim (Seoul National Univ., Republic ofKorea)

9A-1: “The World of VR2.0” Michitaka Hirose(Univ. of Tokyo, Japan)

9B-1: “BeSAT: Behavioral SAT-based Attack onCyclic Logic Encryption” Yuanqi Shen, You Li,Amin Rezaei, Shuyu Kong, David Dlott, Hai Zhou(Northwestern Univ., U.S.A.)

9C-1: “A Figure of Merit for Assertions in Ver-ification” Samuel Hertz, Debjit Pal, Spencer Of-fenberger, Shobha Vasudevan (Univ. of Illinois, Urbana-Champaign, U.S.A.)

9D-1: “Implementing Neural Machine Translationwith Bi-Directional GRU and Attention Mechanismon FPGAs Using HLS” Qin Li, Xiaofan Zhang (Univ.of Illinois, Urbana-Champaign, U.S.A.), Jinjun Xiong (IBM,U.S.A.), Wen-mei Hwu, Deming Chen (Univ. of Illinois,Urbana-Champaign, U.S.A.)

9A-2: “Optical fiber scanning system for ultra-lightweight wearable display” Takahiro Matsuda(Hitachi, Japan)

9B-2: “Structural Rewriting in XOR-MajorityGraphs” Zhufei Chu (Ningbo Univ., China), Math-ias Soeken (EPFL, Switzerland), Yinshui Xia, LunyaoWang (Ningbo Univ., China), Giovanni De Micheli (EPFL,Switzerland)

9C-2: “Suspect2vec: A Suspect Prediction Modelfor Directed RTL Debugging” Neil Veira, ZissisPoulos, Andreas Veneris (Univ. of Toronto, Canada)

9D-2: “Efficient FPGA Implementation of Lo-cal Binary Convolutional Neural Network” AidynZhakatayev, Jongeun Lee (Ulsan National Inst. of Scienceand Tech., Republic of Korea)

16:05

9A-3: “Superreal Video Representation for En-hanced Sports Experiences - R&D on VR x AI tech-nologies -” Hideaki Kimata (NTT, Japan)

9B-3: “Design Automation for Adiabatic Cir-cuits” Alwin Zulehner (Johannes Kepler Univ. Linz, Aus-tria), Micheal Frank (Sandia National Labs, U.S.A.), RobertWille (Johannes Kepler Univ. Linz, Austria)

9C-3: “Path Controllability Analysis for High Qual-ity Designs” Li-Jie Chen (National Taiwan Univ., Taiwan),Hong-Zu Chou, Kai-Hui Chang (Avery Design Systems,U.S.A.), Sy-Yen Kuo (National Taiwan Univ., Taiwan), Chi-lai Huang (Avery Design Systems, U.S.A.)

9D-3: “Hardware-software Co-design of SlimmedOptical Neural Networks” Zheng Zhao, Derong Liu,Meng Li, Zhoufeng Ying, Biying Xu (Univ. of Texas,Austin, U.S.A.), Lu Zhang, Bei Yu (Chinese Univ. of HongKong, Hong Kong), Ray T. Chen, David Z. Pan (Univ. ofTexas, Austin, U.S.A.)

Coffee break (16:05 - 16:25)

Page 42: ASP-DAC 2019 Advance Program · Monday, January 21, 2019 ASP-DAC 2019 offers attendees a set of three-hour intense introductions to specific topics. If you register for tutorials,

16:25 10A: (SS-5) The Resurgence of ReconfigurableComputing in the Post Moore Era

10B: Hardware Acceleration 10C: Routing

Chair: Antonino Tumeo (Pacific Northwest National Lab-oratory, U.S.A.)

Chairs: Yongpan Liu (Tsinghua Univ., China), XiangChen (George Mason Univ., U.S.A.)

Chairs: Hunng-Ming Chen (NCTU), Kohira Yuki-hide (Univ. of Aizu)

10A-1: “Software Defined Architectures for DataAnalytics” Vito Giovanni Castellana, Marco Min-utoli, Antonino Tumeo (Pacific Northwest National Labo-ratory, U.S.A.), Pietro Fezzardi, Marco Lattuada, Fab-rizio Ferrandi (Politecnico di Milano, Italy)

10B-1: “Addressing the Issue of Processing Ele-ment Under-Utilization in General-Purpose SystolicDeep Learning Accelerators” Bosheng Liu (Univ.of Chinese Academy of Sciences/Chinese Academy of Sciences,China), Xiaoming Chen, Ying Wang, Yinhe Han (Chi-nese Academy of Sciences, China), Jiajun Li, Haobo Xu(Univ. of Chinese Academy of Sciences, China), Xiaowei Li(Chinese Academy of Sciences, China)

10C-1: “Detailed Routing by Sparse Grid Graphand Minimum-Area-Captured Path Search” GengjieChen, Chak-Wa Pui, Haocheng Li, Jingsong Chen,Bentian Jiang, Evangeline F. Y. Young (Chinese Univ.of Hong Kong, Hong Kong)

10A-2: “Runtime Reconfigurable Memory Hierar-chy in Embedded Scalable Platforms” Davide Giri,Paolo Mantovani, Luca P. Carloni (Columbia Univ.,U.S.A.)

10B-2: “ALook: Adaptive Lookup for GPGPU Ac-celeration” Daniel Peroni, Mohsen Imani, TajanaRosing (Univ. of California, San Diego, U.S.A.)

10C-2: “Thermal-aware 3D Symmetrical BufferedClock Tree Synthesis” Deok Keun Oh, Mu JunChoi, Ju Ho Kim (Sogang Univ., Republic of Korea)

17:40

10A-3: “XPPE: Cross-Platform Performance Esti-mation of Hardware Accelerators Using MachineLearning” Hosein Mohamamdi Makrani, HosseinSayadi, Tinoosh Mohsenin, Avesta Sasan, HoumanHomayoun, Setareh Rafatirad (George Mason Univ.,U.S.A.)

10B-3: “Collaborative Accelerators for In-MemoryMapReduce on Scale-up Machines” Abraham Ad-disie, Valeria Bertacco (Univ. of Michigan, U.S.A.)

10C-3: “Latency Constraint Guided Buffer Sizingand Layer Assignment for Clock Trees with Use-ful Skew” Necati Uysal (Univ. of Central Florida, U.S.A.),Wen-Hao Liu (Cadence Design Systems, U.S.A.), RickardEwetz (Univ. of Central Florida, U.S.A.)

Page 43: ASP-DAC 2019 Advance Program · Monday, January 21, 2019 ASP-DAC 2019 offers attendees a set of three-hour intense introductions to specific topics. If you register for tutorials,

RegistrationConference pre-registration through Web is available. Please visit the Online Registration page:

http://www.aspdac.com/

FEESCategory By Dec.7, 2018 From Dec.8, 2018 On site

to Jan.17, 2019[Conference]∗Member 57,000 yen 62,000 yen 64,000 yen∗∗Speaker 57,000 yen — —Non-member 67,000 yen 72,000 yen 74,000 yenFull-time Student 35,000 yen 40,000 yen 42,000 yen[Keynotes + Designers’ Forum]

25,000 yen 30,000 yen 32,000 yen∗ Member of IEEE, ACM SIGDA, IEICE, IPSJ∗∗Please note that each paper (except UDC paper) shall be accompanied by at least

one different conference registration at the speaker’s registration rate (e.g., twospeaker registrations are needed for presenting two accepted papers) by Nov.5, 2018. But any registered co-author can present the work at the conference.As for UDC papers, it is mandatory that at least one co-author per acceptedUDC paper registers the conference at the speaker’s registration or full-timestudent registration rate prior to the final manuscript submission and attends theconference to present the work.

Category By Dec.7, 2018 From Dec.8, 2018 On siteto Jan.17, 2019

[Tutorial]∗Member 22,000 yen 26,000 yen 26,000 yenNon-member 26,000 yen 30,000 yen 30,000 yenFull-time Student 14,000 yen 16,000 yen 16,000 yen∗∗∗Student Group 10,000 yen 12,000 yen N/A∗ Member of IEEE, ACM SIGDA, IEICE, IPSJ∗∗∗“Student Group” discount is applied to a group of three or more students from

the same affiliation (faculty or graduate school). A list of the group membersmust be submitted. Please check the details in the web registration page.

The conference fee includes:• Admission to all sessions including keynote speeches and Designers’ Forum except tutorials• A conference kit (a final program and an authority to access the download site for the confer-

ence proceedings)The download site will be open on Jan. 21, 2019. Please note that neither CD-ROM nor USBmemory are provided.

• One refreshment per break

The Designers’ Forum fee includes:• Admission to Designers’ Forum sessions and keynote speeches• A conference kit (a final program and an authority to access the download site for the confer-

ence proceedings)The download site will be open on Jan. 21, 2019. Please note that neither CD-ROM nor USBmemory are provided.

• One refreshment per break

The tutorial fee includes:• Admission to tutorials• Access to electronic files of tutorial presentations• One refreshment per break

CANCELLATION AND REFUNDWhen written notification of cancellation is received by the conference secretariat by December

7, 2018, 5,000 yen will be deducted from the fees paid to cover administrative costs. No refundswill be made for cancellation requests received after this date. Speakers are not allowed to cancelregistrations.

ON-SITE REGISTRATION HOURS

Monday, January 21: 8:00 – 18:00Tuesday, January 22: 7:00 – 17:00Wednesday, January 23: 7:30 – 17:00Thursday, January 24: 7:30 – 17:00

Advance Registration Deadline: Dec. 7th, 2018