Assembly Language Coding(ALC) Part 2

IBM Mainframe Assembler Language Coding

Load Halfword

LH R7,NEGBYTS

Reg 7 before: NEGBYTS before:

00 00 00 C4 FF F1

Reg 7 after: NEGBYTS after:

FF FF FF F1 FF F1

69

FF FF FF F1 FF F1


Store Fullword

The contents of the register specified as operand one are copied to the location designated by operand two.

ST R7,FIELDA

Reg 7 before: FIELDA before:

00 01 22 31 00 00 00 00

70

Reg 7 after: FIELDA after:

00 01 22 31 00 00 00 00

00 01 22 31 00 01 22 31


Store Halfword

The right-most two bytes of the register specified as operand one are copied to the location designated by operand two.

STH R5,FIELDB

Reg 5 before: FIELDB before:

10 FF FF E4 00 00

71

Reg 5 after: FIELDB after:

10 FF FF E4 00 00

10 FF FF E4 FF E4


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EXERCISE #3

PROGRAM 3.

Input: rate dd.cc (decimal point implied).

hours hh.t (decimal point implied).

name.

Message: b@hhtddccname+

name is max of 15 characters.

hh = whole hours worked.

t = tenths of hours worked.

dd = pay whole dollars.

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cc = pay cents.

Process: calculate gross pay.

Input and output numbers are character format.

Arithmetic is in binary format.

Output: name gross pay - 2 decimal places rounded.

Name is first 15 positions starting @ position 1.

Gross salary starts in 3rd position after name.

Gross salary has no editing characters ($ , .).


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Literals

• Avoid the need for separate DC statements.

• Use "=" instead of a "DC".

• e.g. L 3,=F'100'

• Address constant literals allow for multiple literals of different types in one statement.

• e.g. MVC REPORT(6),=AL3(C'DAY',X'F3F1F0')

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LTORG - Begin Literal Pool

Use the LTORG instruction so that the assembler can collect and organize literals into a literal pool to be printed at the bottom of the program. Be sure to code the LTORG at the end of the program just before the FINIS.

Examples:

LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT

000398 316 LTORG

000398 0000033E00000341 317 =A(TT2,TT3,TT4)

0003A0 00000350

0003A4 C1D3D3F1F2F3 318 =AL3(C'ALL',X'F1F2F3')

0003AA D7D7 319 =C'PP'

0003AC 5C 320 =P'5'

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0003AC 5C 320 =P'5'

0003AD C1D3D3 321 =AL3(C'ALL')

0003B0 C1D3D3 322 =C'ALL'

323 FINIS

324 END


Load Multiple Registers

INITFLDS DC F'1'

DC F'2'

DC F'3'

DC F'4'

LM R4,R7,INITFLDS

Reg 4 before: Reg 4 after:

00 00 00 00 00 00 00 01

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00 88 12 FF 00 00 00 02


00 AB CD 00 00 00 00 03


00 FF 01 00 00 00 00 04


Store Multiple

00 00 00 00

SAVEREGS

00 00 00 01

SAVEREGS

Before: After:

L R2,=F'1'

L R3,=F'2'

L R4,=F'3'

STM R2,R4,SAVEREGS

78

SAVEREGS SAVEREGS

SAVEREGS+4

00 88 12 F0 00 00 00 02

SAVEREGS+4

SAVEREGS+8

F1 FE 82 17 00 00 00 03

SAVEREGS+8

Before: After:

Before: After:


CONST1 DC C'ABC'

CONST1

CONST2 DC CL3'NE'

CONST2

CONST3 DC CL3'ABCD'

CONST3

Define Constant - Character Data

C1 C2 C3

D5 C5 40

C1 C2 C3

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CONST4 DC 3C'5'

CONST4

CONST5 DC 2CL2'ABC'

CONST5

F5 F5 F5

C1 C2 C1 C2


Define Constant - Character Data

To have one apostrophe and one ampersand character to appear, you must code two of them in the define constant instruction.

APOSTR DC C''''

APOSTR

AMPERS DC C'&&'

7D

80

AMPERS

ANB DC C'A&&B'

ANB

ASNBS DC C'A''S && B''S'

ASNBS C1 7D E2 40 50 40 C2 7D E2

C1 50 C2

50


Define Constant - Binary Data

BINAR1 DC B'101'

BINAR1

BINAR2 DC B'1111000001'

BINAR2

BINAR3 DC 2B'101'

0000 0101

0000 0011 1100 0001

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BINAR3 DC 2B'101'

BINAR3

BINAR4 DC BL1'111100001'

BINAR4

0000 0101 0000 0101

1110 0001


Define Constant - Hexadecimal Data

HEX1 DC X'123'

HEX1

HEX2 DC 2X'B'

HEX2

HEX3 DC XL2'ABCDE'

01 23

0B 0B

82

HEX3 DC XL2'ABCDE'

HEX3

HEX4 DC 2X'A1C2'

HEX4

HEX5 DC XL4'C12'

HEX5

BC DE

A1 C2 A1 C2

00 00 0C 12


Insert Character

The leftmost byte at the address specified in operand 2 is placedin the rightmost byte of the register specified in operand 1.

IC R7,FIELDC

Reg 7 before: FIELDC before:

FF FF FF E4 11 22 33 44

83

Reg 7 after: FIELDC after:

FF FF FF 11 11 22 33 44


Store Character

10 FF FF E4 F1 F2 C1 C2

The right-most byte of the register specified as operand one is copied to the location designated by operand two.

STC R5,FIELDF+2

Before:

84

Reg 5 FIELDF

F1 F2 E4 C2

Reg 5

10 FF FF E4

FIELDF

After:


Insert Characters Under Mask

ICM R1,M3,D2(B2)

The Insert Characters Under Mask copies N bytes (N <= 4) into a register. The number of bytes copied and their relative positions in the register are specified in the second operand of the instruction, the "mask".

The number of bytes that are inserted is equal to the number of 1's in the mask. The relative position of the bytes in the register is determined by the relative position of 1's in the mask, left-to-right, one-to-one.

85

AB 01 8C 00

09 FF 8C 00

Before

After

REG 4

REG 4

SAVE

SAVE

09 FF E9 86

09 FF E9 86

ICM R4,B'1100',SAVE


Store Characters Under Mask

STCM R1,M3,D2(B2)

The Store Characters Under Mask copies N bytes (N <= 4) from a register into memory. The number of bytes copied and their relative positions in the register are specified in the second operand of the instruction, the "mask".

The number of bytes that are stored is equal to the number of 1's in the mask. The relative position of the bytes in the register is determined by the relative position of 1's in the mask, left-to-right, one-to-one.

86

01 23 AB CD

01 23 AB CD

Before

After

REG 4

REG 4

SAVE

E1 E2 E3 E4

SAVE

01 AB E3 E4

STCM R4,X'A',SAVE


Equates

• Replace numbers with symbolic names.

• Replace addresses with symbolic names.

• Compute expressions whose values are unknown or difficult to calculate.

• Provide an easy means of changing an assembly-time constant.

• Equate generates no bytes in the object module.

87

• Examples:

REG15 EQU 15

EQ1 EQU INPUT

EQ2 EQU INPUT+82

* NUMERIC TABLE STARTS HERE

TABLE DC F'1'

DC F'2'

DC F'3'

DC F'4'

DC F'5'

TBLEN EQU *-TABLE

NMBRITMS EQU (*-TABLE)/4

(OR)

NMBRITMS EQU TBLEN/4

last updated 12/29/99


Move Immediate Instruction

MVI - The Move Immediate copies one byte of datafrom the I2 field to the location designated bythe 1st operand. The I2 data is assembled intobyte one of the instruction.

MVI D1(B1),I2

88


Move Immediate Example

VAL1 DC C'ABCDE'

MVI VAL1,C'*'

VAL1 before:

A B C D E

VAL1 after:

* B C D E

89

MVI VAL1+3,C'*'

VAL1 before:

* B C D E

VAL1 after:

* B C * E


90


EXERCISE #4

PROGRAM 4.

Input: rate dd.cc (actual decimal point).

hours hh.t (actual decimal point).

name.

Message: [email protected]+





91


cc = pay cents.


Input and output are character format.

Arithmetic is in binary format (use literals).

Output: name gross pay daily pay average.NAME: NNNNNNNNNNNNNNN PAY: DDDDCC DAILY: DDDDCC


Salary figures have no editing characters ($ , .).

Report Header = GROSS PAY REPORT

followed by a blank line.

2 spaces before PAY and DAILY.


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Branching

Branch instructions are used in re-directing the flow of the program.

BAL - Branch and Link

BALR - Branch and Link Register

BAS - Branch and Save

BASR - Branch and Save Register

BC - Branch on Condition

BCR - Branch on Condition Register

BCT - Branch on Count

BCTR - Branch on Count Register

93

BCTR - Branch on Count Register

BXLE - Branch on Index Low or Equal

BXH - Branch on Index High


The Condition Code

The Condition Code is a value represented by two bits within the Program Status Word (PSW), bits 18 and 19. The Condition Code is set to 0, 1, 2, or 3 depending on the result obtained in executing certain instructions.

The Condition Code reflects such conditions as zero, non-zero, 1st operand high, operands equal, 1st operand low, and overflow. Once set, the Condition Code remains unchanged until modified by an instruction that causes a different value to be set.

Condition Codes

94

After arithmetic instructions:

00 - result was 0

01 - result was < 0 (negative)

10 - result was > 0 (positive)

11 - overflow situation

After compare instructions:

00 - operands equal

01 - first operand low

10 - first operand high


Branch on Condition

There are two varieties of 'branch on condition' instructions:

BC and BCR.

The format of the BC instruction is: BC M1,D2(X2,B2)

The first operand always specifies a mask value. The second operand is a memory address to be branched to if the condition is met.

e.g. BC 8,FOUND

95

The format of the BCR instruction is: BCR M1,R2

As in the BC, the first operand of the BCR is always a mask value. The second operand is used quite differently however. The second operand is a register that must have been loaded with the branch-to address prior to executing the BCR. If the condition is met, branching will occur to the specified address in the R2 operand.

Refer to the Enterprise Systems Architecture/390 Reference Summary for condition codes and their corresponding mask values.



Branch on Condition

S R1,FULL

BCR 2,R7

This code checks for CC = 2 (0010) and branches to the address in register 7 if the condition is true.

A R1,FULL

BC 8,ZERO

BC 4,MINUS

96

This code checks for condition of zero or negative and branches accordingly. Positive condition results in fall-thru.

C R1,FLDA

BC 12,ALOEQ

This code checks for 2 settings at once - low and equal, and branches accordingly.


Branch on Condition - No Operation (NOP)

A "no-operation" is an instruction that, when executed, does not cause any action to be taken by the hardware except the normal incrementing of the location counter, e.g. a branch instruction that will never branch.


00002E 4700 810C 00112 48 NOP TADF

Above, the next sequential instruction would be executed. This is called a "no-operation".

It can be used for various purposes.

97

Example: CKLIST NOP CONTINUE

OI CKLIST+1,X'F0'

.

. Code in this area will be

executed only once and will

be branched around in

succeeding executions.

Thou Shalt NOT!!!CONTINUE EQU *

(Fact be know, you could not get the code above

to run on the TPF system because of Protect Keys.)


BXLE - R1,R3,D2(B2)

When a BXLE instruction is executed, three things occur during the iteration of the loop:

1. Incrementing the index register.

Branch on Index Low or Equal

Index Register Increment

Register

Branch address

98

1. Incrementing the index register.

2. Counting the number of iterations of the loop.

3. Testing to see whether the loop should be repeated.

An increment is added to the first operand and the sum is compared with a comparand (the limit register). Subsequently, the sum is placed in the first operand location. When the sum is low or equal, the instruction address in the current PSW is replaced by the branch address (the second operand is used as the branch address).

The first operand and the increment are in the registers specified by R1 and R3. The comparand register number is odd and is either one larger than R3 or equal to R3. The branch address is computed before the addition and comparison.


Branch on Index Low or Equal

Object: to add the corresponding numbers of Table A to Table B and place the sums in corresponding elements of Table C.

Using 3 Registers

LM R3,R5,=F'0,4,16' R3 = Index Reg.

MORE EQU * R4 = Incr. Reg.

L R0,TABA(R3) R5 = Limit Reg.

A R0,TABB(R3)

ST R0,TABC(R3)

BXLE R3,R4,MORE

.

TABA DS 5F

99

TABB DS 5F

TABC DS 5F

Using 2 Registers

LM R4,R5,=F'-12,4' R4 = Index Reg.

MORE EQU * R5 = Incr. &

L R0,TABA+12(R4) Limit

A R0,TABB+12(R4)

ST R0,TABC+12(R4)

BXLE R4,R5,MORE

.

TABA DS 5F

TABB DS 5F

TABC DS 5F


Branch on Index High - BXH

Works in the same manner as the BXLE but checks for index high rather than low or equal.

Object: to add the corresponding numbers of Table A to Table B and place the sums in corresponding elements of Table C.

Using 3 Registers

LM R3,R5,=F'0,-4,-20' R3 = Index

MORE EQU * R4 = Incr.

* R5 = Limit

100

* R5 = Limit

L R0,TABA+16(R3)

A R0,TABB+16(R3)

ST R0,TABC+16(R3)

BXH R3,R4,MORE

.

.

.

TABA DS 5F

TABB DS 5F

TABC DS 5F


Load and Test Register

The second operand is placed unchanged in the first operand location, and the sign and magnitude of the second operand isused to determine and set the condition code (refer to thePrinciples of Operation for more details).

Condition code settings: 0 - the result is zero1 - the result is less than zero2 - the result is greater than zero3 - not used

LTR R4,R2

101

Reg 4 before: Reg 2 before:

00 81 34 77 00 00 12 11

Reg 4 after: Reg 2 after:

00 00 12 11 00 00 12 11

In this case, the condition code is set to 2.

Note: when the R1 and R2 fields designate the same registerthe operation is simply a test with no data movement.


Load Negative Register

The two’s complement of the absolute value of the second operandis placed in the first operand location. Negative numbers remainunchanged. Zero remains unchanged.

LNR R4,R2


00 81 34 77 00 00 12 11

102


FF FF ED EF 00 00 12 11


Load Positive Register

The absolute value of the second operand is placed in the first operand location. Positive numbers remain unchanged. Zero remains unchanged.

LPR R4,R2


00 00 00 00 FF FF AB AB

103


00 00 54 55 FF FF AB AB


Load Complement Register

The two’s complement of the second operand is placed in the first operand location. Zero remains unchanged.

LCR R4,R2


00 00 00 04 00 00 54 55

104


FF FF AB AB 00 00 54 55


Algebraic Compare Instructions

To compare two integers algebraically, one of them must be in a register while the other can be in a register or at a memory location. The operands are compared as signed 32-bit binary integers and all the rules of algebra apply.

Compare Registers - CR

Compare Fullword - C

Compare Halfword - CH

105


Compare Registers

CR R3,R4

00 00 00 0A 00 00 00 C8

REG 3 REG 4

CC = 1

106

CR R4,R5

00 00 00 C8 FF FF FF FF

REG 4 REG 5

CC = 2


Compare Fullword

C R3,STORAGE

00 80 59 34 00 00 FF F9

REG 3 STORAGE

CC = ?

107


Compare Halfword

AMT1 DC F'6'

AMT2 DC H'-6'

L R3,AMT1

CH R3,AMT2

CC = ?

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EXERCISE #5

PROGRAM 5.

Input: rate dd.cc (actual decimal point).

hours hh.t (actual decimal point).

name.

Message: [email protected]+





109

cc = pay cents.


Input and output are character format.

Arithmetic is in binary format (literals optional).

Hours > 40 = 1.5 x standard rate (included in gross).

Output: name gross pay overtime.NAME: NNNNNNNNNNNNNNN PAY: DDDDCC OVERTIME: DDDDCC


Salary figures have no editing characters ($ , .).

Report Header = GROSS PAY REPORT centered.

and followed by blank line.

2 spaces before PAY and OVERTIME.


110


Integer Logical Compare Instructions

To compare two integers logicically, one of them must be in a register while the other can be in a register or at a memory location. The operands are compared as unsigned 32-bit binary integers.

Compare Logical Registers - CLR

Compare Logical Fullword - CL

Compare Logical under Mask - CLM

111


Compare Logical

Compares the contents of a register and the contents of a memory location.

00 00 00 01

SAVE

FF FF FF FE

CL R3,SAVE

112

FF FF FF FE

REG 3

CC = 2 1st operand high


Compare Logical Registers

00 00 C1 C2

REG 3

00 00 D1 D2

REG 4

CLR R3,R4

113

CC = 1 1st operand low


Compare Logical Characters Under Mask

CLM R1,M3,D2(B2)

The Compare Logical Characters Under Mask compares two N-byte strings (N <= 4), the first string is in the register designated by the first operand. The second string is in the memory location designated by the second operand.

CLM R5,B'0001',=X'00'

114

00 C3 FF D5

REG 5

00

Memory

CC = 2


Bit String Logical Compare Instructions

In comparing two byte strings of equal length, the comparison starts at the left-most (high order) end of each string and proceeds byte by byte to the right, comparing the bytes from corresponding positions until one of two situations occur:

1. Either two bytes (one from each string) are found to be unequal, or

2. the strings are exhausted and all pairs of bytes are found to be equal.

The result of the compare is returned in the condition code.

115


CLI - Compare Logical Immediate

Compares two 1 byte strings. The first string is in the memory location designated by the first operand. The second string is in the immediate data field of the instruction itself.

CLI FIELD,C'D' CC = 0

CLI FIELD+1,C'D' CC = 1


C4 C2 C6 C4

FIELD

116




CLC - Compare Logical Characters

Compares two 'N byte' strings where N <= 256. The first string is in the memory location designated by the first operand. The second string is in the memory location designated by the second operand.

FLDA DC C'JOHNSON'

FLDB DC C'JOHNSEN'

FLDC DC C'JOHNSUN'

CLC FLDA,FLDB CC = ?

CLC FLDB,FLDC CC = ?

117

CLC FLDC,FLDA CC = ?


Shift Instructions

SLDA, SLDL, SLA, SLL, SRDA, SRDL, SRA, SRL

General Rules:

1. All shift instructions have an RS format.

2. The 2nd operand address is not used to address data. Instead, the low order 6 bits of the address computed are used to determine the shift value (number of bits to be shifted).

3. Bits 12-15 of the object code are not used.

Algebraic shifts:

118

Algebraic shifts:

1. First operand is treated as a 31 or 63 bit integer.

2. The sign bit will not change.

3. The condition code is set after execution.

Logical shifts:

1. First operand is treated as a 32 or 64 bit integer.

2. The sign bit can change, no inspection is made.

3. The condition code is not affected by the instruction.


SLA - Shift Left Algebraic

SLA R5,8(R0)

Before

00 7F 0A 72

REG 5

After

119

7F 0A 72 00

After

REG 5


SRA - Shift Right Algebraic

SRA R5,0(R4)

Before

80 64 E6 00

REG 5

00 00 00 0C

REG 4

After

120

FF F8 06 4E

After

REG 5

00 00 00 0C

REG 4


SLDA - Shift Left Double Algebraic

SLDA R4,8(R6)

Before

00 00 B6 E8

REG 5

BE E8 01 00

REG 4

00 00 00 08

REG 6

121

The 63 numeric bits of the even-odd register pair are shifted to the left, leaving the sign bit unchanged. Because a significant bit is shifted out of bit position 1 of register 4, overflow is indicated by setting condition code to 3.

36 E8 BE E8

After

REG 5

01 00 00 00

REG 4

00 00 00 08

REG 6


SRDA - Shift Right Double Algebraic

SRDA R4,4(R6)

Before

80 00 C8 B4

REG 5

FF FF FF FF

REG 4

00 00 00 08

REG 6

122

REG 6

FF F8 00 0C

After

REG 5

8B 4F FF FF

REG 4

00 00 00 08

REG 6


SLL - Shift Left Logical

SLL R5,8(R4)

Before

00 00 0A BC

REG 4

00 00 00 04

REG 5

After

123

00 AB C0 00

REG 4

00 00 00 04

REG 5


SRL - Shift Right Logical

SRL R5,8(R4)

Before

00 AB C0 00

REG 4

00 00 00 04

REG 5

After

124

00 00 00 0400 00 0A BC

REG 4REG 5


SLDL - Shift Left Double Logical

SLDL R4,8(R6)

Before

00 00 B6 E8

REG 5

BE E8 01 00

REG 4

00 00 00 08

REG 6

125

REG 6

B6 E8 BE E8

After

REG 5

01 00 00 00

REG 4

00 00 00 08

REG 6


SRDL - Shift Right Double Logical

SRDL R4,4(R6)

Before

80 00 C8 B4

REG 5

FF FF FF FF

REG 4

00 00 00 08

REG 6

126

REG 6

00 08 00 0C

After

REG 5

8B 4F FF FF

REG 4

00 00 00 08

REG 6


Extended Mnemonics

In order to make checking condition codes a little easier, instructions called extended mnemonics have been developed. These instructions actually cause a BC instruction to be executed but you do not have to specify the mask field value. The name implies the usage.

e.g. BE FOUND

is equal to -

BC 8,FOUND

After compare instructions (A:B)

127

After compare instructions (A:B)

BH or BHR - Branch on A High

BL or BLR - Branch on A Low

BE or BER - Branch on A Equal B

BNH or BNHR - Branch on A Not High

BNL or BNLR - Branch on A Not Low

BNE or BNER - Branch on A Not Equal B


Extended Mnemonics

After arithmetic instructions

BP or BPR - Branch on Plus

BM or BMR - Branch on Minus

BZ or BZR - Branch on Zero

BO or BOR - Branch on Overflow

BNP or BNPR - Branch on Not Plus

BNM or BNMR - Branch on Not Minus

BNZ or BNZR - Branch on Not Zero

BNO or BNOR - Branch on No Overflow

128

After the TM (Test Under Mask) instruction

BO or BOR - Branch if Ones

BZ or BZR - Branch if Zeros

BM or BMR - Branch if Mixed

BNO or BNOR - Branch if Not Ones

BNZ or BNZR - Branch if Not Zeros

BNM or BNMR - Branch if Not Mixed


Define Constant - Address Constant - "A" Type

• Gives the address of the desired symbol as a binary integer. Represents addresses internal to the program.

• Constant is enclosed in parentheses rather than apostrophes. The address appears in a four byte field.

FORMAT: label DC A(symbol)


000485 C4C1E8 452 LIT2 DC CL3'DAY'

000488 D4E2D7 453 LIT3 DC CL3'MSP'

129

CL3'MSP'

00048B 00

00048C 00000485 454 ADDRESS DC A(LIT2)



Define Constant - Address Constant - "V" Type

• This is an external address constant; e.g. it reserves space in the program for an address outside the program in which it resides.

• It is normally used to refer symbolically to the entry point of another program to allow for "calling" or passing control to that program.

• A value of zero is assembled into the space reserved for the V-type constant; the correct relocated value of the address is inserted into this space by the linkage editor before your program is loaded.

130

FORMAT: label DC V(PROG2)


000485 C4C1E8 452 LIT2 DC CL3'DAY'

000488 D4E2D7 453 LIT3 DC CL3'MSP'

00048B 00

00048C 00000485 454 ADDRESS DC A(LIT2)

000490 00000000 455 PROGADDR DC V(PROG2)

Documents

Assembly Language Coding(ALC) Part 2