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Computer Organization AndAssembly LanguageProf. Muhammad SaeedIII1X86 Processor AssemblyLanguage1/27/2015Computer Architecture & Assembly Language2Assembly Language Instructions21/27/2015Computer Architecture & Assembly Language3MOV reg, regMOV mem, regMOV reg, memMOV mem, immMOV reg, immLanguage InstructionsMOVMOVZX reg32, reg/mem8MOVZX reg32, reg/mem16MOVZX reg16, reg/mem8MOVZXMOVSX reg32, reg/mem8MOVSX reg32, reg/mem16MOVSX reg16, reg/mem8MOVSX1/27/2015Computer Architecture & Assembly Language4XCHGXCHG reg, regXCHG reg, memXCHG mem, regINC reg/memDEC reg/memINC, DECThe Overflow, Sign, Zero, Auxiliary Carry, and Parity flags are changed according to the value of the destination operand.ADD, SUBADD dest, sourceThe Carry, Zero, Sign, Overflow, Auxiliary Carry, and Parity flags are changed according to the value that is placed in the destination operand.SUB dest, sourceNEG regNEG memNEGThe Carry, Zero, Sign, Overflow, Auxiliary Carry, and Parity flags are changed according to the value that is placed in the destination operand.Language InstructionsThe PUSH instruction first decrements ESP and then copies a source operand into the stack. A 16-bit operand causes ESP to be decremented by 2. A 32-bit operand causes ESP to be decremented by 4.PUSHPOPPUSH reg/mem16PUSH reg/mem32PUSH imm32The POP instruction first copies the contents of the stack element pointed to by ESP into a 16- or 32-bit destination operand and then increments ESP. If the operand is 16 bits, ESP is incremented by 2; if the operand is 32 bits, ESP is incremented by 4POP reg/mem16POP reg/mem32Language Instructions5PUSHFD and POPFDThe PUSHFD instruction pushes the 32-bit EFLAGS register on the stack, and POPFD pops the stack into EFLAGS.PUSHAD and POPADThe PUSHAD instruction pushes all of the 32-bit general-purpose registers on the stack in the given order: EAX, ECX, EDX, EBX, ESP, EBP, ESI, and EDI. The POPAD instruction pops the same registers off the stack in reverse order.PUSHA and POPAPUSHA instruction, pushes the 16-bit general-purpose registers (AX, CX, DX, BX, SP, BP, SI, DI) on the stack in the order listed. The POPA instruction pops the same registers in reverseLanguage Instructions6LOOPThe LOOP instruction assumes that theECX (or CX) register contains the loop count. When the loop instruction is executed, the CX register is decremented and the control jumps to the target label, until the CX register value reaches zero.Language InstructionsUnconditional JumpJmp label17Language InstructionsInstructionDescriptionFlags testedJE/JZJump Equal or Jump ZeroZFJNE/JNZJump not Equal or Jump Not ZeroZFJG/JNLEJump Greater or Jump Not Less/EqualOF, SF, ZFJGE/JNLJump Greater or Jump Not LessOF, SFJL/JNGEJump Less or Jump Not Greater/EqualOF, SFJLE/JNGJump Less/Equal or Jump Not GreaterOF, SF, ZFConditional JumpsFollowing are the conditional jump instructions used on signed data 8Language InstructionsConditional JumpsFollowing are the conditional jump instructions used on unsigned data InstructionDescriptionFlags testedJE/JZJump Equal or Jump ZeroZFJNE/JNZJump not Equal or Jump Not ZeroZFJA/JNBEJump Above or Jump Not Below/EqualCF, ZFJAE/JNBJump Above/Equal or Jump Not BelowCFJB/JNAEJump Below or Jump Not Above/EqualCFJBE/JNAJump Below/Equal or Jump Not AboveAF, CF9Language InstructionsConditional JumpsThe following conditional jump instructions have special uses and check the value of flagsInstructionDescriptionFlags testedJXCZJump if CX is ZerononeJCJump If CarryCFJNCJump If No CarryCFJOJump If OverflowOFJNOJump If No OverflowOFJP/JPEJump Parity or Jump Parity EvenPFJNP/JPOJump No Parity or Jump Parity OddPFJSJump Sign (negative value)SFJNSJump No Sign (positive value)SF10ANDAND reg,regAND reg,memAND reg,immAND mem,regAND mem,immThe AND instruction performs a boolean (bitwise) AND operation between each pair of matchingbits in two operands and places the result in the destination operandORThe OR instruction performs a boolean OR operation between each pair of matching bits in two operands and places the result in the destination operandOR reg,regOR reg,memOR reg,immOR mem,regOR mem,immLanguage Instructions11XORThe XOR instruction performs a boolean exclusive-OR operation between each pair of matching bits in two operands and stores the result in the destination operandOR reg,regOR reg,memOR reg,immOR mem,regOR mem,immNOTThe NOT instruction toggles (inverts) all bits in an operandNOT regNOT memLanguage Instructions12TESTLanguage InstructionsThe TEST instruction performs an implied AND operation between each pair of matching bits in two operands and sets the Sign, Zero, and Parity flags based on the value assigned to the destination operand. The only difference between TEST and AND is that TEST does not modify the destination operand. The TEST instruction always clears the Overflow and Carry flags. It modifies the Sign, Zero, and Parity flags in the same way as the AND instruction.13Language InstructionsCMPIn x86 assembly language we use the CMP instruction to compare integers. Character codes are also integers, so they work with CMP as well. The CMP (compare) instruction performs an implied subtraction of a source operand from a destination operand. Neither operand is modified.CMP uses the same operand combinations as the AND instruction.

14Language InstructionsDirectiveInstructionProcedure myproc PROCretmyproc endp (call myproc)MacromyMacro MACRO..endm(myMacro)15PTR OperatorPTR operator overrides the declared size of an operand to access the operand using a size attribute that is different from the one assumed by the assembler.MOV eax, WORD PTR [var]LENGTHOF OperatorThe LENGTHOF operator counts the number of elements in an arrayLanguage InstructionsVar1 WORD 20 DUP(0)Var2DWORD 20 DUP(0)LENGTHOF var1SIZEOF OperatorVar1 WORD 20 DUP(0)Var2DWORD 20 DUP(0)SIZEOF var1The SIZEOF operator counts the number of bytes in an array($ - array)Array BYTE WELCOME, 0dh, 0ahSize WORD( $-Array )16LABEL DirectiveThe LABEL directive gives a size attribute without allocating anystorageLanguage Instructions.DATAval16 LABEL WORDval32 DWORD 12345678h.CODEmov ax,val16 mov dx,[val16+2].DATALongValue LABEL DWORDval1 WORD 5678hval2 WORD 1234h.CODEmov eax,LongValue17Language InstructionsIndexed OperandAn indexed operand adds a constant to a register to generate an effective address.DATAarray BYTE 10h, 20h, 30h.CODEmov esi,0mov al,array[esi]Scale Factors in Indexed Operand.DATAArrayDWORD 100h, 200h, 300h, 400h

.CODEmov esi, 3 * TYPE array mov eax,array[esi]18Language Instructions19201/27/2015Computer Architecture & Assembly Language21Program1st Program .586.MODEL flat, stdcall option casemap :none

Include D:\msaeed\academic\assemblylanguage\masm32\include\windows.inc Include D:\msaeed\academic\assemblylanguage\masm32\include\kernel32.incInclude D:\msaeed\academic\assemblylanguage\masm32\include\user32.inc Includelib D:\msaeed\academic\assemblylanguage\masm32\lib\kernel32.lib Includelib D:\msaeed\academic\assemblylanguage\masm32\lib\user32.lib

.DATAWindowTitle BYTE Greetings",0Message BYTE Hello, World",0

.CODEmain:invoke MessageBox, NULL, ADDR Message, ADDR WindowTitle, MB_OKinvoke ExitProcess, eaxend mainEND22