8/18/2019 Assignment 5 Computer graphics
1/1
MECH 6023
CAD for Manufacturing
Individual Assignment – 5
Due: April 11th, 2016 (In Class and On Blackboard)
-
This is an individual assignment.
- Clearly indicate the steps followed and comment the code
to understand the steps performed.
- Submit the HAND-WRITTEN STEPS and the PRINTED GRAPHICAL
OUTPUT in class.
- Submit the executable code in a zip archive on
Blackboard. Zip archives should be named in
LastName_FirstName.zip format.
Note: All the problems in this assignment are interconnected.
You are essentially developing an
algorithm to identify choral errors associated with CAD to STL
conversion process during the
additive manufacturing process and then implementing one
iteration of the VTA algorithm.
1. Generate and plot a (3 degree in direction and
3 degree in direction) Bezier patch
having following control points: [,,], [, ,. ], [. , ,],
[,,]
[,.,], [,.,.], [.,.,], [,,]
[.,,], [.,,.], [. , .,], [,,]
[,,], [, ,. ], [,.,] , [,,]
2.
The generated Bezier surface is to be approximated with a single
planar triangular facet (similar to a
facet in an STL file). Find the vertex and the normal
information for this STL facet. Also, plot the facet
along with the previously generated Bezier surface.
3. Find the average and maximum chordal error associated
with Bezier surface to STL facet conversion.
Note: The Bezier surface should be discretized (,
discretization of or more) to calculatethe chordal
error. Indicate the point of the maximum chordal error on the
plotted Bezier surface.
4. Using the Vertex Translation Algorithm (VTA) (presented
and discussed in class) [1] [2], discretize the
single STL facet into different facets. Find the vertices
and normal for the newly generated facets.
Plot the newly generated facets along with the Bezier
surface.
……
References
[1] Allavarapu S, Paul R and Anand S. A New Additive
Manufacturing File Format using Bezier Patches. In: 41st
North American Manufacturing Research Conference 2013,
2013, pp.580-590.(Refer Week 12 folder in Course Documents)
[2] Navangul G, Paul R and Anand S. Error Minimization in
Layered Manufacturing Parts by Stereolithography File
Modification using a Vertex Translation Algorithm. Journal
of Manufacturing Science and Engineering,
Transactions of the ASME 2013; 135(3).
(Refer Additive Manufacturing Notes folder in Week 10)
……
