ATmega4809 – 40-Pinww1.microchip.com/downloads/en/DeviceDoc/ATmega4809-40...– SleepWalking peripherals • Power-Down with limited wake-up functionality • Peripherals: – One

ATmega4809 ndash 40-Pin 40-Pin Data Sheet ndash megaAVRreg 0-series

IntroductionThe ATmega4809 microcontrollers of the megaAVRreg 0-series are using the AVRreg processor with hardware multiplierrunning at up to 20 MHz with a wide range of Flash sizes up to 48 KB up to 6 KB of SRAM and 256 bytes ofEEPROM in 28- 32- 40- or 48-pin package The series uses the latest technologies from Microchip with a flexibleand low-power architecture including Event System and SleepWalking accurate analog features and advancedperipherals

The devices described here offer a Flash size of 48 KB in a 40-pin package

Important The 40-pin version of the ATmega4809 is using the die of the 48-pin ATmega4809 but offersfewer connected pads For this reason the pins PB[50] and PC[76] must be disabled (INPUT_DISABLE)or enable pull-ups (PULLUPEN)

Featuresbull AVRreg CPU

ndash Single-cycle IO accessndash Two-level interrupt controllerndash Two-cycle hardware multiplier

bull Memoriesndash Up to 48 KB In-system self-programmable Flash memoryndash 256B EEPROMndash Up to 6 KB SRAMndash WriteErase endurance

bull Flash 10000 cyclesbull EEPROM 100000 cycles

ndash Data retention 40 Years at 55degCbull System

ndash Power-on Reset (POR) circuitndash Brown-out Detector (BOD)ndash Clock options

bull 1620 MHz low-power internal oscillatorbull 32768 kHz Ultra Low-Power (ULP) internal oscillatorbull 32768 kHz external crystal oscillatorbull External clock input

ndash Single pin Unified Program Debug Interface (UPDI)ndash Three Sleep modes

bull Idle with all peripherals running for immediate wake-upbull Standby

ndash Configurable operation of selected peripherals

copy 2019 Microchip Technology Inc Preliminary Datasheet DS40002104B-page 1

ndash SleepWalking peripheralsbull Power-Down with limited wake-up functionality

bull Peripheralsndash One 16-bit TimerCounter type A (TCA) with a dedicated period register and three compare channelsndash Four 16-bit TimerCounter type B with input capture (TCB)ndash One 16-bit Real-Time Counter (RTC) running from an external crystal or an internal RC oscillatorndash Four USART with fractional baud rate generator auto-baud and start-of-frame detectionndash Masterslave Serial Peripheral Interface (SPI)ndash Dual mode MasterSlave TWI with dual address match

bull Standard mode (Sm 100 kHz)bull Fast mode (Fm 400 kHz)bull Fast mode plus (Fm+ 1 MHz)

ndash Event System for CPU independent and predictable inter-peripheral signalingndash Configurable Custom Logic (CCL) with up to four programmable Look-up Tables (LUT)ndash One Analog Comparator (AC) with a scalable reference inputndash One 10-bit 150 ksps Analog-to-Digital Converter (ADC)ndash Five selectable internal voltage references 055V 11V 15V 25V and 43Vndash CRC code memory scan hardware

bull Optional automatic scan before code execution is allowedndash Watchdog Timer (WDT) with Window mode with separate on-chip oscillatorndash External interrupt on all general purpose pins

bull IO and Packagesndash 34 programmable IO linesndash 40-pin PDIP

bull Temperature Rangesndash Industrial -40degC to +85degCndash Extended -40degC to +125degC

bull Speed Grades -40degC to +105degCndash 0-5 MHz 18V ndash 55Vndash 0-10 MHz 27V ndash 55Vndash 0-20 MHz 45V ndash 55V

bull Speed Grades -40degC to +125degCndash 0-8 MHz 27V - 55Vndash 0-16 MHz 45V - 55V

ATmega4809 ndash 40-Pin

Table of Contents

Introduction1

Features 1

1 Block Diagram5

2 Pinout 6

21 40-Pin PDIP6

3 IO Multiplexing and Considerations 8

31 Multiplexed Signals 8

4 Electrical Characteristics10

41 Disclaimer1042 Absolute Maximum Ratings 1043 General Operating Ratings 1044 Power Considerations 1145 Power Consumption1246 Peripherals Power Consumption1347 BOD and POR Characteristics1448 External Reset Characteristics1549 Oscillators and Clocks15410 IO Pin Characteristics17411 USART 18412 SPI19413 TWI20414 VREF22415 ADC23416 AC 26417 UPDI Timing 27418 Programming Time28

5 Typical Characteristics 29

51 Power Consumption2952 GPIO 3753 VREF Characteristics4454 BOD Characteristics4655 ADC Characteristics4956 AC Characteristics5957 OSC20M Characteristics6158 OSCULP32K Characteristics 63

6 Ordering Information 65

7 Online Package Drawings66

8 Package Drawings 67

81 40-Pin PDIP67

9 Conventions 69

91 Memory Size and Type6992 Frequency and Time69

10 Data Sheet Revision History 70

101 RevB - 08201970102 Rev A - 03201970

The Microchip Website71

Product Change Notification Service71

Customer Support 71

Product Identification System72

Microchip Devices Code Protection Feature 72

Legal Notice 72

Trademarks 72

Quality Management System 73

Worldwide Sales and Service74

1 Block Diagram

DATABUS

Clock Generation

BUS Matrix

USARTn

RXDTXDXCK

MISOMOSISCK

SDA (master)SCL (master)

SystemManagement

SLPCTRL

RSTCTRL

CLKCTRL

ROUTING

NETWORK

DATABUS

UPDICRC

NVMCTRL

EEPROM

OSC20M

OSC32K

XOSC32K

References

BODVLM

Bandgap

CPUINT

EXTCLK

LUTn-OUT

CLKOUT

PAnPBnPCnPDnPEnPFn

SDA (slave)SCL (slave)

AINPnAINNn

EVOUTx

LUTn-INn

Detectors

ATmega4809 ndash 40-PinBlock Diagram

2 Pinout

21 40-Pin PDIP

ATmega4809 ndash 40-PinPinout

GPIO on VDD power domain

GPIO on AVDD power domain

Clock crystal

Programming debugInput supply

Ground

Analog functions

Digital functions only

Power Functionality

3 IO Multiplexing and Considerations

31 Multiplexed SignalsPDIP40(4) Pin name (12) Special ADC0 AC0 USARTn SPI0 TWI0 TCA0 TCBn EVSYS CCL-LUTn

33 PA0 EXTCLK 0TxD 0-WO0 0-IN0

34 PA1 0RxD 0-WO1 0-IN1

35 PA2 TWI 0XCK SDA(MS) 0-WO2 0-WO EVOUTA 0-IN2

36 PA3 TWI 0XDIR SCL(MS) 0-WO3 1-WO 0-OUT

37 PA4 0TxD(3) MOSI 0-WO4

38 PA5 0RxD(3) MISO 0-WO5

39 PA6 0XCK(3) SCK 0-OUT(3)

40 PA7 CLKOUT OUT 0XDIR(3) SS EVOUTA(3)

1 PC0 1TxD MOSI(3) 0-WO0(3) 2-WO 1-IN0

2 PC1 1RxD MISO(3) 0-WO1(3) 3-WO(3) 1-IN1

3 PC2 TWI 1XCK SCK(3) SDA(MS)(3) 0-WO2(3) EVOUTC 1-IN2

4 PC3 TWI 1XDIR SS(3) SCL(MS)(3) 0-WO3(3) 1-OUT

7 PC4 1TxD(3) 0-WO4(3)

8 PC5 1RxD(3) 0-WO5(3)

9 PD0 AIN0 0-WO0(3) 2-IN0

10 PD1 AIN1 P3 0-WO1(3) 2-IN1

11 PD2 AIN2 P0 0-WO2(3) EVOUTD 2-IN2

12 PD3 AIN3 N0 0-WO3(3) 2-OUT

13 PD4 AIN4 P1 0-WO4(3)

14 PD5 AIN5 N1 0-WO5(3)

15 PD6 AIN6 P2 2-OUT(3)

16 PD7 VREFA AIN7 N2 EVOUTD(3)

17 AVDD

18 GND

19 PE0 AIN8 MOSI(3) 0-WO0(3)

20 PE1 AIN9 MISO(3) 0-WO1(3)

21 PE2 AIN10 SCK(3) 0-WO2(3) EVOUTE

22 PE3 AIN11 SS(3) 0-WO3(3)

23 PF0 TOSC1 2TxD 0-WO0(3) 3-IN0

24 PF1 TOSC2 2RxD 0-WO1(3) 3-IN1

25 PF2 TWI AIN12 2XCK SDA(S)(3) 0-WO2(3) EVOUTF 3-IN2

26 PF3 TWI AIN13 2XDIR SCL(S)(3) 0-WO3(3) 3-OUT

27 PF4 AIN14 2TxD(3) 0-WO4(3) 0-WO(3)

28 PF5 AIN15 2RxD(3) 0-WO5(3) 1-WO(3)

29 PF6 RESET 2XCK(3) 3-OUT(3)

30 UPDI

31 VDD

32 GND

ATmega4809 ndash 40-PinIO Multiplexing and Considerations

Note 1 Pin names are of type Pxn with x being the PORT instance (ABC ) and n the pin number Notation for

signals is PORTx_PINn All pins can be used as event input2 All pins can be used for external interrupt where pins Px2 and Px6 of each port have full asynchronous

detection3 Alternate pin positions For selecting the alternate positions refer to the PORTMUX documentation4 The 40-pin version of the ATmega4809 is using the die of the 48-pin ATmega4809 but offers fewer connected

pads For this reason the pins PB[50] and PC[76] must be disabled (INPUT_DISABLE) or enable pull-ups(PULLUPEN)

4 Electrical Characteristics

41 DisclaimerAll typical values are measured at T = 25degC and VDD = 3V unless otherwise specified All minimum and maximumvalues are valid across operating temperature and voltage unless otherwise specified

Typical values given should be considered for design guidance only and actual part variation around these values isexpected

42 Absolute Maximum RatingsStresses beyond those listed in this section may cause permanent damage to the device This is a stress rating onlyand functional operation of the device at these or other conditions beyond those indicated in the operational sectionsof this specification is not implied Exposure to absolute maximum rating conditions for extended periods may affectdevice reliability

Table 4-1 Absolute Maximum Ratings

Symbol Description Conditions Min Max UnitVDD Power Supply Voltage -05 6 VIVDD Current into a VDD pin TA=[-40 85]degC - 200 mA

TA=[85 125]degC - 100 mAIGND Current out of a GND pin TA=[-40 85]degC - 200 mA

TA=[85 125]degC - 100 mAVPIN Pin voltage with respect to GND -05 VDD+05 VIPIN IO pin sinksource current -40 40 mAIc1

(1) IO pin injection current except for the RESET pin VpinltGND-06V or55VltVpinle61V49VltVDDle55V

-1 1 mA

Ic2(1) IO pin injection current except for the RESET pin VpinltGND-06V or

Vpinle55VVDDle49V

-15 15 mA

Tstorage Storage temperature -65 150 degC

Note 1 ndash If VPIN is lower than GND-06V then a current limiting resistor is required The negative DC injection

current limiting resistor is calculated as R = (GND-06V ndash Vpin)ICnndash If VPIN is greater than VDD+06V then a current limiting resistor is required The positive DC injection

current limiting resistor is calculated as R = (Vpin-(VDD+06))ICn

43 General Operating RatingsThe device must operate within the ratings listed in this section in order for all other electrical characteristics andtypical characteristics of the device to be validTable 4-2 General Operating Conditions

Symbol Description Condition Min Max Unit

VDD Operating Supply Voltage 18(1) 55 V

TA Operating temperature range -40 125 degC

ATmega4809 ndash 40-PinElectrical Characteristics

Note 1 Operation is ensured down to 18V or VBOD with BODLEVEL0 whichever is lower

Table 4-3 Operating Voltage and Frequency

fCLK_CPU Nominal operating system clock frequency VDD=[18 55]VTA=[-40 105]degC(1)(4)

0 5 MHz

VDD=[27 55]VTA=[-40 105]degC(2)(4)

VDD=[45 55]VTA=[-40 105]degC(3)(4)

VDD=[27 55]VTA=[-40 125]degC(2)

VDD=[45 55]VTA=[-40 125]degC(2)

Note 1 Operation is ensured down to BOD triggering level VBOD with BODLEVEL02 Operation is ensured down to BOD triggering level VBOD with BODLEVEL23 Operation is ensured down to BOD triggering level VBOD with BODLEVEL74 These specifications do not apply to automotive range parts (-VAO)

The maximum CPU clock frequency depends on VDD As shown in the figure below the maximum frequency vs VDDis linear between 18V lt VDD lt 27V and 27V lt VDD lt 45V

Figure 4-1 Maximum Frequency vs VDD for [-40 105]degC

18V 55V27V 45V

Safe Operating Area

44 Power ConsiderationsThe average die junction temperature TJ (in degC) is given from the formula

TJ = TA+PD RθJA

where PD is the total power dissipation

The total thermal resistance of a package (RθJA) can be separated into two components RθJC and RθCA representingthe barrier to heat flow from the semiconductor junction to the package (case) surface (RθJC) and from the case to theoutside ambient air (RθCA) These terms are related by the equation

RθJA = RθJC + RθCA

RθJC is device related and cannot be influenced by the user However RθCA is user-dependent and can be minimizedby thermal management techniques such as heat sinks ambient air cooling and thermal convection Thus goodthermal management on the part of the user can significantly reduce RθCA so that RθJA approximately equals RθJC

The power dissipation curve is negatively sloped as ambient temperature increase The maximum power dissipationis therefore at minimum ambient temperature while the highest junction temperature occurs at the maximumambient temperature

Table 4-4 Power Dissipation and Junction Temperature vs Temperature

Package TA Range RθJA (degCW) PD (W) Typical TJ - TA(degC) Typical

PDIP40 -40degC to 125degC 10

45 Power ConsumptionThe values are measured power consumption under the following conditions except where noted

bull VDD=3Vbull TA=25degCbull OSC20M used as system clock source except where otherwise specifiedbull System power consumption measured with peripherals disabled and IO ports driven low with inputs disabled

Table 4-5 Power Consumption in Active and Idle Mode

Mode Description Condition Typ Max Unit

Active Active power consumption fCLK_CPU=20 MHz (OSC20M) VDD=5V 85 - mA

fCLK_CPU=10 MHz (OSC20M div2) VDD=5V 43 - mA

VDD=3V 23 - mA

VDD=3V 12 - mA

VDD=2V 075 - mA

fCLK_CPU=32768 kHz (OSCULP32K) VDD=5V 164 - microA

VDD=3V 90 - microA

VDD=2V 60 - microA

Idle Idle power consumption fCLK_CPU=20 MHz (OSC20M) VDD=5V 28 - mA

VDD=3V 08 - mA

VDD=3V 04 - mA

VDD=2V 025 - mA

VDD=3V 28 - microA

VDD=2V 18 - microA

Table 4-6 Power Consumption in Power-Down Standby and Reset Mode

Mode Description Condition Typ25degC

Max85degC(1)

Max125degC

Standby Standby powerconsumption

RTC running at 1024kHz from externalXOSC32K (CL=75 pF)

VDD=3V 07 - - microA

RTC running at 1024kHz from internalOSCULP32K

VDD=3V 07 60 160 microA

Power-DownStandby

Power-downStandbypower consumption arethe same when allperipherals are stopped

All peripherals stopped VDD=3V 01 50 150 microA

Reset Reset powerconsumption

RESET line pulled low VDD=3V 100 - - microA

Note 1 These parameters are for design guidance only and are not tested

46 Peripherals Power ConsumptionThe table below can be used to calculate the additional current consumption for the different IO peripherals in thevarious operating modes

Some peripherals will request the clock to be enabled when operating in STANDBY See the peripheral chapter forfurther information

Operating conditionsbull VDD=3Vbull T=25degCbull OSC20M at 1 MHz used as system clock source except where otherwise specifiedbull In Idle Sleep mode except where otherwise specified

Table 4-7 Peripherals Power Consumption

Peripheral Conditions Typ(1) Unit

BOD Continuous 19 microA

Sampling 1 kHz 12

TCA 16-bit count 1 MHz 130 microA

TCB 16-bit count 1 MHz 74 microA

RTC 16-bit count OSCULP32K 12 microA

WDT (including OSCULP32K) 07 microA

OSC20M 130 microA

AC Fast mode(2) 92 microA

Low-Power mode(2) 45 microA

ADC(3) 50 ksps 330 microA

100 ksps 340 microA

XOSC32K CL=75 pF 05 microA

continuedPeripheral Conditions Typ(1) Unit

OSCULP32K 04 microA

USART Enable 9600 Baud 130 microA

SPI (Master) Enable 100 kHz 21 microA

TWI (Master) Enable 100 kHz 240 microA

TWI (Slave) Enable 100 kHz 170 microA

Flash programming Erase Operation 15 mA

Write Operation 30

Note 1 Current consumption of the module only To calculate the total internal power consumption of the

microcontroller add this value to the base power consumption given in ldquoPower Consumptionrdquo section inelectrical characteristics

2 CPU in Standby mode3 Average power consumption with ADC active in Free-Running mode

47 BOD and POR CharacteristicsTable 4-8 Power Supply Characteristics

Symbol Description Condition Min Typ Max Unit

SRON(1) Power-on Slope - - 100(2) Vms

Note 1 For design guidance only and not tested in production2 A slope faster than the maximum rating can trigger a Reset of the device if changing the voltage level after an

initial power-up

Table 4-9 Power-on Reset (POR) Characteristics

VPOR POR threshold voltage on VDD falling VDD fallsrises at 05Vms or slower 08(1) - 16(1) V

POR threshold voltage on VDD rising 14(1) - 18

Note 1 For design guidance only and not tested in production

Table 4-10 Brown-out Detector (BOD) Characteristics

VBOD BOD detection level (fallingrising) BODLEVEL0 17 18 20 V

BODLEVEL2 24 26 29

BODLEVEL7 39 43 45

VHYS Hysteresis BODLEVEL0 - 25 - mV

BODLEVEL2 - 40 -

BODLEVEL7 - 80 -

continuedSymbol Description Condition Min Typ Max Unit

tBOD Detection time Continuous - 7 - micros

Sampled 1 kHz - 1 - ms

Sampled 125 Hz - 8 -

tstartup Start-up time Time from enable to ready - 40 - micros

VINT Interrupt level 0 Percentage above the selected BOD level - 4 -

Interrupt level 1 - 13 -

48 External Reset CharacteristicsTable 4-11 External Reset Characteristics

Mode Description Condition Min Typ Max Unit

VVIH_RST Input Voltage for RESET 07timesVDD - VDD+02 V

VVIL_RST Input Low Voltage for RESET -02 - 03timesVDD

tMIN_RST Minimum pulse width on RESET pin(1) - - 25 micros

Rp_RST RESET pull-up resistor VReset=0V 20 35 50 kΩ

Note 1 These parameters are for design guidance only and are not production tested

49 Oscillators and ClocksOperating conditions

bull VDD=3V except where specified otherwise

Table 4-12 20 MHz Internal Oscillator (OSC20M) Characteristics

fOSC20M Factory calibration frequency FREQSEL=0 TA=25degC 30V 16 MHz

FREQSEL=1 20

fCAL Frequency calibration range OSC16M(2) 145 175 MHz

OSC20M(2) 185 215 MHz

ETOTAL Total error with 16 MHz and 20 MHzfrequency selection

From targetfrequency

TA=25degC 30V -15 15

TA=[0 70]degCVDD=[18 36]V

-20 20

Full operationrange

-40 40

EDRIFT Accuracy with 16 MHz and 20 MHzfrequency selection relative to thefactory-stored frequency value

Factory calibratedVDD=3V(1)

-18 18

ΔfOSC20M Calibration step size - 075 -

DOSC20M Duty cycle - 50 -

tstartup Start-up time Within 2 accuracy - 12 - micros

Note 1 See also the description of OSC20M on calibration2 Oscillator frequencies above speed specification must be divided so the CPU clock is always within

specification

Table 4-13 32768 kHz Internal Oscillator (OSCULP32K) Characteristics

fOSCULP32K Factory calibration frequency 32768 kHz

Factory calibration accuracy TA=25degC 30V -3 3

ETOTAL Total error from target frequency TA=[0 70]degC VDD=[18 36]V -10 +10

Full operation range -20 +20

DOSCULP32K Duty cycle 50

tstartup Start-up time - 250 - micros

Table 4-14 32768 kHz External Crystal Oscillator (XOSC32K) Characteristics

fout Frequency - 32768 - kHz

tstartup Start-up time CL=75 pF - 300 - ms

CL Crystal load capacitance(1) 75 - 125 pF

CTOSC1TOSC2 Parasitic pin capacitance - 55 - pF

ESR(1) Equivalent Series Resistance - Safety Factor=3 CL=75 pF - - 80 kΩ

CL=125 pF - - 40

Note 1 This parameter is for design guidance only and not production tested

Figure 4-2 External Clock Waveform Characteristics

Table 4-15 External Clock Characteristics

Symbol Description Condition VDD=[18 55]V VDD=[27 55]V VDD=[45 55]V Unit

Min Max Min Max Min Max

fCLCL Frequency 0 50 00 100 00 200 MHz

continuedSymbol Description Condition VDD=[18 55]V VDD=[27 55]V VDD=[45 55]V Unit

tCLCL Clock Period 200 - 100 - 50 - ns

tCHCX(1) High Time 80 - 40 - 20 - ns

tCLCX(1) Low Time 80 - 40 - 20 - ns

tCLCH(1) Rise Time (for maximum

frequency)- 40 - 20 - 10 ns

tCHCL(1) Fall Time (for maximum

ΔtCLCL(1) Change in period from one clock

cycle to the next- 20 - 20 - 20

410 IO Pin CharacteristicsTable 4-16 IO Pin Characteristics (TA=[-40 85]degC VDD=[18 55]V unless otherwise noted)

VIL Input Low Voltage -02 - 03timesVDD V

VIH Input High Voltage 07timesVDD - VDD+02V V

IIH IIL IO pin Input Leakage Current VDD=55V pin high - lt 005 - microA

VDD=55V pin low - lt 005 -

VOL IO pin drive strength VDD=18V IOL=15 mA - - 036 V

VDD=30V IOL=75 mA - - 06

VDD=50V IOL=15 mA - - 1

VOH IO pin drive strength VDD=18V IOH=15 mA 144 - - V

VDD=30V IOH=75 mA 24 - -

VDD=50V IOH=15 mA 4 - -

Itotal Maximum combined IO sinksourcecurrent per pin group(12)

TA=125degC - - 100 mA

Maximum combined IO sinksourcecurrent per pin group(12)

TA=25degC - - 200

tRISE Rise time VDD=30V load=20 pF - 25 - ns

VDD=50V load=20 pF - 15 -

VDD=30V load=20 pFslew rate enabled

- 19 -

tFALL Fall time VDD=30V load=20 pF - 20 - ns

- 21 -

- 11 -

Cpin IO pin capacitance except for TOSCVREFA and TWI pins

- 35 - pF

Cpin IO pin capacitance on TOSC pins - 4 - pF

Cpin IO pin capacitance on TWI pins - 10 - pF

Cpin IO pin capacitance on VREFA pin - 14 - pF

Rp Pull-up resistor 20 35 50 kΩ

Note 1 Pin group A (PA[70]) PF[62]) pin group B (PB[70] PC[70]) pin group C (PD70 PE[30] PF[10]) For 28-

pin and 32-pin devices pin group A and B should be seen as a single group The combined continuous sinksource current for each individual group should not exceed the limits

2 These parameters are for design guidance only and are not production tested

411 USARTFigure 4-3 USART in SPI Mode - Timing Requirements in Master Mode

MSb LSb

tMIS tMIH

tMOH tMOH

tSCKFtSCKR

MOSI (Data Output)

MISO (Data Input)

SCK (CPOL = 1)

SCK (CPOL = 0)

MSb LSb

Table 4-17 USART in SPI Master Mode - Timing Characteristics

Symbol(1) Description Condition Min Typ Max Unit

fSCK SCK clock frequency Master - - 10 MHz

tSCK SCK period Master 100 - - ns

tSCKW SCK highlow width Master - 05timestSCK - ns

tSCKR SCK rise time Master - 27 - ns

continuedSymbol(1) Description Condition Min Typ Max Unit

tSCKF SCK fall time Master - 27 - ns

tMIS MISO setup to SCK Master - 10 - ns

tMIH MISO hold after SCK Master - 10 - ns

tMOS MOSI setup to SCK Master - 05timestSCK - ns

tMOH MOSI hold after SCK Master - 10 - ns

412 SPIFigure 4-4 SPI - Timing Requirements in Master Mode

MSb LSb

tMIS tMIH

tMOH tMOH

tSCKFtSCKR

MOSI (Data Output)

MISO (Data Input)

SCK (CPOL = 1)

SCK (CPOL = 0)

MSb LSb

Figure 4-5 SPI - Timing Requirements in Slave Mode

MSb LSb

tSIS tSIH

tSSCKW

tSSCKR tSSCKF

MISO(Data Output)

MOSI(Data Input)

SCK (CPOL = 1)

SCK (CPOL = 0)

MSb LSb

Table 4-18 SPI - Timing Characteristics

tSCKW SCK highlow width Master - 05SCK - ns

tMOS MOSI setup to SCK Master - 05SCK - ns

fSSCK Slave SCK clock frequency Slave - - 5 MHz

tSSCK Slave SCK period Slave 4t Clkper - - ns

tSSCKW SCK highlow width Slave 2t Clkper - - ns

tSSCKR SCK rise time Slave - - 1600 ns

tSSCKF SCK fall time Slave - - 1600 ns

tSIS MOSI setup to SCK Slave 30 - - ns

tSIH MOSI hold after SCK Slave t Clkper - - ns

tSSS SS setup to SCK Slave 21 - - ns

tSSH SS hold after SCK Slave 20 - - ns

tSOS MISO setup to SCK Slave - 80 - ns

tSOH MISO hold after SCK Slave - 13 - ns

tSOSS MISO setup after SS low Slave - 11 - ns

tSOSH MISO hold after SS low Slave - 80 - ns

413 TWIFigure 4-6 TWI - Timing Requirements

tSUSTA

tHDSTA tHDDAT tSUDATtSUSTO

Table 4-19 TWI - Timing Characteristics

fSCL SCL clock frequency Max frequency requires systemclock at 10 MHz which in turnrequires VDD=[27 55]V andT=[-40 105]degC

0 - 1000 kHz

VIH Input high voltage 07timesVDD - - V

VIL Input low voltage - - 03timesVDD V

VHYS Hysteresis of SchmittTrigger inputs

01timesVDD 04timesVDD V

VOL Output low voltage Iload=20 mA Fast mode+ - - 02xVDD V

Iload=3 mA Normal modeVDDgt2V

- - 04V

Iload=3 mA Normal modeVDDle2V

- - 02timesVDD

IOL Low-level outputcurrent

fSCLle400 kHz VOL=04V 3 - - mA

fSCLle1 MHz VOL=04V 20 - -

CB Capacitive load foreach bus line

fSCLle100 kHz - - 400 pF

fSCLle400 kHz - - 400

fSCLle1 MHz - - 550

tR Rise time for both SDAand SCL

fSCLle100 kHz - - 1000 ns

fSCLle400 kHz 20 - 300

fSCLle1 MHz - - 120

tOF Output fall time fromVIHmin to VILmax

10 pF ltcapacitance ofbus line lt 400 pF

fSCLle400 kHz 20+01timesCB - 300 ns

fSCLle1 MHz 20+01timesCB - 120

tSP Spikes suppressed bythe input filter

0 - 50 ns

IL Input current for eachIO pin

01timesVDDltVIlt09timesVDD - - 1 microA

CI Capacitance for eachIO pin

- - 10 pF

RP Value of pull-upresistor

fSCLle100 kHz (VDD-VOL(max)) IOL

- 1000 ns(08473timesCB)

fSCLle400 kHz - - 300 ns(08473timesCB)

fSCLle1 MHz - - 120 ns(08473timesCB)

tHDSTA Hold time (repeated)Start condition

fSCLle100 kHz 40 - - micros

fSCLle400 kHz 06 - -

fSCLle1 MHz 026 - -

tLOW Low period of SCLClock

fSCLle1 MHz 05 - -

tHIGH High period of SCLClock

fSCLle1 MHz 026 - -

tSUSTA Setup time for arepeated Startcondition

fSCLle1 MHz 026 - -

tHDDAT Data hold time fSCLle100 kHz 0 - 345 micros

fSCLle1 MHz 0 - 045

tSUDAT Data setup time fSCLle100 kHz 250 - - ns

fSCLle1 MHz 50 - -

tSUSTO Setup time for Stopcondition

fSCLle1 MHz 026 - -

tBUF Bus free time betweena Stop and Startcondition

fSCLle1 MHz 05 - -

414 VREFTable 4-20 Internal Voltage Reference Characteristics

Symbol(1) Description Min Typ Max Unit

tstart Start-up time - 25 - micros

VDD Power supply voltage range for 0V55 18 - 55 V

Power supply voltage range for 1V1 18 - 55

Table 4-21 ADC Internal Voltage Reference Characteristics(1)

1V1 Internal reference voltage VDD=[18V 55V]T=[0 - 105]degC

-20 20

0V551V52V54V3

Internal reference voltage VDD=[18V 55V]T=[0 - 105]degC

-30 30

0V551V11V52V54V3

Internal reference voltage VDD=[18V 55V]T=[-40 - 125]degC

-50 50

Note 1 These values are based on characterization and not covered by production test limits2 The symbols xxxx refer to the respective values of the ADC0REFSEL bit field in the VREFCTRLA register

Table 4-22 AC Internal Voltage Reference Characteristics(1)

0V551V11V52V5

-30 30

0V551V11V52V54V3

-50 50

Note 1 These values are based on characterization and not covered by production test limits2 The symbols xxxx refer to the respective values of the AC0REFSEL bit field in the VREFCTRLA register

415 ADC

4151 Internal Reference CharacteristicsOperating conditions

bull VDD = 18 to 55Vbull Temperature = -40degC to 125degCbull DUTYCYC = 25bull CLKADC = 13 fADCbull SAMPCAP is 10 pF for 055V reference while it is set to 5 pF for VREFge11Vbull Applies for all allowed combinations of VREF selections and Sample Rates unless otherwise noted

Table 4-23 Power Supply Reference and Input Range

Symbol Description Conditions Min Typ Max Unit

VDD Supply voltage CLKADC le15 MHz 18 - 55 V

CLKADC gt15 MHz 27 - 55

VREF Reference voltage REFSEL = Internal reference 055 - VDD-05 V

REFSEL = External reference 11 VDD

REFSEL = VDD 18 - 55

CIN Input capacitance SAMPCAP=5 pF - 5 - pF

SAMPCAP=10 pF - 10 -

VIN Input voltage range 0 - VREF V

IBAND Input bandwidth 11VleVREF - - 575 kHz

Table 4-24 Clock and Timing Characteristics(1)

fADC Sample rate 11VleVREF 15 - 115 ksps

11VleVREF (8-bit resolution) 15 - 150

VREF=055V (10 bits) 75 - 20

CLKADC Clock frequency VREF=055V (10 bits) 100 - 260 kHz

11VleVREF (10 bits) 200 - 1500

Ts Sampling time 2 2 33 CLKADC cycles

TCONV Conversion time (latency) Sampling time = 2 CLKADC 87 - 50 micros

TSTART Start-up time Internal VREF - 22 - micros

Table 4-25 Accuracy Characteristics Internal Reference(2)

Res Resolution - 10 - bit

INL Integral Non-linearity

REFSEL =INTERNAL

VREF=055V

fADC=77 ksps - 10 - LSB

REFSEL =INTERNAL or VDD

fADC=15 ksps - 10 -

11VleVREF

fADC=77 ksps - 10 -

fADC=115 ksps - 12 -

continuedSymbol Description Conditions Min Typ Max Unit

DNL(1) Differential Non-linearity

REFSEL =INTERNAL

VREF = 055V

REFSEL =INTERNAL

VREF = 11V

fADC=15 ksps - 04 -

15VleVREF

fADC=15 ksps - 04 -

11VleVREF

fADC=77 ksps - 04 -

REFSEL =INTERNAL

11VleVREF

REFSEL = VDD

18VleVREF

EABS Absoluteaccuracy

REFSEL =INTERNAL

VREF = 11V

T=[0-105]degC

VDD = [18V-36V]

- lt10 - LSB

VDD = [18V-36V] - lt15 -

REFSEL = VDD - 25 -

REFSEL =INTERNAL

- lt35 -

EGAIN Gain error REFSEL =INTERNAL

VREF = 11V

T=[0-105]degC

VDD = [18V-36V]

- plusmn15 - LSB

VDD = [18V-36V] - plusmn20 -

REFSEL = VDD - 2 -

REFSEL =INTERNAL

- plusmn35 -

EOFF Offset error REFSEL =INTERNAL

VREF = 055V

- -1 - LSB

REFSEL =INTERNAL

11V le VREF

- -05 - LSB

Note 1 A DNL error of less than or equal to 1 LSB ensures a monotonic transfer function with no missing codes2 These parameters are for design guidance only and are not production tested3 Reference setting and fADC must fulfill the specification in ldquoClock and Timing Characteristicsrdquo and ldquoPower

Supply Reference and Input Rangerdquo tables

4152 External Reference CharacteristicsOperating conditions

bull VDD = 18 to 55Vbull Temperature = -40degC to 125degCbull DUTYCYC = 25bull CLKADC = 13 fADCbull SAMPCAP is 5 pF

The accuracy characteristics numbers are based on the characterization of the following input reference levels andVDD ranges

bull Vref = 18V VDD = 18 to 55Vbull Vref = 26V VDD = 27 to 55Vbull Vref = 4096V VDD = 45 to 55Vbull Vref = 43V VDD = 45 to 55V

Table 4-26 ADC Accuracy Characteristics External Reference(2)

fADC=77 ksps - 09 -

fADC=77 ksps - 04 -

fADC=77 ksps - 2 -

fADC=115 ksps - 2 -

EGAIN Gain error fADC=15 ksps - 2 - LSB

fADC=77 ksps - 2 -

fADC=115 ksps - 2 -

EOFF Offset error - -05 - LSB

Note 1 A DNL error of less than or equal to 1 LSB ensures a monotonic transfer function with no missing codes2 These parameters are for design guidance only and are not production tested

416 ACTable 4-27 Analog Comparator Characteristics Low-Power Mode Disabled

VIN Input voltage -02 - VDD V

CIN Input pin capacitance PD1 to PD6 - 35 - pF

PD7 - 14 -

VOFF Input offset voltage 07VltVINlt(VDD-07V) -20 plusmn5 +20 mV

VIN=[-02V VDD] -40 plusmn20 +40

IL Input leakage current - 5 - nA

TSTART Start-up time - 13 - micros

VHYS Hysteresis HYSMODE=0x0 - 0 - mV

HYSMODE=0x1 - 10 -

HYSMODE=0x2 - 25 -

HYSMODE=0x3 - 50 -

tPD Propagation delay 25 mV Overdrive VDDge27V - 50 - ns

Table 4-28 Analog Comparator Characteristics Low-Power Mode Enabled

PD7 - 14 -

VIN=[0V VDD] -50 plusmn30 +50

HYSMODE=0x1 - 10 -

HYSMODE=0x2 - 25 -

HYSMODE=0x3 - 50 -

tPD Propagation delay 25 mV overdrive VDDge27V - 150 - ns

417 UPDI Timing

UPDI Enable Sequence (1)

Symbol Description Min Max Unit

TRES Duration of HandshakeBreak on RESET 10 200 micros

TUPDI Duration of UPDItxd=0 10 200 micros

TDeb0 Duration of Debuggertxd=0 02 1 micros

TDebZ Duration of Debuggertxd=z 200 14000 micros

418 Programming TimeSee the table below for typical programming times for Flash and EEPROM

Table 4-29 Programming Times

Symbol Typical Programming Time

Page Buffer Clear 7 CLK_CPU cycles

Page Write 2 ms

Page Erase 2 ms

Page Erase-Write 4 ms

Chip Erase 4 ms

EEPROM Erase 4 ms

5 Typical Characteristics

51 Power Consumption

511 Supply Currents in Active ModeFigure 5-1 Active Supply Current vs Frequency (1-20 MHz) at T=25degC

0 2 4 6 8 10 12 14 16 18 20Frequency [MHz]

VDD [V]18222733642555

Figure 5-2 Active Supply Current vs Frequency [01 10] MHz at T=25degC

00 01 02 03 04 05 06 07 08 09 10Frequency [MHz]

VDD [V]18222733642555

ATmega4809 ndash 40-PinTypical Characteristics

Figure 5-3 Active Supply Current vs Temperature (f=20 MHz OSC20M)

-40 -20 0 20 40 60 80 100 120Temperature [degC]

VDD [V]45555

Figure 5-4 Active Supply Current vs VDD (f=[125 20] MHz OSC20M) at T=25degC

15 20 25 30 35 40 45 50 55Vdd [V]

Frequency [MHz]1252551020

Figure 5-5 Active Supply Current vs VDD (f=32768 kHz OSCULP32K)

15 20 25 30 35 40 45 50 55Vdd [V]

Temperature [degC]-40-200257085105125

512 Supply Currents in Idle ModeFigure 5-6 Idle Supply Current vs Frequency (1-20 MHz) at T=25degC

0 2 4 6 8 10 12 14 16 18 20Frequency [MHz]

VDD [V]18222733642555

Figure 5-7 Idle Supply Current vs Low Frequency (01-10 MHz) at T=25degC

00 01 02 03 04 05 06 07 08 09 10Frequency [MHz]

VDD [V]18222733642555

Figure 5-8 Idle Supply Current vs Temperature (f=20 MHz OSC20M)

VDD [V]45555

Figure 5-9 Idle Supply Current vs VDD (f=32768 kHz OSCULP32K)

15 20 25 30 35 40 45 50 55Vdd [V]

513 Supply Currents in Power-Down ModeFigure 5-10 Power-Down Mode Supply Current vs Temperature (all functions disabled)

VDD [V]18222733642555

Figure 5-11 Power-Down Mode Supply Current vs VDD (all functions disabled)

15 20 25 30 35 40 45 50 55Vdd [V]

25 30 35 40 45 50 55Vdd [V]

514 Supply Currents in Standby ModeFigure 5-13 Standby Mode Supply Current vs VDD (RTC running with internal OSCULP32K)

15 20 25 30 35 40 45 50 55Vdd [V]

Figure 5-14 Standby Mode Supply Current vs VDD (Sampled BOD running at 125 Hz)

15 20 25 30 35 40 45 50 55Vdd [V]

Figure 5-15 Standby Mode Supply Current vs VDD (Sampled BOD running at 1 kHz)

15 20 25 30 35 40 45 50 55Vdd [V]

515 Power-on Supply CurrentsFigure 5-16 Power-on Supply Current vs VDD (BOD enabled at 43V level)

00 05 10 15 20 25 30 35 40 45Vdd [V]

52 GPIO

GPIO Input CharacteristicsFigure 5-17 IO Pin Input Hysteresis vs VDD

15 20 25 30 35 40 45 50 55

Vdd [V]

Temperature[degC]-400257085105125

Figure 5-18 IO Pin Input Threshold Voltage vs VDD (T=25degC)

15 20 25 30 35 40 45 50 55

Vdd [V]

TresholdVihVil

Figure 5-19 IO Pin Input Threshold Voltage vs VDD (VIH)

15 20 25 30 35 40 45 50 55

Vdd [V]

Figure 5-20 IO Pin Input Threshold Voltage vs VDD (VIL)

15 20 25 30 35 40 45 50 55

Vdd [V]

GPIO Output CharacteristicsFigure 5-21 IO Pin Output Voltage vs Sink Current (VDD=18V)

00 02 04 06 08 10 12 14 16 18 20

Sink current [mA]

Temperature[degC]-40-200257085105125

Figure 5-22 IO Pin Output Voltage vs Sink Current (VDD=30V)

0 1 2 3 4 5 6 7 8 9 10Sink current [mA]

0 2 4 6 8 10 12 14 16 18 20Sink current [mA]

Figure 5-24 IO Pin Output Voltage vs Sink Current (T=25degC)

0 2 4 6 8 10 12 14 16 18 20

Sink current [mA]

Vdd [V]18222345

Figure 5-25 IO Pin Output Voltage vs Source Current (VDD=18V)

00 02 04 06 08 10 12 14 16 18 20Source current [mA]

Figure 5-28 IO Pin Output Voltage vs Source Current (T=25degC)

0 2 4 6 8 10 12 14 16 18 20

Source current [mA]

Vdd [V]18222345

GPIO Pull-Up CharacteristicsFigure 5-29 IO Pin Pull-Up Resistor Current vs Input Voltage (VDD=18V)

0 5 10 15 20 25 30 35 40 45 50Pull-up resistor current [microA]

Figure 5-30 IO Pin Pull-Up Resistor Current vs Input Voltage (VDD=30V)

53 VREF CharacteristicsFigure 5-32 Internal 055V Reference vs Temperature

-40 -20 0 20 40 60 80 100 120

Temperature [degC]

Vdd [V]235

Figure 5-33 Internal 11V Reference vs Temperature

rror [

-40 -20 0 20 40 60 80 100 120

Temperature [degC]

Vdd [V]235

-40 -20 0 20 40 60 80 100 120

Temperature [degC]

Vdd [V]35

rror [

-40 -20 0 20 40 60 80 100 120

Temperature [degC]

Vdd [V]5

54 BOD Characteristics

BOD Current vs VDDFigure 5-36 BOD Current vs VDD (Continuous Mode Enabled)

[microA]

15 20 25 30 35 40 45 50 55

Vdd [V]

Temperature [degC]-400257085105125

Figure 5-37 BOD Current vs VDD (Sampled BOD at 125 Hz)

d [micro

15 20 25 30 35 40 45 50 55

Vdd [V]

Figure 5-38 BOD Current vs VDD (Sampled BOD at 1 kHz)

[microA]

15 20 25 30 35 40 45 50 55

Vdd [V]

BOD Threshold vs TemperatureFigure 5-39 BOD Threshold vs Temperature (Level 18V)

-40 -20 0 20 40 60 80 100 120

Temperature [degC]

Falling VDDRising VDD

Figure 5-40 BOD Threshold vs Temperature (Level 26V)

-40 -20 0 20 40 60 80 100 120

Temperature [degC]

-40 -20 0 20 40 60 80 100 120

Temperature [degC]

55 ADC CharacteristicsFigure 5-42 Absolute Accuracy vs VDD (fADC=115 ksps) at T=25degC REFSEL = Internal Reference

15 20 25 30 35 40 45 50 55

Vdd [V]

Vref [V]11152543VDD

Figure 5-43 Absolute Accuracy vs Vref (VDD=50V fADC=115 ksps) REFSEL = Internal Reference

11 15 25 43 VDD

Vref [V]

Figure 5-44 DNL Error vs VDD (fADC=115 ksps) at T=25degC REFSEL = Internal Reference

15 20 25 30 35 40 45 50 55

Vdd [V]

Vref [V]11152543VDD

Figure 5-45 DNL vs Vref (VDD=50V fADC=115 ksps) REFSEL = Internal Reference

11 15 25 43 VDD

Vref [V]

Figure 5-46 Gain Error vs VDD (fADC=115 ksps) at T=25degC REFSEL = Internal Reference

15 20 25 30 35 40 45 50 55

Vdd [V]

Vref [V]11152543VDD

Figure 5-47 Gain Error vs Vref (VDD=50V fADC=115 ksps) REFSEL = Internal Reference

11 15 25 43 VDD

Vref [V]

Figure 5-48 INL vs VDD (fADC=115 ksps) at T=25degC REFSEL = Internal Reference

15 20 25 30 35 40 45 50 55

Vdd [V]

Vref [V]11152543VDD

Figure 5-49 INL vs Vref (VDD=50V fADC=115 ksps) REFSEL = Internal Reference

11 15 25 43 VDD

]Temperature [degC]

-402585105

Vref [V]

Figure 5-50 Offset Error vs VDD (fADC=115 ksps) at T=25degC REFSEL = Internal Reference

15 20 25 30 35 40 45 50 55

Vdd [V]

Vref [V]11152543VDD

Figure 5-51 Offset Error vs Vref (VDD=50V fADC=115 ksps) REFSEL = Internal Reference

11 15 25 43 VDD

Vref [V]

Figure 5-52 Absolute Accuracy vs VDD (fADC=115 ksps T=25degC) REFSEL = External Reference

15 20 25 30 35 40 45 50 55

Vdd [V]

Vref [V] 1826409643

Figure 5-53 Absolute Accuracy vs VREF (VDD=50V fADC=115 ksps REFSEL = External Reference)

18 26 4096 43

Vref [V]

Figure 5-54 DNL vs VDD (fADC=115 ksps T=25degC REFSEL = External Reference)

15 20 25 30 35 40 45 50 55

Vdd [V]

Vref [V] 1826409643

Figure 5-55 DNL vs VREF (VDD=50V fADC=115 ksps REFSEL = External Reference)

18 26 4096 43

Vref [V]

Figure 5-56 Gain vs VDD (fADC=115 ksps T=25degC REFSEL = External Reference)

15 20 25 30 35 40 45 50 55

Vdd [V]

Vref [V] 1826409643

Figure 5-57 Gain vs VREF (VDD=50V fADC=115 ksps REFSEL = External Reference)

18 26 4096 43

Vref [V]

Figure 5-58 INL vs VDD (fADC=115 ksps T=25degC REFSEL = External Reference)

15 20 25 30 35 40 45 50 55

Vdd [V]

Vref [V] 1826409643

Figure 5-59 INL vs VREF (VDD=50V fADC=115 ksps REFSEL = External Reference)

18 26 4096 43

Vref [V]

Figure 5-60 Offset vs VDD (fADC=115 ksps T=25degC REFSEL = External Reference)

15 20 25 30 35 40 45 50 55

Vdd [V]

Vref [V] 1826409643

Figure 5-61 Offset vs VREF (VDD=50V fADC=115 ksps REFSEL = External Reference)

18 26 4096 43

Vref [V]

56 AC CharacteristicsFigure 5-62 Hysteresis vs VCM - 10 mV (VDD=5V)

-05 00 05 10 15 20 25 30 35 40 45 50 55

Vcommon mode [V]

Figure 5-63 Hysteresis vs VCM - 10 mV to 50 mV (VDD=5V T=25degC)

-05 00 05 10 15 20 25 30 35 40 45 50 55

Vcommon mode [V]

HYSMODE10mV25mV50mV

Figure 5-64 Offset vs VCM - 10 mV (VDD=5V)

-05 00 05 10 15 20 25 30 35 40 45 50 55

Vcommon mode [V]

Figure 5-65 Offset vs VCM - 10 mV to 50 mV (VDD=5V T=25degC)

-05 00 05 10 15 20 25 30 35 40 45 50 55

Vcommon mode [V]

HYSMODE10mV25mV50mV

57 OSC20M CharacteristicsFigure 5-66 OSC20M Internal Oscillator Calibration Stepsize vs Calibration Value (VDD=3V)

0 16 32 48 64 80 96 112 128OSCCAL [x1]

Figure 5-67 OSC20M Internal Oscillator Frequency vs Calibration Value (VDD=3V)

0 16 32 48 64 80 96 112 128OSCCAL [x1]

Figure 5-68 OSC20M Internal Oscillator Frequency vs Temperature

Vdd [V]182227336555

Figure 5-69 OSC20M Internal Oscillator Frequency vs VDD

15 20 25 30 35 40 45 50 55Vdd [V]

58 OSCULP32K CharacteristicsFigure 5-70 OSCULP32K Internal Oscillator Frequency vs Temperature

-40 -20 0 20 40 60 80 100 120

Temperature [degC]

Vdd [V]182227336555

Figure 5-71 OSCULP32K Internal Oscillator Frequency vs VDD

15 20 25 30 35 40 45 50 55

Vdd [V]

6 Ordering Informationbull Available ordering options can be found by

ndash Clicking on one of the following product page linksbull ATmega4809 Product Page

ndash Searching by product name at microchipDIRECTcomndash Contacting your local sales representative

Table 6-1 Available Product Numbers

Ordering Code(1) FlashSRAM Pin Count Package Type(2) Carrier Type Temperature Range

ATmega4809-PF 48 KB6 KB 40 PDIP Tube -40degC to +125degC

Note 1 Pb-free packaging complies to the European Directive for Restriction of Hazardous Substances (RoHS

directive) Also Halide free and fully Green2 Package outline drawings can be found in the Package Drawings section

Figure 6-1 Product Identification SystemTo order or obtain information for example on pricing or delivery refer to the factory or the listed sales office

Carrier TypeAT mega 4809 - MFR

Flash size in KBSeries name

Pin count9=48 pins (PDIP 40 pins)8=32 pins (SSOP 28 pins)

Package TypeA=TQFPM=QFN (UQFNVQFN)P=PDIPX=SSOP

Temperature Range F=-40degC to +125degC (extended) U=-40degC to +85degC (industrial)

R=Tape amp ReelAVR product familyBlank=Tube or Tray

Note Tape and Reel identifier only appears in the catalog part number description This identifier is used forordering purposes Check with your Microchip Sales Office for package availability with the Tape and Reel option

ATmega4809 ndash 40-PinOrdering Information

7 Online Package DrawingsFor the most recent package drawings

1 Go to httpwwwmicrochipcompackaging2 Go to the package type specific page for example VQFN3 Search for either Drawing Number or Style to find the most recent package drawings

Table 7-1 Drawing Numbers

Package Type Drawing Number Style

PDIP40 C04-016 P

ATmega4809 ndash 40-PinOnline Package Drawings

8 Package Drawings

81 40-Pin PDIP

copy 2007 Microchip Technology Inc DS00049AR-page 61

MPackaging Diagrams and Parameters

40-Lead Plastic Dual In-Line (P) ndash 600 mil Body [PDIP]

Notes1 Pin 1 visual index feature may vary but must be located within the hatched area2 sect Significant Characteristic3 Dimensions D and E1 do not include mold flash or protrusions Mold flash or protrusions shall not exceed 010 per side4 Dimensioning and tolerancing per ASME Y145M

BSC Basic Dimension Theoretically exact value shown without tolerances

Note For the most current package drawings please see the Microchip Packaging Specification located at httpwwwmicrochipcompackaging

Units INCHESDimension Limits MIN NOM MAX

Number of Pins N 40Pitch e 100 BSCTop to Seating Plane A ndash ndash 250Molded Package Thickness A2 125 ndash 195Base to Seating Plane A1 015 ndash ndashShoulder to Shoulder Width E 590 ndash 625Molded Package Width E1 485 ndash 580Overall Length D 1980 ndash 2095Tip to Seating Plane L 115 ndash 200Lead Thickness c 008 ndash 015Upper Lead Width b1 030 ndash 070Lower Lead Width b 014 ndash 023Overall Row Spacing sect eB ndash ndash 700

NOTE 1

Microchip Technology Drawing C04-016B

ATmega4809 ndash 40-PinPackage Drawings

Table 8-1 Device and Package Maximum Weight

6500 mg

Table 8-2 Package Characteristics

Moisture Sensitivity Level NA

Table 8-3 Package Reference

JEDEC Drawing Reference NA

J-STD-609 Material Code e3

Table 8-4 Package Code

9 Conventions

91 Memory Size and TypeTable 9-1 Memory Size and Bit Rate

Symbol Description

KB kilobyte (210B = 1024B)

MB megabyte (220B = 1024 KB)

GB gigabyte (230B = 1024 MB)

b bit (binary lsquo0rsquo or lsquo1rsquo)

B byte (8 bits)

1 kbits 1000 bits rate

1 Mbits 1000000 bits rate

1 Gbits 1000000000 bits rate

word 16-bit

92 Frequency and TimeTable 9-2 Frequency and Time

Symbol Description

kHz 1 kHz = 103 Hz = 1000 Hz

MHz 1 MHz = 106 Hz = 1000000 Hz

GHz 1 GHz = 109 Hz = 1000000000 Hz

ms 1 ms = 10-3s = 0001s

micros 1 micros = 10-6s = 0000001s

ns 1 ns = 10-9s = 0000000001s

ATmega4809 ndash 40-PinConventions

10 Data Sheet Revision HistoryNote The data sheet revision is independent of the die revision and the device variant (last letter of the orderingnumber)

101 RevB - 082019Chapter Changes

Entire Document bull Editorial updates

Features bull Added industrial temperature range -40degC to +85degC

6 Ordering Information bull Added table of available product numbersbull Updated Product Information System figure

102 Rev A - 032019Initial release

ATmega4809 ndash 40-PinData Sheet Revision History

The Microchip WebsiteMicrochip provides online support via our website at httpwwwmicrochipcom This website is used to make filesand information easily available to customers Some of the content available includes

bull Product Support ndash Data sheets and errata application notes and sample programs design resources userrsquosguides and hardware support documents latest software releases and archived software

bull General Technical Support ndash Frequently Asked Questions (FAQs) technical support requests onlinediscussion groups Microchip design partner program member listing

bull Business of Microchip ndash Product selector and ordering guides latest Microchip press releases listing ofseminars and events listings of Microchip sales offices distributors and factory representatives

Product Change Notification ServiceMicrochiprsquos product change notification service helps keep customers current on Microchip products Subscribers willreceive email notification whenever there are changes updates revisions or errata related to a specified productfamily or development tool of interest

To register go to httpwwwmicrochipcompcn and follow the registration instructions

Customer SupportUsers of Microchip products can receive assistance through several channels

bull Distributor or Representativebull Local Sales Officebull Embedded Solutions Engineer (ESE)bull Technical Support

Customers should contact their distributor representative or ESE for support Local sales offices are also available tohelp customers A listing of sales offices and locations is included in this document

Technical support is available through the website at httpwwwmicrochipcomsupport

Product Identification SystemTo order or obtain information eg on pricing or delivery refer to the factory or the listed sales office

Microchip Devices Code Protection FeatureNote the following details of the code protection feature on Microchip devices

bull Microchip products meet the specification contained in their particular Microchip Data Sheetbull Microchip believes that its family of products is one of the most secure families of its kind on the market today

when used in the intended manner and under normal conditionsbull There are dishonest and possibly illegal methods used to breach the code protection feature All of these

methods to our knowledge require using the Microchip products in a manner outside the operatingspecifications contained in Microchiprsquos Data Sheets Most likely the person doing so is engaged in theft ofintellectual property

bull Microchip is willing to work with the customer who is concerned about the integrity of their codebull Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code Code

protection does not mean that we are guaranteeing the product as ldquounbreakablerdquo

Code protection is constantly evolving We at Microchip are committed to continuously improving the code protectionfeatures of our products Attempts to break Microchiprsquos code protection feature may be a violation of the DigitalMillennium Copyright Act If such acts allow unauthorized access to your software or other copyrighted work youmay have a right to sue for relief under that Act

Legal NoticeInformation contained in this publication regarding device applications and the like is provided only for yourconvenience and may be superseded by updates It is your responsibility to ensure that your application meets withyour specifications MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHEREXPRESS OR IMPLIED WRITTEN OR ORAL STATUTORY OR OTHERWISE RELATED TO THE INFORMATIONINCLUDING BUT NOT LIMITED TO ITS CONDITION QUALITY PERFORMANCE MERCHANTABILITY ORFITNESS FOR PURPOSE Microchip disclaims all liability arising from this information and its use Use of Microchipdevices in life support andor safety applications is entirely at the buyerrsquos risk and the buyer agrees to defendindemnify and hold harmless Microchip from any and all damages claims suits or expenses resulting from suchuse No licenses are conveyed implicitly or otherwise under any Microchip intellectual property rights unlessotherwise stated

TrademarksThe Microchip name and logo the Microchip logo Adaptec AnyRate AVR AVR logo AVR Freaks BesTimeBitCloud chipKIT chipKIT logo CryptoMemory CryptoRF dsPIC FlashFlex flexPWR HELDO IGLOO JukeBlox

KeeLoq Kleer LANCheck LinkMD maXStylus maXTouch MediaLB megaAVR Microsemi Microsemi logo MOSTMOST logo MPLAB OptoLyzer PackeTime PIC picoPower PICSTART PIC32 logo PolarFire Prochip DesignerQTouch SAM-BA SenGenuity SpyNIC SST SST Logo SuperFlash Symmetricom SyncServer TachyonTempTrackr TimeSource tinyAVR UNIO Vectron and XMEGA are registered trademarks of Microchip TechnologyIncorporated in the USA and other countries

APT ClockWorks The Embedded Control Solutions Company EtherSynch FlashTec Hyper Speed ControlHyperLight Load IntelliMOS Libero motorBench mTouch Powermite 3 Precision Edge ProASIC ProASIC PlusProASIC Plus logo Quiet-Wire SmartFusion SyncWorld Temux TimeCesium TimeHub TimePictra TimeProviderVite WinPath and ZL are registered trademarks of Microchip Technology Incorporated in the USA

Adjacent Key Suppression AKS Analog-for-the-Digital Age Any Capacitor AnyIn AnyOut BlueSky BodyComCodeGuard CryptoAuthentication CryptoAutomotive CryptoCompanion CryptoController dsPICDEMdsPICDEMnet Dynamic Average Matching DAM ECAN EtherGREEN In-Circuit Serial Programming ICSPINICnet Inter-Chip Connectivity JitterBlocker KleerNet KleerNet logo memBrain Mindi MiWi MPASM MPFMPLAB Certified logo MPLIB MPLINK MultiTRAK NetDetach Omniscient Code Generation PICDEMPICDEMnet PICkit PICtail PowerSmart PureSilicon QMatrix REAL ICE Ripple Blocker SAM-ICE Serial QuadIO SMART-IS SQI SuperSwitcher SuperSwitcher II Total Endurance TSHARC USBCheck VariSenseViewSpan WiperLock Wireless DNA and ZENA are trademarks of Microchip Technology Incorporated in the USAand other countries

SQTP is a service mark of Microchip Technology Incorporated in the USA

The Adaptec logo Frequency on Demand Silicon Storage Technology and Symmcom are registered trademarks ofMicrochip Technology Inc in other countries

GestIC is a registered trademark of Microchip Technology Germany II GmbH amp Co KG a subsidiary of MicrochipTechnology Inc in other countries

ISBN 978-1-5224-4905-8

Quality Management SystemFor information regarding Microchiprsquos Quality Management Systems please visit httpwwwmicrochipcomquality

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Introduction

Features

Table of Contents

1 Block Diagram

2 Pinout

21 40-Pin PDIP


31 Multiplexed Signals


41 Disclaimer

42 Absolute Maximum Ratings

43 General Operating Ratings

44 Power Considerations


46 Peripherals Power Consumption

47 BOD and POR Characteristics

48 External Reset Characteristics

49 Oscillators and Clocks

410 IO Pin Characteristics

411 USART

412 SPI

413 TWI

414 VREF

415 ADC

4151 Internal Reference Characteristics

4152 External Reference Characteristics

416 AC

417 UPDI Timing

418 Programming Time



511 Supply Currents in Active Mode

512 Supply Currents in Idle Mode

513 Supply Currents in Power-Down Mode

514 Supply Currents in Standby Mode

515 Power-on Supply Currents

52 GPIO

53 VREF Characteristics


55 ADC Characteristics

56 AC Characteristics

57 OSC20M Characteristics

58 OSCULP32K Characteristics

6 Ordering Information

7 Online Package Drawings

8 Package Drawings

81 40-Pin PDIP

9 Conventions

91 Memory Size and Type

92 Frequency and Time

10 Data Sheet Revision History

101 RevB - 082019

102 Rev A - 032019

The Microchip Website

Product Change Notification Service

Customer Support

Product Identification System

Microchip Devices Code Protection Feature

Legal Notice

Trademarks

Quality Management System
