Atmel | SMART SAM4C Series€¦ · Atmel-11253A-ATARM-SAM4C32-EK-UserGuide_17-Sep-14 Introduction The SAM4C32 Evaluation Kit (SAM4C32-EK) enables evaluation capabilities and code

SMART

Atmel | SMART SAM4C Series

SAM4C32 Evaluation Kit

USER GUIDE

Introduction

The SAM4C32 Evaluation Kit (SAM4C32-EK) enables evaluation capabilities andcode development of applications running on the 32-bit ARM® Cortex®-M4SAM4C series microcontrollers from Atmel® Corporation.

The SAM4C32-EK can be used with the following microcontrollers:

SAM4C32C

SAM4C16C

SAM4C8C

This document describes the kit contents and architecture, and providesguidelines on how to use the kit.

Atmel-11253A-ATARM-SAM4C32-EK-UserGuide_17-Sep-14

Kit Contents

SAM4C32-EK Board

Power Supply

Universal input AC/DC power supply with US, Europe and UK plug adapters

3V Lithium Battery type CR1225

Cables

Serial RS232 cable

Micro A/B-type USB cable

Welcome letter

Reference documents

SAM4C Series Datasheet (Atmel literature No. 11102)

SAM4C32-EK [USER GUIDE]Atmel-11253A-ATARM-SAM4C32-EK-UserGuide_17-Sep-14

2

3SAM4C32-EK [USER GUIDE]Atmel-11253A-ATARM-SAM4C32-EK-UserGuide_17-Sep-14

Table of Contents

1. SAM4C32-EK Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

1.1 Battery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

1.2 Recovery Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2. Power Up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2.1 Power Up the Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2.2 Sample Code and Technical Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

3. SAM4C32-EK Hardware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

3.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

3.2 Equipment List. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

3.3 Function Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

3.4 Embedded Memories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

3.5 Communication Interfaces. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

3.6 Debug Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

3.7 Extend Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

3.8 LCD Display . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

3.9 Analog I/O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

3.10 CryptoAuthentication (optional) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

3.11 LEDs and Buttons . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

3.12 Miscellaneous I/O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

3.13 Metrology Core Serial Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

3.14 PIO Usage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

3.15 Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

4. SAM4C32-EK Firmware Demonstration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

4.1 SAM4C32-EK Default Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

4.2 Measuring the Backup Mode Current Consumption on VDDBU. . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

5. SAM4C32-EK Design Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

5.1 SAM4C32-EK Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

5.2 SAM4C32-EK Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

6. Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

1. SAM4C32-EK Specifications

The SAM4C32-EK is shipped in a protective anti-static package. The board systemmust not be subjected to high electrostatic discharge.

We strongly recommend using a grounding strap or similar ESD protective device whenhandling the board in hostile ESD environments (offices with synthetic carpet, forexample). Avoid touching the component pins or any other metallic element on theboard.

1.1 Battery

The SAM4C32-EK ships with a 3V coin battery. This battery is not required for the board to start up as long asjumper JP8 is closed.

The coin battery is provided for user convenience in case the user would like to exercise the date and time backupfunction of the SAM4C32 devices when the board is switched off.

1.2 Recovery Procedure

The demo software is stored in internal Flash memory. If the content of the internal Flash has been erased, it canbe reprogrammed recovered to the state as it was when shipped by Atmel using Atmel SAM-BA® In-systemProgrammer available on the Atmel website (www.atmel.com). The binary file of the demo software is alsoavailable on the Atmel website.

Table 1-1. SAM4C32-EK Specifications

Characteristic Specifications

PCB 6 layers, 140 mm x 100 mm

PCB Material Standard FR4 in 1.6 mm thickness

Clock Speed

Crystal 8 MHz

Piezoelectric Ceramic Resonator 8.192 MHz

32.768 kHz external clock

Ports

RS232

RS485

USB

MemoryTWI EEPROM

Serial Data Flash

Board Supply Voltage

5V DC from main connector power supply

5V DC from USB

3V Battery for Backup and RTC

ROHS Compliant

CE and FCC Part 15 status Compliant

CAUTION ESD-Sensitive Electronic Equipment!

Electrostaticsensitivedevice


http://www.atmel.com



2. Power Up

2.1 Power Up the Board

Unpack the board taking care to avoid electrostatic discharge. Unpack the power supply, select the power plugadapter corresponding to that of your country, and insert it in the power supply.

Connect the power supply DC connector to the board and plug the power supply to an AC power plug. The boardLCD should light up and display a graphic demo program.

2.2 Sample Code and Technical Support

After boot up, designers can run sample code or their own application on the development kit. Users can downloadsample code and get technical support from the Atmel website. The SAM4C32-EK is supported by the AtmelSoftware Framework (ASF) which is also available on the Atmel website.


5

3. SAM4C32-EK Hardware

3.1 Overview

This section introduces the SAM4C32-EK design. It introduces system-level concepts, such as power distribution,memory, and interface assignments.

The Atmel SAM4C32 microcontroller is a system-on-chip solution for smart energy applications, built around twohigh-performance 32-bit ARM Cortex-M4 RISC processors. These devices operate at a maximum speed of 120MHz and feature up to 2 Mbyte of embedded Flash, 256 Kbytes of SRAM and on-chip cache for each core.

The dual ARM Cortex-M4 architecture allows for integration of application layer, communications layers andsecurity functions in a single device, with the ability to extend program and data memory via a 16-bit external businterface. The peripheral set includes an advanced cryptographic engine, two anti-tamper pins with time-stampingfunction, floating point unit (FPU), five USARTs, two UARTs, two TWIs, up to seven SPIs, as well as a PWM timer,two 3-channel general-purpose 16-bit timers, temperature compensable low-power RTC running on backup areadown to 0.5 µA, and a 50 x 6 segmented LCD controller.

The SAM4C series is a scalable platform providing, alongside Atmel's industry leading SAM4 standardmicrocontrollers, unprecedented cost structure, performance and flexibility to smart meter designers worldwide.

Figure 3-1. SAM4C32-EK Board Architecture

SAM4C32CLQFP100

UARTTO

USB

Serial Debug

AT30TS75Temperature Sensor

UART1

JTAG

USART2

3V3 LDO

USART0

VDDBU

TWI

XPROExtension

LCD

RS485

3V3

FWUP,Reset

Tamper 0,Tamper 2

SHDN

1

6

SCROLL UP,SCROLL DOWN

4-WireRS232

2-WireRS232

SPI, TWI, UART, ADC,...

SPI 0

RZ600Wireless

ATSHA204CryptoAuthentication

(Optional)

AT24CEEPROM


3.2 Equipment List

3.2.1 Features List

CPU SAM4C32 with its embedded resources

8 MHz and 32.768 kHz Quartz Crystal, SMB connector for external source

Main regulator 5V/3.3V with red LED indicator

Lithium Coin Cell Battery

Main board with:

Custom segmented LCD

Shared interface RS232 / RS485

Serial data Flash SPI

Two-Wire Serial EEPROM

Two-Wire Temperature Sensor

Two-Wire CryptoAuthentication™ Memory (optional) Debug solution:

2 peripheral Input/Output extension connectors HE10 (PIO A, B)

Peripheral Input/Output extension connector HE10 (PIO Sense)

JTAG/ICE interface

UART/USB bridge Device Communication interface

Analog

Analog 3V reference

Potentiometer connected on ADC input

Buttons

4 system push buttons: Reset, Force Wake-Up, Tamper 0, Tamper 2

2 user push buttons: Scroll Up and Scroll Down

LEDs

Amber LED

Blue LED

Green LED

3.2.2 Interface Connection

The SAM4C32-EK board includes the following hardware interfaces:

RS232/RS485 (USART0 RX, TX, RTS, CTS) connected to:

9-way male D-type RS232 connector

3-pin connector

JTAG/SWD 20-pin IDC connector

5-pin Micro AB USB connector (bridge UART)

3 PIOs connected to HE10 connectors


7

Figure 3-2. Annotated SAM4C32-EK Board Layout

RS232 Interface

Zigbee Interface

System Buttons

Atmel Custom LCD

XPRO Interface

PIO Extension

PIO Extension PIO MeteringExtension

Battery Coin Cell

User Buttons

Atmel SAM4C32

JTAG Interface

Debug Interface+

Power Supply

RS485 Interface

Power Supply


3.3 Function Blocks

3.3.1 Processor

The SAM4C32-EK board is equipped with a SAM4C32 device in an LQFP100 package.

Figure 3-3. SAM4C32 Processor

3.3.2 Clock Distribution

The SAM4C32-EK board includes two clock systems (see Table 3-1 and Figure 3-4).

Figure 3-4. Clock System

ATMEL Cortex-M4 Processor SAM4C32 LQFP100

R1.R2 should close to SAM4C32.Do Not Populate

PA

0P

A1

PA

2P

A3

PA

4P

A5

PA

6P

A7

PA

8P

A9

PA

10P

A11

PA

12P

A13

PA

14P

A15

PA

16P

A17

PA

18P

A19

PA

20P

A21

PA

22P

A23

PA

24P

A25

PA

26P

A27

PA

28P

A29

PB4PB5PB6PB7PB8PB9PB10PB11PB12PB13PB14PB15PB16PB17PB18PB19PB20PB21PB22PB23PB24PB25PB26PB27PB28PB29PB30PB31

PC0PC1PC2PC3PC4PC5PC6PC7PC8

PB0PB1PB2PB3

FWUP

PC9

JTAGSEL

SHDN

TST

NRST

XOUT32XIN32

TMP0

PA31

PA30

XINXOUT

VDDIN VDDOUT VDDCORE VDDPLL VDDLCD VDDIO VDDBU

VDDREF

SHDN{4}

FWUP{7}

TMP0{7}

R2 0R/DNP DNPR2 0R/DNP DNP

R1 0R/DNP DNPR1 0R/DNP DNP

MN1MN1

PB61

PB72

PB183

GN

D_1

4

PB195

PB86

PB227

PB308

PB259PB2410

VD

DC

OR

E_1

11

PB2912

PB913

PB1014

PB1115

PB1216

PB1417

PB1518

PA

2619

PA

2520

PA

2421

PA

2022

PA

1923

PA

1824

PA

825

TDI/PB026

TCK/SWCLK/PB327 TMS/SWDIO/PB228

ERASE/PC929

TDO/TRACESWO/PB130

PC131

PC632

VD

DIO

_133

VD

DB

U34

FWUP35

JTAGSEL36

SHDN37

TST38

TMP039

XIN3240

XOUT3241

GN

D_2

42

PB443

VD

DC

OR

E_2

44

PB545

PC746

PC047

NRST48

VD

DIO

_249

PA30/XOUT50

PA31/XIN51

GN

D_3

52

VD

DP

LL53

PC854

PC555PC456PC357PC258

PA

2959

PA

2860

PA

2761

PA

662

VD

DC

OR

E_3

63

PA

364

PA

2165

PA

2266

PA

2367

PA

968

PA

1069

PA

1170

PA

1371

PA

1472

PA

1573

PA

1674

PA

1775

VD

DIO

_376

ADVREF77

GN

D_4

78

PB31/AD579

PB23/AD480

PB13/AD381

PA

5/A

D2

82P

A4/

AD

183

PA

12/A

D0

84

VD

DIN

85

VD

DO

UT

86

PB2187PB2088

VD

DC

OR

E_4

89

PA

090

PB2791

VD

DLC

D92

PB2693

PB2894

PB1695

PA

196

PB1797

PA

798

VD

DIO

_499

PA

210

0

Table 3-1. Components Clock System

Qty Description Component Assignment

1 Crystal for Internal Clock 8 MHz Y2

1 Crystal for RTC Clock 32.768 kHz Y1

XOUT

XIN

C20 18pFC20 18pF

Y28MHzY28MHz

1 234

R9 0RR9 0R

R6 0RR6 0R

C24 18pFC24 18pF

XIN32

XOUT32

RTC_32{4}

R4 0RR4 0R

Y132.768 kHz

Y132.768 kHz

C19

18pF

C19

18pFR5 0RR5 0R

C1

18pF

C1

18pF

R3 0R/DNP

DNP

R3 0R/DNP

DNP


9

3.3.3 Reset and Wake-Up Circuitry

The reset sources for the EK board are:

Power-on reset

Push-button reset (refer to Section 3.11.2 “Push Buttons”)

JTAG reset from an in-circuit emulator

3.3.4 Power Supplies

The SAM4C32-EK board evaluation and development platform embeds all the necessary power rails required forthe SAM4C32 processor and peripherals.

The SAM4C32-EK board can be supplied by either a 5V DC block through input J2 (see Figure 3-5) or a USBconnection via J6 (refer to “DBGU/USB Bridge Schematic” on page 15).

A manual power supply selection switch (SW1) is provided to power on/off the main power line.

Figure 3-5. Power Supply Schematic

3.3.5 Power Rails

The SAM4C32 supports 1.6V–3.6V single supply mode (VDDIN). An internal regulator input is connected to thesource and its output feeds VDDCORE (VDDOUT connected to VDDCORE).

When the 3.3V supply is present, the Power LED D5 is lit. Test points TP2 to TP5 are used to perform testing.

USB5V

U1ZEN056V130A24LSU1ZEN056V130A24LS

12

3

J2TWTJ-020-04P2J2

12

3

D2

NSR0320MW2T1G

D2

NSR0320MW2T1G

D3

NSR0320MW2T1G

D3

NSR0320MW2T1G

5VTP4TP4

C29100nFC29

SW18SS1012-ZSW1

3

12

R12 1.5KR12

C31C31C3010µFC30

10µF

Table 3-2. Power Supply Voltage Ranges

Power Supply Ranges Comments

VDDIO 1.6V–3.6V

Flash Memory Charge Pumps Supply for Erase and Program Operations, and Read operation

Input Output buffers Supply

VDDBU 1.6V–3.6VBackup Area power supply. VDDBU is automatically disconnected when VDDIO is present (> 1.9V)

VDDIN 1.6V–3.6V 1.6V min. if LCD and ADC not used, 2.5V otherwise

VDDLCD 2.5V–3.6V

LCD Voltage Regulator Output

External LCD power supply input (LCD regulator not used)

VDDIO/VDDIN need to be supplied when the LCD Controller is used

VDDOUT 1.2V Output 120 mA Output Current

VDDPLL 1.08V–1.32V –

VDDCORE 1.08V–1.32V –


Figure 3-6. Power Rails Schematic

Note: Test points and jumpers are provided for easy access to each of the regulated power lines and measure the current on each line.

3.3.6 Battery Backup

The VDDBU pin is powered from the 3.3V rail or from a backup battery BT1 via a dual Schottky diode D4.

Test points TP8 and jumper JP8/JP10 are used to perform voltage and current measurements.

Figure 3-7. Backup Battery Schematic

3.4 Embedded Memories I2C for data storage in EEPROM (Atmel AT24C1024B)

SPI Serial Flash AT45 or AT25F

3.4.1 TWI EEPROM

The AT24C1024B provides 1,048,576 bits of serial electrically erasable and programmable read-only memory(EEPROM) organized as 131,072 words of 8 bits each.

Device slave address byte: 0x50.

Vout = 0.8 x (1 + Rtop/Rbottom)

3V3 POWER

FORCEPOWERON

FORCE_ON

FORCE_ON

5V

5V 3V3

3V3

SHDN{3}

TP7

Q1Si1563EDHQ1Si1563EDH

1 32

456

R15100K ΩR15

100

C43

15pF

C43

C3910µF

C381µFC38 C41

1µF

R14

100K Ω

R14

D5

REDRED

R16 47K Ω 1%

U2 RT9018AU2 RT9018A

PGOOD1

EN2

VIN3

VDD4

NC5VOUT6ADJ7GND8

VS

S9

C35 10nFC35

R20R20 10K Ω

R181515K Ω 1%C36

100nFC36

JP9JP9

R19R1910K Ω

C441µFC44

R17470Ω

C3710µFC37

close to SAM4C32

VDDOUT VDDCORE

VDDPLL

C3422µF

C3422

JP6JP6

L2L2

56µH

TP6TP6

R13

2.2R

R13

.C322.2µF/DNP

C32 C33

100nF

C33

100nF

JP7JP7

TP5TP5

VDDMAIN3V3

VDDIN

VDDIO

TP10TP10

JP13JP13TP12TP12

JP12JP12TP11TP11

JP11JP11

Power LED

Do Not Populate

VDDBU

VBATT

VDDINVDDBU BT1

JP10

C42100nF

C402.2µF

TP8

D4BAT54CD4BAT54C

32

1JP8


11

Figure 3-8. TWI EEPROM Schematic

3.4.2 SPI Serial Flash

The SAM4C32-EK embeds one serial Flash device AT25DFxx or AT45DBxx connected through the SPI. (TheAT25DF321A is mounted by default.)

Figure 3-9. SPI Serial Flash Schematic

3.4.3 Adesto® Compatible Devices

ADDR: 0X50

(SCL)(SDA)

PA25

PA24

VDDMAIN

VDDMAIN

VDDMAIN

C62 100nFR450R

R424.7K

R414.7K

R460R

R400R/DNP

U4

AT24C1024B

A01

A12

A33

GND4

SDA5 SCL6

WP7VCC

8

R390R/DNP

Do Not Populate

U13 and U10 PCB footprints differ by 90 degrees and are stacked.

R100 to R103 should be close to SAM4C32.

SPI0_MISOC

SPI0_NPCSC

PA7 SPI0_MOSICPA6 SPI0_MISOCPA8 SPI0_SPCKC

SPI0_MOSICSPI0_SPCKC

SPI0_NPCSCPA5VDDIN

VDDIN

VDDINVDDIN

R105 470KR103 0R

U13

AT45DB321D DNP

SI1

SCK2

/RESET3

/CS4

/WP5VCC6GND7SO8

R101 33RR102 33R

C80100nF

U10

AT25DF321A-SH-B/CS

1SO

2/WP

3

GND4

SI5

SCK6

/HOLD7

VCC8R100 33R

Do Not Populate

Table 3-3. Compatible Devices

Adesto® AT45DB Series Devices Adesto AT25DF Series Devices

AT45DB64D2-CNU AT25DF641A-SH

AT45DB321D-MWU AT25DF321A-SH

AT45DB131D-SS AT25DF161-SH

AT45DB081D-SS AT25DF081-SSH

AT45DB041D-SS AT25DF021-SH

AT45DB021D-SS –

AT45DB011D-SS –


3.5 Communication Interfaces

3.5.1 Serial Port USART2 RS232

The USART2 is buffered with one RS-232 Transceiver ADM3312E (Analog Devices) and is connected to a DB9connector. A classic implementation RS232 transceiver selection should include double source capability. TheUSART2 connector with RTS/CTS handshake signal support is connected to the RS232 transceiver.

Features:

One RS232 transceiver connected to RXD2, TXD2, RTS2, and CTS2

One DB9 male connector

Required resistors and capacitors

Figure 3-10. USART2 RS232 Schematic

3.5.2 Serial Port USART2 RS485

The USART2 is buffered with an Analog Devices ADM3485 RS-485/RS-422 transceiver and is connected to a 3-point jumper.

Features:

One RS485 transceiver connected to RXD2, TXD2 and RTS2, CTS2

One 3-point connector


Figure 3-11. USART2 RS485 Schematic

MaleStraight Angle

USART2

(RXD2)(TXD2)(RTS2)(CTS2) PA15

PA14PA9_232PA10

VDDMAIN

VDDMAIN

VDDMAIN

FGND

R28 0R

C51100nF

R26 0RR

C474.7µF

MN3ADM3312EARU

C1+6

C1-20

C2+2

C2-4

C3+24

C3-22

VCC3

V+1

V-21

GND23

SD19

EN5

T1IN7

T1OUT18

R1IN15

R1OUT10

T2IN8

T2OUT17

R2IN14

R2OUT11

T3IN9

T3OUT16

R3IN13

R3OUT12

R31 0R

J3J3

5

4

3

2

1

9

8

7

6

10 11

C49100nF

C53100nF

C48100nF

R33 0R

C50100nF

R35 0RR34 47K

R25

R30 0R

C52100nFDo Not Populate

47K/DNP

(RXD2)

(TXD2)(RTS2)(CTS2)

RS 485

PA15

PA9_485

PA10

PA14

PA9

PA9_232

PA9_485

VDDMAIN

VDDMAINVDDMAIN

FGND

R32 0R

R37120R

R2310K

R29 0R

R27 0R

J41

2

3R36 0R

MN4ADM3485ARZ

RO1

RE2

DE3

DI4

VCC8

GND5

A6

B7

C54100nF

R38

R24

JP15

1

2

3

Do Not Populate

Do Not Populate

JP14

3.3K/DNP

JP16

3.3K/DNP

JP17


13

3.5.3 Serial Port UART1 RS232

The UART1 is buffered with an Analog Devices ADM3312E RS-232 transceiver and is connected to the HE10 PIOport C. A classic implementation RS232 transceiver selection should include double source capability.

Features:

One RS232 transceiver connected to RXD (PC1) and TXD (PC0) only

One HE10 male connector (PIO port C)


Figure 3-12. Serial Port Schematic

(RXD1)(TXD1)

UART1

(RS232_RXD)(RS232_TXD)

PC1PC0

VDDMAIN

VDDMAIN

VDDMAIN

J5

HE10

123

R48 0RR50 0R

R47 0R

R51 47K

C61100nF

R43

MN5ADM3312EARUMN5

C1+6

C1-20

C2+2

C2-4

C3+24

C3-22

VCC3

V+1

V-21

GND23

SD19

EN5

T1IN7

T1OUT18

R1IN15

R1OUT10

T2IN8

T2OUT17

R2IN14

R2OUT11

T3IN9

T3OUT16

R3IN13

R3OUT12

R44 0R

C60100nF

R49 47K

C59100nF

C57100nF

C58100nF

C554.7µF

R52 0R

C56100nF

Do Not Populate

47K/DNP


3.6 Debug Interfaces

3.6.1 JTAG/ICE

The SAM4C32-EK includes a JTAG interface port to provide debug level access to the system-on-chip. The JTAGport is a 20-pin, dual-row, 0.1-inch male connector. This port provides the required interface for in-circuit emulatorssuch as the ARM Multi-ICE® and Atmel SAM-ICE.

Features:

One HE10 20-pin male connector

Required resistors

Figure 3-13. JTAG/ICE Interface Schematic

3.6.2 UART/USB Bridge Interface

The UART is connected to an interface USB through an FTDI FT232R (TTL to USB converter) device. RX and TXDBGU only are connected to the Micro AB USB connector.

Figure 3-14. DBGU/USB Bridge Schematic

Do Not PopulateR146 0R/DNP(NRST)

(TMS)(TCK)

(TDO)JTAG/ICE INTERFACE

(TDI)

100K Ω

TMP2

PB0PB2

NRST

PB3

PB1

PB27

VDDIN

PB1{3,4}

R138R137R136J11

12345678910111213151719

14161820

BP61

423

R134

R149100K Ω

R148 33Ω

JP24JP24

1

2

3

R135100K Ω 100K Ω 100K Ω 100K Ω

DBGU/USB Bridge

(RXD0)(TXD0)

PB4PB5

FGND

3V3OUT

3V3OUT

5V3V3OUT

USB5V

D6 Green

U8

FT232RLFT232RL

TXD1

DTR#2

RTS#3

VCCIO4

RXD5

RI#6

GND17

NC18

DSR#9

DCD#10

CTS#11

CBUS412

CBUS213

CBUS314

USBDP15 USBDM16

3V3OUT17

GND218

RESET#19

VCC20

GND321

CBUS122

CBUS023

NC224

AGND25

TEST26

OSCI27

OSCO28

R58 0RR57 0R

R60 4.7K/DNP

R59 0R

C72100nF

C6610nF

C7147pF

R64 10K/DNP

R65 0R

C644.7µF/16V

C7047pF

C68

100nF

C68

R56 0R

R62 470R

5VD-

D+ID

G

J6USB Micro AB

5VD-

D+ID

G

1

2

3

4

7

5

68 910

11

L3

220Ω at 100MHz1 2

D7 RedR61 470R6

R63 0R

C67100nF

Do Not Populate

Do Not Populate


15

3.7 Extend Interfaces

The SAM4C32-EK embeds two connectors to interface Atmel IEEE 802.15.4-compliant wireless transceivers forZigBee®-based applications.

Features:

Atmel RZ600 module

Atmel REB233-XPRO module

3.7.1 RZ600 Interface

The RZ600 interface connects with Atmel modules used for ZigBee communication platforms that are equipped with a 10-pin HE10 male connector.

Figure 3-15. RZ600 Interface Schematic

.

3.7.2 REB233-XPRO Interface

The XPRO interface connects with new Atmel modules used for XPRO platforms that are equipped with a 20-pinHE14 male connector.

Figure 3-16. XPRO Interface Schematic

Table 3-4. RZ600 Pin Functions

Function Pin Pin Function

Reset 1 2 IRQ0

Interrupt Request 3 4 SLP_TR

SPI Chip Select 5 6 SPI MOSI

SPI MISO 7 8 SPI CLK

Power Ground 9 10 Power Supply

(SPI0_NPCS0)(SPI0_MISO)

(SPI0_MOSI)(SPI0_SPCK)

ZigBee

R70 to R73 should be close to SAM4C32.

(ZB_IRQ1)(ZB_RSTN) (ZB_IRQ0)

(ZB_SLPTR)PA7

PA11

PA5PA6 PA8

PA12PA17

PA18

VDDMAINR72 33R

R67 0R

C742.2nF

L4 220Ω at 100MHz

R70 0RJP18

C752.2µF

R66 0RJ7J7

1 23 45 67 89 10

R68 0RR71 33RR73 33R

R69 0R

C7318pF

(ID_DATA)(ADC_0)(ADC_2)(PWM_0/RST_ZB)(PWM_2/IRQ)(TWI_SDA)(UART_RX)(SPI_SS_0)(SPI_MISO)

(ADC_1)(ADC_3)(PWM_1)(PWM_3/SLP_TR/SPI_SS_1)(TWI_SCL)(UART_TX)(SPI_MOSI)(SPI_SCK)

XPRO

R84, R83 Should be close to SAM4C32.

PB23PA12PA5PB18PA22PA24PB16PB22PB20

PA4PB13PC7PB15PA25PB17PB19PB21

VDDMAIN

R79 0R

R89 0R

L5 220Ω at 100MHz

R82 0R

R87 0R R88 0R

R77 0R

C782.2µF

R76 0R

R83 0RR85 0R

C7618pF

C772.2nF

R80 0RR81 0R

R84 0R

R78 0R

R74 0R

J8

1 23 45 67 89 10

11 1213 1415 1617 1819 20

R90 0R

R75 0R

R86 0R

Do Not Populate

JP19

HE14 100-mil right angled male DNP


3.8 LCD Display

The SAM4C32-EK board is equipped with one segmented LCD interfaced with the SAM4C32 device through theLCD controller. Note that only certain segments (highlighted in blue in Figure 3-17 on page 17) are usable withoutusing U11 and U12 analog switches or unpopulated 0 ohm resistors.

Features:

Segmented LCD YMCC42364AAANDCL (Anshan Yes Optoelectronics Display Co., Ltd.)

Figure 3-17. LCD Display Schematic

Table 3-5. XPRO Pin Functions

Function Pin Pin Function

Module Identity 1 2 Ground

ADC Input 3 4 ADC Input

ADC Input 5 6 ADC Input

ZigBit Reset 7 8 PWM Output

IRQ Interrupt from ZigBit to Host Processor 9 10 SLP_TR wake-up signal to ZigBit

Two-Wire Data Line 11 12 Two-Wire Clock Line

UART RX Line 13 14 UART TX Line

SPI Chip Select 15 16 SPI MOSI

SPI MISO 17 18 SPI Clock

Power Ground 19 20 Power Supply

PB9

PA1

PB8

PA2

PB7

PB6

PB

30PA

0

PA3

PB

31

PA

28P

A27

PA

26P

A23

PB

11

PA

23

PB

12

PB6

PB

13

PA

26

PB

14

PA

27P

A28

PB7

PB8

PB9

PB

10

PA16

PB

23P

B24

PB

25P

B26

PB

27P

B28

PB

29

PB15PB16PB17PB18

PB21PB22

PB19PB20

PA13

VDDMAIN

VDDMAIN

VDDMAIN

R95

0R

C79 100nF

R121 0R

R11

4D

NP

R92

0R

R117 0R

U12

74HC4066

1Y1

1Z2

2Z3

2Y4

2E5 3E

6

GN

D7

3Y8

3Z9

4Z10

4Y11

4E121E

13

VC

C14

R96

0R

R1044.7K

R99 49R9

JP20

C83 100nF

Q2

IRLML6401

1

32

R11

2D

NP

R93

0R

R11

1D

NP

C82

100nF

C82

R106R106

100R

R91

0R

R10

9D

NP

C81

10µF

C81

R10

8D

NP

R115 0R

R120 0R

R98

0R

R10

7D

NP

U11

74HC4066

1Y1

1Z2

2Z3

2Y4

2E5 3E

6

GN

D7

3Y8

3Z9

4Z10

4Y11

4E121E

13

VC

C14

R97

0R

R119 0R

U9YMCC42364AAANDCL

CO

M3

1

CO

M2

2

CO

M1

3

CO

M0

4

SE

G_0

5

SE

G_1

6

SE

G_2

7

SE

G_3

8

SE

G_4

9

SE

G_5

10

SE

G_6

11

SE

G_7

12

SE

G_8

13

SE

G_9

14

SE

G_1

015

SE

G_1

116

SE

G_1

217

SE

G_1

318

SE

G_1

419

SE

G_1

520

SE

G_1

621

SE

G_1

722

SE

G_1

823

SE

G_1

924

SE

G_2

025

SE

G_2

126

SE

G_2

227

SE

G_2

328

SE

G_2

429

SE

G_2

530

SE

G_2

631

SE

G_2

732

SE

G_2

833

SE

G_2

934

SE

G_3

035

SE

G_3

136

SE

G_3

237

SE

G_3

338

SE

G_3

439

SE

G_3

540

SE

G_3

641

SE

G_3

742

SE

G_3

843

SE

G_3

944

LED+45

LED-46

R11

0D

NP

R122 0R

R94

0R

R116 0R

R11

3D

NP

R118 0RDo Not Populate


17

Figure 3-18. LCD Layout

.

Table 3-6. LCD pinout vs Segment

Pin COM0 COM1 COM2 COM3 Pin COM0 COM1 COM2 COM3

1 – – – COM3 23 A5-a A5-b A5-c B12

2 – – COM2 – 24 A5-g A5-j A5-L A5-m

3 – COM1 – – 25 A4-h A4-i A4-k A4-n

4 COM0 – – – 26 B6 A4-f A5-e A5-d

5 G1 G0 G2 G3 27 A4-a A4-b A4-c B11

6 G4 G5 G6 G7 28 A4-g A4-j A4-L A4-m

7 E0 E2 E4 E6 29 A3-h A3-i A3-k A3-n

8 E1 E3 E5 E7 30 B4 A3-f A3-e A3-d

9 D3-a D3-b D3-c B9 31 A3-a A3-b A3-c B10

10 D3-f D3-g D3-e D3-d 32 A3-g A3-j A3-L A3-m

11 D2-a D2-b D2-c D2-p 33 A2-h A2-i A2-k A2-n

12 D2-f D2-g D2-e D2-d 34 B3 A2-f A2-e A2-d

13 D1-a D1-b D1-c D1-p 35 A2-a A2-b A2-c B1

14 D1-f D1-g D1-e D1-d 36 A2-g A2-j A2-L A2-m

15 D0-a D0-b D0-c D0-p 37 A1-h A1-i A1-k A1-n

16 D0-f D0-g D0-e D0-d 38 B2 A1-f A1-e A1-d

17 A6-h A6-i A6-k A6-n 39 A1-a A1-b A1-c B8

18 B14 A6-f A6-e A6-d 40 A1-g A1-j A1-L A1-m

19 A6-a A6-b A6-c B13 41 A0-h A0-i A0-k A0-n

a

b

c

d

e

f g h i

j k

L m n


20 A6-g A6-j A6-L A6-m 42 B0 A0-f A0-e A0-d

21 A5-h A5-i A5-k A5-n 43 A0-a A0-b A0-c B7

22 B5 A5-f A5-e A5-d 44 A0-g A0-j A0-L A0-m

Table 3-7. LCD PIO Mapping

Pin Name LCD Pin PIO PIO LCD Pin Pin Name

COM0 4 PA0 PA1 3 COM1

COM2 2 PA2 PA3 1 COM3

SEG0 5 PB30 PB31 6 SEG1

SEG2 7Not

usedNot

used8 SEG3



SEG8 13 PA28 PA27 14 SEG9

SEG10 15 PA26 PA23 16 SEG11

SEG12 17 PB29 PB28 18 SEG13

SEG14 19 PB27 PB26 20 SEG15

SEG16 21 PB25 PB24 22 SEG17

SEG18 23 PB23 PB22 24 SEG19

SEG20 25 PB21 PB20 26 SEG21

SEG22 27 PB19 PB18 28 SEG23

SEG24 29 PB17 PB16 30 SEG25

SEG26 31 PB15 PB14 32 SEG27

SEG28 33 PB13 PB12 34 SEG29

SEG30 35 PB11 PB10 36 SEG31



SEG36 41 PA28 PA27 42 SEG37

SEG38 43 PA26 PA23 44 SEG39

Table 3-6. LCD pinout vs Segment (Continued)

Pin COM0 COM1 COM2 COM3 Pin COM0 COM1 COM2 COM3


19

3.9 Analog I/O

3.9.1 Analog Reference

The SAM4C32 features an LM4040 precision micropower curvature-corrected bandgap shunt voltage referencewith several fixed reverse breakdown voltages. The device voltage reference on the board is 3.0V.

Figure 3-19. Analog Reference Schematic

3.9.2 Analog Input

One VR1 multi-turn 10K Ω potentiometer is connected to the jumper JP4. If JP4 is closed, this analog reference isavailable on analog input PA4.

Figure 3-20. Analog Input Schematic

+3V3

+3V

ADVREF

VDDIN

VDDREF

5V

R8.2.2Ω

D1

C2522µF

R7

C222.2µF

C27

10nF

+C26

10µF

TP3

L156µH

C23

100nF

C28

100nF

TP2

JP5

1

2

3

RC0603JR-073K3L

LM4040AIM3X-3.0/NOPB

(Analog input) PA4

VDDIN

C2110nF

JP4VR110K

31

2


3.9.3 Temperature Sensor

The Atmel AT30TS75 temperature sensor converts temperatures from -40°C to +125°C to a digital word andprovides a typical accuracy of ±0.5°C over the operating temperature range of 0°C to +85°C. The device is factorycalibrated and requires no external components to help provide a cost effective solution. To reduce currentconsumption and save power, the AT30TS75 features a shutdown mode that turns off all internal circuitry exceptfor the internal power-on reset and serial interface circuits. In addition, the device features a power saving one-shot mode that allows the device to make a temperature measurement, update the temperature register and thenreturn to shutdown mode.

Device slave address byte: 0x48.

Figure 3-21. Temperature Sensor Schematic

3.10 CryptoAuthentication (optional)The Atmel ATSHA204 is a member of the Atmel CryptoAuthentication family of high-security hardwareauthentication devices.

It’s flexible command set allows use in a number of applications, such as Anti-counterfeiting, Protection forFirmware or Media, Session Key Exchange, Secure Data Storage or User Password Checking.

Device slave address byte: 0xC9.

Figure 3-22. CryptoAuthentication Schematic

(SCL)(SDA)

ADDR:0X48

PA24PA25PA26

VDDMAIN VDDMAIN

R550R

R54 10K

C65

100nFU6

AT30TS75

A07

A16

A25 ALERT

3

SDA1SCL2

GND4

VCC8

R534.7K/DNP

Do N

ot P

opul

ate

ADDR: 0XC9

(SCL)(SDA)

PA25PA24

VDDMAIN C63

100nF

U5

ATSHA204-SH

NC11

NC22

NC33

GND4

SDA5 SCL6

NC47

VCC8

Do Not Populate

DNP


21

3.11 LEDs and Buttons

The SAM4C32-EK is equipped with two user push buttons and three LEDs.

3.11.1 Discrete LEDs

Indicators on the main board include three discrete LEDs:

Blue LED connected to a PIO

Amber LED connected to a PWM output

Green LED connected to a PWM output

Figure 3-23. Debug Discrete LED Schematic

3.11.2 Push Buttons

The EK board is equipped with four system push buttons and two user push buttons. The push buttons consist ofmomentary push-button switches mounted directly to the board. A depressed switch causes a low (zero) to appearat the associated input pin.

System push buttons:

NRST (Reset, perform system reset)

FWPU (Force Wake-Up)

TMP0 (Tamper)

TMP2 (Tamper)

User push buttons:

SCROLL_UP

SCROLL_DOWN

Figure 3-24. Push Buttons Schematic

The user can select the pull-up level for the Tamper TMP0 pin by changing the position of JP25. Selecting PB1instead of VDDBU provides dynamic tampering synchronized with RTCOUT (PB1) pin. This position allows adiminution of the power consumption when the button is pressed (divided by the Duty Cycle applied on RTCOUTOutput signal).

It is possible to use the TMP2 push button as an additional Tamper input. To use this feature, the user must useJTAG in 2-wire mode (SWIO and SWD) due to the loss of the TDO pin. In this case, TMP2 is pull-up at RTCOUTLevel (PB1 pin) and can be managed dynamically synchronized with the RTCOUT pin.

LED

PWM

PWM PC7

PC8

PC6

VDDIN

D9

AMBER

R125470Ω

R126470Ω

D10

GREEN

D8

BLUE

R127470Ω

USER INTERFACE

NRST

FWUP

TMP0

NRST

VDDBU VDDIN

VDDBU

FWUP

TMP0

JP25

1

2

3

BP21

423

R124

1.5K

BP31

423

BP11

423

R123

100K

R147

100K

PB1

Scroll down

Scroll up

PA20

PA19

BP41

423

BP51

423

TMP2

PB1

PB27

PB1

BP61

423

R149100K

R148 33R

JP24

(TDO) 12

3

R132 0R

R133 0R


3.12 Miscellaneous I/O

This board is equipped with additional I/O connectors which allow the measurements of specific points as well asthe connection of an additional extension board.

Figure 3-25. PIO A and PIO B Extension I/O Connectors Schematic

3.13 Metrology Core Serial Interface

This board includes an additional connector which allows connecting to an external board through the SPI 1 port.

Figure 3-26. Connector Schematic

PIOA PIOB

R128 to R130 shouldbe close to SAM4C32.

PB0

PB2PB1

PB5PB6

PB4PB3

PB7

PB13PB12

PB8PB9

PB14

PA3

PB10PB11

PA23

PA1PA2

PA4

PA17PA16

PA20PA21

PA19PA18

PA28

PA24PA25

PA22

PA26PA27

PA29

PA31PA30

PA15

PA0

PA10PA11

PA9

PA13PA14

PA12

PB15

PB16PB17PB18PB19PB20PB21PB22PB23PB24PB25PB26PB27PB28PB29PB30PB31

PA5PA6PA7PA8

VDDMAINVDDMAIN VDDMAIN VDDMAIN

VDDMAIN5V VDDMAIN5V JP221

2

3

J101 23 45 67 89 10

11 1213151719

14161820

21 2223 2425 2627 2829 3031 3233 3435 3637 3839 40

R129 33RR128 0R

R130 33R

J91 23 45 67 89 10

11 1213151719

14161820

21 2223 2425 2627 2829 3031 3233 3435 3637 3839 40

R131 33R

JP211

2

3

PIOsense

(TXD1)(RXD1)

(MCLK)PA29

PC0PC2PC1

PC8

PC3PC4PC5 PC7

PC6

VDDMAIN

R144 27R

R142 0RR139 27R

J12J121 23 45 67 89 10

11 1213 14

R141 0R

R145 27R

JP23

R140 27RR143 27R


23

3.14 PIO Usage

3.14.1 PIO Port A Pin Assignments

Table 3-8. PIO Port A Pin Assignments

I/O Line

PeripheralExtraFunction

SystemFunction Reset State UsingA B C

PA0 RTS3 PCK2 A10 COM0 WKUP5

PIO, I, PU, ST

LCD Com

PA1 CTS3 NCS1 A9 COM1 – LCD Com

PA2 SCK3 NCS2 A8 COM2 – LCD Com

PA3 RXD3 NCS3 A7 COM3 WKUP6 LCD Com

PA4 TXD3 – A6 COM4/AD1 – Analog input

PA5 SPI0_NPCS0 – A5 COM5/AD2 – SerFlash / NPCS

PA6 SPI0_MISO – A4 SEG0 – ZigBee

PA7 SPI0_MOSI – A3 SEG1 – ZigBee

PA8 SPI0_SPCK – A2 SEG2 – ZigBee

PA9 RXD2 – A1 SEG3 WKUP2 RS232/485

PA10 TXD2 – A0/NBS0 SEG4 – RS232/485

PA11 RXD1 – A23 SEG5 WKUP9 ZigBee / IRQ0

PA12 TXD1 – A22-NCLE SEG6/AD0 – ZigBee/IRQ1/IRTC

PA13 SCK2 TIOA0 A21-NALE SEG7 – Backlight On/off

PA14 RTS2 TIOB0 A20 SEG8 WKUP3 RS232/485

PA15 CTS2 TIOA4 A19 SEG9 – RS232/485

PA16 SCK1 TIOB4 A18 SEG10 – MuxLCD

PA17 RTS1 TCLK4 A17 SEG11 WKUP7 ZigBee / RST

PA18 CTS1 TIOA5 A16 SEG12 – ZigBee / SLPTR

PA19 RTS0 TCLK5 A15 SEG13 WKUP4 PB ScrUp

PA20 CTS0 TIOB5 A14 SEG14 – PB ScrDwn

PA21 SPI0_NPCS1 – A13 SEG15 – ZigBee / NPCS

PA22 SPI0_NPCS2 – A12 SEG16 – ZigBit / IRQ

PA23 SPI0_NPCS3 – A11 SEG17 – –

PA24 TWD0 – A10 SEG18 WKUP1 TWI / ZigBit

PA25 TWCK0 – A9 SEG19 – TWI / ZigBit

PA26 CTS4 – A8 SEG20 – –

PA27 – – NCS0 SEG21 – –

PA28 – – NRD SEG22 – –

PA29 PCK1 – NWAIT SEG23 – – MCLK (ATSense)

PA30 PCK1 – A15 – XOUT XOUT –

PA31 PCK0 – A14 – XIN XIN –


3.14.2 PIO Port B Pin Assignments

Table 3-9. PIO Port B Pin Assignments

I/O Line



PB0 TWD1 – – – TDI

JTAG, I, ST

–

PB1 TWCK1 – – RTCOUT0 TDO/TRACESWO –

PB2 – – – – TMS/SWDIO –

PB3 – – – – TCK/SWCLK –

PB4 URXD0 TCLK0 A17 – WKUP8

PIO, I, PU, ST

DBGU

PB5 UTXD0 – A16 – – DBGU

PB6 – – D0 SEG24 – –

PB7 TIOA1 – D1 SEG25 – –

PB8 TIOB1 – D2 SEG26 – –

PB9 TCLK1 – D3 SEG27 – –

PB10 TIOA2 – D4 SEG28 – –

PB11 TIOB2 – D5 SEG29 – –

PB12 TCLK2 – D6 SEG30 – –

PB13 PCK0 – D7 SEG31/AD3 – –

PB14 – – NWR0–NWE SEG32 – –

PB15 – –NWR1–NBS1

SEG33 – ZigBit / SLPTR

PB16 RXD0 – D8 SEG34 WKUP10

PIO, I, PD, ST

ZigBit / RXD

PB17 TXD0 – D9 SEG35 – ZigBit / TXD

PB18 SCK0 PCK2 D10 SEG36 – ZigBit / RST

PB19 RXD4 – D11 SEG37 – ZigBit / MOSI

PB20 TXD4 – D12 SEG38 – ZigBit / MISO

PB21 SCK4 NANDOE D13 SEG39 WKUP11 ZigBit / SPCK

PB22 RTS4 NANDWE D14 SEG40 –

PIO, I, PD, ST

ZigBit / NPCS

PB23 ADTRG – D15 SEG41/AD4 – –

PB24 TIOA3 – A7 SEG42 – –

PB25 TIOB3 – A6 SEG43 – –

PB26 TCLK3 – A5 SEG44 WKUP13 –

PB27 – – A4 SEG45 WKUP14 –

PB28 – – A3 SEG46 WKUP15 –

PB29 – – A2 SEG47 – –

PB30 – – A1 SEG48 – –

PB31 – – A0–NBS0 SEG49/AD5 – –


25

3.14.3 PIO Port C Pin Assignments

3.15 Connectors

3.15.1 Power Supply Connector

The SAM4C32-EK is equipped with an ACDC wall adapter that can be connected to a J2 connector (describedbelow). The maximum input voltage that can be applied on this connector must be lower than 6V.

Figure 3-27. Power Supply Connector

Table 3-10. PIO Port C Pin Assignments

I/O Line



PC0 UTXD1 PWM0 – – – – –

PC1 URXD1 PWM1 WKUP12 – – – –

PC2 SPI1_NPCS0 PWM2 – – – – –

PC3 SPI1_MISO PWM3 – – – – –

PC4 SPI1_MOSI – – – – – –

PC5 SPI1_SPCK – – – – – –

PC6 PWM0 SPI1_NPCS1 – – – – LED Green

PC7 PWM1 SPI1_NPCS2 – – – – LED Amber

PC8 PWM2 SPI1_NPCS3 – – – – LED Blue

PC9 PWM3 – – – ERASE – Jumper Erase

Table 3-11. Power Supply Connector Pinout

Pin Signal Name Description

1 +5V Wall Adapter Main Voltage

2 NC Floating Point

3 GND Ground

3

2

1


3.15.2 JTAG/ICE Connector

Figure 3-28. JTAG/ICE Connector

Table 3-12. JTAG/ICE Connector Pinout


4, 6, 8, 10, 12,14, 16, 18, 20

GND Common ground

1 VTref 3.3V power

This is the target reference voltage. It is used to check if the target has power, to create the logic-level reference for the input comparators, and to control the output logic levels to the target. It is normally fed from VDD on the target board and must not have a series resistor.

2 Vsupply 3.3V powerThis pin is not connected in SAM-ICE. It is reserved for compatibility with other equipment. Connect to VDD or leave open in target system.

3 nTRST TARGET RESET

JTAG Reset (active-low output signal that resets the target). Output from SAM-ICE to the Reset signal on the target JTAG port. Typically connected to nTRST on the target CPU. This pin is normally pulled HIGH on the target to avoid unintentional resets when there is no connection.

5 TDI TEST DATA INPUTJTAG data input of target CPU (serial data output line, sampled on the rising edge of the TCK signal). It is recommended that this pin is pulled to a defined state on the target board. Typically connected to TDI on target CPU.

7 TMS TEST MODE SELECTJTAG mode set input of target CPU. This pin should be pulled up on the target. Typically connected to TMS on target CPU. Output signal that sequences the target's JTAG state machine, sampled on the rising edge of the TCK signal.

9 TCK TEST CLOCKJTAG clock signal to target CPU (output timing signal, for synchronizing test logic and control register access). It is recommended that this pin is pulled to a defined state on the target board. Typically connected to TCK on target CPU.

11 RTCK

Input Return test clock signal from the target.

Some targets must synchronize the JTAG inputs to internal clocks. To assist in meeting this requirement, a returned and retimed TCK can be used to dynamically control the TCK rate. SAM-ICE supports adaptive clocking which waits for TCK changes to be echoed correctly before making further changes. Connect to RTCK if available, otherwise to GND

13 TDO JTAG TEST DATA OUTPUTJTAG data output from target CPU (serial data input from the target). Typically connected to TDO on target CPU.

15 nSRST RESET Active-low reset signal. Target CPU reset signal

17 RFU This pin is not connected in SAM-ICE

19 RFU This pin is not connected in SAM-ICE


27

3.15.3 RS232 Connector

Figure 3-29. RS232 Connector

Table 3-13. RS232 Connector Pinout


1, 4, 6, 9 NC Not Connected

2 RXD RS232 Serial Data Output Signal

3 TXD RS232 Serial Data Input Signal

5 GND Common Ground

7 RTS Request To Send - Not Used

8 CTS Clear To Send - Not Used


3.15.4 UART/USB Micro AB

Figure 3-30. Micro AB USB Connector

Table 3-14. Micro AB USB Connector Pinout


1 VBUS 5V Power

2 DM Data Minus

3 DP Data Plus

4 ID On The Go Identification

5 GND Common Ground

6, 7, 8, 9 Shield Mechanical Pins

1 2 3 4 5

6-7 8-9


29

3.15.5 RZ600 IEEE 802.15.4 Wireless Transceiver Socket J12

Figure 3-31. Socket J12

Table 3-15. Socket Pinout

Function Signal Name Pin Pin Signal Name Function

Reset /RST 1 2 IRQ0 Interrupt Request

Interrupt Request IRQ1 3 4 SLP_TR SLP_TR

SPI Chip Select /CS 5 6 MOSI SPI MOSI

SPI MISO MISO 7 8 SCLK SPI CLK

Power Supply GND 9 10 VCC VCC


3.15.6 I/O Expansion Port

Figure 3-32. Expansion Port J9 & J10

Table 3-16. Expansion Port J9 Pinout


3.3V or 5V – 1 2 – 3.3V or 5V

Ground GND 3 4 GND Ground

– PB0 5 6 PB16 –

– PB1 7 8 PB17 –

– PB2 9 10 PB18 –

– PB3 11 12 PB19 –

– PB4 13 14 PB20 –

– PB5 15 16 PB21 –

– PB6 17 18 PB22 –

– PB7 19 20 PB23 –

– PB8 21 22 PB24 –

– PB9 23 24 PB25 –

– PB10 25 26 PB26 –

– PB11 27 28 PB27 –

– PB12 29 30 PB28 –

– PB13 31 32 PB29 –

– PB14 33 34 PB30 –

– PB15 35 36 PB31 –


Power Supply VDDMAIN 39 40 VDDMAIN Power Supply



3.3V or 5V – 1 2 – 3.3V or 5V


– PA0 5 6 PA16 –

– PA1 7 8 PA17 –

– PA2 9 10 PA18 –


31

Figure 3-33. Expansion Port J12

– PA3 11 12 PA19 –

– PA4 13 14 PA20 –

– PA5 15 16 PA21 –

– PA6 17 18 PA22 –

– PA7 19 20 PA23 –

– PA8 21 22 PA24 –

– PA9 23 24 PA25 –

– PA10 25 26 PA26 –

– PA11 27 28 PA27 –

– PA12 29 30 PA28 –

– PA13 31 32 PA29 –

– PA14 33 34 PA30 –

– PA15 35 36 PA31 –


Power Supply VDDMAIN 39 40 VDDMAIN Power Supply

Table 3-17. Expansion Port J10 Pinout (Continued)



PIO Power Pin Pin Power PIO

– 3.3V 1 2 3.3V –

PC2 – 3 4 – PC0

PC3 – 5 6 – PC1

PC4 – 7 8 – PC6

PC5 – 9 10 – PC7

PC8 – 11 12 – PA29

– GND 13 14 GND –


4. SAM4C32-EK Firmware Demonstration

4.1 SAM4C32-EK Default Application

The SAM4C32-EK is delivered with a preprogrammed default application in SAM4C32 Flash memory. Thisapplication implements SAM4C32 embedded peripherals and external (on-board) peripherals as detailed in thetable below.

After the first power-up without the backup battery, the time (hour and minute) of the RTC can be configured. TheHour and Minute settings are entered using the following push buttons:

BP4 (SCROLL_UP)—sets the Hour (24H mode entries must be made)

BP5 (SCROLL_DOWN)—sets the Minute

BP6 (TMP2)—saves the Hour and Minute settings

Once the time settings have been saved, BP4 (SCROLL_UP) can be used to toggle the Hour display between 12Hor 24H mode.

Note: RTC time configuration can be skipped by pressing BP6.

Once the hour and minute have been configured, the main application on core 0 runs in an infinite loop, repeatingthe following steps:

Every second, the time is displayed with colon (:) icon blinking

Every fifteen (15) seconds, the VDDBU pin voltage is measured and displayed (1)

Every thirty (30) seconds, the temperature (using the AT30TS75) is measured and displayed in °C and in °F.

Note: 1. On the SAM4C32-EK, the voltage measured is the VDDIO voltage minus the forward voltage of the diode in the BAT54C (D4).

At startup, the main application configures the core 1 subsystem to run a CoreMark algorithm from the core 1SRAM memories (SRAM1 and SRAM2). Once the CoreMark is finished, the result of the CoreMark (number ofCoreMark/MHz) is passed to the main application using the inter-processor communication embedded in theSAM4C32. Once the result is retrieved by the main application, the result of the CoreMark is displayed and theCoreMark algorithm running on core 1 is restarted. An ammeter connected either on JP12 (VDDIN) or on JP6(VDDCORE) can measure the active current consumption of both cores.

Table 4-1. SAM4C32 Embedded Peripherals

Peripheral Connected to External (on-board) Peripheral

Real-Time Clock (RTC) —

Anti-Tamper BP3 Push Button

Two-wire Interface Temperature Sensor AT30TS75

Segmented LCD Custom Atmel Display

SAM4C32 Core 1 —

10-bit ADC Internal ADC channel connected to Battery Backup Power Rail (VDDBU)


33

4.2 Measuring the Backup Mode Current Consumption on VDDBU

The SAM4C32 has an ultra-low-power mode RTC and Supply controller allowing less than 1µA (typical) onVDDBU, with the following functions/peripherals configuration:

32.768 kHz Crystal Oscillator enabled

POR backup on VDDBU disabled

RTC running

RTT enabled on 1 Hz mode

Force wake-up (FWUP) enabled

Anti-tamper Input (TMP0) enabled

To measure the current consumption on VDDBU when in backup mode, JP9 (Shutdown control) must be openedand an ammeter connected on JP8 (VDDBU) as described in the following procedure:

1. Power off the board using SW1

2. Insert the 3V lithium battery provided in the battery holder

3. Place an ammeter (with sufficient capacity to measure current lower than 1µA) on JP8

4. Power on the board using SW1

5. (optional) Set the RTC as described above

6. Press the push button BP5 (SCROLL_DOWN) to place the board in low-power mode

Before shutdown, the following messages are displayed on the LCD:

“ENTERING BACKUP MODE”

“PRESS FWUP BP1 TO WAKE UP”

“USE BP3 TO GENERATE TAMPER EVENTS”

Blinking “BYE”

At this point, the current consumption on the ammeter should be less than 1µA @ 25°C @ 3V.

Once in backup mode, the anti-tamper pin 0 (TMP0) is enabled. The BP3 (TMP0) push button can be used togenerate tamper events before waking up the board. Tamper events are registered without waking up the board.Up to 15 tamper events can be registered. To wake up the board, press BP1 (FWUP). Upon start-up, the numberof tamper events and time-stamping of the tamper events are displayed on the LCD.

5. SAM4C32-EK Design Files

5.1 SAM4C32-EK Schematics

This section contains the schematics for the SAM4C32-EK (Rev. A).

Main page with Block Diagram

Information regarding the design

SAM4C32 Microcontroller and its crystals, decoupling capacitors and analog inputs

Power Supplies Distribution

RS232, RS485 and DBGU Interfaces, TWI Memories, and Temperature Sensor

Custom Glass LCD and ZigBee, XPRO interfaces

User Buttons, I/O expansion headers and JTAG Interfaces


Figure 5-1. SAM4C32-EK Schematic (Page 1 of 7)

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SC

ALE

1/1

RE

V.

SH

EE

T

This

agr

eem

ent i

s ou

r pro

perty

. Rep

rodu

ctio

n an

d pu

blic

atio

n w

ithou

t our

writ

ten

auth

oriz

atio

n sh

all e

xpos

e of

fend

er to

lega

l pro

ceed

ings

.

AIN

IT.

2 7A

06-J

an-1

4JH

RC

r14

-Feb

-14

SA

M4C

32-E

K

INF

O

RE

VD

AT

EM

OD

IF.

DE

S.

DA

TE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

This

agr

eem

ent i

s ou

r pro

perty

. Rep

rodu

ctio

n an

d pu

blic

atio

n w

ithou

t our

writ

ten

auth

oriz

atio

n sh

all e

xpos

e of

fend

er to

lega

l pro

ceed

ings

.

AIN

IT.

2 7A

06-J

an-1

4JH

RC

r14

-Feb

-14

SA

M4C

32-E

K

INF

O



5 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

A

TM

EL

C

ort

ex-M

4 P

roce

sso

r S

AM

4C32

CA

-AU

LQ

FP

100

LQ

FP

100

SO

CK

ET

(ER

AS

E)

(Ana

log

inpu

t)

R1.R2 should close to SAM4C.

Decouple Cap should close to SAM4C.

+3V3

+3V

ADVREF

Do Not Populate

Do Not Populate

Do Not Populate

Do Not Populate

PA0PA1PA2PA3PA4PA5PA6PA7PA8PA9PA10PA11PA12PA13PA14PA15PA16PA17PA18PA19PA20PA21PA22PA23PA24PA25PA26PA27PA28PA29

PB

4P

B5

PB

6P

B7

PB

8P

B9

PB

10P

B11

PB

12P

B13

PB

14P

B15

PB

16P

B17

PB

18P

B19

PB

20P

B21

PB

22P

B23

PB

24P

B25

PB

26P

B27

PB

28P

B29

PB

30P

B31

PC

0P

C1

PC

2P

C3

PC

4P

C5

PC

6P

C7

PC

8

PB

0P

B1

PB

2P

B3

FW

UP

PC

9

JTA

GS

EL

SH

DN

TS

T

NR

ST

XO

UT

32X

IN32

PC

5

PB

10

PA6

PB

25

XIN

PA23

PC

6

PB

11

PA7

PB

26

PB

0

PA24

XO

UT

PA8

PB

12

PC

7

PB

27

PA25

PA9

PB

13

PB

1

PC

8

PB

28

PA26

PA10

PA0

PB

14

PB

2

PB

29

PA27

PA11

PB

15

PB

3

PA28

PB

30

PA12

PB

16

FW

UP

PA29

PA13

PB

31

PB

17

PC

9

PA14

PB

4

PC

0

PB

18

PA15

JTA

GS

EL

PA1

PB

19

PA16

SH

DN

PA2

PB

20

PA17

PB

5

TM

P0

PC

1

PA3

PA18

PB

21

PB

6

TS

T

PC

2

PA19

PB

7

PB

22

NR

ST

PC

3

PA20

PB

8

PB

23

PA4

XO

UT

32

PA21

PC

4

PB

9

PB

24

PA5

XIN

32

PA22

XIN

32

XO

UT

32

PC

9

TS

T

JTA

GS

EL

XIN

TM

P0

PA

31

PA

30

XIN

XO

UT

XO

UT

XIN

PA

4

VD

DIN

VD

DO

UT

VD

DC

OR

EV

DD

PLL

VD

DLC

DV

DD

IOV

DD

BU

VD

DR

EF

VD

DIN

VD

DO

UT

VD

DC

OR

EV

DD

PLL

VD

DLC

DV

DD

IOV

DD

BU

VD

DR

EF

VD

DIO

VD

DO

UT

VD

DIN

VD

DIO

VD

DC

OR

E

VD

DLC

DV

DD

BU

VD

DIN

VD

DIN

VD

DR

EF

5V

PA

[0..3

1]{4

,5,6

,7}

PB

[0..3

1]{5

,6,7

}

PC

[0..9

]{5

,6,7

}

NR

ST

{4,7

}

SH

DN

{4}

FW

UP

{7}

TM

P0

{7}

RT

C_3

2{4

}

RE

VD

AT

EM

OD

IF.

DE

S.

DA

TE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

This

agr

eem

ent i

s ou

r pro

perty

. Rep

rodu

ctio

n an

d pu

blic

atio

n w

ithou

t our

writ

ten

auth

oriz

atio

n sh

all e

xpos

e of

fend

er to

lega

l pro

ceed

ings

.

AIN

IT.

3 7A

06-J

an-1

4JH

RC

r14

-Feb

-14

SA

M4C

32-E

K

SA

M4C

32

RE

VD

AT

EM

OD

IF.

DE

S.

DA

TE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

This

agr

eem

ent i

s ou

r pro

perty

. Rep

rodu

ctio

n an

d pu

blic

atio

n w

ithou

t our

writ

ten

auth

oriz

atio

n sh

all e

xpos

e of

fend

er to

lega

l pro

ceed

ings

.

AIN

IT.

3 7A

06-J

an-1

4JH

RC

r14

-Feb

-14

SA

M4C

32-E

K

SA

M4C

32

RE

VD

AT

EM

OD

IF.

DE

S.

DA

TE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

This

agr

eem

ent i

s ou

r pro

perty

. Rep

rodu

ctio

n an

d pu

blic

atio

n w

ithou

t our

writ

ten

auth

oriz

atio

n sh

all e

xpos

e of

fend

er to

lega

l pro

ceed

ings

.

AIN

IT.

3 7A

06-J

an-1

4JH

RC

r14

-Feb

-14

SA

M4C

32-E

K

SA

M4C

32

JP1

R8

2.2R

C6

2.2u

F

C7

100n

F

C8

100n

F

D1

LM40

40A

IM3X

-3.0

/NO

PB

C25 22

uF

C16

100n

F

C10

100n

F

C9

100n

F

R2

0R/D

NP

R7

RC

0603

JR-0

73K

3L

C22 2.

2uF

R11

49R

9

C20

18pF

R10

0R/D

NP

Y2

8MH

z

1

2 3

4

C27

10nF

R4

0R

JP2

C15

100n

F

C14

100n

F

C11

2.2u

F

+C26

10uF

J1S

MB

DN

P

Y1

32.7

68 k

Hz

C21

10nF

TP

3

C3

100n

F

C13

10uF

TP

1

C2

10uF

C19

18pF

MN

2 DN

P

PB

61

PB

72

PB

183

GND_14

PB

195

PB

86

PB

227

PB

308

PB

259

PB

2410

VDDCORE_111

PB

2912

PB

913

PB

1014

PB

1115

PB

1216

PB

1417

PB

1518

PA2619 PA2520 PA2421

PA2022 PA1923 PA1824

PA825

TD

I/PB

026

TC

K/S

WC

LK/P

B3

27T

MS

/SW

DIO

/PB

228

ER

AS

E/P

C9

29

TD

O/T

RA

CE

SW

O/P

B1

30P

C1

31

PC

632

VDDIO_133

VDDBU34

FW

UP

35

JTA

GS

EL

36

SH

DN

37

TS

T38

TM

P0

39

XIN

3240

XO

UT

3241

GND_242

PB

443

VDDCORE_244

PB

545

PC

746

PC

047

NR

ST

48

VDDIO_249

PA

30/X

OU

T50

PA

31/X

IN51

GND_352

VDDPLL53

PC

854

PC

555

PC

456

PC

357

PC

258

PA2959 PA2860 PA2761

PA662

VDDCORE_363

PA364

PA2165

PA2266

PA2367

PA968

PA1069

PA1170

PA1371

PA1472

PA1573

PA1674

PA1775

VDDIO_376

AD

VR

EF

77

GND_478

PB

31/A

D5

79

PB

23/A

D4

80

PB

13/A

D3

81

PA5/AD282 PA4/AD183

PA12/AD084

VDDIN85

VDDOUT86

PB

2187

PB

2088

VDDCORE_489

PA090

PB

2791

VDDLCD92

PB

2693

PB

2894

PB

1695

PA196

PB

1797

PA798

VDDIO_499

PA2100

R9

0R

C17

100n

F

R5

0R

R1

0R/D

NP

R6

0R

C4

2.2u

F

L1 56uH

C1

18pF

R3

0R/D

NP

C24

18pF

JP4

C5

100n

F

C12

100n

F

C23 10

0nF

C28

100n

F

C18

100n

F

MN

1

PB

61

PB

72

PB

183

GND_14

PB

195

PB

86

PB

227

PB

308

PB

259

PB

2410

VDDCORE_111

PB

2912

PB

913

PB

1014

PB

1115

PB

1216

PB

1417

PB

1518

PA2619 PA2520 PA2421

PA2022 PA1923 PA1824

PA825

TD

I/PB

026

TC

K/S

WC

LK/P

B3

27T

MS

/SW

DIO

/PB

228

ER

AS

E/P

C9

29

TD

O/T

RA

CE

SW

O/P

B1

30P

C1

31

PC

632

VDDIO_133

VDDBU34

FW

UP

35

JTA

GS

EL

36

SH

DN

37

TS

T38

TM

P0

39

XIN

3240

XO

UT

3241

GND_242

PB

443

VDDCORE_244

PB

545

PC

746

PC

047

NR

ST

48

VDDIO_249

PA

30/X

OU

T50

PA

31/X

IN51

GND_352

VDDPLL53

PC

854

PC

555

PC

456

PC

357

PC

258

PA2959 PA2860 PA2761

PA662

VDDCORE_363

PA364

PA2165

PA2266

PA2367

PA968

PA1069

PA1170

PA1371

PA1472

PA1573

PA1674

PA1775

VDDIO_376

AD

VR

EF

77

GND_478

PB

31/A

D5

79

PB

23/A

D4

80

PB

13/A

D3

81

PA5/AD282 PA4/AD183

PA12/AD084

VDDIN85

VDDOUT86

PB

2187

PB

2088

VDDCORE_489

PA090

PB

2791

VDDLCD92

PB

2693

PB

2894

PB

1695

PA196

PB

1797

PA798

VDDIO_499

PA2100

VR

110

K

3 1

2

TP

2

JP3

JP5

1

2

3


37


5 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

Vout = 0.8 x (1 + Rtop/Rbottom)

3V3 POWER

FO

RC

EP

OW

ER

ON

VDDBU

PO

WE

R L

ED

close to SAM4C

Do Not Populate

Do Not Populate

FO

RC

E_O

N

FO

RC

E_O

N

VB

AT

T

PA

25P

A24

PA

12

VB

AT

T

VD

DM

AIN

3V3

5V

5V

5V3V

3

3V3

VD

DIN

VD

DB

U

US

B5V

VD

DIN

VD

DO

UT

VD

DC

OR

E

VD

DP

LL

VD

DM

AIN

VD

DIO

SH

DN

{3}

PA

[0..3

1]{3

,5,6

,7}

RT

C_3

2{3

}

NR

ST

{3,7

}

RE

VD

AT

EM

OD

IF.

DE

S.

DA

TE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

This

agr

eem

ent i

s ou

r pro

perty

. Rep

rodu

ctio

n an

d pu

blic

atio

n w

ithou

t our

writ

ten

auth

oriz

atio

n sh

all e

xpos

e of

fend

er to

lega

l pro

ceed

ings

.

AIN

IT.

4 7A

06-J

an-1

4JH

RC

r14

-Feb

-14

SA

M4C

32-E

K

PO

WE

R

RE

VD

AT

EM

OD

IF.

DE

S.

DA

TE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

This

agr

eem

ent i

s ou

r pro

perty

. Rep

rodu

ctio

n an

d pu

blic

atio

n w

ithou

t our

writ

ten

auth

oriz

atio

n sh

all e

xpos

e of

fend

er to

lega

l pro

ceed

ings

.

AIN

IT.

4 7A

06-J

an-1

4JH

RC

r14

-Feb

-14

SA

M4C

32-E

K

PO

WE

R

RE

VD

AT

EM

OD

IF.

DE

S.

DA

TE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

This

agr

eem

ent i

s ou

r pro

perty

. Rep

rodu

ctio

n an

d pu

blic

atio

n w

ithou

t our

writ

ten

auth

oriz

atio

n sh

all e

xpos

e of

fend

er to

lega

l pro

ceed

ings

.

AIN

IT.

4 7A

06-J

an-1

4JH

RC

r14

-Feb

-14

SA

M4C

32-E

K

PO

WE

R

TP

16

TP

7

C34 22

uF

Q1

SI1

563E

DH

-T1-

E3

13

2

45

6

R15

100K

C43

15pF

BT

1

R21

10K

/DN

P

TP

15

JP6

L2

56uH

TP

10

TP

14

JP10

C39

10uF

C38

1uF

TP

4

TP

6

C42

100n

F

C41

1uF

TP

17

JP13

C29

100n

F

R13

2.2R

R14

100K

C46

100n

FD

NP

C40

2.2u

F

D5

RE

D

SW

18S

S10

12-Z

312

TP

9T

P12

C32

2.2u

F/D

NP

R16

47K

1%

JP12

R12

1.5K

TP

13

U2

RT

9018

A

PG

OO

D1

EN

2

VIN

3

VD

D4

NC

5V

OU

T6

AD

J7

GN

D8

VSS9

C33

100n

F

U1

ZE

N05

6V13

0A24

LS1

2

3

TP

8

C35

10nF

TP

11

C31 10

uF

R20

10k

R22

10K

/DN

P

R18

15K

1%

C36 10

0nF

JP9

C45

100n

FD

NP

D4

BA

T54

C

321

JP8

JP7

J2 DC

630-

20D

011 2

3

R19

10k

C44 1u

F

C30

10uF

D2

NS

R03

20M

W2T

1G

TP

5

D3

NS

R03

20M

W2T

1G

R17

470R

C37 10

uF

U3

DS

3231

SN

DN

P

32K

1

VCC2

nIN

T3

NR

ST

4

NC

15

NC

26

NC

37

NC

48

NC

59

NC

610

NC

711

NC

812

GND13V

Bat

t14

SD

A15

SC

L16

JP11



5 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

Mal

eS

trai

gh

t A

ng

le

ADDR:0X50

US

AR

T2

(RX

D2)

(TX

D2)

(RT

S2)

(CT

S2)

(RX

D1)

(TX

D1)

UA

RT

1

DB

GU

/US

B B

rig

e

(RX

D2)

(TX

D2)

(RT

S2)

(CT

S2)

RS

485

ADDR:0XC9

(SC

L)

(SD

A)

(SC

L)

(SD

A)

(SC

L)

(SD

A)

ADDR:0X48

(RX

D0)

(TX

D0)

Do Not Populate

Do Not Populate

Do Not Populate

Do Not Populate

Do Not Populate

Do Not Populate

Do Not Populate

Do Not Populate

PA

25P

A24

PA

15P

A14

PA

9_23

2P

A10

PC

1P

C0

PB

4P

B5

PA

15

PA

9_48

5

PA

10

PA

14

PA

9

PA

9_23

2

PA

9_48

5

PA

24P

A25

PA

25

PA

26

PA

24

VD

DM

AIN

VD

DM

AIN

VD

DM

AIN

VD

DM

AIN

VD

DM

AIN

VD

DM

AIN

FG

ND

VD

DM

AIN

VD

DM

AIN

VD

DM

AIN

FG

ND

3V3O

UT

3V3O

UT

5V3V

3OU

T

VD

DM

AIN

VD

DM

AIN

VD

DM

AIN

FG

ND

US

B5V

VD

DM

AIN

VD

DM

AIN

VD

DM

AIN

PA

[0..3

1]{3

,4,6

,7}

PB

[0..3

1]{3

,6,7

}

PC

[0..9

]{3

,6,7

}

NR

ST

{3,4

,7}

RE

VD

AT

EM

OD

IF.

DE

S.

DA

TE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

This

agr

eem

ent i

s ou

r pro

perty

. Rep

rodu

ctio

n an

d pu

blic

atio

n w

ithou

t our

writ

ten

auth

oriz

atio

n sh

all e

xpos

e of

fend

er to

lega

l pro

ceed

ings

.

AIN

IT.

5 7A

06-J

an-1

4JH

RC

r14

-Feb

-14

SA

M4C

32-E

K

CO

M&

TW

I&U

SB

RE

VD

AT

EM

OD

IF.

DE

S.

DA

TE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

This

agr

eem

ent i

s ou

r pro

perty

. Rep

rodu

ctio

n an

d pu

blic

atio

n w

ithou

t our

writ

ten

auth

oriz

atio

n sh

all e

xpos

e of

fend

er to

lega

l pro

ceed

ings

.

AIN

IT.

5 7A

06-J

an-1

4JH

RC

r14

-Feb

-14

SA

M4C

32-E

K

CO

M&

TW

I&U

SB

RE

VD

AT

EM

OD

IF.

DE

S.

DA

TE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

This

agr

eem

ent i

s ou

r pro

perty

. Rep

rodu

ctio

n an

d pu

blic

atio

n w

ithou

t our

writ

ten

auth

oriz

atio

n sh

all e

xpos

e of

fend

er to

lega

l pro

ceed

ings

.

AIN

IT.

5 7A

06-J

an-1

4JH

RC

r14

-Feb

-14

SA

M4C

32-E

K

CO

M&

TW

I&U

SB

JP17

J5 HE

10

1 2 3

D6

Gre

en

R32

0R

R28

0R

C51

100n

F

R55

0RU

8

FT

232R

L

TX

D1

DT

R#

2

RT

S#

3

VC

CIO

4

RX

D5

RI#

6

GN

D1

7

NC

18

DS

R#

9

DC

D#

10

CT

S#

11

CB

US

412

CB

US

213

CB

US

314

US

BD

P15

US

BD

M16

3V3O

UT

17

GN

D2

18

RE

SE

T#

19

VC

C20

GN

D3

21

CB

US

122

CB

US

023

NC

224

AG

ND

25

TE

ST

26

OS

CI

27

OS

CO

28

R58

0R

R37

120R

R26

0R

R54

10K

C47

4.7u

F

C65

100n

F

R57

0R

R60

4.7K

/DN

P

R23

10K

R48

0RR

500R

R29

0R

R47

0R

MN

3A

DM

3312

EA

RU

C1+

6

C1-

20

C2+

2

C2-

4

C3+

24

C3-

22

VC

C3

V+

1

V-

21

GN

D23

SD

19

EN

5

T1I

N7

T1O

UT

18

R1I

N15

R1O

UT

10

T2I

N8

T2O

UT

17

R2I

N14

R2O

UT

11

T3I

N9

T3O

UT

16

R3I

N13

R3O

UT

12

R59

0R

C72

100n

F

C62

100n

F

R31

0R

R27

0R

R51

47K

R45

0R

C66

10nF

R42

4.7K

J3

54321 9876

10

11

C49

100n

F

C71

47pF

J41 2 3

R43

47K

/DN

PC

6110

0nF

R64

10K

/DN

P

MN

5A

DM

3312

EA

RU

C1+

6

C1-

20

C2+

2

C2-

4

C3+

24

C3-

22

VC

C3

V+

1

V-

21

GN

D23

SD

19

EN

5

T1I

N7

T1O

UT

18

R1I

N15

R1O

UT

10

T2I

N8

T2O

UT

17

R2I

N14

R2O

UT

11

T3I

N9

T3O

UT

16

R3I

N13

R3O

UT

12

R41

4.7K

JP14

C53

100n

F

U6

AT

30T

S75

-SS

8

A0

7

A1

6

A2

5A

LER

T3

SD

A1

SC

L2

GN

D4

VC

C8

R65

0R

R44

0R

JP16

R46

0R

C64

4.7u

F

C60

100n

F

C48

100n

F

R53

4.7K

/DN

P

R33

0R

C70

47pF

R36

0RR

350R

C50

100n

F

R40

0R/D

NP

C68

100n

F

C63

100n

F

R56

0R

R49

47K

C59

100n

F

R34

47K

R62

470R

MN

4A

DM

3485

AR

Z

RO

1

RE

2

DE

3

DI

4

VC

C8

GN

D5

A6

B7

C57

100n

FC

5810

0nF

C55

4.7u

F

L3 220o

hm a

t 100

MH

z1

2

GDI+D-DV5

J6 US

B M

icro

B

1 2 3 4

7

5

689

10 11

U4

AT

24C

1024

B

A0

1

A1

2

A3

3

GN

D4

SD

A5

SC

L6

WP

7V

CC

8

C54

100n

F

R25

47K

/DN

P

D7

RE

D

R38

3.3K

/DN

P

R39

0R/D

NP

R61

470R

R30

0R

R63

0R

C52

100n

F

R52

0R

JP15

1

2

3

R24

3.3K

/DN

P

C56

100n

F

C67

100n

F

U5

AT

SH

A20

4-S

H-D

A-T

NC

11

NC

22

NC

33

GN

D4

SD

A5

SC

L6

NC

47

VC

C8


39


5 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

(SP

I0_N

PC

S0)

(SP

I0_M

ISO

)(S

PI0

_MO

SI)

(SP

I0_S

PC

K)

Zig

Bee

(ID_D

AT

A)

(AD

C_0

)(A

DC

_2)

(PW

M_0

/RS

T_Z

B)

(PW

M_2

/IRQ

)(T

WI_

SD

A)

(UA

RT

_RX

)(S

PI_

SS

_0)

(SP

I_M

ISO

)

(AD

C_1

)(A

DC

_3)

(PW

M_1

)(P

WM

_3/S

LP_T

R/S

PI_

SS

_1)

(TW

I_S

CL)

(UA

RT

_TX

)(S

PI_

MO

SI)

(SP

I_S

CK

)

XP

RO

U13 and U10 PCB FootPrint

differ by 90 degrees and Stacked.

R100 to R103 Should close to SAM4C

R70 to R73 shoulde close to SAM4C.

(ZB

_IR

Q1)

(ZB

_RS

TN

)(Z

B_I

RQ

0)(Z

B_S

LPT

R)

R84

R83 Should close to SAM4C

Do Not Populate

Do Not Populate

Do Not Populate

PA

7

PA

11

PA

5P

A6

PA

8

PA

12P

A17

PA

18

PB

23P

A12

PA

5P

B18

PA

22P

A24

PB

16P

B22

PB

20

PA

4P

B13

PC

7P

B15

PA

25P

B17

PB

19P

B21

SP

I0_M

ISO

C

SP

I0_N

PC

SC

PA

7S

PI0

_MO

SIC

PA

6S

PI0

_MIS

OC

PA

8S

PI0

_SP

CK

C

SP

I0_M

OS

ICS

PI0

_SP

CK

CSP

I0_N

PC

SC

PA

5

PB9

PA1

PB8

PA2

PB7PB6

PB30PA0

PA3

PB31

PA28PA27PA26PA23

PB11

PA23

PB12

PB6

PB13

PA26

PB14

PA27PA28

PB7PB8PB9PB10

PA

16

PB23PB24PB25PB26PB27PB28PB29

PB

15P

B16

PB

17P

B18

PB

21P

B22

PB

19P

B20

PA

13

VD

DM

AIN

VD

DM

AIN

VD

DIN

VD

DIN

VD

DIN

VD

DIN

VD

DM

AIN

VD

DM

AIN

VD

DM

AIN

PA

[0..3

1]{3

,4,5

,7}

PB

[0..3

1]{3

,5,7

}

PC

[0..9

]{3

,5,7

}

NR

ST

{3,4

,7}

RE

VD

AT

EM

OD

IF.

DE

S.

DA

TE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

This

agr

eem

ent i

s ou

r pro

perty

. Rep

rodu

ctio

n an

d pu

blic

atio

n w

ithou

t our

writ

ten

auth

oriz

atio

n sh

all e

xpos

e of

fend

er to

lega

l pro

ceed

ings

.

AIN

IT.

6 7A

06-J

an-1

4JH

RC

r14

-Feb

-14

SA

M4C

32-E

K

FLA

SH

&Z

B&

LCM

RE

VD

AT

EM

OD

IF.

DE

S.

DA

TE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

This

agr

eem

ent i

s ou

r pro

perty

. Rep

rodu

ctio

n an

d pu

blic

atio

n w

ithou

t our

writ

ten

auth

oriz

atio

n sh

all e

xpos

e of

fend

er to

lega

l pro

ceed

ings

.

AIN

IT.

6 7A

06-J

an-1

4JH

RC

r14

-Feb

-14

SA

M4C

32-E

K

FLA

SH

&Z

B&

LCM

RE

VD

AT

EM

OD

IF.

DE

S.

DA

TE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

This

agr

eem

ent i

s ou

r pro

perty

. Rep

rodu

ctio

n an

d pu

blic

atio

n w

ithou

t our

writ

ten

auth

oriz

atio

n sh

all e

xpos

e of

fend

er to

lega

l pro

ceed

ings

.

AIN

IT.

6 7A

06-J

an-1

4JH

RC

r14

-Feb

-14

SA

M4C

32-E

K

FLA

SH

&Z

B&

LCM

R95 0R

C79

100n

F

R72

33R

R10

547

0K

R12

10R

R110DNP

R92 0R

R67

0R

C74

2.2n

F

R11

70R

U12

74H

C40

66

1Y1

1Z2

2Z3

2Y4

2E5

3E6

GND7

3Y8

3Z9

4Z10

4Y11

4E12

1E13

VCC14

L422

0ohm

at 1

00M

Hz

JP19

R89

0R

R79

0R

R10

30R

R109DNP

R10

44.

7K

R96 0R

L522

0ohm

at 1

00M

Hz

R70

0R

R99

49.9

R 1

%

R82

0R

C83

100n

F

JP20

R87

0RR

880R

U13

AT

45D

B32

1D-S

UD

NP

SI

1

SC

K2

/RE

SE

T3

/CS

4/W

P5

VC

C6

GN

D7

SO

8

R114DNP

R108DNP

Q2

IRLM

L640

1

1

32

R77

0R

JP18

C78

2.2u

F

C75

2.2u

F

R76

0R

R83

0R

R10

133

R

R113DNP

R93 0R

C76

18pF

R85

0R

R66

0RJ7

12

34

56

78

910

C82

100n

F

R68

0R

C77

2.2n

F

R10

6

100R

R10

233

R

R91 0R

R80

0R

C81

10uF

C80

100n

F

R112DNP

R81

0R

R12

00R

R11

50R

R98 0R

R71

33R

R84

0R

R73

33R

R78

0R

R107DNP

R74

0R

U11

74H

C40

66

1Y1

1Z2

2Z3

2Y4

2E5

3E6

GND7

3Y8

3Z9

4Z10

4Y11

4E12

1E13

VCC14

J8H

E14

100

-mil

right

ang

led

mal

e D

NP

DN

P

12

34

56

78

910

1112

1314

1516

1718

1920

U10

AT

25D

F32

1A-S

H-T

/CS

1

SO

2/W

P3

GN

D4

SI

5

SC

K6

/HO

LD7

VC

C8

R97 0R

R11

90R

R69

0R

U9

YM

CC

4236

4AA

AN

DC

L

COM31

COM22

COM13

COM04

SEG_05

SEG_16

SEG_27

SEG_38

SEG_49

SEG_510

SEG_611

SEG_712

SEG_813

SEG_914

SEG_1015

SEG_1116

SEG_1217SEG_1318SEG_1419SEG_1520SEG_1621SEG_1722SEG_1823SEG_1924SEG_2025SEG_2126SEG_2227SEG_2328SEG_2429SEG_2530SEG_2631SEG_2732SEG_2833SEG_2934SEG_3035SEG_3136SEG_3237SEG_3338SEG_3439SEG_3540SEG_3641SEG_3742SEG_3843SEG_3944

LED

+45

LED

-46

R111DNP

R12

20R

R90

0R

R11

60R

R94 0R

C73

18pF

R75

0R

R10

033

R

R86

0R

R11

80R



5 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

LE

D

PWM

PWM

NR

ST

Scr

oll

do

wn

Scr

oll

up

FW

UP

US

ER

INT

ER

FA

CE

TMP

0

PIO

AP

IOB

PIO

sen

se

100k

100k

(NR

ST

)

(TM

S)

(TC

K)

(TD

O)

JTA

G/IC

E IN

TE

RF

AC

E

(TD

I)

100k

100k

100k

R128 to R130should

close to SAM4C

(TX

D1)

(RX

D1)

(MC

LK

)

TMP

2

Do Not Populate

PC

7

PC

8

PC

6

PA

20

PA

19

NR

ST

PB

0

PB

2P

B1

PB

5P

B6

PB

4P

B3

PB

7

PB

13P

B12

PB

8P

B9

PB

14

PA

3

PB

10P

B11

PA

23

PA

1P

A2

PA

4

PA

17P

A16

PA

20P

A21

PA

19P

A18

PA

28

PA

24P

A25

PA

22

PA

26P

A27

PA

29

PA

31P

A30

PA

15

PA

0

PA

10P

A11

PA

9

PA

13P

A14

PA

12

PB

15

PB

16P

B17

PB

18P

B19

PB

20P

B21

PB

22P

B23

PB

24P

B25

PB

26P

B27

PB

28P

B29

PB

30P

B31

PB

0P

B2

NR

ST

PB

3

PA

5P

A6

PA

7P

A8

PA

29P

C7

PC

0P

C2

PC

1

PC

8

PC

3P

C4

PC

5P

C6

PB

1

PB

27

VD

DIN

VD

DB

UV

DD

IN

VD

DM

AIN

VD

DM

AIN

VD

DM

AIN

VD

DM

AIN

VD

DIN

VD

DM

AIN

5VV

DD

MA

IN5V

VD

DM

AIN

VD

DB

UP

A[0

..31]

{3,4

,5,6

}

PB

[0..3

1]{3

,5,6

}

PC

[0..9

]{3

,5,6

}

NR

ST

{3,4

}

FW

UP

{3}

TM

P0

{3}

PB

1{3

,4}

PB

1{3

,4}

RE

VD

AT

EM

OD

IF.

DE

S.

DA

TE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

This

agr

eem

ent i

s ou

r pro

perty

. Rep

rodu

ctio

n an

d pu

blic

atio

n w

ithou

t our

writ

ten

auth

oriz

atio

n sh

all e

xpos

e of

fend

er to

lega

l pro

ceed

ings

.

AIN

IT.

7 7A

06-J

an-1

4JH

RC

r14

-Feb

-14

SA

M4C

32-E

K

INT

ER

FA

CE

&JT

AG

RE

VD

AT

EM

OD

IF.

DE

S.

DA

TE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

This

agr

eem

ent i

s ou

r pro

perty

. Rep

rodu

ctio

n an

d pu

blic

atio

n w

ithou

t our

writ

ten

auth

oriz

atio

n sh

all e

xpos

e of

fend

er to

lega

l pro

ceed

ings

.

AIN

IT.

7 7A

06-J

an-1

4JH

RC

r14

-Feb

-14

SA

M4C

32-E

K

INT

ER

FA

CE

&JT

AG

RE

VD

AT

EM

OD

IF.

DE

S.

DA

TE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

This

agr

eem

ent i

s ou

r pro

perty

. Rep

rodu

ctio

n an

d pu

blic

atio

n w

ithou

t our

writ

ten

auth

oriz

atio

n sh

all e

xpos

e of

fend

er to

lega

l pro

ceed

ings

.

AIN

IT.

7 7A

06-J

an-1

4JH

RC

r14

-Feb

-14

SA

M4C

32-E

K

INT

ER

FA

CE

&JT

AG

R13

8

JP25

1

2

3

R13

20R

R13

7

R14

427

R

JP22

1

2

3

R13

6

J10

12

34

56

78

910

1112

13 15 17 19

14 16 18 2021

2223

2425

2627

2829

3031

3233

3435

3637

3839

40

R12

933

R

J11

12

34

56

78

910

1112

13 15 17 19

14 16 18 20

R13

30R

BP

61

42

3

R13

4

R12

80R

R14

20R

BP

21

42

3

R13

033

R

D9

Yel

low

R13

927

R

R14

910

0K

R12

547

0R

R14

833

R

J91

23

45

67

89

1011

1213 15 17 19

14 16 18 2021

2223

2425

2627

2829

3031

3233

3435

3637

3839

40

JP24

1

2

3

R12

4

1.5K

BP

31

42

3

R12

647

0R

J12

12

34

56

78

910

1112

1314

R13

133

R

R14

10R

BP

11

42

3

R14

60R

/DN

P

JP21

1

2

3

BP

41

42

3

D10

Gre

en

BP

51

42

3

R12

3

100K

R14

7

100K

R14

527

R

JP23

D8

BLU

E

R13

5

R12

747

0R

R14

027

RR

143

27R


41

5.2 SAM4C32-EK Layout

This section contains the layout graphics for the SAM4C32-EK (Rev. A).

Layer 1: Top Layer (Figure 5-8 on page 42)

Layer 2: Ground Layer (Figure 5-9 on page 43)

Layer 3: Internal Signals 1 (Figure 5-10 on page 44)

Layer 4: Internal Signals 2 (Figure 5-11 on page 45)

Layer 5: Power Supplies (Figure 5-12 on page 46)

Layer 6: Bottom Layer (Figure 5-13 on page 47)

TOP Components Placement (Figure 5-14 on page 48)

BOTTOM Components Placement (Figure 5-15 on page 49)

Figure 5-8. SAM4C32-EK Layout: Top Layer


Figure 5-9. SAM4C32-EK Layout: Ground Layer


43

Figure 5-10. SAM4C32-EK Layout: Internal Signals 1 Layer


Figure 5-11. SAM4C32-EK Layout: Internal Signals 2 Layer


45

Figure 5-12. SAM4C32-EK Layout: Power Supplies Layer


Figure 5-13. SAM4C32-EK Layout: Bottom Layer


47

Figure 5-14. SAM4C32-EK Layout: TOP Components Placement


Figure 5-15. SAM4C32-EK Layout: BOTTOM Components Placement


49


6. Revision History

Table 6-1. Revision History

Doc. Rev. Date Changes

A 17-Sep-2014 First issue

XX X XX XARM Connected Logo

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Atmel | SMART SAM4C Series€¦ · Atmel-11253A-ATARM-SAM4C32-EK-UserGuide_17-Sep-14 Introduction The SAM4C32 Evaluation Kit (SAM4C32-EK) enables evaluation capabilities and code