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Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
Cover Sheet
1 61Saturday, March 03, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
Cover Sheet
1 61Saturday, March 03, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
Cover Sheet
1 61Saturday, March 03, 2012
Compal Electronics, Inc.
BOM P/N :
PCB NO :
COMPAL CONFIDENTIAL
MODEL NAME :
Korbel 14 UMA--Non vPRO
REV : 1.0 (A00)
DELL CONFIDENTIAL/PROPRIETARY
@ : Nopop Component
2012-03-03
1@
MB Type
TPM
BOM P/N
TPM DIS 2@
3@
3@
CONN@ : Connector Component
4619F631L01 / L02
GPIO MAP:
43*
HM77 w/o Vpro
QM77 w/ Vpro
PXDP@PCH XDP
46@HDMI LOGO
2@ 4@TCM
QXW00
LA-7901P (DA60000PM00)
E4_VC_GPIO_map_rev_1.1
Ivy/Sandy Bridge + Panther POINT(HM77w/DASH)
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5@
5@
Part Number Description
DA60000PM00 PCB 0LH LA-7901P REV0 M/B UMA
MB PCB
Part Number Description
DA60000PM00 PCB 0LH LA-7901P REV0 M/B UMA
MB PCB
A
A
B
B
C
C
D
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1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
UMA Block Diagram
2 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
UMA Block Diagram
2 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
UMA Block Diagram
2 61Friday, March 02, 2012
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
Intel
Ivy/Sandy Bridge
Processorr
rPGA 989 Socket
P6-11
Option
USB port 5USB port 4
Port1
USB port 6USB port 10
LVDS CONN
on IO board
1.5V DDRIII 1333 /1600 MHz
on Audio board
INTEL
Panther POINT-M
BGA 989 Balls
HM77
P14~21
BANK 0, 1, 2, 3, 4 ,5 ,6 ,7DDRIII-DIMM X4
P12-13
P23
P25
HDMI CONN
For MB/DOCK
Video Switch
PI3V713-AZLEX
P23
On IO board
P37
CRT CONN
Memory BUS
LVDS
DPB
VGA
VGA
Docking VGA
Docking DPC
Docking DPD
PCIE BUS
FDI x8 DMI Gen 2x 4
Full Mini Card
WWAN
1/2 Mini Card
WLAN/WiFi
1/2 Mini Card
PP
Smart card
Express card
Card Reader
OZ600FJ0
Port2Port5Port3Port6
P34P34P34P35P33
P33
USB
USB port 11
USB port 12
USB port 13
USB port 2
SATA port 4
USB3.0 port 3
USB3.0 port 2
USB port 1
USB port 0.9
BROADCOM
BCM5761
Port7
P30~31
P31
Through LVDS Cable
on IO board
on IO board
Docking LAN
P37
SATA 3.0
P41
SDXC/MMCLAN SWITCH
PI3L720
RJ45
BT 4.0
CameraP24
P41
Fingerprint
CONN
E-SATA
USB 3.0 Port
USB 3.0 Port
USB 2.0 PortP36
USB 2.0 PortP36
USB2.0P37
P27
P28
HDD CONN
Port0
Port1ODD CONN
HD Audio I/F
MDCP37
RJ11
HDA Codec
92HD90B2
P29
INT.SpeakerP29
P37
Combo Jack
DAI
Dig. MIC
Through LVDS Cable
32M 4K sector
SP
I Bu
s
W25Q32BVSSIG
32M 4K sector
W25Q32BVSSIG
P14
P14
LPC
Bu
s
P32
China TCM1.2
SSX44B
P32
Discrete TPM
AT97SC3204
SMSC SIO
ECE5048
P39
SMSC KBC
ECE5055
P40P22P22
EMC4021PWM FAN
P41 P41
TP CONN KB CONN
DOCKING
P38
CPU XDP Port
PCH XDP Port
WiFi ON/OFF
DC/DC Interface
LED
FFS LNG3DM
BC BUS
P7
P14
P37
P42
P43
P27
DAI
USB2.0 [3,8]
SATA port 5
DOCK LAN
USB3.0 [4]
Docking DPC
Docking DPD
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
Index and Config.
3 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
Index and Config.
3 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
Index and Config.
3 61Friday, March 02, 2012
Compal Electronics, Inc.
PM TABLE
DELL CONFIDENTIAL/PROPRIETARY
MINI CARD-2 WLAN
PCI EXPRESS
Lane 1
DESTINATION
Lane 2
Lane 3
Lane 4
MINI CARD-1 WWAN
POWER STATES
Lane 5
Lane 6
Express card
MMI
+3.3V_M +3.3V_M
(M-OFF)
ON
ON
ON
ON
OFF
OFF
OFFOFF
+3.3V_SUS
+5V_ALW
+5V_RUN
+3.3V_ALW_PCH
+1.5V_MEM
S0
S3
S5 S4/AC don't exist
ON
powerplane
S5 S4/AC
State
OFFON
ON
ON
ON ON
OFF
OFF
OFF
OFFOFF
+15V_ALW
+3.3V_RTC_LDO
+1.05V_M
Lane 7
Lane 8 None
10/100/1G LOM
+1.05V_M
+1.8V_RUN
+1.05V_RUN_VTT
+3.3V_RUN
+0.75V_DDR_VTT
+1.5V_RUN
+VCC_CORE
+1.05V_RUN
1/2vMINI CARD-3 PCIE
need to update Power Status and
PM Table
OFF
OFF
OFF
LOW
LOW
OFF
OFF
S0 (Full ON) / M0
SLP S3#
SLPS5#
HIGH
Signal
State
SLPS4#
HIGH HIGH
ALWAYSPLANE
ON
MPLANE
ON
SUSPLANE
RUNPLANE
CLOCKS
ON ON ON
S3 (Suspend to RAM) / M3 LOW HIGH HIGH ON ON ON OFF
S4 (Suspend to DISK) / M3 ON ON OFF
SLPA#
HIGH
HIGH
LOW HIGH HIGH
S5 (SOFT OFF) / M3 ON ON OFFLOW HIGHLOW
S3 (Suspend to RAM) / M-OFF
S5 (SOFT OFF) / M-OFF
LOW HIGH HIGH LOW ON ONOFF OFF OFF
LOW LOW LOW ON OFF OFF OFF OFF
LOW LOW LOW LOW ON OFF OFF OFF OFF
S4 (Suspend to DISK) / M-OFF HIGH
MLK DOCK
JESA1 (Leftt side ESATA)
WLAN
JMINI3(Flash)-for w/ Vpro
WWAN
8
9
10 Express card/Smart Card
11
2
3
1
4
USB PORT#
0
DESTINATION
6
5
7
JUSB (Right side-Audio/B)
Camera
JUSB (Left side)
12
13 BIO
Bluetooth
PCH
None
JUSB (Right side-IO/B)
4
NA
JUSB1 (Left side)
USB 3.0 PORT#
1
Connetion
2
3 JUSB2 (Left side)
DOCKING
HDD
NA
ODD/ E3 Module Bay
SATA
SATA 0
DESTINATION
NA
SATA 1
SATA 2
SATA 3
SATA 4
SATA 5
ESATA
Dock
Dock DP port 2
UMA DP/HDMI Port
Port C
Connetion
Port D
Port B
Dock DP port 1
MB HDMI Conn
*1
*1
*1: HM76 don't support port 6,7
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
NA
DOCKING
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
Power Rail
4 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
Power Rail
4 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
Power Rail
4 61Friday, March 02, 2012
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
Pop option
+1.0V_LAN
BATTERY
+PWR_SRC
ADAPTER
FDC654P+BL_PWR_SRC
EN_INVPWR
SI3456BDVSI3456BDV
SIO
_S
LP
_S
3#
+5V_MOD
MO
DC
_E
N
CHARGER
+3.3V_ALW
RT8205+5V_ALW
ALWON
SI3456
+3.3V_LAN+3.3V_SUS
TPS22966
SIO
_S
LP
_S
3#
+3.3V_RUN
+5V_HDD
(Q21)
(Q30)(Q27)
(PU100)
(Q34) (U78)
+VCC_CORE
ISL95836
(PU700)
+1.05V_RUN_VTT +1.05V_M
SIO
_S
LP
_A
#
SIO
_S
LP
_S
4#
S13456
(Q54)
SI3456
+3.3V_M
(Q58)
SIO
_S
LP
_A
#
+3.3V_ALW_PCH
PC
H_
AL
W_
ON
SI3456
(Q49)
SIO
_S
LP
_L
AN
#
+3.3V_WLAN
SI3456
(Q38)
AU
X_
EN
_W
OW
L
SI4164
(Q63)
+1.05V_RUN
(PU500)
SIO_SLP_S3#
+3.3V_M
Pop option
CP
U_
VT
T_
ON
TPS51212
(PU400)
TPS51212
+1.5V_MEM
DD
R_
ON
0.7
5V
_D
DR
_V
TT
_O
N
RT8207
(PU200)
(Q59)
NTGS4141NAO4728
(QC3)
SIO_SLP_S3#
+0.75V_DDR_VTT+1.5V_RUN+1.5V_CPU_VDDQ
+VCC_SA
1.0
5V
_V
TT
PW
RG
D
+1.8V_RUN
(PU300)
SYN470
(PU7)
TPS51461
+5V_RUN
SIO
_S
LP
_S
3#
+VCC_GFXCORE
1.05V_0.8V_PWROK
ISL95836
(PU700)
1.0
5V
_0
.8V
_P
WR
OK
+5V_RUN Pop option
+3.3V_SUS
SIO
_S
LP
_S
3#
PJP8
R206
AU
X_
ON
SIO
_S
LP
_S
3#
RU
N_
ON
SIO
_S
LP
_S
3#
SIO
_S
LP
_S
4#
SU
S_
ON
SIO
_S
LP
_S
5#
CP
U1
.5V
_S
3_
GA
TE
+3.3V_PCIE_WWAN
SI3456
(Q40)
MC
AR
D_
WW
AN
_P
WR
EN
SI3456
(Q42)
+3.3V_PCIE_FLASH
MC
AR
D_
MIS
C_
PW
RE
N
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
SMBUS TOPOLOGY
5 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
SMBUS TOPOLOGY
5 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
SMBUS TOPOLOGY
5 61Friday, March 02, 2012
Compal Electronics, Inc.
MEC 5055
MEM_SMBDATA
MEM_SMBCLK
KBC
C9
H14
+3.3V_ALW_PCH
2.2K
2.2K
200 DIMM1
SMBUS Address [A4]
202
DIMM2
SMBUS Address [A0]
200
202
C8
G12
3A
SML1_SMBDATA
PCH
SML1_SMBCLK
E14M16
3A
B6A5
+3.3V_ALW_PCH2.2K
2.2K
53
51SMBUS Address [TBD]XDP1
SMBUS Address [TBD]XDP2
53
51
G SensorSMBUS Address [3B]
DMN66D0L
DMN66D0L
+3.3V_RUN10K
10K
4
6
SMBUS Address [0x9a]
WWANSMBUS Address [TBD]32
30
L10
L09DMN66D0L
DMN66D0L
SMBUS Address [**]BCM LOM
LAN_APE_SMB_DATA0
LAN_APE_SMB_CLK0
+3.3V_LAN
2.2K
2.2K
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
A49
B52
CARD_SMBCLK
CARD_SMBDAT
B50
A471G
1G
B59
A56
1C
1C
+3.3V_ALW2.2K
2.2K
100 ohm
100 ohmBATTERYCONN
7
6 SMBUS Address [0x16]PBAT_SMBCLK
PBAT_SMBDAT
+3.3V_ALW
129
127
SMBUS Address 2.2K
DOCK_SMB_CLK
DOCK_SMB_DAT DOCKING
2.2K
B4
A31A
1A
2B
2B
Express card
7
8 SMBUS Address [TBD]
A4
B5
2.2K
2.2K
LCD_SMBCLK
LCD_SMDATA1B
B7
A7
+3.3V_ALW2.2K
2.2K
+3.3V_ALW
2D
2D
BAY_SMBDAT
BAY_SMBCLK
1B
CHARGER_SMBCLK
CHARGER_SMBDAT Charger SMBUS Address [0x12]
+3.3V_SUS2.2K
2.2K
APR_EC: 0x48 SPR_EC: 0x70 MSLICE_EC: 0x72 USB: 0x59 AUDIO: 0x34 SLICE_BATTERY: 0x17 SLICE_CHARGER: 0x13
10
9
+3.3V_ALW2.2K
2.2K
A50
B53 SIO_LAN_SMBDAT1E
1E
+3.3V_ALW
2.2K
2.2K
SIO_LAN_SMBCLK
DMN66D0L
DMN66D0L
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DMI_CRX_PTX_P1DMI_CRX_PTX_P2
DMI_CTX_PRX_N0
DMI_CRX_PTX_N2
DMI_CTX_PRX_P2DMI_CTX_PRX_P1
DMI_CRX_PTX_N0
DMI_CRX_PTX_P0
DMI_CRX_PTX_N3
DMI_CTX_PRX_N3
DMI_CRX_PTX_P3
DMI_CTX_PRX_P3
DMI_CTX_PRX_P0
DMI_CTX_PRX_N1
DMI_CRX_PTX_N1
DMI_CTX_PRX_N2
FDI_CTX_PRX_N1FDI_CTX_PRX_N2FDI_CTX_PRX_N3FDI_CTX_PRX_N4
FDI_CTX_PRX_N6FDI_CTX_PRX_N5
FDI_CTX_PRX_N7
FDI_CTX_PRX_P0FDI_CTX_PRX_P1FDI_CTX_PRX_P2FDI_CTX_PRX_P3
FDI_CTX_PRX_P5FDI_CTX_PRX_P4
FDI_CTX_PRX_P6FDI_CTX_PRX_P7
FDI_FSYNC0FDI_FSYNC1
FDI_LSYNC0
FDI_INT
FDI_LSYNC1
FDI_CTX_PRX_N0
PEG_COMP
EDP_COMP
EDP_COMP
PEG_COMP
+1.05V_RUN_VTT +1.05V_RUN_VTT
DMI_CRX_PTX_P0<16>
DMI_CRX_PTX_N3<16>
DMI_CRX_PTX_P1<16>
DMI_CRX_PTX_N1<16>
DMI_CRX_PTX_P3<16>
DMI_CRX_PTX_N2<16>
DMI_CRX_PTX_P2<16>
DMI_CRX_PTX_N0<16>
DMI_CTX_PRX_N0<16>DMI_CTX_PRX_N1<16>DMI_CTX_PRX_N2<16>DMI_CTX_PRX_N3<16>
DMI_CTX_PRX_P0<16>DMI_CTX_PRX_P1<16>DMI_CTX_PRX_P2<16>DMI_CTX_PRX_P3<16>
FDI_CTX_PRX_N1<16>FDI_CTX_PRX_N0<16>
FDI_CTX_PRX_N4<16>FDI_CTX_PRX_N3<16>FDI_CTX_PRX_N2<16>
FDI_CTX_PRX_N7<16>FDI_CTX_PRX_N6<16>FDI_CTX_PRX_N5<16>
FDI_CTX_PRX_P2<16>FDI_CTX_PRX_P1<16>FDI_CTX_PRX_P0<16>
FDI_CTX_PRX_P5<16>FDI_CTX_PRX_P4<16>FDI_CTX_PRX_P3<16>
FDI_FSYNC0<16>
FDI_LSYNC0<16>
FDI_CTX_PRX_P7<16>FDI_CTX_PRX_P6<16>
FDI_LSYNC1<16>
FDI_FSYNC1<16>
FDI_INT<16>
Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
Ivy/Sandt Bridge (1/6)
6 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
Ivy/Sandt Bridge (1/6)
6 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
Ivy/Sandt Bridge (1/6)
6 61Friday, March 02, 2012
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
(1)PEG_RCOMPO (H22) use 4mil connect to PEG_ICOMPI, then
use 4mil connect to RC2.
(2)PEG_ICOMPO use 12mil connect to RC2
DP Compensation
(1) EDP_COMPIO use 4mil trace to RC1
(2) EDP_ICOMPO use 12mil to RC1
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
eDP_COMPIO and ICOMPO signals should be shorted near
balls and routed with typical impedance <25 mohms
PEG_ICOMPI and RCOMPO signals should be shorted and routed
with - max length = 500 mils - typical impedance = 43 mohms
PEG_ICOMPO signals should be routed with - max length = 500 mils
- typical impedance = 14.5 mohms
PEG Compensation
Link CIS
Link CIS
RC1 24.9_0402_1%~DRC1 24.9_0402_1%~D1 2
PCI EXPRESS* - GRAPHICS
DMI
Intel(R) FDI
eDP
JCPU1A
TYCO_2134146-3_IVYBRIDGE~D
PCI EXPRESS* - GRAPHICS
DMI
Intel(R) FDI
eDP
JCPU1A
TYCO_2134146-3_IVYBRIDGE~D
DMI_RX#[0]B27
DMI_RX#[1]B25
DMI_RX#[2]A25
DMI_RX#[3]B24
DMI_RX[0]B28
DMI_RX[1]B26
DMI_RX[2]A24
DMI_RX[3]B23
DMI_TX#[0]G21
DMI_TX#[1]E22
DMI_TX#[2]F21
DMI_TX#[3]D21
DMI_TX[0]G22
DMI_TX[1]D22
DMI_TX[3]C21
DMI_TX[2]F20
FDI0_TX#[0]A21
FDI0_TX#[1]H19
FDI0_TX#[2]E19
FDI0_TX#[3]F18
FDI1_TX#[0]B21
FDI1_TX#[1]C20
FDI1_TX#[2]D18
FDI1_TX#[3]E17
FDI0_TX[0]A22
FDI0_TX[1]G19
FDI0_TX[2]E20
FDI0_TX[3]G18
FDI1_TX[0]B20
FDI1_TX[1]C19
FDI1_TX[2]D19
FDI1_TX[3]F17
FDI0_FSYNCJ18
FDI1_FSYNCJ17
FDI_INTH20
FDI0_LSYNCJ19
FDI1_LSYNCH17
PEG_ICOMPIJ22
PEG_ICOMPOJ21
PEG_RCOMPOH22
PEG_RX#[0]K33
PEG_RX#[1]M35
PEG_RX#[2]L34
PEG_RX#[3]J35
PEG_RX#[4]J32
PEG_RX#[5]H34
PEG_RX#[6]H31
PEG_RX#[7]G33
PEG_RX#[8]G30
PEG_RX#[9]F35
PEG_RX#[10]E34
PEG_RX#[11]E32
PEG_RX#[12]D33
PEG_RX#[13]D31
PEG_RX#[14]B33
PEG_RX#[15]C32
PEG_RX[0]J33
PEG_RX[1]L35
PEG_RX[2]K34
PEG_RX[3]H35
PEG_RX[4]H32
PEG_RX[5]G34
PEG_RX[6]G31
PEG_RX[7]F33
PEG_RX[8]F30
PEG_RX[9]E35
PEG_RX[10]E33
PEG_RX[11]F32
PEG_RX[12]D34
PEG_RX[13]E31
PEG_RX[14]C33
PEG_RX[15]B32
PEG_TX#[0]M29
PEG_TX#[1]M32
PEG_TX#[2]M31
PEG_TX#[3]L32
PEG_TX#[4]L29
PEG_TX#[5]K31
PEG_TX#[6]K28
PEG_TX#[7]J30
PEG_TX#[8]J28
PEG_TX#[9]H29
PEG_TX#[10]G27
PEG_TX#[11]E29
PEG_TX#[12]F27
PEG_TX#[13]D28
PEG_TX#[14]F26
PEG_TX#[15]E25
PEG_TX[0]M28
PEG_TX[1]M33
PEG_TX[2]M30
PEG_TX[3]L31
PEG_TX[4]L28
PEG_TX[5]K30
PEG_TX[6]K27
PEG_TX[7]J29
PEG_TX[8]J27
PEG_TX[9]H28
PEG_TX[10]G28
PEG_TX[11]E28
PEG_TX[12]F28
PEG_TX[13]D27
PEG_TX[14]E26
PEG_TX[15]D25
eDP_AUXC15
eDP_AUX#D15
eDP_TX[0]C17
eDP_TX[1]F16
eDP_TX[2]C16
eDP_TX[3]G15
eDP_TX#[0]C18
eDP_TX#[1]E16
eDP_TX#[2]D16
eDP_TX#[3]F15
eDP_COMPIOA18
eDP_HPD#B16
eDP_ICOMPOA17
VSS
JCPU1I
TYCO_2134146-3_IVYBRIDGE~D
VSS
JCPU1I
TYCO_2134146-3_IVYBRIDGE~D
VSS161T35
VSS162T34
VSS163T33
VSS164T32
VSS165T31
VSS166T30
VSS167T29
VSS168T28
VSS169T27
VSS170T26
VSS171P9
VSS172P8
VSS173P6
VSS174P5
VSS175P3
VSS176P2
VSS177N35
VSS178N34
VSS179N33
VSS180N32
VSS181N31
VSS182N30
VSS183N29
VSS184N28
VSS185N27
VSS186N26
VSS187M34
VSS188L33
VSS189L30
VSS190L27
VSS191L9
VSS192L8
VSS193L6
VSS194L5
VSS195L4
VSS196L3
VSS197L2
VSS198L1
VSS199K35
VSS200K32
VSS201K29
VSS202K26
VSS203J34
VSS204J31
VSS205H33
VSS206H30
VSS207H27
VSS208H24
VSS209H21
VSS210H18
VSS211H15
VSS212H13
VSS213H10
VSS214H9
VSS215H8
VSS216H7
VSS217H6
VSS218H5
VSS219H4
VSS220H3
VSS221H2
VSS222H1
VSS223G35
VSS224G32
VSS225G29
VSS226G26
VSS227G23
VSS228G20
VSS229G17
VSS230G11
VSS231F34
VSS232F31
VSS233F29
VSS234F22
VSS235F19
VSS236E30
VSS237E27
VSS238E24
VSS239E21
VSS240E18
VSS241E15
VSS242E13
VSS243E10
VSS244E9
VSS245E8
VSS246E7
VSS247E6
VSS248E5
VSS249E4
VSS250E3
VSS251E2
VSS252E1
VSS253D35
VSS254D32
VSS255D29
VSS256D26
VSS257D20
VSS258D17
VSS259C34
VSS260C31
VSS261C28
VSS262C27
VSS263C25
VSS264C23
VSS265C10
VSS266C1
VSS267B22
VSS268B19
VSS269B17
VSS270B15
VSS271B13
VSS272B11
VSS273B9
VSS274B8
VSS275B7
VSS276B5
VSS277B3
VSS278B2
VSS279A35
VSS280A32
VSS281A29
VSS282A26
VSS283A23
VSS284A20
VSS285A3
RC2 24.9_0402_1%~DRC2 24.9_0402_1%~D1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CFG16CFG17
XDP_RST#_R
RUNPWROK_AND PM_DRAM_PWRGD_CPU
XDP_TDI_RXDP_TDO_R
XDP_TRST#
XDP_TCLK
CFG9CFG8
XDP_TMS
SM_RCOMP0
SM_RCOMP2SM_RCOMP1
XDP_PRDY#XDP_PREQ#
XDP_OBS3_R
XDP_OBS5_R
XDP_OBS2_R
H_CATERR#
XDP_OBS1_RXDP_OBS0_R
XDP_OBS4_R
H_PROCHOT#
H_THERMTRIP#
XDP_OBS6_RXDP_OBS7_R
XDP_DBRESET#_R
PCH_PLTRST#_R
XDP_DBRESET#
XDP_TCLK
XDP_TMS
XDP_TRST#
XDP_TDO
XDP_TDI
XDP_PREQ#
VCCPWRGOOD_0_R
H_CATERR#
H_PROCHOT#_R
H_THERMTRIP#_R
PM_DRAM_PWRGD_CPU
CLK_XDPCLK_XDP#
XDP_OBS4XDP_OBS5
XDP_OBS6XDP_OBS7
DDR_HVREF_RST
CFD_PWRBTN#_XDP
XDP_TDI_R
CFG1
CFG2
CFG0
CFG3
CFG4
XDP_TDO_R
CFG5
CFG6CFG7
XDP_TMS
XDP_PREQ#XDP_PRDY#
XDP_DBRESET#
XDP_TDOXDP_TRST#XDP_TDI
XDP_TCLK
H_CPUPWRGD
XDP_OBS0XDP_OBS1
XDP_OBS2XDP_OBS3
CFG0
H_CPUPWRGD_XDP
XDP_RST#_RXDP_HOOK2
DDR_XDP_SMBDAT_R1DDR_XDP_SMBCLK_R1
SYS_PWROK_XDP
CPU_DMICPU_DMI#
CPU_DPLLCPU_DPLL#
CFG11CFG10
DDR3_DRAMRST#_CPU
SYS_PWROK_XDP
PCH_PLTRST#_R
SM_RCOMP2
SM_RCOMP1
PCH_PLTRST#_BUF
VCCPWRGOOD_0_R
XDP_DBRESET#SM_RCOMP0
H_THERMTRIP#PECI_EC H_CPUPWRGD
XDP_OBS2XDP_OBS3XDP_OBS4
XDP_OBS7
XDP_OBS5XDP_OBS6
XDP_OBS0XDP_OBS1 XDP_TDI
XDP_TDO
CLK_XDP
CLK_XDP#
+1.05V_RUN_VTT
+1.05V_RUN_VTT +1.05V_RUN_VTT
+1.05V_RUN_VTT
+1.05V_RUN_VTT
+3.3V_RUN
+3.3V_ALW_PCH
+1.5V_CPU_VDDQ
+3.3V_ALW_PCH
+1.05V_RUN_VTT
+3.3V_ALW_PCH
+1.05V_RUN_VTT+3.3V_RUN
SIO_PWRBTN#_R<14,16>
CFG0 <9>CFG1 <9>
CFG2 <9>CFG3 <9>
CFG4 <9>CFG5 <9>
CFG6 <9>CFG7 <9>
DDR3_DRAMRST# <12>
H_THERMTRIP#<22>
H_PM_SYNC<16>
CPU_DETECT#<39>
H_PROCHOT#<40,51,52>
CLK_CPU_DMI <15>
SYS_PWROK<16,39>
PECI_EC<40>
CLK_CPU_ITP <15>
CLK_CPU_ITP# <15>
CLK_XDP_ITP<9>
CLK_XDP_ITP#<9>
DDR_XDP_WAN_SMBCLK<12,13,14,15,27,34>DDR_XDP_WAN_SMBDAT<12,13,14,15,27,34>
CFG11<9>CFG10<9>
CFG9 <9>CFG8 <9>
CFG16 <9>CFG17 <9>
DDR_HVREF_RST_GATE<40>
DDR_HVREF_RST_PCH<15>
PLTRST_XDP# <17>
RUN_ON_CPU1.5VS3#<11,42>
RUNPWROK<39,40>
PM_DRAM_PWRGD<16>
CLK_CPU_DMI# <15>H_SNB_IVB#<18>
DDR_HVREF_RST <12>
PCH_PLTRST#<14,17>
H_CPUPWRGD<18>
XDP_DBRESET# <14,16>
Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
Ivy/Sandy Bridge (2/6)
7 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
Ivy/Sandy Bridge (2/6)
7 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
Ivy/Sandy Bridge (2/6)
7 61Friday, March 02, 2012
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
Close to JCBU1
Follow DG Rev0.71 SM_DRAMPWROK topology
PU/PD for JTAG signals
VR1 TOPOLOGY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
place RC129 near CPU
The resistor for HOOK2 should beplaced
such that the stub is very small on CFG0 net
For ESD concern, please put near CPU
Place near JXDP1
Link CIS
Place closed JCPU1Buffered reset to CPU
SM_RCOMP2 --> 15mil
SM_RCOMP1/0 --> 20mil
Max length 500mils
Open drain buffer
Avoid stub in the PWRGD path
while placing resistors RC25 & RC130
ESD request
RC125 0_0402_5%~DRC125 0_0402_5%~D1 2
RC24 0_0402_5%~DRC24 0_0402_5%~D1 2
RC34 0_0402_5%~DRC34 0_0402_5%~D1 2
RC5 1K_0402_1%~DRC5 1K_0402_1%~D1 2
RC127 0_0402_5%~DRC127 0_0402_5%~D1 2
CC
65
0.1
U_0402_25V
6K
~D
CC
65
0.1
U_0402_25V
6K
~D
1
2
RC43 25.5_0402_1%~DRC43 25.5_0402_1%~D1 2
CLOCKS
MISC
THERMAL
PWR MANAGEMENT
DDR3
MISC
JTAG & BPM
JCPU1B
TYCO_2134146-3_IVYBRIDGE~D
CLOCKS
MISC
THERMAL
PWR MANAGEMENT
DDR3
MISC
JTAG & BPM
JCPU1B
TYCO_2134146-3_IVYBRIDGE~D
SM_RCOMP[1]A5
SM_RCOMP[2]A4
SM_DRAMRST#R8
SM_RCOMP[0]AK1
BCLK#A27
BCLKA28
DPLL_REF_CLK#A15
DPLL_REF_CLKA16
CATERR#AL33
PECIAN33
PROCHOT#AL32
THERMTRIP#AN32
SM_DRAMPWROKV8
RESET#AR33
PRDY#AP29
PREQ#AP27
TCKAR26
TMSAR27
TRST#AP30
TDIAR28
TDOAP26
DBR#AL35
BPM#[0]AT28
BPM#[1]AR29
BPM#[2]AR30
BPM#[3]AT30
BPM#[4]AP32
BPM#[5]AR31
BPM#[6]AT31
BPM#[7]AR32
PM_SYNCAM34
SKTOCC#AN34
PROC_SELECT#C26
UNCOREPWRGOODAP33
RC37 0_0402_5%~DRC37 0_0402_5%~D1 2
RC29 51_0402_1%~DRC29 51_0402_1%~D12
RC6 0_0402_5%~DRC6 0_0402_5%~D1 2
RC10 43_0402_5%~DRC10 43_0402_5%~D1 2
RC30 0_0402_5%~DRC30 0_0402_5%~D1 2
RC25 1K_0402_5%~DRC25 1K_0402_5%~D1 2
RC9 0_0402_5%~D@RC9 0_0402_5%~D@1 2
RC57 56_0402_5%~DRC57 56_0402_5%~D1 2
RC35 51_0402_1%~DRC35 51_0402_1%~D12
RC45 200_0402_1%~DRC45 200_0402_1%~D1 2
RC46 0_0402_5%~D@RC46 0_0402_5%~D@1 2
CC
142
100P
_0402_50V
8J~
DC
C142
100P
_0402_50V
8J~
D
1
2
CC
144
100P
_0402_50V
8J~
DC
C144
100P
_0402_50V
8J~
D1
2
UC274AHC1G09GW_TSSOP5~D
UC274AHC1G09GW_TSSOP5~D
B1
A2
G3
O4
P5
G
DS
QC2BSS138W-7-F_SOT323-3~D
G
DS
QC2BSS138W-7-F_SOT323-3~D2
13
G
D
S
QC
1S
SM
3K
7002F
U_S
C70-3
~D
@
G
D
S
QC
1S
SM
3K
7002F
U_S
C70-3
~D
@
2
13
RC13 0_0402_5%~D@RC13 0_0402_5%~D@ 1 2
RC
475_0402_1%
~D
RC
475_0402_1%
~D
12
CC
177
0.0
47U
_0402_16V
4Z
~D
CC
177
0.0
47U
_0402_16V
4Z
~D
1
2
RC44 62_0402_5%~DRC44 62_0402_5%~D1 2
CC
66
0.1
U_0402_25V
6K
~D
CC
66
0.1
U_0402_25V
6K
~D
1
2
RC41 51_0402_1%~DRC41 51_0402_1%~D12
RC18 200_0402_1%~DRC18 200_0402_1%~D1 2
RC129 0_0402_5%~DRC129 0_0402_5%~D1 2
RC
50
4.9
9K
_0402_1%
~D
RC
50
4.9
9K
_0402_1%
~D
12
RC15 0_0402_5%~D@RC15 0_0402_5%~D@ 1 2
UC1
SN74LVC1G07DCKR_SC70-5~D
UC1
SN74LVC1G07DCKR_SC70-5~D
NC1
A2
GND3
Y4
VCC5
RC40 51_0402_1%~DRC40 51_0402_1%~D12
CC
143
100P
_0402_50V
8J~
DC
C143
100P
_0402_50V
8J~
D
1
2
CE
13
0.0
47U
_0402_16V
4Z
~D
@C
E13
0.0
47U
_0402_16V
4Z
~D
@
1
2
RC48 0_0402_5%~D@RC48 0_0402_5%~D@1 2
RC
64
39_0402_5%
~D
@R
C64
39_0402_5%
~D
@
12
RC36 0_0402_5%~DRC36 0_0402_5%~D1 2
RC7 1K_0402_1%~DRC7 1K_0402_1%~D1 2
RC126 56_0402_5%~D@RC126 56_0402_5%~D@1 2
RH109 0_0402_5%~D@RH109 0_0402_5%~D@1 2
CC
141
100P
_0402_50V
8J~
DC
C141
100P
_0402_50V
8J~
D
1
2
RC
130
10K
_0402_5%
~D
RC
130
10K
_0402_5%
~D
12
RC33 0_0402_5%~DRC33 0_0402_5%~D1 2
RC128 49.9_0402_1%~D@RC128 49.9_0402_1%~D@1 2
JXDP1
SAMTE_BSH-030-01-L-D-A CONN@
JXDP1
SAMTE_BSH-030-01-L-D-A CONN@
GND01
OBSFN_A03
OBSFN_A15
GND27
OBSDATA_A09
OBSDATA_A111
GND413
OBSDATA_A215
OBSDATA_A317
GND619
OBSFN_B021
OBSFN_B123
GND825
OBSDATA_B027
OBSDATA_B129
GND1031
OBSDATA_B233
OBSDATA_B335
GND1237
PWRGOOD/HOOK039
HOOK141
VCC_OBS_AB43
HOOK245
HOOK347
GND1449
SDA51
SCL53
TCK155
TCK057
GND1659
GND12
OBSFN_C04
OBSFN_C16
GND38
OBSDATA_C010
OBSDATA_C112
GND514
OBSDATA_C216
OBSDATA_C318
GND720
OBSFN_D022
OBSFN_D124
GND926
OBSDATA_D028
OBSDATA_D130
GND1132
OBSDATA_D234
OBSDATA_D336
GND1338
ITPCLK/HOOK440
ITPCLK#/HOOK542
VCC_OBS_CD44
RESET#/HOOK646
DBR#/HOOK748
GND1550
TD052
TRST#54
TDI56
TMS58
GND1760
CC
140
0.1
U_0402_25V
6K
~D
CC
140
0.1
U_0402_25V
6K
~D
1
2
RH108 0_0402_5%~D@RH108 0_0402_5%~D@1 2
RC38 0_0402_5%~DRC38 0_0402_5%~D1 2
RC17 1K_0402_1%~DRC17 1K_0402_1%~D1 2
RC16 1K_0402_1%~DRC16 1K_0402_1%~D1 2
RC31 0_0402_5%~DRC31 0_0402_5%~D1 2
RC28 130_0402_1%~DRC28 130_0402_1%~D1 2
CC156
0.1U_0402_25V6K~D
CC156
0.1U_0402_25V6K~D
1 2
RH107 0_0402_5%~DRH107 0_0402_5%~D1 2
RC42 140_0402_1%~DRC42 140_0402_1%~D1 2
RC26 0_0402_5%~DRC26 0_0402_5%~D12
RC
12
200_0402_1%
~D
RC
12
200_0402_1%
~D
12
RC8 1K_0402_1%~DRC8 1K_0402_1%~D12
RC124 1K_0402_1%~D@RC124 1K_0402_1%~D@1 2
RH106 0_0402_5%~DRH106 0_0402_5%~D1 2
RC27 51_0402_1%~DRC27 51_0402_1%~D12
RC23 0_0402_5%~DRC23 0_0402_5%~D1 2
RC39 0_0402_5%~DRC39 0_0402_5%~D1 2
RC47 0_0402_5%~D@RC47 0_0402_5%~D@1 2
RC19 1K_0402_1%~DRC19 1K_0402_1%~D12
RC32 51_0402_1%~D@RC32 51_0402_1%~D@ 12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_D0DDR_A_D1DDR_A_D2DDR_A_D3DDR_A_D4DDR_A_D5DDR_A_D6
DDR_A_BS1
DDR_A_RAS#
DDR_A_BS2
DDR_A_WE#
DDR_A_CAS#
DDR_A_BS0
M_CLK_DDR#0
M_CLK_DDR#1
DDR_CKE0_DIMMA
DDR_A_DQS7
DDR_A_DQS1DDR_A_DQS2
DDR_A_DQS5
DDR_A_DQS#5
DDR_A_DQS3DDR_A_DQS4
DDR_A_DQS#7
DDR_A_DQS0
DDR_A_DQS6
DDR_A_DQS#2DDR_A_DQS#1DDR_A_DQS#0
DDR_A_DQS#3DDR_A_DQS#4
DDR_A_DQS#6
DDR_A_MA0DDR_A_MA1
DDR_A_MA3
DDR_A_MA7DDR_A_MA8
DDR_A_MA13
DDR_A_MA2
DDR_A_MA14
DDR_A_MA5
DDR_A_MA10
DDR_A_MA4
DDR_A_MA11
DDR_A_MA9
DDR_A_MA6
DDR_A_MA12
M_CLK_DDR1
M_CLK_DDR0
DDR_A_MA15
DDR_CS1_DIMMA#DDR_CS0_DIMMA#
M_CLK_DDR3
M_CLK_DDR#2
M_CLK_DDR#3
DDR_B_MA10DDR_B_MA9
DDR_B_MA14
DDR_B_MA5
DDR_B_MA13
DDR_B_MA11
DDR_B_MA7
DDR_B_MA2
DDR_B_MA0
DDR_B_MA6
DDR_B_MA1
DDR_B_MA12
DDR_B_MA4
DDR_B_MA8
DDR_B_MA3
DDR_B_DQS3DDR_B_DQS2
DDR_B_DQS7
DDR_CKE1_DIMMA
DDR_B_DQS4
DDR_B_DQS1
DDR_B_DQS5DDR_B_DQS6
DDR_B_DQS0
DDR_B_DQS#3
DDR_B_DQS#6
DDR_B_DQS#1
M_CLK_DDR2
DDR_B_DQS#2
DDR_B_DQS#0
DDR_B_DQS#5
DDR_B_DQS#7
DDR_B_DQS#4
M_ODT2
DDR_CKE2_DIMMB
DDR_B_MA15
DDR_CKE3_DIMMB
M_ODT3M_ODT1M_ODT0
DDR_CS2_DIMMB#DDR_CS3_DIMMB#
DDR_B_D29
DDR_B_RAS#
DDR_B_D59
DDR_B_D50DDR_B_D49
DDR_B_D13
DDR_B_D11
DDR_B_D19
DDR_B_D14
DDR_B_D3
DDR_B_D55
DDR_B_D47
DDR_B_WE#
DDR_B_BS2
DDR_B_D52
DDR_B_D44
DDR_B_D41
DDR_B_D8
DDR_B_D5
DDR_B_CAS#
DDR_B_D56
DDR_B_D48
DDR_B_D38
DDR_B_D35
DDR_B_D26DDR_B_D25
DDR_B_D4
DDR_B_D63
DDR_B_D34
DDR_B_D32
DDR_B_D10
DDR_B_BS1
DDR_B_D17
DDR_B_D51
DDR_B_D40
DDR_B_D36
DDR_B_D31
DDR_B_D21DDR_B_D20
DDR_B_D15
DDR_B_D7
DDR_B_D62
DDR_B_D46
DDR_B_D42
DDR_B_D18
DDR_B_D12
DDR_B_D1
DDR_B_D53
DDR_B_D37
DDR_B_D22
DDR_B_D57
DDR_B_D27
DDR_B_D54
DDR_B_D45
DDR_B_D39
DDR_B_D30
DDR_B_D9
DDR_B_D60
DDR_B_D58
DDR_B_D33
DDR_B_D0
DDR_B_D61
DDR_B_D43
DDR_B_D28
DDR_B_D23DDR_B_D24
DDR_B_D16
DDR_B_D6
DDR_B_D2
DDR_B_BS0
DDR_A_D59
DDR_A_D31
DDR_A_D9
DDR_A_D50
DDR_A_D42
DDR_A_D29
DDR_A_D51
DDR_A_D46
DDR_A_D36
DDR_A_D18
DDR_A_D58
DDR_A_D55
DDR_A_D14
DDR_A_D24
DDR_A_D8
DDR_A_D63
DDR_A_D49
DDR_A_D41
DDR_A_D34
DDR_A_D28
DDR_A_D25
DDR_A_D35
DDR_A_D17
DDR_A_D13
DDR_A_D57
DDR_A_D54
DDR_A_D22DDR_A_D21
DDR_A_D23
DDR_A_D7
DDR_A_D62
DDR_A_D48
DDR_A_D40
DDR_A_D33
DDR_A_D27
DDR_A_D44
DDR_A_D16
DDR_A_D12
DDR_A_D56
DDR_A_D53
DDR_A_D45
DDR_A_D38
DDR_A_D20
DDR_A_D60DDR_A_D61
DDR_A_D47
DDR_A_D39
DDR_A_D32
DDR_A_D26
DDR_A_D10
DDR_A_D43
DDR_A_D15
DDR_A_D11
DDR_A_D52
DDR_A_D37
DDR_A_D30
DDR_A_D19
DDR_B_MA[0..15] <13>
DDR_B_DQS#[0..7] <13>
DDR_B_DQS[0..7] <13>
DDR_CS3_DIMMB# <13>DDR_CS2_DIMMB# <13>
M_ODT3 <13>
DDR_CKE3_DIMMB <13>
DDR_CKE2_DIMMB <13>
M_ODT2 <13>
M_CLK_DDR#2 <13>M_CLK_DDR2 <13>
M_CLK_DDR#3 <13>M_CLK_DDR3 <13>
DDR_A_D[0..63]<12>
DDR_A_BS0<12>DDR_A_BS1<12>DDR_A_BS2<12>
DDR_A_WE#<12>
DDR_A_CAS#<12>DDR_A_RAS#<12>
DDR_B_D[0..63]<13>
DDR_B_BS2<13>DDR_B_BS1<13>
DDR_B_WE#<13>
DDR_B_CAS#<13>DDR_B_RAS#<13>
DDR_B_BS0<13>
DDR_A_DQS[0..7] <12>
DDR_A_DQS#[0..7] <12>
DDR_A_MA[0..15] <12>
DDR_CKE1_DIMMA <12>
DDR_CKE0_DIMMA <12>
DDR_CS0_DIMMA# <12>
M_ODT0 <12>
DDR_CS1_DIMMA# <12>
M_ODT1 <12>
M_CLK_DDR1 <12>
M_CLK_DDR0 <12>
M_CLK_DDR#1 <12>
M_CLK_DDR#0 <12>
Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
Ivy/Sandy Bridge (3/6)
8 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
Ivy/Sandy Bridge (3/6)
8 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
Ivy/Sandy Bridge (3/6)
8 61Friday, March 02, 2012
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
Link CIS Link CIS
DDR SYSTEM MEMORY B
JCPU1D
TYCO_2134146-3_IVYBRIDGE~D
DDR SYSTEM MEMORY B
JCPU1D
TYCO_2134146-3_IVYBRIDGE~D
SB_BS[0]AA9
SB_BS[1]AA7
SB_BS[2]R6
SB_CAS#AA10
SB_RAS#AB8
SB_WE#AB9
SB_CK[0]AE2
SB_CK[1]AE1
SB_CLK#[0]AD2
SB_CLK#[1]AD1
SB_CKE[0]R9
SB_CKE[1]R10
SB_ODT[0]AE4
SB_ODT[1]AD4
SB_DQS[4]AN6
SB_DQS#[4]AN5
SB_DQS[5]AP8
SB_DQS#[5]AP9
SB_DQS[6]AK11
SB_DQS#[6]AK12
SB_DQS[7]AP14
SB_DQS#[7]AP15
SB_DQS[0]C7
SB_DQS#[0]D7
SB_DQS[1]G3
SB_DQS#[1]F3
SB_DQS[2]J6
SB_DQS#[2]K6
SB_DQS[3]M3
SB_DQS#[3]N3
SB_MA[0]AA8
SB_MA[1]T7
SB_MA[2]R7
SB_MA[3]T6
SB_MA[4]T2
SB_MA[5]T4
SB_MA[6]T3
SB_MA[7]R2
SB_MA[8]T5
SB_MA[9]R3
SB_MA[10]AB7
SB_MA[11]R1
SB_MA[12]T1
SB_MA[13]AB10
SB_MA[14]R5
SB_MA[15]R4
SB_DQ[0]C9
SB_DQ[1]A7
SB_DQ[2]D10
SB_DQ[3]C8
SB_DQ[4]A9
SB_DQ[5]A8
SB_DQ[6]D9
SB_DQ[7]D8
SB_DQ[8]G4
SB_DQ[9]F4
SB_DQ[10]F1
SB_DQ[11]G1
SB_DQ[12]G5
SB_DQ[13]F5
SB_DQ[14]F2
SB_DQ[15]G2
SB_DQ[16]J7
SB_DQ[17]J8
SB_DQ[18]K10
SB_DQ[19]K9
SB_DQ[20]J9
SB_DQ[21]J10
SB_DQ[22]K8
SB_DQ[23]K7
SB_DQ[24]M5
SB_DQ[25]N4
SB_DQ[26]N2
SB_DQ[27]N1
SB_DQ[28]M4
SB_DQ[29]N5
SB_DQ[30]M2
SB_DQ[31]M1
SB_DQ[32]AM5
SB_DQ[33]AM6
SB_DQ[34]AR3
SB_DQ[35]AP3
SB_DQ[36]AN3
SB_DQ[37]AN2
SB_DQ[38]AN1
SB_DQ[39]AP2
SB_DQ[40]AP5
SB_DQ[41]AN9
SB_DQ[42]AT5
SB_DQ[43]AT6
SB_DQ[44]AP6
SB_DQ[45]AN8
SB_DQ[46]AR6
SB_DQ[47]AR5
SB_DQ[48]AR9
SB_DQ[49]AJ11
SB_DQ[50]AT8
SB_DQ[51]AT9
SB_DQ[52]AH11
SB_DQ[53]AR8
SB_DQ[54]AJ12
SB_DQ[55]AH12
SB_DQ[56]AT11
SB_DQ[57]AN14
SB_DQ[58]AR14
SB_DQ[59]AT14
SB_DQ[60]AT12
SB_DQ[61]AN15
SB_DQ[62]AR15
SB_DQ[63]AT15
SB_CK[2]AB2
SB_CLK#[2]AA2
SB_CKE[2]T9
SB_CK[3]AA1
SB_CLK#[3]AB1
SB_CKE[3]T10
SB_CS#[0]AD3
SB_CS#[1]AE3
SB_CS#[2]AD6
SB_CS#[3]AE6
SB_ODT[2]AD5
SB_ODT[3]AE5
DDR SYSTEM MEMORY A
JCPU1C
TYCO_2134146-3_IVYBRIDGE~D
DDR SYSTEM MEMORY A
JCPU1C
TYCO_2134146-3_IVYBRIDGE~D
SA_BS[0]AE10
SA_BS[1]AF10
SA_BS[2]V6
SA_CAS#AE8
SA_RAS#AD9
SA_WE#AF9
SA_CK[0]AB6
SA_CK[1]AA5
SA_CLK#[0]AA6
SA_CLK#[1]AB5
SA_CKE[0]V9
SA_CKE[1]V10
SA_CS#[0]AK3
SA_CS#[1]AL3
SA_ODT[0]AH3
SA_ODT[1]AG3
SA_DQS[0]D4
SA_DQS#[0]C4
SA_DQS[1]F6
SA_DQS#[1]G6
SA_DQS[2]K3
SA_DQS#[2]J3
SA_DQS[3]N6
SA_DQS#[3]M6
SA_DQS[4]AL5
SA_DQS#[4]AL6
SA_DQS[5]AM9
SA_DQS#[5]AM8
SA_DQS[6]AR11
SA_DQS#[6]AR12
SA_DQS[7]AM14
SA_DQS#[7]AM15
SA_MA[0]AD10
SA_MA[1]W1
SA_MA[2]W2
SA_MA[3]W7
SA_MA[4]V3
SA_MA[5]V2
SA_MA[6]W3
SA_MA[7]W6
SA_MA[8]V1
SA_MA[9]W5
SA_MA[10]AD8
SA_MA[11]V4
SA_MA[12]W4
SA_MA[13]AF8
SA_MA[14]V5
SA_MA[15]V7
SA_DQ[0]C5
SA_DQ[1]D5
SA_DQ[2]D3
SA_DQ[3]D2
SA_DQ[4]D6
SA_DQ[5]C6
SA_DQ[6]C2
SA_DQ[7]C3
SA_DQ[8]F10
SA_DQ[9]F8
SA_DQ[10]G10
SA_DQ[11]G9
SA_DQ[12]F9
SA_DQ[13]F7
SA_DQ[14]G8
SA_DQ[15]G7
SA_DQ[16]K4
SA_DQ[17]K5
SA_DQ[18]K1
SA_DQ[19]J1
SA_DQ[20]J5
SA_DQ[21]J4
SA_DQ[22]J2
SA_DQ[23]K2
SA_DQ[24]M8
SA_DQ[25]N10
SA_DQ[26]N8
SA_DQ[27]N7
SA_DQ[28]M10
SA_DQ[29]M9
SA_DQ[30]N9
SA_DQ[31]M7
SA_DQ[32]AG6
SA_DQ[33]AG5
SA_DQ[34]AK6
SA_DQ[35]AK5
SA_DQ[36]AH5
SA_DQ[37]AH6
SA_DQ[38]AJ5
SA_DQ[39]AJ6
SA_DQ[40]AJ8
SA_DQ[41]AK8
SA_DQ[42]AJ9
SA_DQ[43]AK9
SA_DQ[44]AH8
SA_DQ[45]AH9
SA_DQ[46]AL9
SA_DQ[47]AL8
SA_DQ[48]AP11
SA_DQ[49]AN11
SA_DQ[50]AL12
SA_DQ[51]AM12
SA_DQ[52]AM11
SA_DQ[53]AL11
SA_DQ[54]AP12
SA_DQ[55]AN12
SA_DQ[56]AJ14
SA_DQ[57]AH14
SA_DQ[58]AL15
SA_DQ[59]AK15
SA_DQ[60]AL14
SA_DQ[61]AK14
SA_DQ[62]AJ15
SA_DQ[63]AH15
SA_CK[2]AB4
SA_CLK#[2]AA4
SA_CK[3]AB3
SA_CLK#[3]AA3
SA_CKE[2]W9
SA_CKE[3]W10
SA_CS#[2]AG1
SA_CS#[3]AH1
SA_ODT[2]AG2
SA_ODT[3]AH2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CFG4
CFG6
CFG5
VSSAXG_VAL_SENSE
VAXG_VAL_SENSE
VCC_VAL_SNESE
CFG2
CFG7
CFG16CFG17
VCC_VAL_SNESEVSS_VAL_SNESE
VAXG_VAL_SENSEVSSAXG_VAL_SENSE
VSS_VAL_SNESE
CFG10CFG11
CFG1CFG2
CFG0
CFG3CFG4CFG5CFG6CFG7CFG8CFG9
CFG14CFG15
CFG12CFG13
+VCC_CORE
+VCC_GFXCORE
CFG0<7>CFG1<7>CFG2<7>CFG3<7>CFG4<7>CFG5<7>CFG6<7>CFG7<7>CFG8<7>CFG9<7>CFG10<7>CFG11<7>
CFG17<7>CFG16<7>
CLK_XDP_ITP <7>CLK_XDP_ITP# <7>
Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
Ivy/Sandy Bridge (4/6)
9 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
Ivy/Sandy Bridge (4/6)
9 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
Ivy/Sandy Bridge (4/6)
9 61Friday, March 02, 2012
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
CFG Straps for Processor
PEG Static Lane Reversal - CFG2 is for the 16x
CFG4
1 : Disabled; No Physical Display Port
attached to Embedded Display Port
0 : Enabled; An external Display Port device is
connected to the Embedded Display Port
Display Port Presence Strap
11: (Default) x16 - Device 1 functions 1 and 2 disabled
10: x8, x8 - Device 1 function 1 enabled ; function 2
disabledCFG[6:5]
PCIE Port Bifurcation Straps
01: Reserved - (Device 1 function 1 disabled ; function
2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
CFG2
1:(Default) Normal Operation; Lane #
definition matches socket pin map definition
0:Lane Reversed
1: (Default) PEG Train immediately
following xxRESETB de assertionCFG7
PEG DEFER TRAINING
0: PEG Wait for BIOS for training
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Link CIS
T1 PAD~D@T1 PAD~D@
T33PAD~D @T33PAD~D @
T46PAD~D @T46PAD~D @
RC122 49.9_0402_1%~D@RC122 49.9_0402_1%~D@1 2
T37PAD~D @T37PAD~D @
T42PAD~D @T42PAD~D @
T15 PAD~D@T15 PAD~D@
T26 PAD~D@T26 PAD~D@
RC123 49.9_0402_1%~D@RC123 49.9_0402_1%~D@1 2
T27 PAD~D@T27 PAD~D@
T11 PAD~D@T11 PAD~D@
T49 PAD~D@T49 PAD~D@
RC121 49.9_0402_1%~D@RC121 49.9_0402_1%~D@1 2
T43PAD~D @T43PAD~D @
T38PAD~D @T38PAD~D @
T8 PAD~D@T8 PAD~D@
T48PAD~D @T48PAD~D @
T41PAD~D @T41PAD~D @
T47PAD~D @T47PAD~D @
T36PAD~D @T36PAD~D @
T44PAD~D @T44PAD~D @
T5 PAD~D@T5 PAD~D@
RC
51
1K
_0
40
2_
1%
~D
@R
C5
11
K_
04
02
_1
%~
D@1
2
T19 PAD~D@T19 PAD~D@
T7 PAD~D@T7 PAD~D@
T22PAD~D @T22PAD~D @
RC
52
1K
_0
40
2_
1%
~D
@R
C5
21
K_
04
02
_1
%~
D@
12
T51 PAD~D@T51 PAD~D@
T6 PAD~D@T6 PAD~D@
T52PAD~D @T52PAD~D @
RC
54
1K
_0
40
2_
1%
~D
@R
C5
41
K_
04
02
_1
%~
D@
12
RC
71
10
0_
04
02
_1
%~
D@
RC
71
10
0_
04
02
_1
%~
D@
12
RC120 49.9_0402_1%~D@RC120 49.9_0402_1%~D@1 2
T3 PAD~D@T3 PAD~D@
T34 PAD~D@T34 PAD~D@
RC
56
1K
_0
40
2_
1%
~D
@R
C5
61
K_
04
02
_1
%~
D@
12
T29PAD~D @T29PAD~D @T28PAD~D @T28PAD~D @
T32 PAD~D@T32 PAD~D@
T21 PAD~D@T21 PAD~D@
T39 PAD~D@T39 PAD~D@
RC
53
1K
_0
40
2_
1%
~D
@R
C5
31
K_
04
02
_1
%~
D@
12
T13 PAD~D@T13 PAD~D@
T18 PAD~D@T18 PAD~D@T17 PAD~D@T17 PAD~D@
T35PAD~D @T35PAD~D @
T31PAD~D @T31PAD~D @
T25 PAD~D@T25 PAD~D@
T2 PAD~D@T2 PAD~D@
T40PAD~D @T40PAD~D @
T53 PAD~D@T53 PAD~D@
T4 PAD~D@T4 PAD~D@
RC
69
10
0_
04
02
_1
%~
D@
RC
69
10
0_
04
02
_1
%~
D@
12
T16 PAD~D@T16 PAD~D@
T24 PAD~D@T24 PAD~D@
RESERVED
CFG
JCPU1E
TYCO_2134146-3_IVYBRIDGE~D
RESERVED
CFG
JCPU1E
TYCO_2134146-3_IVYBRIDGE~D
CFG[0]AK28
CFG[1]AK29
CFG[2]AL26
CFG[3]AL27
CFG[4]AK26
CFG[5]AL29
CFG[6]AL30
CFG[7]AM31
CFG[8]AM32
CFG[9]AM30
CFG[10]AM28
CFG[11]AM26
CFG[12]AN28
CFG[13]AN31
CFG[14]AN26
CFG[15]AM27
CFG[16]AK31
CFG[17]AN29
RSVD34AM33
RSVD35AJ27
RSVD38J16
RSVD_NCTF2AT34
RSVD39H16
RSVD40G16
RSVD_NCTF1AR35
RSVD_NCTF3AT33
RSVD_NCTF5AR34
RSVD_NCTF11AT2
RSVD_NCTF12AT1
RSVD_NCTF13AR1
RSVD_NCTF6B34
RSVD_NCTF7A33
RSVD_NCTF8A34
RSVD_NCTF9B35
RSVD_NCTF10C35
RSVD51AJ32
RSVD52AK32
RSVD27J15
RSVD16C30
RSVD15D23
RSVD17A31
RSVD18B30
RSVD20D30
RSVD19B29
RSVD22A30
RSVD21B31
RSVD23C29
RSVD37T8
RSVD8F25
RSVD9F24
RSVD11D24
RSVD12G25
RSVD13G24
RSVD14E23
RSVD32W8
RSVD33AT26
RSVD_NCTF4AP35
RSVD10F23
RSVD5AJ26
VAXG_VAL_SENSEAJ31
VSSAXG_VAL_SENSEAH31
VCC_VAL_SENSEAJ33
VSS_VAL_SENSEAH33
KEYB1
VCC_DIE_SENSEAH27
BCLK_ITPAN35
BCLK_ITP#AM35
VSS_DIE_SENSEAH26
RSVD31AK2
RSVD30AE7
RSVD29AG7
RSVD28L7
RSVD24J20
RSVD25B18
T50 PAD~D@T50 PAD~D@
T30PAD~D @T30PAD~D @T23 PAD~D@T23 PAD~D@
T20 PAD~D@T20 PAD~D@
T45PAD~D @T45PAD~D @
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VTT_SENSE
VSSSENSE_RVCCSENSE_R
H_CPU_SVIDALRT#
VIDSOUT
H_CPU_SVIDALRT#VIDSCLK
VSSIO_SENSE_R
+VCC_CORE+1.05V_RUN_VTT
+VCC_CORE
+1.05V_RUN_VTT
+1.05V_RUN_VTT
+1.05V_RUN_VTT
VCCSENSE <51>VSSSENSE <51>
VTT_SENSE <49>
VIDSCLK <51>
VIDALERT_N <51>
VIDSOUT <51>
VSSIO_SENSE_R <49>
Title
Size Document Number Rev
Date: Sheet of
LA-7903P1.0
Ivy/Sandy Bridge (5/6)
10 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7903P1.0
Ivy/Sandy Bridge (5/6)
10 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7903P1.0
Ivy/Sandy Bridge (5/6)
10 61Friday, March 02, 2012
Compal Electronics, Inc.
VCCIO 1.05 8.5
12-161.5+1.5V_MEM
VCC 530.65-1.3
60.65-0.9VCCSA
CPU Power Rail Table
Iccmax current changed for PDDG Rev0.7
51.5VDDQ
5A to Mem controller(+1.5V_CPU_VDDQ)
5-6A to 2 DIMMs/channel
2-5A to +1.5V_RUN & +0.75V_DDR_VTT
8.5A
Note: Place the PU resistors close to CPU
RC61 close to CPU 300 - 1500mils
CAD Note: Place the PU
resistors close to CPU
RC63 close to CPU 300 - 1500mils
Place RC67, RC68 near CPU
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
31.8VCCPLL
Voltage Rail VoltageS0 Iccmax
Current (A)
H_CPU_SVIDALRT# must be routed between the
VIDSOUT and VIDSCLK lines to reduce cross talk.
18 mils spacing to others.
DELL CONFIDENTIAL/PROPRIETARY
260.0-1.1VAXG
53A
Link CIS
RC
66
10
0_
04
02
_1
%~
DR
C6
61
00
_0
40
2_
1%
~D
12RC75
100_0402_1%~D@RC75
100_0402_1%~D@1 2
POWER
CORE SUPPLY
PEG AND DDR
SENSE LINES
SVID
JCPU1F
TYCO_2134146-3_IVYBRIDGE~D
POWER
CORE SUPPLY
PEG AND DDR
SENSE LINES
SVID
JCPU1F
TYCO_2134146-3_IVYBRIDGE~D
VCC_SENSEAJ35
VSS_SENSEAJ34
VIDALERT#AJ29
VIDSCLKAJ30
VIDSOUTAJ28
VSS_SENSE_VCCIOA10
VCC1AG35
VCC2AG34
VCC3AG33
VCC4AG32
VCC5AG31
VCC6AG30
VCC7AG29
VCC8AG28
VCC9AG27
VCC10AG26
VCC11AF35
VCC12AF34
VCC13AF33
VCC14AF32
VCC15AF31
VCC16AF30
VCC17AF29
VCC18AF28
VCC19AF27
VCC20AF26
VCC21AD35
VCC22AD34
VCC23AD33
VCC24AD32
VCC25AD31
VCC26AD30
VCC27AD29
VCC28AD28
VCC29AD27
VCC30AD26
VCC31AC35
VCC32AC34
VCC33AC33
VCC34AC32
VCC35AC31
VCC36AC30
VCC37AC29
VCC38AC28
VCC39AC27
VCC40AC26
VCC41AA35
VCC42AA34
VCC43AA33
VCC44AA32
VCC45AA31
VCC46AA30
VCC47AA29
VCC48AA28
VCC49AA27
VCC50AA26
VCC51Y35
VCC52Y34
VCC53Y33
VCC54Y32
VCC55Y31
VCC56Y30
VCC57Y29
VCC58Y28
VCC59Y27
VCC60Y26
VCC61V35
VCC62V34
VCC63V33
VCC64V32
VCC65V31
VCC66V30
VCC67V29
VCC68V28
VCC69V27
VCC70V26
VCC71U35
VCC72U34
VCC73U33
VCC74U32
VCC75U31
VCC76U30
VCC77U29
VCC78U28
VCC79U27
VCC80U26
VCC81R35
VCC82R34
VCC83R33
VCC84R32
VCC85R31
VCC86R30
VCC87R29
VCC88R28
VCC89R27
VCC90R26
VCC91P35
VCC92P34
VCC93P33
VCC94P32
VCC95P31
VCC96P30
VCC97P29
VCC98P28
VCC99P27
VCC100P26
VCCIO1AH13
VCCIO12J11
VCCIO18G12
VCCIO19F14
VCCIO20F13
VCCIO21F12
VCCIO22F11
VCCIO23E14
VCCIO24E12
VCCIO2AH10
VCCIO3AG10
VCCIO4AC10
VCCIO5Y10
VCCIO6U10
VCCIO7P10
VCCIO8L10
VCCIO9J14
VCCIO10J13
VCCIO11J12
VCCIO13H14
VCCIO14H12
VCCIO15H11
VCCIO16G14
VCCIO17G13
VCCIO25E11
VCCIO32C12
VCCIO33C11
VCCIO34B14
VCCIO35B12
VCCIO36A14
VCCIO37A13
VCCIO38A12
VCCIO39A11
VCCIO26D14
VCCIO27D13
VCCIO28D12
VCCIO29D11
VCCIO30C14
VCCIO31C13
VCCIO_SENSEB10
VCCIO40J23
RC61 43_0402_5%~DRC61 43_0402_5%~D1 2
RC68 0_0402_5%~D@ RC68 0_0402_5%~D@ 1 2
RC67 0_0402_5%~D@ RC67 0_0402_5%~D@ 1 2
RC
70
10
0_
04
02
_1
%~
DR
C7
01
00
_0
40
2_
1%
~D
12
RC
60
75
_0
40
2_
1%
~D
RC
60
75
_0
40
2_
1%
~D
12
RC
13
31
0_
04
02
_1
%~
DR
C1
33
10
_0
40
2_
1%
~D
12
RC98 10_0402_1%~DRC98 10_0402_1%~D12
RC
63
13
0_
04
02
_1
%~
DR
C6
31
30
_0
40
2_
1%
~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
RUN_ON_CPU1.5VS3
RUN_ON_CPU1.5VS3
RUN_ON_CPU1.5VS3#
+DIMM0_1_VREF_CPU+DIMM0_1_CA_CPU
+DIMM0_1_CA_CPU
+DIMM0_1_VREF_CPU
+1.5V_MEM +1.5V_CPU_VDDQ
+3.3V_ALW2
+1.5V_CPU_VDDQ
+VCC_GFXCORE
+1.8V_RUN
+V_SM_VREF_CNT
+VCC_SA
+DIMM0_1_VREF_CPU+DIMM0_1_CA_CPU
+V_DDR_SMREF
+V_SM_VREF_CNT
+1.5V_MEM
+PWR_SRC_S
+1.5V_CPU_VDDQ
+V_DDR_REF
+VCC_GFXCORE
+1.5V_MEM
+1.5V_CPU_VDDQ
+1.5V_MEM
CPU1.5V_S3_GATE<40>
RUN_ON_CPU1.5VS3# <7,42>
VCCSA_SENSE <50>
VCCSA_VID_1 <50>VCCSA_VID_0 <50>
VCCP_PWRCTRL <49>
SIO_SLP_S3#<16,27,35,39,42,47,48,49>
VCC_AXG_SENSE <51>VSS_AXG_SENSE <51>
Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
Ivy/Sandy Bridge (6/6)
11 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
Ivy/Sandy Bridge (6/6)
11 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
Ivy/Sandy Bridge (6/6)
11 61Friday, March 02, 2012
Compal Electronics, Inc.
+1.5V_CPU_VDDQ Source
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5A
33A
+V_SM_VREF should
have 10 mil trace width
DELL CONFIDENTIAL/PROPRIETARY
1.2A
6A
6A
Link CISLink CIS
Depop RC140 for ES2 CPU
ESD Request
QC5NTR4503NT1G_SOT23-3~D
@ QC5NTR4503NT1G_SOT23-3~D
@
1
2
3
QC3AO4304L_SO8
QC3AO4304L_SO8
62
4
1
35
78
RC79 0_0402_5%~D@ RC79 0_0402_5%~D@1 2
+
CC
176
330U
_D
2_2.5
VM
_R
6M
~D
+
CC
176
330U
_D
2_2.5
VM
_R
6M
~D
1
2
RC
143
1M
_0402_5%
~D
RC
143
1M
_0402_5%
~D
12
+
CC
172
330U
_D
2_2V
M_R
6M
~D
+
CC
172
330U
_D
2_2V
M_R
6M
~D
1
2
RC
73
20K
_0402_5%
~D
@RC
73
20K
_0402_5%
~D
@
12
CC178 0.1U_0402_10V7K~DCC178 0.1U_0402_10V7K~D12
CC
169
10U
_0603_6.3
V6M
~D
CC
169
10U
_0603_6.3
V6M
~D
1
2
CC
163
10U
_0603_6.3
V6M
~D
CC
163
10U
_0603_6.3
V6M
~D
1
2
QC
4B
DM
N66D
0LD
W-7
_S
OT
363-6
~D
QC
4B
DM
N66D
0LD
W-7
_S
OT
363-6
~D
3
5
4
CC152
0.1U_0402_10V7K~D@CC152
0.1U_0402_10V7K~D@
1
2
RC96 1K_0402_1%~D@ RC96 1K_0402_1%~D@1 2
CC
162
10U
_0603_6.3
V6M
~D
CC
162
10U
_0603_6.3
V6M
~D
1
2
CC179 0.1U_0402_10V7K~DCC179 0.1U_0402_10V7K~D12
CC
168
10U
_0603_6.3
V6M
~D
@C
C168
10U
_0603_6.3
V6M
~D
@
1
2
POWER
GRAPHICS
DDR3 -1.5V RAILS
SENSE
LINES
1.8V RAIL
SA RAIL
VREF
MISC
JCPU1G
TYCO_2134146-3_IVYBRIDGE~D
POWER
GRAPHICS
DDR3 -1.5V RAILS
SENSE
LINES
1.8V RAIL
SA RAIL
VREF
MISC
JCPU1G
TYCO_2134146-3_IVYBRIDGE~D
SM_VREFAL1
VSSAXG_SENSEAK34
VAXG_SENSEAK35
VAXG1AT24
VAXG2AT23
VAXG3AT21
VAXG4AT20
VAXG5AT18
VAXG6AT17
VAXG7AR24
VAXG8AR23
VAXG9AR21
VAXG10AR20
VAXG11AR18
VAXG12AR17
VAXG13AP24
VAXG14AP23
VAXG15AP21
VAXG16AP20
VAXG17AP18
VAXG18AP17
VAXG19AN24
VAXG20AN23
VAXG21AN21
VAXG22AN20
VAXG23AN18
VAXG24AN17
VAXG25AM24
VAXG26AM23
VAXG27AM21
VAXG28AM20
VAXG29AM18
VAXG30AM17
VAXG31AL24
VAXG32AL23
VAXG33AL21
VAXG34AL20
VAXG35AL18
VAXG36AL17
VAXG37AK24
VAXG38AK23
VAXG39AK21
VAXG40AK20
VAXG41AK18
VAXG42AK17
VAXG43AJ24
VAXG44AJ23
VAXG45AJ21
VAXG46AJ20
VAXG47AJ18
VAXG48AJ17
VAXG49AH24
VAXG50AH23
VAXG51AH21
VAXG52AH20
VAXG53AH18
VAXG54AH17
VDDQ11U4
VDDQ12U1
VDDQ13P7
VDDQ14P4
VDDQ15P1
VDDQ1AF7
VDDQ2AF4
VDDQ3AF1
VDDQ4AC7
VDDQ5AC4
VDDQ6AC1
VDDQ7Y7
VDDQ8Y4
VDDQ9Y1
VDDQ10U7
VCCPLL1B6
VCCPLL2A6
VCCSA1M27
VCCSA2M26
VCCSA3L26
VCCSA4J26
VCCSA5J25
VCCSA6J24
VCCSA7H26
VCCSA8H25
VCCSA_SENSEH23
VCCSA_VID[1]C24
VCCPLL3A2
VCCSA_VID[0]C22
SA_DIMM_VREFDQB4
SB_DIMM_VREFDQD1
VCCIO_SELA19
RC135 0_0402_5%~D@ RC135 0_0402_5%~D@1 2
CC
175
1U
_0402_6.3
V6K
~D
CC
175
1U
_0402_6.3
V6K
~D
1
2
RC
84
1K
_0402_1%
~D
RC
84
1K
_0402_1%
~D
12
RC140 0_0402_5%~D@ RC140 0_0402_5%~D@1 2
RC76100_0402_1%~D
@ RC76100_0402_1%~D
@1 2
CC149 0.1U_0402_10V7K~DCC149 0.1U_0402_10V7K~D12
CC
174
1U
_0402_6.3
V6K
~D
CC
174
1U
_0402_6.3
V6K
~D
1
2
QC
4A
DM
N66D
0LD
W-7
_S
OT
363-6
~D
QC
4A
DM
N66D
0LD
W-7
_S
OT
363-6
~D
61
2
CC
166
10U
_0603_6.3
V6M
~D
CC
166
10U
_0603_6.3
V6M
~D
1
2
CC
161
10U
_0603_6.3
V6M
~D
CC
161
10U
_0603_6.3
V6M
~D
1
2
CC
135
10U
_0603_6.3
V6M
~D
CC
135
10U
_0603_6.3
V6M
~D
1
2
CC
170
10U
_0603_6.3
V6M
~D
CC
170
10U
_0603_6.3
V6M
~D
1
2
RC
72
330K
_0402_5%
~D
RC
72
330K
_0402_5%
~D
12
CC
136
0.0
22U
_0402_25V
7K
~D
CC
136
0.0
22U
_0402_25V
7K
~D
1
2
CC
173
10U
_0603_6.3
V6M
~D
CC
173
10U
_0603_6.3
V6M
~D
1
2
RC
74
100K
_0402_5%
~D
RC
74
100K
_0402_5%
~D
12
CC153
0.1U_0402_10V7K~D@
CC153
0.1U_0402_10V7K~D@
1
2
+ CC
167
330U
_D
2_2V
M_R
6M
~D
+ CC
167
330U
_D
2_2V
M_R
6M
~D
1
2
RC
78
1K
_0402_1%
~D
RC
78
1K
_0402_1%
~D
12
RC97 1K_0402_1%~D@ RC97 1K_0402_1%~D@1 2
CC150 0.1U_0402_10V7K~DCC150 0.1U_0402_10V7K~D12
VSS
JCPU1H
TYCO_2134146-3_IVYBRIDGE~D
VSS
JCPU1H
TYCO_2134146-3_IVYBRIDGE~D
VSS1AT35
VSS2AT32
VSS3AT29
VSS4AT27
VSS5AT25
VSS6AT22
VSS7AT19
VSS8AT16
VSS9AT13
VSS10AT10
VSS11AT7
VSS12AT4
VSS13AT3
VSS14AR25
VSS15AR22
VSS16AR19
VSS17AR16
VSS18AR13
VSS19AR10
VSS20AR7
VSS21AR4
VSS22AR2
VSS23AP34
VSS24AP31
VSS25AP28
VSS26AP25
VSS27AP22
VSS28AP19
VSS29AP16
VSS30AP13
VSS31AP10
VSS32AP7
VSS33AP4
VSS34AP1
VSS35AN30
VSS36AN27
VSS37AN25
VSS38AN22
VSS39AN19
VSS40AN16
VSS41AN13
VSS42AN10
VSS43AN7
VSS44AN4
VSS45AM29
VSS46AM25
VSS47AM22
VSS48AM19
VSS49AM16
VSS50AM13
VSS51AM10
VSS52AM7
VSS53AM4
VSS54AM3
VSS55AM2
VSS56AM1
VSS57AL34
VSS58AL31
VSS59AL28
VSS60AL25
VSS61AL22
VSS62AL19
VSS63AL16
VSS64AL13
VSS65AL10
VSS66AL7
VSS67AL4
VSS68AL2
VSS69AK33
VSS70AK30
VSS71AK27
VSS72AK25
VSS73AK22
VSS74AK19
VSS75AK16
VSS76AK13
VSS77AK10
VSS78AK7
VSS79AK4
VSS80AJ25
VSS81AJ22
VSS82AJ19
VSS83AJ16
VSS84AJ13
VSS85AJ10
VSS86AJ7
VSS87AJ4
VSS88AJ3
VSS89AJ2
VSS90AJ1
VSS91AH35
VSS92AH34
VSS93AH32
VSS94AH30
VSS95AH29
VSS96AH28
VSS98AH25
VSS99AH22
VSS100AH19
VSS101AH16
VSS102AH7
VSS103AH4
VSS104AG9
VSS105AG8
VSS106AG4
VSS107AF6
VSS108AF5
VSS109AF3
VSS110AF2
VSS111AE35
VSS112AE34
VSS113AE33
VSS114AE32
VSS115AE31
VSS116AE30
VSS117AE29
VSS118AE28
VSS119AE27
VSS120AE26
VSS121AE9
VSS122AD7
VSS123AC9
VSS124AC8
VSS125AC6
VSS126AC5
VSS127AC3
VSS128AC2
VSS129AB35
VSS130AB34
VSS131AB33
VSS132AB32
VSS133AB31
VSS134AB30
VSS135AB29
VSS136AB28
VSS137AB27
VSS138AB26
VSS139Y9
VSS140Y8
VSS141Y6
VSS142Y5
VSS143Y3
VSS144Y2
VSS145W35
VSS146W34
VSS147W33
VSS148W32
VSS149W31
VSS150W30
VSS151W29
VSS152W28
VSS153W27
VSS154W26
VSS155U9
VSS156U8
VSS157U6
VSS158U5
VSS159U3
VSS160U2
CC
164
10U
_0603_6.3
V6M
~D
CC
164
10U
_0603_6.3
V6M
~D
1
2
CC
165
10U
_0603_6.3
V6M
~D
CC
165
10U
_0603_6.3
V6M
~D
1
2
CC151
0.1U_0402_10V7K~D
@CC151
0.1U_0402_10V7K~D
@
1
2
RC
81
1K
_0402_1%
~D
@R
C81
1K
_0402_1%
~D
@
12
RC
99
100_0402_1%
~D
RC
99
100_0402_1%
~D
12
RC
80
1K
_0402_1%
~D
@R
C80
1K
_0402_1%
~D
@
12
RC134 0_0402_5%~D@ RC134 0_0402_5%~D@1 2
RC82 0_0402_5%~D@ RC82 0_0402_5%~D@1 2
CC
171
10U
_0603_6.3
V6M
~D
CC
171
10U
_0603_6.3
V6M
~D
1
2
RC
100
100_0402_1%
~D
RC
100
100_0402_1%
~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_HVREF_RST
DIMM1_SA0
DIMM1_SA1
DDR_A_D0DDR_A_D1
DDR_A_D2DDR_A_D3
DDR_A_D8
DDR_A_D10DDR_A_D11
DDR_A_D18DDR_A_D19
DDR_A_D26DDR_A_D27
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_D17
DDR_A_D9
DDR_A_D16
DDR_A_D25DDR_A_D24
DDR_A_D32
DDR_A_D34DDR_A_D35
DDR_A_D40DDR_A_D41
DDR_A_D42DDR_A_D43
DDR_A_D49
DDR_A_D50DDR_A_D51
DDR_A_D56DDR_A_D57
DDR_A_D58DDR_A_D59
DDR_A_MA1DDR_A_MA3
DDR_A_MA5DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA12
DDR_A_MA13
DDR_A_DQS4
DDR_A_DQS6
DDR_A_DQS#4
DDR_A_DQS#6
DIMM1_SA0
DIMM1_SA1
DDR_A_D33
DDR_A_D48
DDR_A_D4DDR_A_D5
DDR_A_D6DDR_A_D7
DDR_A_D21
DDR_A_D28DDR_A_D29
DDR_A_DQS0
DDR_A_DQS3
DDR_A_DQS#0
DDR_A_DQS#3
DDR_A_D23
DDR_A_D31
DDR_A_D13
DDR_A_D20
DDR_A_D30
DDR_A_D14DDR_A_D15
DDR_A_D12
DDR_A_D22
DDR3_DRAMRST#_R
DDR_A_D36DDR_A_D37
DDR_A_D45
DDR_A_D46
DDR_A_D52DDR_A_D53
DDR_A_D55
DDR_A_D60DDR_A_D61
DDR_A_D62
DDR_A_MA2DDR_A_MA0
DDR_A_MA4DDR_A_MA6
DDR_A_MA7DDR_A_MA11
DDR_A_MA14
DDR_A_DQS5
DDR_A_DQS7
DDR_A_DQS#5
DDR_A_DQS#7
DDR_A_D63
DDR_A_MA15
DDR_A_D39
DDR_A_D54
DDR_A_D38
DDR_A_D47
DDR_A_D44
+0.75V_DDR_VTT
+1.5V_MEM
+1.5V_MEM
+1.5V_MEM
+DIMM0_1_VREF_CPU
+DIMM0_1_CA_CPU
+V_DDR_REFA_M3
+V_DDR_REFB_M3
+3.3V_RUN
+1.5V_MEM+DIMM1_VREF_DQ
+0.75V_DDR_VTT
+V_DDR_REF
+V_DDR_REFA_M3+1.5V_MEM
+0.75V_DDR_VTT
+DIMM1_VREF_CA
+V_DDR_REF
DDR_A_D[0..63]<8>
DDR_A_DQS[0..7]<8>
DDR_A_MA[0..15]<8>
DDR_A_DQS#[0..7]<8>
DDR3_DRAMRST# <7>DDR3_DRAMRST#_R<13>
DDR_HVREF_RST<7>
DDR_CKE0_DIMMA<8>
DDR_A_BS2<8>
DDR_CS1_DIMMA#<8>
DDR_A_WE#<8>DDR_A_CAS#<8>
DDR_A_BS0<8>
M_CLK_DDR#0<8>M_CLK_DDR0<8>
DDR_A_BS1 <8>
M_ODT0 <8>
DDR_A_RAS# <8>
M_CLK_DDR1 <8>M_CLK_DDR#1 <8>
DDR_CKE1_DIMMA <8>
DDR_CS0_DIMMA# <8>
M_ODT1 <8>
DDR_XDP_WAN_SMBCLK <7,13,14,15,27,34>DDR_XDP_WAN_SMBDAT <7,13,14,15,27,34>
Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
DDRIII-SODIMM SLOT1
12 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
DDRIII-SODIMM SLOT1
12 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
DDRIII-SODIMM SLOT1
12 61Friday, March 02, 2012
Compal Electronics, Inc.
M3 Circuit (Processor Generated SO-DIMM VREF_DQ)
Populate RD1, De-Populate RD7 for Intel DDR3
VREFDQ multiple methods M1
Populate RD7, De-Populate RD1 for Intel DDR3
VREFDQ multiple methods M3
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Layout Note:
Place near JDIMM1
Layout Note:
Place near JDIMM1.203,204
DELL CONFIDENTIAL/PROPRIETARY
Link CIS
2-3A to 1 DIMMs/channel
All VREF traces should
have 10 mil trace width
JDIMM1 Rev Type H=8mm
CD
710U
_0603_6.3
V6M
~D
CD
710U
_0603_6.3
V6M
~D
1
2
CD
41U
_0402_6.3
V6K
~D
CD
41U
_0402_6.3
V6K
~D
1
2
CD
910U
_0603_6.3
V6M
~D
CD
910U
_0603_6.3
V6M
~D
1
2
CD
51U
_0402_6.3
V6K
~D
CD
51U
_0402_6.3
V6K
~D
1
2
CD
810U
_0603_6.3
V6M
~D
CD
810U
_0603_6.3
V6M
~D
1
2
G
DS QD2BSS138_NL_SOT23-3
G
DS QD2BSS138_NL_SOT23-3
2
13
CD
21
0.1
U_0402_25V
6K
~D
CD
21
0.1
U_0402_25V
6K
~D
1
2
RD29 0_0402_5%~D@RD29 0_0402_5%~D@ 1 2G
DS QD1BSS138_NL_SOT23-3
G
DS QD1BSS138_NL_SOT23-3
2
13
CD
17
1U
_0402_6.3
V6K
~D
CD
17
1U
_0402_6.3
V6K
~D
1
2
CD
20.1
U_0402_25V
6K
~D
CD
20.1
U_0402_25V
6K
~D
1
2
CD
15
2.2
U_0603_6.3
V6K
~D
CD
15
2.2
U_0603_6.3
V6K
~D
1
2
CD
19
1U
_0402_6.3
V6K
~D
CD
19
1U
_0402_6.3
V6K
~D
1
2
RD2 10K_0402_5%~DRD2 10K_0402_5%~D1 2
RD7 0_0402_5%~D@RD7 0_0402_5%~D@1 2
CD
12.2
U_0603_6.3
V6K
~D
CD
12.2
U_0603_6.3
V6K
~D
1
2
CD
11
10U
_0603_6.3
V6M
~D
CD
11
10U
_0603_6.3
V6M
~D
1
2
RD1 0_0402_5%~D@RD1 0_0402_5%~D@1 2
CD
61U
_0402_6.3
V6K
~D
CD
61U
_0402_6.3
V6K
~D
1
2
RD3 10K_0402_5%~DRD3 10K_0402_5%~D1 2
CD
22
2.2
U_0603_6.3
V6K
~D
CD
22
2.2
U_0603_6.3
V6K
~D
1
2
+
CD
14
330U
_S
X_2V
Y~
D
+
CD
14
330U
_S
X_2V
Y~
D
1
2
CD
20
1U
_0402_6.3
V6K
~D
CD
20
1U
_0402_6.3
V6K
~D
1
2
CD
51
10U
_0603_6.3
V6M
~D
CD
51
10U
_0603_6.3
V6M
~D
1
2
CD
16
0.1
U_0402_25V
6K
~D
CD
16
0.1
U_0402_25V
6K
~D
1
2
RD30 0_0402_5%~D@RD30 0_0402_5%~D@ 1 2
RD28 1K_0402_1%~DRD28 1K_0402_1%~D1 2
CD
10
10U
_0603_6.3
V6M
~D
CD
10
10U
_0603_6.3
V6M
~D
1
2
CD
13
10U
_0603_6.3
V6M
~D
CD
13
10U
_0603_6.3
V6M
~D
1
2
CD
31U
_0402_6.3
V6K
~D
CD
31U
_0402_6.3
V6K
~D
1
2
RD
27
1K
_0402_1%
~D
RD
27
1K
_0402_1%
~D
12
RD11 0_0402_5%~D@RD11 0_0402_5%~D@12
JDIMM1
LCN_DAN06-K4806-0103CONN@
JDIMM1
LCN_DAN06-K4806-0103CONN@
VREF_DQ1
VSS12
VSS23
DQ44
DQ05
DQ56
DQ17
VSS38
VSS49
DQS#010
DM011
DQS012
VSS513
VSS614
DQ215
DQ616
DQ317
DQ718
VSS719
VSS820
DQ821
DQ1222
DQ923
DQ1324
VSS925
VSS1026
DQS#127
DM128
DQS129
RESET#30
VSS1131
VSS1232
DQ1033
DQ1434
DQ1135
DQ1536
VSS1337
VSS1438
DQ1639
DQ2040
DQ1741
DQ2142
VSS1543
VSS1644
DQS#245
DM246
DQS247
VSS1748
VSS1849
DQ2250
DQ1851
DQ2352
DQ1953
VSS1954
VSS2055
DQ2856
DQ2457
DQ2958
DQ2559
VSS2160
VSS2261
DQS#362
DM363
DQS364
VSS2365
VSS2466
DQ2667
DQ3068
DQ2769
DQ3170
VSS2571
VSS2672
A12/BC#83
A1184
A985
A786
VDD587
VDD688
A889
A690
CKE073
CKE174
VDD175
VDD276
NC177
A1578
BA279
A1480
VDD381
VDD482
A591
A492
VDD793
VDD894
A395
A296
A197
A098
VDD999
VDD10100
CK0101
CK1102
CK0#103
CK1#104
VDD11105
VDD12106
A10/AP107
BA1108
BA0109
RAS#110
VDD13111
VDD14112
WE#113
S0#114
CAS#115
ODT0116
VDD15117
VDD16118
A13119
ODT1120
S1#121
NC2122
VDD17123
VDD18124
NCTEST125
VREF_CA126
VSS27127
VSS28128
DQ32129
DQ36130
DQ33131
DQ37132
VSS29133
VSS30134
DQS#4135
DM4136
DQS4137
VSS31138
VSS32139
DQ38140
DQ34141
DQ39142
DQ35143
VSS33144
VSS34145
DQ44146
DQ40147
DQ45148
DQ41149
VSS35150
VSS36151
DQS#5152
DM5153
DQS5154
VSS37155
VSS38156
DQ42157
DQ46158
DQ43159
DQ47160
VSS39161
VSS40162
DQ48163
DQ52164
DQ49165
DQ53166
VSS41167
VSS42168
DQS#6169
DM6170
DQS6171
VSS43172
VSS44173
DQ54174
DQ50175
DQ55176
DQ51177
VSS45178
VSS46179
DQ60180
DQ56181
DQ61182
DQ57183
VSS47184
VSS48185
DQS#7186
DM7187
DQS7188
VSS49189
VSS50190
DQ58191
DQ62192
DQ59193
DQ63194
VSS51195
VSS52196
SA0197
EVENT#198
VDDSPD199
SDA200
SA1201
SCL202
VTT1203
VTT2204
G1205
G2206
CD
18
1U
_0402_6.3
V6K
~D
CD
18
1U
_0402_6.3
V6K
~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DIMM2_SA1
DIMM2_SA0
DDR_B_D22
DDR_B_D20
DDR_B_D23
DDR_B_D21
DDR_B_DQS#3
DDR_B_D14
DDR_B_DQS3
DDR_B_D7DDR_B_D6
DDR_B_D15
DDR_B_D28DDR_B_D29
DDR_B_D30
DDR_B_D12
DDR_B_D31
DDR_B_D13
DDR_B_D4DDR_B_D5
DDR_B_DQS#0DDR_B_DQS0
DDR_B_D27
DDR_B_D8
DDR_B_DQS1
DDR_B_D9
DDR_B_DQS#1
DDR_B_D0DDR_B_D1
DDR_B_D2DDR_B_D3
DDR_B_D10DDR_B_D11
DDR_B_D16DDR_B_D17
DDR_B_DQS#2DDR_B_DQS2
DDR_B_D18DDR_B_D19
DDR_B_D24DDR_B_D25
DDR_B_D26
DDR_B_D58DDR_B_D59
DIMM2_SA0
DDR_B_BS2
DIMM2_SA1
DDR_B_MA12DDR_B_MA9
DDR_B_MA8DDR_B_MA5
DDR_B_MA3DDR_B_MA1
M_CLK_DDR2M_CLK_DDR#2
DDR_B_MA10DDR_B_BS0
DDR_B_WE#DDR_B_CAS#
DDR_B_MA13
DDR_B_D32DDR_B_D33
DDR_B_DQS#4DDR_B_DQS4
DDR_B_D34DDR_B_D35
DDR_B_D40DDR_B_D41
DDR_B_D42DDR_B_D43
DDR_B_D48DDR_B_D49
DDR_B_DQS#6DDR_B_DQS6
DDR_B_D50DDR_B_D51
DDR_B_D52
DDR_B_D56
DDR_B_D37DDR_B_D36
DDR_B_D44
DDR_B_D57
DDR_B_D54
DDR_B_D53
DDR_B_D46
DDR_B_D45
DDR_B_D38
DDR_B_D47
DDR_B_D55
DDR_B_DQS#5
DDR_B_D39
DDR_B_D60
DDR_B_DQS5
DDR_B_D61
DDR_B_DQS#7DDR_B_DQS7
DDR_B_D62DDR_B_D63
DDR_B_MA7
M_ODT2
M_ODT3
DDR_B_MA14
DDR_B_MA6DDR_B_MA4
DDR_B_BS1
M_CLK_DDR3
DDR_B_RAS#
M_CLK_DDR#3
DDR_B_MA2
DDR_B_MA11
DDR_B_MA0
DDR_B_MA15
+3.3V_RUN
+1.5V_MEM
+1.5V_MEM
+0.75V_DDR_VTT
+1.5V_MEM+1.5V_MEM+DIMM2_VREF_DQ
+V_DDR_REFB_M3
+V_DDR_REF
+3.3V_RUN
+0.75V_DDR_VTT +0.75V_DDR_VTT
+DIMM2_VREF_CA
+V_DDR_REF
DDR_B_D[0..63]<8>
DDR_B_DQS[0..7]<8>
DDR_B_MA[0..15]<8>
DDR_B_DQS#[0..7]<8>
DDR3_DRAMRST#_R <12>
DDR_B_CAS#<8>DDR_B_WE#<8>
DDR_CKE2_DIMMB<8>
DDR_B_BS0<8>
DDR_B_BS2<8>
DDR_CS3_DIMMB#<8>
M_CLK_DDR2<8>M_CLK_DDR#2<8>
DDR_XDP_WAN_SMBCLK <7,12,14,15,27,34>DDR_XDP_WAN_SMBDAT <7,12,14,15,27,34>
DDR_CKE3_DIMMB <8>
DDR_B_RAS# <8>
DDR_B_BS1 <8>
M_ODT2 <8>DDR_CS2_DIMMB# <8>
M_ODT3 <8>
M_CLK_DDR3 <8>M_CLK_DDR#3 <8>
Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
DDRIII-SODIMM SLOT2
13 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
DDRIII-SODIMM SLOT2
13 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
DDRIII-SODIMM SLOT2
13 61Friday, March 02, 2012
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Populate RD4, De-Populate RD8 for Intel DDR3
VREFDQ multiple methods M1
Populate RD8, De-Populate RD4 for Intel DDR3
VREFDQ multiple methods M3
Layout Note:
Place near JDIMM2
Layout Note:
Place near JDIMM2.203,204
DELL CONFIDENTIAL/PROPRIETARY
All VREF traces should
have 10 mil trace width2-3A to 1 DIMMs/channel
JDIMM2 Rev Type H=4
Link CIS
CD
40
1U
_0402_6.3
V6K
~D
CD
40
1U
_0402_6.3
V6K
~D
1
2
CD
30
10U
_0603_6.3
V6M
~D
CD
30
10U
_0603_6.3
V6M
~D
1
2
CD
31
10U
_0603_6.3
V6M
~D
CD
31
10U
_0603_6.3
V6M
~D
1
2
CD
23
2.2
U_0603_6.3
V6K
~D
CD
23
2.2
U_0603_6.3
V6K
~D
1
2
CD
34
10U
_0603_6.3
V6M
~D
CD
34
10U
_0603_6.3
V6M
~D
1
2
CD
25
1U
_0402_6.3
V6K
~D
CD
25
1U
_0402_6.3
V6K
~D
1
2
CD
27
1U
_0402_6.3
V6K
~D
CD
27
1U
_0402_6.3
V6K
~D
1
2
RD5 10K_0402_5%~DRD5 10K_0402_5%~D12
CD
43
0.1
U_0402_25V
6K
~D
CD
43
0.1
U_0402_25V
6K
~D
1
2
CD
44
2.2
U_0603_6.3
V6K
~D
CD
44
2.2
U_0603_6.3
V6K
~D
1
2
CD
41
1U
_0402_6.3
V6K
~D
CD
41
1U
_0402_6.3
V6K
~D
1
2
CD
26
1U
_0402_6.3
V6K
~D
CD
26
1U
_0402_6.3
V6K
~D
1
2
RD15 0_0402_5%~D@ RD15 0_0402_5%~D@12
CD
39
1U
_0402_6.3
V6K
~D
CD
39
1U
_0402_6.3
V6K
~D
1
2
CD
24
0.1
U_0402_25V
6K
~D
CD
24
0.1
U_0402_25V
6K
~D
1
2
CD
42
1U
_0402_6.3
V6K
~D
CD
42
1U
_0402_6.3
V6K
~D
1
2
JDIMM2
LCN_DAN06-K4406-0103CONN@
JDIMM2
LCN_DAN06-K4406-0103CONN@
VREF_DQ1
VSS3
DQ05
DQ17
VSS9
DM011
VSS13
DQ215
DQ317
VSS19
DQ821
DQ923
VSS25
DQS1#27
DQS129
VSS31
DQ1033
DQ1135
VSS37
DQ1639
VSS2
DQ44
DQ56
VSS8
DQS0#10
DQS012
VSS14
DQ616
DQ718
VSS20
DQ1222
DQ1324
VSS26
DM128
RESET#30
VSS32
DQ1434
DQ1536
VSS38
DQ2040
DQ1741
VSS43
DQS2#45
DQS247
VSS49
DQ1851
DQ1953
VSS55
DQ2457
DQ2559
VSS61
DM363
VSS65
DQ2667
DQ2769
VSS71
CKE073
VDD75
NC77
BA279
VDD81
A12/BC#83
A985
VDD87
A889
A591
VDD93
A395
A197
VDD99
CK0101
CK0#103
VDD105
A10/AP107
BA0109
VDD111
WE#113
CAS#115
VDD117
A13119
S1#121
VDD123
TEST125
VSS127
DQ32129
DQ33131
VSS133
DQS4#135
DQS4137
VSS139
DQ34141
DQ35143
VSS145
DQ40147
DQ41149
VSS151
DM5153
VSS155
DQ42157
DQ43159
VSS161
DQ48163
DQ49165
VSS167
DQS6#169
DQS6171
VSS173
DQ50175
DQ51177
VSS179
DQ56181
DQ57183
VSS185
DM7187
VSS189
DQ58191
DQ59193
VSS195
SA0197
VDDSPD199
DQ2142
VSS44
DM246
VSS48
DQ2250
DQ2352
VSS54
DQ2856
DQ2958
VSS60
DQS3#62
DQS364
VSS66
DQ3068
DQ3170
VSS72
CKE174
VDD76
A1578
A1480
VDD82
A1184
A786
VDD88
A690
A492
VDD94
A296
A098
VDD100
CK1102
CK1#104
VDD106
BA1108
RAS#110
VDD112
S0#114
ODT0116
VDD118
ODT1120
NC122
VDD124
VREF_CA126
VSS128
DQ36130
DQ37132
VSS134
DM4136
VSS138
DQ38140
DQ39142
VSS144
DQ44146
DQ45148
VSS150
DQS5#152
DQS5154
VSS156
DQ46158
DQ47160
VSS162
DQ52164
DQ53166
VSS168
DM6170
VSS172
DQ54174
DQ55176
VSS178
DQ60180
DQ61182
VSS184
DQS7#186
DQS7188
VSS190
DQ62192
DQ63194
VSS196
EVENT#198
SDA200
SA1201
VTT203
GND1205
SCL202
VTT204
GND2206
BOSS1207
BOSS2208
CD
28
1U
_0402_6.3
V6K
~D
CD
28
1U
_0402_6.3
V6K
~D
1
2
CD
32
10U
_0603_6.3
V6M
~D
CD
32
10U
_0603_6.3
V6M
~D
1
2
RD6 10K_0402_5%~DRD6 10K_0402_5%~D12
CD
33
10U
_0603_6.3
V6M
~D
CD
33
10U
_0603_6.3
V6M
~D
1
2
RD4 0_0402_5%~D@ RD4 0_0402_5%~D@1 2
+
CD
36
330U
_S
X_2V
Y~
D
+
CD
36
330U
_S
X_2V
Y~
D
1
2
CD
38
0.1
U_0402_25V
6K
~D
CD
38
0.1
U_0402_25V
6K
~D
1
2
RD8 0_0402_5%~D@ RD8 0_0402_5%~D@1 2
CD
35
10U
_0603_6.3
V6M
~D
CD
35
10U
_0603_6.3
V6M
~D
1
2
CD
29
10U
_0603_6.3
V6M
~D
CD
29
10U
_0603_6.3
V6M
~D
1
2
CD
37
2.2
U_0603_6.3
V6K
~D
CD
37
2.2
U_0603_6.3
V6K
~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+3.3V_ALW_PCH_JTAG
PCH_AZ_MDC_SDIN1
PCH_AZ_RST#
PCH_AZ_CODEC_SDIN0
PCH_AZ_BITCLK
BBS_BIT0_R
HDD_DET#_R
XDP_FN15
PCH_PWRBTN#_XDP
DDR_XDP_WAN_SMBDAT_R2DDR_XDP_WAN_SMBCLK_R2
XDP_DBRESET#
PCH_JTAG_TDO
PCH_JTAG_TDIPCH_JTAG_TMSPCH_JTAG_TCK
RSMRST#_XDP
XDP_FN0XDP_FN1
XDP_FN2XDP_FN3
XDP_FN4XDP_FN5
XDP_FN6XDP_FN7
XDP_FN16XDP_FN17
XDP_FN8XDP_FN9
XDP_FN10XDP_FN11
XDP_FN12XDP_FN13
XDP_FN14
PCH_AZ_SDOUT
PCH_AZ_RST#
PCH_AZ_SYNC_Q
PCH_AZ_BITCLK
LPC_LAD2
LPC_LFRAME#
LPC_LDRQ1#
LPC_LAD0
LPC_LAD3
LPC_LAD1
SATA_COMP
PCH_AZ_SDOUT
RBIAS_SATA3
SATA3_COMP
IRQ_SERIRQ
SATA_ACT#
PCH_GPIO13
SPKR
HDD_DET#
USB_OC4#_R
USB_OC2#
USB_OC5#
USB_OC3#
SIO_EXT_SMI#USB_OC6#
USB_OC0#_RUSB_OC1#_R
XDP_FN8XDP_FN9
XDP_FN11XDP_FN10
XDP_FN12XDP_FN13XDP_FN14
SLP_ME_CSW_DEV#
XDP_FN15XDP_FN16XDP_FN17
USB_MCARD1_DET#HDD_DET#_RBBS_BIT0_R
PCH_GPIO37PCH_GPIO16TEMP_ALERT#
SIO_EXT_SCI#_RPCH_GPIO15
XDP_FN2XDP_FN1
XDP_FN4
XDP_FN6XDP_FN5
XDP_FN3
XDP_FN0
XDP_FN7
PCH_INTVRMEN
PCH_INTVRMEN
PCH_JTAG_TDI
PCH_JTAG_TMS
PCH_JTAG_TDO
PCH_JTAG_TCK
PCH_AZ_SYNC
PCH_RTCX2_R
PCH_RTCX1
PCH_RTCX2
IRQ_SERIRQ
PCH_SPI_CLK
PCH_SPI_CS1#
PCH_SPI_DIN
PCH_SPI_DO
PCH_GPIO33
1.05V_0.8V_PWROK_R
PCH_SPI_CS0#
PCH_SPI_DIN
PCH_SPI_CLK
PCH_SPI_DO
PCH_SPI_CS1#
PCH_SPI_CS0#
SPI_PCH_CS1#
SPI_PCH_CLK
SPI_PCH_DIN
SPI_PCH_DO
SPI_PCH_CS0#
SRTCRST#
PCH_RSMRST#_Q RSMRST#_XDP
PCH_GPIO36
PCH_AZ_SYNCPCH_AZ_SYNC_Q
PCH_AZ_SYNC
PCH_GPIO33
BBS_BIT0_R
PCH_AZ_SYNC_Q
SPI_PCH_DOSPI_PCH_CLKSPI_CLK32
SPI_HOLD#SPI_PCH_DINSPI_PCH_CS1#
SPI_CLK32
SPI_PCH_CS1#_RSPI_DIN32SPI_WP#_SEL_R
SPI_DO32
PCH_RTCRST#
PCH_GPIO13
INTRUDER#
PCH_SPI_CLK
SPI_CLK64
SPI_CLK64
SPI_DO64
SPI_PCH_DIN SPI_DIN64
SPI_PCH_DO
SPI_PCH_CLK
SPI_HOLD#
SPI_PCH_CS0# SPI_PCH_CS0#_R
SPI_WP#_SEL_R
+3.3V_ALW_PCH
+3.3V_ALW_PCH
+RTC_CELL
+1.05V_RUN
+RTC_CELL
+3.3V_ALW_PCH
+3.3V_ALW_PCH
+1.05V_RUN
+3.3V_ALW_PCH
+3.3V_ALW_PCH
+3.3V_RUN
+3.3V_ALW_PCH
+5V_RUN
+3.3V_SPI
+3.3V_M_RUN+3.3V_SPI
+3.3V_M_RUN
+3.3V_M
+3.3V_RUN
+3.3V_SPI
PCH_AZ_CODEC_SYNC<29>
PCH_AZ_CODEC_SDOUT<29>
PCH_AZ_CODEC_RST#<29>
PCH_AZ_CODEC_BITCLK<29>
PCH_AZ_MDC_SDIN1<37>
PCH_AZ_MDC_RST#<37>
PCH_AZ_CODEC_SDIN0<29>
IRQ_SERIRQ <32,39,40>
PCH_AZ_MDC_BITCLK<37>
SATA_ACT# <43>
SPKR<29>
HDD_DET# <27>
PCH_AZ_MDC_SYNC<37>
PCH_AZ_MDC_SDOUT<37>
XDP_DBRESET# <7,16>
SIO_PWRBTN#_R<7,16>
SLP_ME_CSW_DEV#<18,39>USB_MCARD1_DET#<18,34>
PCH_GPIO15<18>TEMP_ALERT#<18,39>
PCH_GPIO16<18>PCH_GPIO37<18>
USB_OC3#<17>USB_OC2#<17>
SIO_EXT_SCI#_R<18>
USB_OC6#<17>USB_OC5#<17>
USB_OC4#_R<17>
SIO_EXT_SMI#<17,40>
USB_OC1#_R<17>USB_OC0#_R<17>
PSATA_PRX_DTX_N0_C <27>
PSATA_PTX_DRX_P0_C <27>PSATA_PTX_DRX_N0_C <27>
PSATA_PRX_DTX_P0_C <27>
SATA_PRX_DKTX_P5_C <38>SATA_PRX_DKTX_N5_C <38>
SATA_PTX_DKRX_P5_C <38>SATA_PTX_DKRX_N5_C <38>
ESATA_PTX_DRX_P4_C <36>
ESATA_PRX_DTX_P4_C <36>ESATA_PRX_DTX_N4_C <36>
ESATA_PTX_DRX_N4_C <36>
SATA_ODD_PRX_DTX_P1_C <28>
SATA_ODD_PTX_DRX_N1_C <28>SATA_ODD_PTX_DRX_P1_C <28>
SATA_ODD_PRX_DTX_N1_C <28>
PCH_SATA_MOD_EN# <40>
ME_FWP<39>
1.05V_0.8V_PWROK<40,51>
LPC_LAD0 <32,34,39,40>LPC_LAD1 <32,34,39,40>LPC_LAD2 <32,34,39,40>LPC_LAD3 <32,34,39,40>
LPC_LFRAME# <32,34,39,40>
LPC_LDRQ1# <39>
PCH_PLTRST#<7,17>
PCH_RSMRST#_Q<16,41>
PCH_GPIO36<18>
DDR_XDP_WAN_SMBCLK<7,12,13,15,27,34>DDR_XDP_WAN_SMBDAT<7,12,13,15,27,34>
SPI_WP#_SEL<39>
Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
PCH (1/8)
14 61Saturday, March 03, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
PCH (1/8)
14 61Saturday, March 03, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
PCH (1/8)
14 61Saturday, March 03, 2012
Compal Electronics, Inc.
200 MIL SO8
32Mb Flash ROM
PCH_AZ_SYNC is sampled
at the rising edge of RSMRST# pin.
So signal should be PU to the ALWAYS rail.
CMOS setting
Shunt Clear CMOS
Keep CMOS
TPM setting
Shunt Clear ME RTC Registers
Keep ME RTC Registers
ME_CLR1
Open
CMOS_CLR1
Open
High - Enable Internal VRs
Low - Enable External VRs
INTVRMEN- Integrated SUS
1.1V VRM Enable
Close to UH4.T3
SPKR
No Reboot Strap
High = No Reboot
Low = Default
Close to U53
INTEL HDA_SYNC isolation circuit
BBS_BIT0 - BIOS BOOT STRAP BIT 0
DELL CONFIDENTIAL/PROPRIETARY
CMOS place near DIMM
HDD
E-SATA
DOCK
ODD/ E Module Bay
HM76(w/o vpro): depop RH350 and pop RH359
QM77(w/ vpro) : pop RH350 and depop RH359
Close to U52
200 MIL SO8
64Mb Flash ROM
RH
66
1K
_0
40
2_
1%
~D
RH
66
1K
_0
40
2_
1%
~D
12
U52
W25Q64CVSSIG_SO8
U52
W25Q64CVSSIG_SO8
CLK6
GND4
DIO5
DO2
/WP3
VCC8
/HOLD7
/CS1
R894 33_0402_5%~DR894 33_0402_5%~D1 2
RH19 33_0402_5%~DPXDP@ RH19 33_0402_5%~DPXDP@ 1 2
RH30 10K_0402_5%~DRH30 10K_0402_5%~D12
RTC
IHDA
SATA
LPC
SPI
JTAG
SATA 6G
UH4A
BD82HM77 QPRG C1_BGA989~D
RTC
IHDA
SATA
LPC
SPI
JTAG
SATA 6G
UH4A
BD82HM77 QPRG C1_BGA989~D
RTCX1A20
RTCX2C20
INTVRMENC17
INTRUDER#K22
HDA_BCLKN34
HDA_SYNCL34
HDA_RST#K34
HDA_SDIN0E34
HDA_SDIN1G34
HDA_SDIN2C34
HDA_SDOA36
SATALED#P3
FWH0 / LAD0C38
FWH1 / LAD1A38
FWH2 / LAD2B37
FWH3 / LAD3C37
LDRQ1# / GPIO23K36
FWH4 / LFRAME#D36
LDRQ0#E36
RTCRST#D20
HDA_SDIN3A34
HDA_DOCK_EN# / GPIO33C36
HDA_DOCK_RST# / GPIO13N32
SRTCRST#G22
SATA0RXNAM3
SATA0RXPAM1
SATA0TXNAP7
SATA0TXPAP5
SATA1RXNAM10
SATA1RXPAM8
SATA1TXNAP11
SATA1TXPAP10
SATA2RXNAD7
SATA2RXPAD5
SATA2TXNAH5
SATA2TXPAH4
SATA3RXNAB8
SATA3RXPAB10
SATA3TXNAF3
SATA3TXPAF1
SATA4RXNY7
SATA4RXPY5
SATA4TXNAD3
SATA4TXPAD1
SATA5RXNY3
SATA5RXPY1
SATA5TXNAB3
SATA5TXPAB1
SATAICOMPIY10
SPI_CLKT3
SPI_CS0#Y14
SPI_CS1#T1
SPI_MOSIV4
SPI_MISOU3
SATA0GP / GPIO21V14
SATA1GP / GPIO19P1
JTAG_TCKJ3
JTAG_TMSH7
JTAG_TDIK5
JTAG_TDOH1
SERIRQV5
SPKRT10
SATAICOMPOY11
SATA3COMPIAB13
SATA3RCOMPOAB12
SATA3RBIASAH1
R897 33_0402_5%~DR897 33_0402_5%~D1 2
RH45 200_0402_1%~DRH45 200_0402_1%~D12
RH
48
10
0_
04
02
_1
%~
D
@RH
48
10
0_
04
02
_1
%~
D
@
12
RH15 33_0402_5%~DPXDP@ RH15 33_0402_5%~DPXDP@ 1 2
RH290 0_0402_5%~D@RH290 0_0402_5%~D@ 1 2
RH13 33_0402_5%~DPXDP@ RH13 33_0402_5%~DPXDP@ 1 2
G
D S
QH1BSS138W-7-F_SOT323-3~DG
D S
QH1BSS138W-7-F_SOT323-3~D2
1 3
G
DS
QH7SSM3K7002FU_SC70-3~D
G
DS
QH7SSM3K7002FU_SC70-3~D
2
13
RH3480_0402_5%~D RH3480_0402_5%~D 12
JXDP2
SAMTE_BSH-030-01-L-D-A CONN@
JXDP2
SAMTE_BSH-030-01-L-D-A CONN@
GND01
OBSFN_A03
OBSFN_A15
GND27
OBSDATA_A09
OBSDATA_A111
GND413
OBSDATA_A215
OBSDATA_A317
GND619
OBSFN_B021
OBSFN_B123
GND825
OBSDATA_B027
OBSDATA_B129
GND1031
OBSDATA_B233
OBSDATA_B335
GND1237
PWRGOOD/HOOK039
HOOK141
VCC_OBS_AB43
HOOK245
HOOK347
GND1449
SDA51
SCL53
TCK155
TCK057
GND1659
GND12
OBSFN_C04
OBSFN_C16
GND38
OBSDATA_C010
OBSDATA_C112
GND514
OBSDATA_C216
OBSDATA_C318
GND720
OBSFN_D022
OBSFN_D124
GND926
OBSDATA_D028
OBSDATA_D130
GND1132
OBSDATA_D234
OBSDATA_D336
GND1338
ITPCLK/HOOK440
ITPCLK#/HOOK542
VCC_OBS_CD44
RESET#/HOOK646
DBR#/HOOK748
GND1550
TD052
TRST#54
TDI56
TMS58
GND1760
RH17 33_0402_5%~DPXDP@ RH17 33_0402_5%~DPXDP@ 1 2
RH
49
10
0_
04
02
_1
%~
D
@RH
49
10
0_
04
02
_1
%~
D
@
12
RH283 1K_0402_1%~DPXDP@RH283 1K_0402_1%~DPXDP@
1 2
RH20 33_0402_5%~DPXDP@ RH20 33_0402_5%~DPXDP@ 1 2
RH360 0_0603_5%~DRH360 0_0603_5%~D12
R901 33_0402_5%~DR901 33_0402_5%~D1 2
RH285 0_0402_5%~DPXDP@
RH285 0_0402_5%~DPXDP@
1 2
RH
39
33
0K
_0
40
2_
1%
~D
@R
H3
93
30
K_
04
02
_1
%~
D@
12
RH36 33_0402_5%~DRH36 33_0402_5%~D1 2
RH40 37.4_0402_1%~DRH40 37.4_0402_1%~D1 2
RH46 750_0402_1%~DRH46 750_0402_1%~D1 2
RH6 33_0402_5%~DPXDP@ RH6 33_0402_5%~DPXDP@ 1 2
RH284 0_0402_5%~DPXDP@RH284 0_0402_5%~DPXDP@
1 2
RH34 33_0402_5%~DRH34 33_0402_5%~D1 2
RH
38
33
0K
_0
40
2_
1%
~D
RH
38
33
0K
_0
40
2_
1%
~D
12
C745
0.1U_0402_25V6K~D
C745
0.1U_0402_25V6K~D
1 2
RH52 4.7K_0402_5%~DRH52 4.7K_0402_5%~D12
JSPI1
HRS_FH12-16S-0P5SH(55)~DCONN@
JSPI1
HRS_FH12-16S-0P5SH(55)~DCONN@
11
22
33
44
55
66
77
88
99
1010
1111
1212
1313
1414
1515
1616
G117
G218
CH3
15P_0402_50V8J~D
CH3
15P_0402_50V8J~D
12
RH43 200_0402_1%~DRH43 200_0402_1%~D12
RE
13
3_
04
02
_5
%~
D@
RE
13
3_
04
02
_5
%~
D@
12
R898 0_0402_5%~D@ R898 0_0402_5%~D@1 2
CH2
15P_0402_50V8J~D
CH2
15P_0402_50V8J~D
12
R899 33_0402_5%~DR899 33_0402_5%~D1 2
RH4 33_0402_5%~DPXDP@ RH4 33_0402_5%~DPXDP@ 1 2
RH9 33_0402_5%~DPXDP@ RH9 33_0402_5%~DPXDP@ 1 2
C746
0.1U_0402_25V6K~D
C746
0.1U_0402_25V6K~D
1 2
RH3470_0402_5%~D RH3470_0402_5%~D 12
RH3450_0402_5%~D RH3450_0402_5%~D 12
RH7 33_0402_5%~DPXDP@ RH7 33_0402_5%~DPXDP@ 1 2
RH24 1K_0402_1%~DPXDP@ RH24 1K_0402_1%~DPXDP@ 1 2
U53
W25Q32BVSSIG_SO8~D
U53
W25Q32BVSSIG_SO8~D
CS#1
DO2
WP#3
GND4
VCC8
HOLD#7
CLK6
DI5
CH5 1U_0402_6.3V6K~DCH5 1U_0402_6.3V6K~D1 2
CE
12
7P
_0
40
2_
50
V8
J~
D@
CE
12
7P
_0
40
2_
50
V8
J~
D@1
2
RH
28
80
_0
60
3_
5%
~D
@RH
28
80
_0
60
3_
5%
~D
@
12
R936 47_0402_5%~DR936 47_0402_5%~D1 2
RH3 33_0402_5%~DPXDP@ RH3 33_0402_5%~DPXDP@ 1 2
CH
10
12
7P
_0
40
2_
50
V8
J~
D@
CH
10
12
7P
_0
40
2_
50
V8
J~
D@
1
2
RH32 33_0402_5%~DRH32 33_0402_5%~D1 2
RH27 33_0402_5%~DRH27 33_0402_5%~D1 2
R900 33_0402_5%~DR900 33_0402_5%~D1 2
RH350 0_0603_5%~DRH350 0_0603_5%~D12
R712 100K_0402_5%~DR712 100K_0402_5%~D12
RH50 1K_0402_1%~DRH50 1K_0402_1%~D1 2
CH
10
.1U
_0
40
2_
25
V6
K~
DP
XD
P@
CH
10
.1U
_0
40
2_
25
V6
K~
DP
XD
P@
1
2
R8
90
3.3
K_
04
02
_5
%~
DR
89
03
.3K
_0
40
2_
5%
~D
12
RH355 100K_0402_5%~DRH355 100K_0402_5%~D12
RH8 33_0402_5%~DPXDP@ RH8 33_0402_5%~DPXDP@ 1 2
RH287 1K_0402_1%~D@RH287 1K_0402_1%~D@ 1 2
RH5 33_0402_5%~DPXDP@ RH5 33_0402_5%~DPXDP@ 1 2
RH42 49.9_0402_1%~DRH42 49.9_0402_1%~D1 2
CH100
27P_0402_50V8J~D
@ CH100
27P_0402_50V8J~D
@
12
CMOS1 SHORT PADS~D@CMOS1 SHORT PADS~D@
11
22
RE
23
3_
04
02
_5
%~
D@
RE
23
3_
04
02
_5
%~
D@
12
CE
22
7P
_0
40
2_
50
V8
J~
D@
CE
22
7P
_0
40
2_
50
V8
J~
D@1
2
RH1 33_0402_5%~DPXDP@ RH1 33_0402_5%~DPXDP@ 1 2
RH21 0_0402_5%~DPXDP@RH21 0_0402_5%~DPXDP@1 2
R8
91
3.3
K_
04
02
_5
%~
DR
89
13
.3K
_0
40
2_
5%
~D
12
RH59 51_0402_1%~DRH59 51_0402_1%~D12
RH286 0_0402_5%~D@ RH286 0_0402_5%~D@1 2
RH18 33_0402_5%~DPXDP@ RH18 33_0402_5%~DPXDP@ 1 2
RH16 33_0402_5%~DPXDP@ RH16 33_0402_5%~DPXDP@ 1 2
RH44 200_0402_1%~DRH44 200_0402_1%~D12
RH10 33_0402_5%~DPXDP@ RH10 33_0402_5%~DPXDP@ 1 2
RH28 8.2K_0402_5%~DRH28 8.2K_0402_5%~D12
CH4 1U_0402_6.3V6K~DCH4 1U_0402_6.3V6K~D1 2
ME1 SHORT PADS~D@ME1 SHORT PADS~D@
11
22
YH132.768KHZ_12.5PF_Q13FC1350000~DYH132.768KHZ_12.5PF_Q13FC1350000~D
12
RH23 20K_0402_5%~DRH23 20K_0402_5%~D1 2
RH
47
10
0_
04
02
_1
%~
D
@RH
47
10
0_
04
02
_1
%~
D
@
12
RH33 33_0402_5%~DRH33 33_0402_5%~D1 2
RH14 33_0402_5%~DPXDP@ RH14 33_0402_5%~DPXDP@ 1 2
RH
28
21
00
K_
04
02
_5
%~
D@
RH
28
21
00
K_
04
02
_5
%~
D@
12
RH26 33_0402_5%~DRH26 33_0402_5%~D1 2
CE
15
10
P_
04
02
_5
0V
8J~
D
@C
E1
51
0P
_0
40
2_
50
V8
J~
D
@1
2
RH11 1M_0402_5%~DRH11 1M_0402_5%~D1 2
RH359 0_0603_5%~D@ RH359 0_0603_5%~D@12
R895 33_0402_5%~DR895 33_0402_5%~D1 2
R935 47_0402_5%~DR935 47_0402_5%~D1 2
RH29 33_0402_5%~DRH29 33_0402_5%~D1 2
RH3460_0402_5%~D RH3460_0402_5%~D 12
RH31 1M_0402_5%~DRH31 1M_0402_5%~D1 2
RH3490_0402_5%~D RH3490_0402_5%~D 12
RH
21
0M
_0
40
2_
5%
~D
RH
21
0M
_0
40
2_
5%
~D
12
RH22 20K_0402_5%~DRH22 20K_0402_5%~D1 2
RH35 10K_0402_5%~D@RH35 10K_0402_5%~D@ 12
RH12 33_0402_5%~DPXDP@ RH12 33_0402_5%~DPXDP@ 1 2
RH25 33_0402_5%~DRH25 33_0402_5%~D1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SML1_SMBCLK
SML1_SMBDATA
PCH_SMB_ALERT#
MEM_SMBDATA
SML0CLK
SML0DATA
PCH_CL_RST1#
SML1_SMBCLK
PCH_CL_CLK1
SML1_SMBDATA
PCH_CL_DATA1
MEM_SMBCLK
MEM_SMBDATA
MEM_SMBCLK
PCIE_PRX_EXPTX_N3
PCIE_PTX_EXPRX_P3PCIE_PTX_EXPRX_N3PCIE_PRX_EXPTX_P3
PCIE_MINI3#PCIE_MINI3
PCIE_PTX_WLANRX_N2PCIE_PRX_WLANTX_P2PCIE_PRX_WLANTX_N2
PCIE_PTX_WLANRX_P2
PCIE_PTX_WANRX_N1PCIE_PTX_WANRX_P1
PCIE_PRX_WANTX_P1PCIE_PRX_WANTX_N1
MINI3CLK_REQ#
MINI2CLK_REQ#
PCIE_MINI2PCIE_MINI2#
PCIE_LANPCIE_LAN#
LANCLK_REQ#
PCIE_PTX_WPANRX_N5PCIE_PRX_WPANTX_P5PCIE_PRX_WPANTX_N5
PCIE_PTX_WPANRX_P5
PCIE_EXPPCIE_EXP#
EXPCLK_REQ#
MEM_SMBCLK
MEM_SMBDATA
SML0CLK
SML0DATA
PCH_SMB_ALERT#
DDR_HVREF_RST_PCH
XCLK_RCOMP
CLK_CPU_DMICLK_CPU_DMI#
PCH_GPIO74
CLK_PCI_LOOPBACK
CLK_BUF_DOT96CLK_BUF_DOT96#
CLK_BUF_CKSSCDCLK_BUF_CKSSCD#
CLK_BUF_DMI#
CLK_BUF_BCLK
CLK_BUF_DMI
CLK_BUF_BCLK
CLK_PCH_14M
DDR_HVREF_RST_PCH
PCH_GPIO74
CLK_BUF_CKSSCD
CLK_BUF_DOT96#CLK_BUF_DOT96
CLK_BUF_CKSSCD#
CLK_BUF_DMI#
CLK_PCH_14M
CLK_BUF_BCLK
CLK_BUF_DMI
PEG_B_CLKRQ#
MINI1CLK_REQ#
PCIE_MINI1#PCIE_MINI1
PCIE_PRX_GLANTX_P7PCIE_PRX_GLANTX_N7
PCIE_PTX_GLANRX_N7PCIE_PTX_GLANRX_P7
PCIE_PRX_MMITX_P6PCIE_PRX_MMITX_N6
PCIE_PTX_MMIRX_N6PCIE_PTX_MMIRX_P6
CLK_BCLK_ITPCLK_BCLK_ITP#
PCIECLKRQ7#
MMICLK_REQ#
PCIE_MMI#PCIE_MMI
PEG_A_CLKRQ#
PEG_A_CLKRQ#
XTAL25_OUTXTAL25_IN
CLK_48M
SIO_14M
PCI_TPM_TCM
PCH_CL_CLK1CLK_PCI_LOOPBACK
PCIECLKRQ6#
JETWAY_14M
MEM_SMBCLK
MEM_SMBDATA
+3.3V_ALW_PCH
+3.3V_RUN
+3.3V_ALW_PCH
+3.3V_ALW_PCH
+3.3V_RUN
+3.3V_ALW_PCH
+1.05V_RUN
+3.3V_ALW_PCH
+3.3V_ALW_PCH
+3.3V_ALW_PCH
+3.3V_ALW_PCH
+3.3V_ALW_PCH
PCH_CL_DATA1 <34>
PCH_CL_CLK1 <34>
PCH_CL_RST1# <34>
SML1_SMBDATA <30,40>
DDR_XDP_WAN_SMBDAT <7,12,13,14,27,34>
DDR_XDP_WAN_SMBCLK <7,12,13,14,27,34>
PCIE_PRX_WLANTX_P2<34>PCIE_PRX_WLANTX_N2<34>
PCIE_PRX_WANTX_P1<34>PCIE_PRX_WANTX_N1<34>
PCIE_PTX_WLANRX_N2<34>PCIE_PTX_WLANRX_P2<34>
PCIE_PTX_WANRX_P1<34>PCIE_PTX_WANRX_N1<34>
CLK_PCIE_EXP#<35>CLK_PCIE_EXP<35>
PCIE_PRX_EXPTX_P3<35>PCIE_PRX_EXPTX_N3<35>
EXPCLK_REQ#<35>
PCIE_PTX_EXPRX_P3<35>PCIE_PTX_EXPRX_N3<35>
CLK_PCIE_MINI2<34>
PCIE_PRX_WPANTX_N5<34>
MINI2CLK_REQ#<34>
CLK_PCIE_MINI2#<34>
CLK_PCIE_MINI3#<34>
PCIE_PTX_WPANRX_P5<34>PCIE_PTX_WPANRX_N5<34>
PCIE_PRX_WPANTX_P5<34>
MINI3CLK_REQ#<34>
CLK_PCIE_MINI3<34>
CLK_PCIE_LAN#<30>
LANCLK_REQ#<30>
CLK_PCIE_LAN<30>CLK_CPU_DMI# <7>CLK_CPU_DMI <7>
CLK_PCI_LOOPBACK <17>
CLK_PCIE_MINI1#<34>CLK_PCIE_MINI1<34>
MINI1CLK_REQ#<34>
PCIE_PTX_GLANRX_N7<30>
PCIE_PRX_GLANTX_P7<30>
PCIE_PTX_GLANRX_P7<30>
PCIE_PRX_GLANTX_N7<30>
DDR_HVREF_RST_PCH <7>
PCIE_PTX_MMIRX_N6<33>
PCIE_PRX_MMITX_P6<33>
PCIE_PTX_MMIRX_P6<33>
PCIE_PRX_MMITX_N6<33>
CLK_CPU_ITP#<7>CLK_CPU_ITP<7>
CLK_PCIE_MMI#<33>CLK_PCIE_MMI<33>
SML1_SMBCLK <30,40>
MMICLK_REQ#<33>
CLK_SMART_48M <35>
CLK_SIO_14M <39>
CLK_PCI_TPM_TCM <32>PCLK_80H <34>
JETWAY_CLK14M <32>
SIO_LAN_SMBDATA<30,40>
SIO_LAN_SMBCLK<30,40>
Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
PCH (2/8)
15 61Saturday, March 03, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
PCH (2/8)
15 61Saturday, March 03, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
PCH (2/8)
15 61Saturday, March 03, 2012
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
EXPRESS Card--->
Express card--->
WLAN (Mini Card 2)--->
WWAN (Mini Card 1)--->
WLAN (Mini Card 2)--->
10/100/1G LAN --->
1/2 MINI CARD-3 PCIE
(Mini Card 3)--->
PP (Mini Card 3)--->
WWAN (Mini Card 1)--->
10/100/1G LAN --->
CLOCK TERMINATION for FCIM and need close to PCH
MMI --->
PCIE REQ power rail:
suspend: 0 3 4 5 6 7
core: 1 2
MMI--->
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
RF review in 0629
RH300 1K_0402_1%~DRH300 1K_0402_1%~D12
RH78 10K_0402_5%~DRH78 10K_0402_5%~D1 2
RH313 22_0402_5%~DRH313 22_0402_5%~D12
RH98 10K_0402_5%~DRH98 10K_0402_5%~D1 2
RH97 10K_0402_5%~DRH97 10K_0402_5%~D12
RH303 2.2K_0402_5%~DRH303 2.2K_0402_5%~D12
RH307 0_0402_5%~D@RH307 0_0402_5%~D@ 12
RH304 10K_0402_5%~DRH304 10K_0402_5%~D12
CE
16
10
P_
04
02
_5
0V
8J~
D@
CE
16
10
P_
04
02
_5
0V
8J~
D@1
2
RH298 2.2K_0402_5%~DRH298 2.2K_0402_5%~D1 2
RH314 10_0402_1%~DRH314 10_0402_1%~D12
CH
18
10
P_
04
02
_5
0V
8J~
DC
H1
81
0P
_0
40
2_
50
V8
J~
D
1
2
RH280 0_0402_5%~D@RH280 0_0402_5%~D@ 12
RH
99
1M
_0
40
2_
5%
~D
RH
99
1M
_0
40
2_
5%
~D
12
CE
17
10
P_
04
02
_5
0V
8J~
D@
CE
17
10
P_
04
02
_5
0V
8J~
D@1
2
RH91 10K_0402_5%~DRH91 10K_0402_5%~D1 2
RH315 22_0402_5%~D@ RH315 22_0402_5%~D@ 12
RH87 10K_0402_5%~DRH87 10K_0402_5%~D1 2
RH88 0_0402_5%~D@ RH88 0_0402_5%~D@ 12
RH81 10K_0402_5%~DRH81 10K_0402_5%~D12
PCI-E*
CLOCKS
FLEX CLOCKS
SMBUS
Controller
Link
UH4B
BD82HM77 QPRG C1_BGA989~D
PCI-E*
CLOCKS
FLEX CLOCKS
SMBUS
Controller
Link
UH4B
BD82HM77 QPRG C1_BGA989~D
PERN1BG34
PERP1BJ34
PERN2BE34
PERP2BF34
PERN3BG36
PERP3BJ36
PERN4BF36
PERP4BE36
PERN5BG37
PERP5BH37
PERN6BJ38
PERP6BG38
PERN7BG40
PERP7BJ40
PERN8BE38
PERP8BC38
PETN1AV32
PETP1AU32
PETN2BB32
PETP2AY32
PETN3AV34
PETP3AU34
PETN4AY34
PETP4BB34
PETN5AY36
PETP5BB36
PETN6AU36
PETP6AV36
PETN7AY40
PETP7BB40
PETN8AW38
PETP8AY38
CLKOUT_PCIE0NY40
CLKOUT_PCIE0PY39
CLKOUT_PCIE1NAB49
CLKOUT_PCIE1PAB47
CLKOUT_PCIE2NAA48
CLKOUT_PCIE2PAA47
CLKOUT_PCIE3NY37
CLKOUT_PCIE3PY36
CLKOUT_PCIE4NY43
CLKOUT_PCIE4PY45
CLKOUT_PCIE5NV45
CLKOUT_PCIE5PV46
CLKIN_GND1_NBJ30
CLKIN_GND1_PBG30
CLKIN_DMI_NBF18
CLKIN_DMI_PBE18
CLKIN_DOT_96NG24
CLKIN_DOT_96PE24
CLKIN_SATA_NAK7
CLKIN_SATA_PAK5
XTAL25_INV47
XTAL25_OUTV49
REFCLK14INK45
CLKIN_PCILOOPBACKH45
CLKOUT_PEG_A_NAB37
CLKOUT_PEG_A_PAB38
PEG_A_CLKRQ# / GPIO47M10
PCIECLKRQ0# / GPIO73J2
PCIECLKRQ1# / GPIO18M1
PCIECLKRQ2# / GPIO20V10
PCIECLKRQ3# / GPIO25A8
PCIECLKRQ4# / GPIO26L12
PCIECLKRQ5# / GPIO44L14
CLKOUTFLEX0 / GPIO64K43
CLKOUTFLEX1 / GPIO65F47
CLKOUTFLEX2 / GPIO66H47
CLKOUTFLEX3 / GPIO67K49
CLKOUT_DMI_NAV22
CLKOUT_DMI_PAU22
PEG_B_CLKRQ# / GPIO56E6
CLKOUT_PEG_B_PAB40
CLKOUT_PEG_B_NAB42
XCLK_RCOMPY47
CLKOUT_DP_PAM13
CLKOUT_DP_NAM12
CLKOUT_PCIE6NV40
CLKOUT_PCIE6PV42
PCIECLKRQ7# / GPIO46K12
CLKOUT_PCIE7NV38
CLKOUT_PCIE7PV37
CLKOUT_ITPXDP_NAK14
CLKOUT_ITPXDP_PAK13
SMBALERT# / GPIO11E12
SMBCLKH14
SMBDATAC9
SML0ALERT# / GPIO60A12
SML0CLKC8
SML0DATAG12
SML1ALERT# / PCHHOT# / GPIO74C13
SML1CLK / GPIO58E14
SML1DATA / GPIO75M16
CL_CLK1M7
CL_DATA1T11
CL_RST1#P10
PCIECLKRQ6# / GPIO45T13
RH96 0_0402_5%~D@ RH96 0_0402_5%~D@ 12
RH309 0_0402_5%~D@ RH309 0_0402_5%~D@12
RH82 0_0402_5%~D@ RH82 0_0402_5%~D@ 12
RH75 10K_0402_5%~DRH75 10K_0402_5%~D1 2
QH8ADMN66D0LDW-7_SOT363-6~D
QH8ADMN66D0LDW-7_SOT363-6~D
6 1
2
RH93 0_0402_5%~D@ RH93 0_0402_5%~D@ 12
RH110 10K_0402_5%~DRH110 10K_0402_5%~D12
RH76 10K_0402_5%~DRH76 10K_0402_5%~D1 2
RH299 2.2K_0402_5%~DRH299 2.2K_0402_5%~D1 2
RH86 0_0402_5%~D@ RH86 0_0402_5%~D@ 12
RH305 2.2K_0402_5%~DRH305 2.2K_0402_5%~D12
RH152 10K_0402_5%~DRH152 10K_0402_5%~D12 RH183 10K_0402_5%~DRH183 10K_0402_5%~D1 2
RH80 10K_0402_5%~DRH80 10K_0402_5%~D12
RH322 22_0402_5%~DRH322 22_0402_5%~D12
RH308 0_0402_5%~D@RH308 0_0402_5%~D@ 12
RH85 0_0402_5%~D@ RH85 0_0402_5%~D@ 12
RH301 10K_0402_5%~DRH301 10K_0402_5%~D12
RH77 10K_0402_5%~DRH77 10K_0402_5%~D1 2
CH
19
10
P_
04
02
_5
0V
8J~
DC
H1
91
0P
_0
40
2_
50
V8
J~
D
1
2
RH281 0_0402_5%~D@RH281 0_0402_5%~D@ 12
YH225MHZ_10PF_Q22FA2380049900~D
YH225MHZ_10PF_Q22FA2380049900~D
IN1
GND2
OUT3
GND4
RH311 10_0402_1%~D5@ RH311 10_0402_1%~D5@ 12
RH90 0_0402_5%~D@ RH90 0_0402_5%~D@ 12
RH100 90.9_0402_1%~DRH100 90.9_0402_1%~D1 2
QH5BDMN66D0LDW-7_SOT363-6~D
QH5BDMN66D0LDW-7_SOT363-6~D
3
5
4
RH302 2.2K_0402_5%~DRH302 2.2K_0402_5%~D12
QH5ADMN66D0LDW-7_SOT363-6~D
QH5ADMN66D0LDW-7_SOT363-6~D
6 1
2
RH95 0_0402_5%~D@ RH95 0_0402_5%~D@ 12
RH83 0_0402_5%~D@ RH83 0_0402_5%~D@ 12
RH79 10K_0402_5%~DRH79 10K_0402_5%~D1 2
RH94 10K_0402_5%~DRH94 10K_0402_5%~D12
QH8BDMN66D0LDW-7_SOT363-6~D
QH8BDMN66D0LDW-7_SOT363-6~D
3
5
4
RH104 10K_0402_5%~DRH104 10K_0402_5%~D12
RH92 0_0402_5%~D@ RH92 0_0402_5%~D@ 12
RH306 2.2K_0402_5%~DRH306 2.2K_0402_5%~D12
RH74 10K_0402_5%~DRH74 10K_0402_5%~D1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCH_PCIE_WAKE#
CLKRUN#
SIO_SLP_LAN#
ME_SUS_PWR_ACK
PCH_RI#
CRT_IREF
PCH_CRT_DDC_DATPCH_CRT_DDC_CLK
HSYNCVSYNC
PCH_CRT_BLUPCH_CRT_GRNPCH_CRT_RED
ENVDD_PCH
BIA_PWM_PCH
FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC1
FDI_LSYNC0
FDI_CTX_PRX_N0FDI_CTX_PRX_N1FDI_CTX_PRX_N2FDI_CTX_PRX_N3FDI_CTX_PRX_N4FDI_CTX_PRX_N5FDI_CTX_PRX_N6FDI_CTX_PRX_N7
FDI_CTX_PRX_P0FDI_CTX_PRX_P1FDI_CTX_PRX_P2FDI_CTX_PRX_P3FDI_CTX_PRX_P4FDI_CTX_PRX_P5FDI_CTX_PRX_P6FDI_CTX_PRX_P7
PANEL_BKEN_PCH
SIO_PWRBTN#_R
PCH_BATLOW#
DMI_COMP_R
PCH_RI#
DMI_CRX_PTX_N1
DMI_CRX_PTX_P0
DMI_CRX_PTX_P3
DMI_CTX_PRX_P0
DMI_CRX_PTX_N2
DMI_CRX_PTX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_N2DMI_CTX_PRX_N3
DMI_CTX_PRX_P3
DMI_CRX_PTX_P2
DMI_CTX_PRX_N1
DMI_CRX_PTX_N0
DMI_CTX_PRX_N0
DMI_CTX_PRX_P1
DMI_CRX_PTX_N3
PCH_PWROK
AC_PRESENT
SUSACK#_R
RBIAS_CPY
SIO_SLP_S5#
SIO_SLP_S4#
SIO_SLP_S3#
SIO_SLP_A#
SUSCLK
PCH_DPWROK
PCH_PCIE_WAKE#
CLKRUN#
SIO_SLP_SUS#
SUS_STAT#/LPCPD#
SIO_SLP_LAN#
H_PM_SYNC
PCH_RSMRST#_R
ME_SUS_PWR_ACK_R
SUS_STAT#/LPCPD#
PM_DRAM_PWRGD_R
LCD_ACLK+_PCHLCD_ACLK-_PCH
LCD_BCLK+_PCHLCD_BCLK-_PCH
LCD_A2-_PCH
LCD_A0-_PCHLCD_A1-_PCH
LCD_A0+_PCH
LCD_A2+_PCHLCD_A1+_PCH
LCD_B2-_PCH
LCD_B0-_PCHLCD_B1-_PCH
LCD_B0+_PCH
LCD_B2+_PCHLCD_B1+_PCH
LVD_IBG
LDDC_CLK_PCHLDDC_DATA_PCH
PCH_DPWROK PCH_RSMRST#_R
ME_SUS_PWR_ACK_R SUSACK#_R
DSWODVREN
PCH_SDVO_CTRLCLK
PCH_SDVO_CTRLDATA
PCH_CRT_DDC_DAT
SYS_RESET#ME_RESET#
ME_RESET#
SYS_PWROK_R
PM_APWROK_R
SYS_RESET#
PCH_CRT_BLU
PCH_CRT_GRN
PCH_CRT_RED
ENVDD_PCH
DSWODVRENPCH_CRT_DDC_CLK
SYS_PWROK_R RESET_OUT#
RESET_OUT# PM_APWROK_R
PM_APWROK_RSIO_SLP_A#
+3.3V_ALW_PCH
+3.3V_RUN
+1.05V_RUN
+3.3V_ALW_PCH
+3.3V_RUN
+RTC_CELL
+3.3V_RUN
+3.3V_ALW2
PCH_CRT_BLU<23>PCH_CRT_GRN<23>PCH_CRT_RED<23>
BIA_PWM_PCH<24>
ENVDD_PCH<24,39>
FDI_INT <6>
FDI_FSYNC0 <6>
FDI_FSYNC1 <6>
FDI_LSYNC1 <6>
FDI_LSYNC0 <6>
FDI_CTX_PRX_N0 <6>FDI_CTX_PRX_N1 <6>FDI_CTX_PRX_N2 <6>FDI_CTX_PRX_N3 <6>FDI_CTX_PRX_N4 <6>FDI_CTX_PRX_N5 <6>FDI_CTX_PRX_N6 <6>FDI_CTX_PRX_N7 <6>
FDI_CTX_PRX_P0 <6>FDI_CTX_PRX_P1 <6>FDI_CTX_PRX_P2 <6>FDI_CTX_PRX_P3 <6>FDI_CTX_PRX_P4 <6>FDI_CTX_PRX_P5 <6>FDI_CTX_PRX_P6 <6>FDI_CTX_PRX_P7 <6>
PANEL_BKEN_PCH<24>
RESET_OUT#<40>
SIO_PWRBTN#<40>
DMI_CTX_PRX_P0<6>
DMI_CTX_PRX_P3<6>
DMI_CRX_PTX_N0<6>
DMI_CTX_PRX_P1<6>DMI_CTX_PRX_P2<6>
DMI_CRX_PTX_N2<6>DMI_CRX_PTX_N1<6>
DMI_CTX_PRX_N1<6>DMI_CTX_PRX_N0<6>
DMI_CRX_PTX_N3<6>
DMI_CRX_PTX_P0<6>
DMI_CTX_PRX_N3<6>DMI_CTX_PRX_N2<6>
DMI_CRX_PTX_P3<6>DMI_CRX_PTX_P2<6>DMI_CRX_PTX_P1<6>
SIO_PWRBTN#_R<7,14>
AC_PRESENT<40>
SUSACK#<39> PCH_DPWROK <39>
PCH_PCIE_WAKE# <40>
SIO_SLP_S4# <39,42,46>
SIO_SLP_S3# <11,27,35,39,42,47,48,49>
SIO_SLP_S5# <40,42>
H_PM_SYNC <7>
SIO_SLP_A# <39,42,48>
SIO_SLP_LAN# <30,39>
CLKRUN# <32,39,40>
SIO_SLP_SUS# <39>
PCH_RSMRST#_Q<14,41>
ME_SUS_PWR_ACK<40>
SYS_PWROK<7,39>
PM_DRAM_PWRGD<7>
PCH_CRT_HSYNC<23>PCH_CRT_VSYNC<23>
LCD_ACLK-_PCH<24>LCD_ACLK+_PCH<24>
LCD_BCLK-_PCH<24>LCD_BCLK+_PCH<24>
LCD_A0-_PCH<24>LCD_A1-_PCH<24>LCD_A2-_PCH<24>
LCD_A2+_PCH<24>
LCD_A0+_PCH<24>LCD_A1+_PCH<24>
LCD_B0-_PCH<24>LCD_B1-_PCH<24>LCD_B2-_PCH<24>
LCD_B2+_PCH<24>
LCD_B0+_PCH<24>LCD_B1+_PCH<24>
LDDC_DATA_PCH<24>LDDC_CLK_PCH<24>
DPC_PCH_LANE_N0 <38>
DPC_PCH_LANE_N1 <38>
DPC_PCH_LANE_N2 <38>
DPC_PCH_LANE_N3 <38>
DPC_PCH_LANE_P0 <38>
DPC_PCH_LANE_P1 <38>
DPC_PCH_LANE_P2 <38>
DPC_PCH_LANE_P3 <38>
DPC_PCH_DOCK_AUX <26>DPC_PCH_DOCK_HPD <38>
DPC_PCH_DOCK_AUX# <26>
PCH_DDPC_CTRLDATA <26>
PCH_DDPC_CTRLCLK <26>
DPD_PCH_LANE_P0 <38>
DPD_PCH_LANE_P1 <38>
DPD_PCH_LANE_P2 <38>
DPD_PCH_LANE_P3 <38>
PCH_DDPD_CTRLDATA <26>
PCH_DDPD_CTRLCLK <26>
DPD_PCH_DOCK_AUX <26>DPD_PCH_DOCK_HPD <38>
DPD_PCH_LANE_N0 <38>
DPD_PCH_LANE_N1 <38>
DPD_PCH_LANE_N2 <38>
DPD_PCH_LANE_N3 <38>
DPD_PCH_DOCK_AUX# <26>
TMDSB_PCH_CLK# <25>
TMDSB_PCH_N0 <25>
TMDSB_PCH_N1 <25>
TMDSB_PCH_N2 <25>
TMDSB_PCH_P1 <25>
TMDSB_PCH_P2 <25>
TMDSB_PCH_CLK <25>
TMDSB_PCH_P0 <25>
HDMIB_PCH_HPD <25>
PCH_SDVO_CTRLDATA <25>
PCH_SDVO_CTRLCLK <25>
XDP_DBRESET#<7,14>
PCH_CRT_DDC_CLK<23>PCH_CRT_DDC_DAT<23>
PM_APWROK<40>
Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
PCH (3/8)
16 61Saturday, March 03, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
PCH (3/8)
16 61Saturday, March 03, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
PCH (3/8)
16 61Saturday, March 03, 2012
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
Minimum speacing of 20mils for LVD_IBG
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Disabled
LOW: RH129 STUFFED,
RH127 UNSTUFFED
DSWODVREN - On Die DSW VR Enable
HIGH: RH127 STUFFED,
RH129 UNSTUFFED
Enabled (DEFAULT)RH351 2.2K_0402_5%~DRH351 2.2K_0402_5%~D
12
RH
127
330K
_0402_1%
~D
RH
127
330K
_0402_1%
~D
12
RH323 0_0402_5%~D@RH323 0_0402_5%~D@1 2 RH352 2.2K_0402_5%~DRH352 2.2K_0402_5%~D
12
RH
129
330K
_0402_1%
~D
@R
H129
330K
_0402_1%
~D
@12
RH139 8.2K_0402_5%~DRH139 8.2K_0402_5%~D1 2
RH317 2.2K_0402_5%~DRH317 2.2K_0402_5%~D12
RH116 0_0402_5%~D@RH116 0_0402_5%~D@1 2
RH142 10K_0402_5%~DRH142 10K_0402_5%~D1 2
DMI
FDI
System Power Management
UH4C
BD82HM77 QPRG C1_BGA989~D
DMI
FDI
System Power Management
UH4C
BD82HM77 QPRG C1_BGA989~D
DMI0RXNBC24
DMI1RXNBE20
DMI2RXNBG18
DMI3RXNBG20
DMI0RXPBE24
DMI1RXPBC20
DMI2RXPBJ18
DMI3RXPBJ20
DMI0TXNAW24
DMI1TXNAW20
DMI2TXNBB18
DMI3TXNAV18
DMI0TXPAY24
DMI1TXPAY20
DMI2TXPAY18
DMI3TXPAU18
DMI_ZCOMPBJ24
DMI_IRCOMPBG25
FDI_RXN0BJ14
FDI_RXN1AY14
FDI_RXN2BE14
FDI_RXN3BH13
FDI_RXN4BC12
FDI_RXN5BJ12
FDI_RXN6BG10
FDI_RXN7BG9
FDI_RXP0BG14
FDI_RXP1BB14
FDI_RXP2BF14
FDI_RXP3BG13
FDI_RXP4BE12
FDI_RXP5BG12
FDI_RXP6BJ10
FDI_RXP7BH9
FDI_FSYNC0AV12
FDI_FSYNC1BC10
FDI_LSYNC0AV14
FDI_LSYNC1BB10
FDI_INTAW16
PMSYNCHAP14
SLP_SUS#G16
SLP_S3#F4
SLP_S4#H4
SLP_S5# / GPIO63D10
SYS_RESET#K3
SYS_PWROKP12
PWRBTN#E20
RI#A10
WAKE#B9
SUS_STAT# / GPIO61G8
SUSCLK / GPIO62N14
ACPRESENT / GPIO31H20
BATLOW# / GPIO72E10
PWROKL22
CLKRUN# / GPIO32N3
SUSWARN#/SUSPWRDNACK/GPIO30K16
RSMRST#C21
DRAMPWROKB13
SLP_LAN# / GPIO29K14
APWROKL10
DPWROKE22
DMI2RBIASBH21
SLP_A#G10
DSWVRMENA18
SUSACK#C12
RH121 0_0402_5%~D@RH121 0_0402_5%~D@1 2
RH137 8.2K_0402_5%~DRH137 8.2K_0402_5%~D1 2
RH320 0_0402_5%~D@RH320 0_0402_5%~D@1 2
RH321 0_0402_5%~D@RH321 0_0402_5%~D@12
RH133 150_0402_1%~DRH133 150_0402_1%~D12
T62 PAD~D @T62 PAD~D @
T57 PAD~D @T57 PAD~D @
RH132 150_0402_1%~DRH132 150_0402_1%~D12
RH319 10K_0402_5%~D@RH319 10K_0402_5%~D@1 2
RH
126
1K
_0402_0.5
%~
DR
H126
1K
_0402_0.5
%~
D
12
RH357 0_0402_5%~DRH357 0_0402_5%~D1 2
CH108
0.1U_0402_25V6K~D
CH108
0.1U_0402_25V6K~D
1 2
RH114 0_0402_5%~D@RH114 0_0402_5%~D@1 2
RH131 150_0402_1%~DRH131 150_0402_1%~D12
RH141 8.2K_0402_5%~D@RH141 8.2K_0402_5%~D@12
RH140 10K_0402_5%~DRH140 10K_0402_5%~D1 2
RH138 8.2K_0402_5%~D@RH138 8.2K_0402_5%~D@1 2
RH123 20_0402_1%~DRH123 20_0402_1%~D1 2
RH316 2.2K_0402_5%~DRH316 2.2K_0402_5%~D12
RH111 49.9_0402_1%~DRH111 49.9_0402_1%~D1 2
RH344 2.37K_0402_1%~DRH344 2.37K_0402_1%~D1 2
RH113 0_0402_5%~D@RH113 0_0402_5%~D@1 2
T63 PAD~D @T63 PAD~D @
RH122 0_0402_5%~D@RH122 0_0402_5%~D@1 2
RH120 0_0402_5%~D@RH120 0_0402_5%~D@1 2
T56 PAD~D @T56 PAD~D @RH117 0_0402_5%~D@RH117 0_0402_5%~D@
1 2
LVDS
Digital Display Interface
CRT
UH4D
BD82HM77 QPRG C1_BGA989~D
LVDS
Digital Display Interface
CRT
UH4D
BD82HM77 QPRG C1_BGA989~D
L_BKLTCTLP45
L_BKLTENJ47
L_CTRL_CLKT45
L_CTRL_DATAP39
L_DDC_CLKT40
L_DDC_DATAK47
L_VDD_ENM45
LVDSA_CLK#AK39
LVDSA_CLKAK40
LVDSA_DATA#0AN48
LVDSA_DATA#1AM47
LVDSA_DATA#2AK47
LVDSA_DATA#3AJ48
LVDSA_DATA0AN47
LVDSA_DATA1AM49
LVDSA_DATA2AK49
LVDSA_DATA3AJ47
LVDSB_CLK#AF40
LVDSB_CLKAF39
LVDSB_DATA#0AH45
LVDSB_DATA#1AH47
LVDSB_DATA#2AF49
LVDSB_DATA#3AF45
LVDSB_DATA0AH43
DDPB_0NAV42
DDPB_1NAV45
LVD_VREFHAE48
LVD_VREFLAE47
DDPD_2NBF42
DDPD_3NBJ42
DDPB_2NAU48
DDPB_3NAV47
DDPC_0NAY47
DDPC_1NAY43
DDPC_2NBA47
DDPC_3NBB47
DDPD_0NBB43
DDPD_1NBF44
DDPB_0PAV40
DDPB_1PAV46
DDPD_2PBE42
DDPD_3PBG42
DDPB_2PAU47
DDPB_3PAV49
LVDSB_DATA1AH49
LVDSB_DATA2AF47
LVDSB_DATA3AF43
LVD_IBGAF37
LVD_VBGAF36
DDPC_1PAY45
DDPC_0PAY49
DDPC_2PBA48
DDPC_3PBB49
DDPD_0PBB45
DDPD_1PBE44
CRT_BLUEN48
CRT_DDC_CLKT39
CRT_DDC_DATAM40
CRT_GREENP49
CRT_HSYNCM47
CRT_IRTNT42
CRT_REDT49
CRT_VSYNCM49
DAC_IREFT43
SDVO_CTRLCLKP38
SDVO_CTRLDATAM39
DDPC_CTRLCLKP46
DDPC_CTRLDATAP42
DDPD_CTRLCLKM43
DDPD_CTRLDATAM36
DDPB_AUXNAT49
DDPC_AUXNAP47
DDPD_AUXNAT45
DDPB_AUXPAT47
DDPC_AUXPAP49
DDPD_AUXPAT43
DDPB_HPDAT40
DDPC_HPDAT38
DDPD_HPDBH41
SDVO_TVCLKINPAP45
SDVO_TVCLKINNAP43
SDVO_STALLPAM40
SDVO_STALLNAM42
SDVO_INTPAP40
SDVO_INTNAP39
T58 PAD~D @T58 PAD~D @
RH124 20_0402_1%~DRH124 20_0402_1%~D1 2
CH99
0.1U_0402_25V6K~D
@CH99
0.1U_0402_25V6K~D
@
1 2
RH144 10K_0402_5%~DRH144 10K_0402_5%~D1 2
T59 PAD~D @T59 PAD~D @
RH112 750_0402_1%~DRH112 750_0402_1%~D1 2
RH318 10K_0402_5%~D@RH318 10K_0402_5%~D@1 2
UC374AHC1G09GW_TSSOP5~D
@UC374AHC1G09GW_TSSOP5~D
@
B1
A2
G3
O4
P5
RH134 100K_0402_5%~DRH134 100K_0402_5%~D12
RH118 0_0402_5%~D@RH118 0_0402_5%~D@1 2
UH5TC7SH08FU_SSOP5~D
UH5TC7SH08FU_SSOP5~D
B1
A2
G3
O4
P5
RH119 0_0402_5%~D@RH119 0_0402_5%~D@1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CAM_MIC_CBL_DET#
USBP10+USBP10-
USBP11+USBP11-
USBP9+
USBP0-USBP0+
USBP3+
USBP5+
USBP7+
USBP3-
USBP1-
USBP9-
USBP8-USBP8+
USBP5-
USBP7-
USBP4-
USBP2+
USBP4+
USBP2-USBP1+
USBRBIAS
USB_OC4#_RUSB_OC3#USB_OC1#_RUSB_OC0#_R
PCI_GNT3#
BBS_BIT1
BT_DET#
USBP6+USBP6-
USB_OC0#_R
USB_OC2#USB_OC3#
USB_OC5#USB_OC6#
USB_OC1#_R
USBP13+USBP13-
PCI_REQ1#
PCH_PLTRST#
LCD_CBL_DET#
PCI_GNT3#
FFS_PCH_INT
PCI_LOOPBACKOUT
PCI_MECPCI_5048
PCI_DOCK
BBS_BIT1
PCI_PIRQA#
PCI_PIRQC#PCI_PIRQD#
PCI_PIRQB#
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_REQ1#
LCD_CBL_DET#
USBP12+USBP12-
PCH_GPIO3
PCH_GPIO3
USB_OC4#_R
CAM_MIC_CBL_DET#
PCH_PLTRST#
SIO_EXT_SMI#USB_OC6#USB_OC5#USB_OC2#
PCIE_MCARD2_DET#
+3.3V_RUN
+3.3V_RUN
+3.3V_ALW_PCH
PCH_PLTRST#_EC <32,34,35,39,40>
USBP10+ <35>USBP10- <35>
USBP11+ <41>USBP11- <41>
USBP4+ <34>USBP5- <34>
USBP3+ <38>
USBP5+ <34>
USBP4- <34>
USBP3- <38>USBP2+ <36>USBP2- <36>USBP1+ <36>USBP1- <36>
USBP0- <37>USBP0+ <37>
USBP9+ <37>USBP9- <37>
USB_OC0# <36,37>USB_OC1# <36>
USB_OC0#_R <14>USB_OC1#_R <14>
USB_OC2# <14>USB_OC3# <14>USB_OC4# <37>USB_OC5# <14>USB_OC6# <14>
LCD_CBL_DET#<24>
PCIE_MCARD2_DET#<34>BT_DET#<41>
HDD_FALL_INT<27>
CLK_PCI_MEC<40>CLK_PCI_5048<39>
CLK_PCI_LOOPBACK<15>
CLK_PCI_DOCK<38>
PLTRST_LAN#<30>
PLTRST_MMI#<33>PLTRST_XDP#<7>
USBP12- <24>USBP12+ <24>
PCH_PLTRST#<7,14>
SIO_EXT_SMI# <14,40>
USB3RN2<36>
USB3RN4<38>
USB3RP4<38>
USB3TN4<38>
USB3TP4<38>
USB_OC4#_R <14>
CAM_MIC_CBL_DET#<24>
USB3RN3<36>
USB3RP3<36>USB3RP2<36>
USB3TN3<36>USB3TN2<36>
USB3TP3<36>USB3TP2<36>
USBP13- <32>USBP13+ <32>
USBP6- <34>USBP6+ <34>
USBP7+ <38>USBP7- <38>
Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
PCH (4/8)
17 61Saturday, March 03, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
PCH (4/8)
17 61Saturday, March 03, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
PCH (4/8)
17 61Saturday, March 03, 2012
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
----->Camera
----->Left side E-SATA
----->MLK DOCK
----->Blue Tooth
----->Express Card
----->Flash
----->WLAN/WIMAX
----->Left Side
----->Back Right--IO
----->WWAN/UWB
----->Right side--IO
Route single-end 50-ohms and max 500-mils length.
Minimum spacing to other signals: 15 mils
----->BIO
Reserve for ESD in 6/22
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
A16 swap override Strap/Top-Block
Swap Override jumper
PCI_GNT#3Low = A16 swap
High = Default
0 1 Reserved (NAND)
1 0 PCI
11 SPI
SATA_SLPD
(BBS_BIT0)
Boot BIOS Strap
BBS_BIT1 Boot BIOS Location
*
00 LPC
----->DOCK
----->Non used
T67PAD~D @T67PAD~D @
CE
10
0.1
U_
04
02
_2
5V
6K
~D
@C
E1
00
.1U
_0
40
2_
25
V6
K~
D@
1
2
RH332 10K_0402_5%~DRH332 10K_0402_5%~D1 2
T69PAD~D @T69PAD~D @
RSVD
PCI
USB
USB30
UH4E
BD82HM77 QPRG C1_BGA989~D
RSVD
PCI
USB
USB30
UH4E
BD82HM77 QPRG C1_BGA989~D
RSVD23AV5
RSVD1AY7
RSVD2AV7
RSVD3AU3
RSVD4BG4
RSVD5AT10
RSVD6BC8
RSVD7AU2
RSVD8AT4
RSVD17BB5
RSVD18BB3
RSVD19BB7
RSVD20BE8
RSVD21BD4
RSVD22BF6
RSVD9AT3
RSVD10AT1
RSVD11AY3
RSVD12AT5
RSVD13AV3
RSVD14AV1
RSVD15BB1
RSVD16BA3
RSVD25AT8
RSVD24AV10
RSVD26AY5
RSVD27BA2
RSVD28AT12
RSVD29BF3
PIRQA#K40
PIRQB#K38
PIRQC#H38
PIRQD#G38
REQ1# / GPIO50C46
REQ2# / GPIO52C44
REQ3# / GPIO54E40
GNT1# / GPIO51D47
GNT2# / GPIO53E42
GNT3# / GPIO55F46
PIRQE# / GPIO2G42
PIRQF# / GPIO3G40
PIRQG# / GPIO4C42
PIRQH# / GPIO5D44
USBP0NC24
USBP0PA24
USBP1NC25
USBP1PB25
USBP2NC26
USBP2PA26
USBP3NK28
USBP3PH28
USBP4NE28
USBP4PD28
USBP5NC28
USBP5PA28
USBP6NC29
USBP6PB29
USBP7NN28
USBP7PM28
USBP8NL30
USBP8PK30
USBP9NG30
USBP9PE30
USBP10NC30
USBP10PA30
USBP11NL32
USBP11PK32
USBP12NG32
USBP12PE32
USBP13NC32
USBP13PA32
PME#K10
CLKOUT_PCI0H49
CLKOUT_PCI1H43
CLKOUT_PCI2J48
USBRBIAS#C33
USBRBIASB33
OC0# / GPIO59A14
OC1# / GPIO40K20
OC2# / GPIO41B17
OC3# / GPIO42C16
OC4# / GPIO43L16
OC5# / GPIO9A16
OC6# / GPIO10D14
OC7# / GPIO14C14
CLKOUT_PCI4H40
CLKOUT_PCI3K42
PLTRST#C6
TP1BG26
TP2BJ26
TP3BH25
TP6AH38
TP7AH37
TP8AK43
TP9AK45
TP16Y13
TP17K24
TP18L24
TP19AB46
TP20AB45
TP21B21
TP22M20
TP23AY16
USB3Rn1BE28
USB3Rn2BC30
USB3Rn3BE32
USB3Rn4BJ32
USB3Rp1BC28
USB3Rp2BE30
USB3Rp3BF32
USB3Rp4BG32
USB3Tn1AV26
USB3Tn2BB26
USB3Tn3AU28
USB3Tn4AY30
USB3TP1AU26
USB3Tp2AY26
USB3Tp3AV28
USB3Tp4AW30
TP4BJ16
TP5BG16
TP15AM5
TP14AM4
TP13AH12
TP12H3
TP11N30
TP10C18
TP24BG46T87PAD~D @T87PAD~D @
T71PAD~D @T71PAD~D @
UH3
TC7SH08FU_SSOP5~D
UH3
TC7SH08FU_SSOP5~D
B1
A2
G3
O4
P5
RH103 22_0402_5%~DRH103 22_0402_5%~D12
T70PAD~D @T70PAD~D @
RH
34
21
K_
04
02
_1
%~
D@
RH
34
21
K_
04
02
_1
%~
D@1
2
T73PAD~D @T73PAD~D @
RPH2
10K_1206_8P4R_5%~D
RPH2
10K_1206_8P4R_5%~D
1 82 73 64 5
T83PAD~D @T83PAD~D @
T64PAD~D @T64PAD~D @
RH338 0_0402_5%~D@RH338 0_0402_5%~D@ 1 2
RH327 10K_0402_5%~DRH327 10K_0402_5%~D1 2
T104PAD~D @T104PAD~D @
T66PAD~D @T66PAD~D @
RH325 8.2K_0402_5%~DRH325 8.2K_0402_5%~D1 2
RH341 0_0402_5%~D@RH341 0_0402_5%~D@ 1 2
T81PAD~D @T81PAD~D @
T76PAD~D @T76PAD~D @
RH330 10K_0402_5%~DRH330 10K_0402_5%~D1 2
RPH1
10K_1206_8P4R_5%~D
RPH1
10K_1206_8P4R_5%~D
1 82 73 64 5
T77PAD~D @T77PAD~D @
T80PAD~D @T80PAD~D @
RH356 0_0402_5%~D@RH356 0_0402_5%~D@ 1 2
T86PAD~D @T86PAD~D @
T72PAD~D @T72PAD~D @
RH151 22.6_0402_1%~DRH151 22.6_0402_1%~D1 2
T75PAD~D @T75PAD~D @
RH329 8.2K_0402_5%~DRH329 8.2K_0402_5%~D1 2
T74PAD~D @T74PAD~D @T65PAD~D @T65PAD~D @
RH337 0_0402_5%~DRH337 0_0402_5%~D1 2
RH361 10K_0402_5%~DRH361 10K_0402_5%~D1 2
RH328 10K_0402_5%~DRH328 10K_0402_5%~D1 2
T84PAD~D @T84PAD~D @
RH324 8.2K_0402_5%~DRH324 8.2K_0402_5%~D1 2
RH
33
31
K_
04
02
_1
%~
D@
RH
33
31
K_
04
02
_1
%~
D@1
2
T68PAD~D @T68PAD~D @
RH334 0_0402_5%~D@RH334 0_0402_5%~D@1 2
RH336 0_0402_5%~D@RH336 0_0402_5%~D@ 1 2
RH326 8.2K_0402_5%~DRH326 8.2K_0402_5%~D1 2
T78PAD~D @T78PAD~D @
RH102 22_0402_5%~DRH102 22_0402_5%~D12
T82PAD~D @T82PAD~D @
T79PAD~D @T79PAD~D @
RH331 10K_0402_5%~DRH331 10K_0402_5%~D1 2
RH339 0_0402_5%~D@RH339 0_0402_5%~D@ 1 2
RH160 22_0402_5%~DRH160 22_0402_5%~D12
T85PAD~D @T85PAD~D @
RH105 22_0402_5%~DRH105 22_0402_5%~D12
CH102
0.1U_0402_25V6K~D
CH102
0.1U_0402_25V6K~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SIO_A20GATE
SIO_RCIN#
PM_LANPHY_ENABLE
MEDIA_DET#
TPM_ID0
PCH_GPIO17
SIO_EXT_SCI#
TPM_ID0
PCH_GPIO37
TPM_ID1
TEMP_ALERT#
TPM_ID1
USB_MCARD1_DET#
FFS_INT2
IO_LOOP#
PCH_GPIO7
VSS_NCTF_32
VSS_NCTF_17
VSS_NCTF_29
VSS_NCTF_26
VSS_NCTF_25
VSS_NCTF_23
VSS_NCTF_15
VSS_NCTF_20
VSS_NCTF_16
VSS_NCTF_18
VSS_NCTF_30
VSS_NCTF_19
VSS_NCTF_21
VSS_NCTF_31
VSS_NCTF_28
VSS_NCTF_24
VSS_NCTF_27
VSS_NCTF_22
H_CPUPWRGD
SIO_RCIN#
PCH_GPIO69
INIT3_3V#
SIO_A20GATE
VSS_NCTF_4
VSS_NCTF_11
VSS_NCTF_5
VSS_NCTF_14
VSS_NCTF_2
VSS_NCTF_8
VSS_NCTF_13
VSS_NCTF_7
VSS_NCTF_9
VSS_NCTF_3
VSS_NCTF_10
VSS_NCTF_12
VSS_NCTF_6
VSS_NCTF_1
PCH_GPIO69
PCH_THRMTRIP#_R
SIO_EXT_WAKE#
PCH_GPIO1
DF_TVS
NC_1
PCIE_MCARD1_DET#
KB_DET#
DF_TVS DF_TVS_R
CONTACTLESS_DET#
PCH_GPIO36
PCIE_MCARD3_DET#
SIO_EXT_WAKE#
USB_MCARD2_DET#
KB_DET#
PCH_GPIO15
PCH_GPIO15
SLP_ME_CSW_DEV#
SLP_ME_CSW_DEV#
PCH_GPIO16
PCH_GPIO1
PM_LANPHY_ENABLE
PCH_GPIO27
PCH_GPIO27
PCH_GPIO34
MEDIA_DET#
IO_LOOP#
PCH_GPIO34
TEMP_ALERT#
PCH_GPIO17
PCH_GPIO16
PCH_GPIO7
PCH_GPIO36
PCH_GPIO37
CONTACTLESS_DET#
PCH_GPIO37
PCH_GPIO17
PCH_GPIO36
PCH_GPIO16
+3.3V_RUN
+3.3V_RUN +3.3V_RUN
+1.05V_RUN_VTT
+3.3V_ALW_PCH
+VCCDFTERM
+3.3V_ALW_PCH
SIO_EXT_SCI#<40>
PCIE_MCARD1_DET#<34>
TEMP_ALERT#<14,39>
USB_MCARD1_DET#<14,34>
PCH_GPIO37<14>
SIO_EXT_SCI#_R<14>
FFS_INT2<27>
SIO_A20GATE <40>
H_CPUPWRGD <7>
SIO_RCIN# <40>PCH_GPIO16<14>
MEDIA_DET#<43>
KB_DET#<41>
PCIE_MCARD3_DET# <34>
SIO_EXT_WAKE#<39>
USB_MCARD2_DET# <34>
PCH_GPIO36<14>
SLP_ME_CSW_DEV#<14,39>
PCH_GPIO15<14>
H_SNB_IVB# <7>
Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
PCH (5/8)
18 61Saturday, March 03, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
PCH (5/8)
18 61Saturday, March 03, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
PCH (5/8)
18 61Saturday, March 03, 2012
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
RH149 need to close to CPU
Note: PCH has internal pull up 20k ohm on
E3_PAID_TS_DET# (GPIO27)
vPro only---
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
China TPM
No TPM, No China TPM
0 0
TPM_ID0 TPM_ID1
0 1
11
TBD
TPM
Set to Vss when LOW
Set to Vcc when HIGH
DMI & FDI Termination Voltage
PLACE RH150 CLOSE TO THE BRANCHING POINT
( TO CPU and NVRAM CONNECTOR)
DF_TVS
Layout note:
Trace wide 10mil & length 30mil
All NCTF pins should have thick
traces at 45°from the pad.
Layout note:
Trace wide 10mil & length 30mil
All NCTF pins should have thick
traces at 45°from the pad.
ENABLED HIGH (DEFAULT)
DISABLED LOW
SLP_ME_CSW_DEV# PLL ON DIE VR ENABLE
RH
35
31
K_
04
02
_1
%~
D@
RH
35
31
K_
04
02
_1
%~
D@
12
RH179 10K_0402_5%~DRH179 10K_0402_5%~D12
RH177 10K_0402_5%~DRH177 10K_0402_5%~D12
RH181 10K_0402_5%~DRH181 10K_0402_5%~D1 2
CH
97
0.1
U_
04
02
_2
5V
6K
~D
CH
97
0.1
U_
04
02
_2
5V
6K
~D
1
2
RH269 8.2K_0402_5%~DRH269 8.2K_0402_5%~D12
RH171 10K_0402_5%~D@RH171 10K_0402_5%~D@1 2
RH203 10K_0402_5%~DRH203 10K_0402_5%~D12
RH266 10K_0402_5%~DRH266 10K_0402_5%~D1 2
CPU/MISC
NCTF
GPIO
UH4F
BD82HM77 QPRG C1_BGA989~D
CPU/MISC
NCTF
GPIO
UH4F
BD82HM77 QPRG C1_BGA989~D
GPIO27E16
GPIO28P8
GPIO24E8
GPIO57D6
LAN_PHY_PWR_CTRL / GPIO12C4
VSS_NCTF_1A4
VSS_NCTF_2A44
VSS_NCTF_3A45
VSS_NCTF_4A46
VSS_NCTF_5A5
VSS_NCTF_6A6
VSS_NCTF_7B3
VSS_NCTF_8B47
VSS_NCTF_9BD1
VSS_NCTF_10BD49
VSS_NCTF_11BE1
VSS_NCTF_12BE49
TACH2 / GPIO6H36
TACH0 / GPIO17D40
TACH3 / GPIO7E38
SATA3GP / GPIO37M5
SATA5GP / GPIO49 / TEMP_ALERT#V3
SCLOCK / GPIO22T5
SLOAD / GPIO38N2
SDATAOUT0 / GPIO39M3
SDATAOUT1 / GPIO48V13
PROCPWRGDAY11
RCIN#P5
PECIAU16
THRMTRIP#AY10
GPIO8C10
BMBUSY# / GPIO0T7
GPIO15G2
TACH1 / GPIO1A42
SATA2GP / GPIO36V8
INIT3_3V#T14
STP_PCI# / GPIO34K1
GPIO35K4
SATA4GP / GPIO16U2
VSS_NCTF_32F49
A20GATEP4
TACH4 / GPIO68C40
TACH6 / GPIO70C41
TACH7 / GPIO71A40
TACH5 / GPIO69B41
VSS_NCTF_17BH3
VSS_NCTF_18BH47
VSS_NCTF_19BJ4
VSS_NCTF_20BJ44
VSS_NCTF_21BJ45
VSS_NCTF_22BJ46
VSS_NCTF_23BJ5
VSS_NCTF_24BJ6
VSS_NCTF_25C2
VSS_NCTF_26C48
VSS_NCTF_27D1
VSS_NCTF_28D49
VSS_NCTF_29E1
VSS_NCTF_30E49
VSS_NCTF_31F1
TS_VSS4AK10
TS_VSS3AH10
TS_VSS2AK11
TS_VSS1AH8
NC_1P37
VSS_NCTF_13BF1
VSS_NCTF_14BF49
VSS_NCTF_15BG2
VSS_NCTF_16BG48
DF_TVSAY1
RH172 10K_0402_5%~DRH172 10K_0402_5%~D1 2
RH174 10K_0402_5%~DRH174 10K_0402_5%~D1 2
RH158 10K_0402_5%~DRH158 10K_0402_5%~D12
RH1500_0402_5%~D @ RH1500_0402_5%~D @12
RH256 10K_0402_5%~DRH256 10K_0402_5%~D12
RH265 10K_0402_5%~D@RH265 10K_0402_5%~D@1 2
RH
26
82
0K
_0
40
2_
5%
~D
3@
RH
26
82
0K
_0
40
2_
5%
~D
3@1
2
T108PAD~D @T108PAD~D @
RH263 10K_0402_5%~DRH263 10K_0402_5%~D1 2
RH
27
01
0K
_0
40
2_
5%
~D
2@
RH
27
01
0K
_0
40
2_
5%
~D
2@
12
RH
14
92
.2K
_0
40
2_
5%
~D
RH
14
92
.2K
_0
40
2_
5%
~D
12
RH173 1K_0402_1%~D@RH173 1K_0402_1%~D@1 2
RH
26
71
0K
_0
40
2_
5%
~D
1@
RH
26
71
0K
_0
40
2_
5%
~D
1@
12
RH164 100K_0402_5%~DRH164 100K_0402_5%~D1 2
RH163 10K_0402_5%~DRH163 10K_0402_5%~D12
RH3581K_0402_1%~D RH3581K_0402_1%~D12
RH273 1K_0402_1%~D@RH273 1K_0402_1%~D@1 2
RH272 10K_0402_5%~DRH272 10K_0402_5%~D12
RH260 1.5K_0402_1%~DRH260 1.5K_0402_1%~D1 2
RH259 0_0402_5%~D@RH259 0_0402_5%~D@1 2
RH
53
4.7
K_
04
02
_5
%~
DR
H5
34
.7K
_0
40
2_
5%
~D
12
RH178 10K_0402_5%~DRH178 10K_0402_5%~D1 2
RH262 56_0402_5%~DRH262 56_0402_5%~D12
RH182 10K_0402_5%~DRH182 10K_0402_5%~D1 2
RH180 10K_0402_5%~DRH180 10K_0402_5%~D12
RH354 1K_0402_1%~DRH354 1K_0402_1%~D1 2
RH
27
12
.2K
_0
40
2_
5%
~D
4@
RH
27
12
.2K
_0
40
2_
5%
~D
4@
12
RH170 10K_0402_5%~DRH170 10K_0402_5%~D12
T106PAD~D @T106PAD~D @
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VCCAPLLEXP
+VCCADAC
+1.8V_RUN_LVDS
+VCCAPLL_FDI
+VCCAPLL_FDI
+VCCSPI
+1.05V_RUN_VCCCLKDMI
+1.5V_RUN +1.05V_+1.5V_1.8V_RUN
+1.05V_RUN
+1.05V_RUN
+1.05V_RUN
+1.05V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+1.8V_RUN
+3.3V_RUN
+1.05V_RUN_VTT
+1.05V_+1.5V_1.8V_RUN
+1.05V_+1.5V_1.8V_RUN
+1.05V_RUN
+3.3V_M
+3.3V_RUN
+1.05V_RUN
+1.05V_RUN_VTT
+1.8V_RUN
+3.3V_RUN
+1.05V_RUN
+VCCDFTERM
+1.05V_RUN_VCCCLKDMI
Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
PCH (6/8)
19 61Saturday, March 03, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
PCH (6/8)
19 61Saturday, March 03, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
PCH (6/8)
19 61Saturday, March 03, 2012
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
3.3
1.05
1.05
1.05
1.05
V_PROC_IO
V5REF
V5REF_Sus
Vcc3_3
VccASW
VccADAC3
VccADPLLA
VccADPLLB
VccSPI
Voltage Rail
VccCore
VccDMI
1.05
5
3.3
1.05
0.001
0.001
0.001
0.288
0.903
0.063
0.08
0.08
0.047
1.7
0.01
5
VoltageS0 Iccmax
Current (A)
1.05
VccDSW3_3 0.001
3.3
3.3
VccDIFFCLKN 0.055
1.05VccIO 3.711
1.8 0.002VCCDFTERM
3.3VccRTC 6uA
1.05VccClkDMI 0.07
3.3VccSus3_3
3.3VccSusHDA
0.126
0.01
VccVRM 1.8 / 1.5 0.167
1.05VccSSC
VccALVDS 3.3
1.8VccTX_LVDS 0.04
0.001
0.095
PCH Power Rail Table
HM76(w/o vpro): depop RH202 and pop RH204
QM77(w/ vpro) : pop RH202 and depop RH204
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
0.1uH inductor, 200mA
CPN : SHI0110BJ0L
POWER
VCC CORE
DMI
VCCIO
CRT
LVDS
FDI
DFT / SPI
HVCMOS
UH4G
BD82HM77 QPRG C1_BGA989~D
POWER
VCC CORE
DMI
VCCIO
CRT
LVDS
FDI
DFT / SPI
HVCMOS
UH4G
BD82HM77 QPRG C1_BGA989~D
VCCCORE[1]AA23
VCCCORE[2]AC23
VCCCORE[3]AD21
VCCCORE[4]AD23
VCCCORE[5]AF21
VCCCORE[6]AF23
VCCCORE[7]AG21
VCCCORE[8]AG23
VCCCORE[9]AG24
VCCCORE[10]AG26
VCCCORE[11]AG27
VCCCORE[12]AG29
VCCCORE[13]AJ23
VCCCORE[14]AJ26
VCCCORE[15]AJ27
VCCDFTERM[4]AJ17
VCCDFTERM[3]AJ16
VCCIO[17]AN21
VCCIO[18]AN26
VCCIO[19]AN27
VCCIO[20]AP21
VCCIO[23]AP26
VCCIO[24]AT24
VCCIO[15]AN16
VCCIO[16]AN17
VCCIO[21]AP23
VCCIO[22]AP24
VCCADACU48
VCCTX_LVDS[1]AM37
VCCTX_LVDS[2]AM38
VCCALVDSAK36
VCCVRM[3]AT16
VCCVRM[2]AP16
VCCAPLLEXPBJ22
VccAFDIPLLBG6
VCCIO[28]AN19
VCCTX_LVDS[4]AP37
VCCTX_LVDS[3]AP36
VSSADACU47
VSSALVDSAK37
VCCIO[27]AP17
VCC3_3[6]V33
VCC3_3[7]V34
VCC3_3[3]BH29
VCCDFTERM[2]AG17
VCCDFTERM[1]AG16
VCCDMI[1]AT20
VCCIO[25]AN33
VCCIO[26]AN34
VCCCORE[16]AJ29
VCCCORE[17]AJ31
VCCSPIV1
VCCCLKDMIAB36
VCCDMI[2]AU20
RH195 0.022_0805_1%@RH195 0.022_0805_1%@1 2
CH
50
1U
_0
40
2_
6.3
V6
K~
DC
H5
01
U_
04
02
_6
.3V
6K
~D
1
2
CH
10
52
2U
_0
80
5_
6.3
V6
M~
DC
H1
05
22
U_
08
05
_6
.3V
6M
~D
1
2
CH
48
1U
_0
40
2_
6.3
V6
K~
DC
H4
81
U_
04
02
_6
.3V
6K
~D
1
2
CH
40
10
U_
06
03
_6
.3V
6M
~D
@CH
40
10
U_
06
03
_6
.3V
6M
~D
@
1
2
CH
30
10
U_
06
03
_6
.3V
6M
~D
CH
30
10
U_
06
03
_6
.3V
6M
~D
1
2
CH
51
0.1
U_
04
02
_1
0V
7K
~D
CH
51
0.1
U_
04
02
_1
0V
7K
~D
1
2
CH
34
0.0
1U
_0
40
2_
16
V7
K~
DC
H3
40
.01
U_
04
02
_1
6V
7K
~D
1
2
CH
45
1U
_0
40
2_
6.3
V6
K~
DC
H4
51
U_
04
02
_6
.3V
6K
~D
1
2
CH
10
40
.01
U_
04
02
_1
6V
7K
~D
CH
10
40
.01
U_
04
02
_1
6V
7K
~D
1
2
PJP66
PAD-OPEN1x1m
@PJP66
PAD-OPEN1x1m
@
1 2
RH276 0_0805_5%~D@RH276 0_0805_5%~D@12
LH1
1UH_GLFR1608T1R0M-LR_20%~D
LH1
1UH_GLFR1608T1R0M-LR_20%~D12
CH
46
1U
_0
40
2_
6.3
V6
K~
DC
H4
61
U_
04
02
_6
.3V
6K
~D
1
2
RH247
1UH_LB2012T1R0M_20%~D
@RH247
1UH_LB2012T1R0M_20%~D
@
1 2
LH8
100NH_HK1608R10J-T_5%_0603~D
LH8
100NH_HK1608R10J-T_5%_0603~D12
CH
36
22
U_
06
03
_6
.3V
6M
~D
CH
36
22
U_
06
03
_6
.3V
6M
~D
1
2
RH205 0_0603_5%~DRH205 0_0603_5%~D12
CH
31
1U
_0
40
2_
6.3
V6
K~
DC
H3
11
U_
04
02
_6
.3V
6K
~D
1
2
CH
10
61
0U
_0
60
3_
6.3
V6
M~
D@
CH
10
61
0U
_0
60
3_
6.3
V6
M~
D@1
2
CH
43
0.1
U_
04
02
_1
0V
7K
~D
CH
43
0.1
U_
04
02
_1
0V
7K
~D
1
2
CH
35
0.1
U_
04
02
_1
0V
7K
~D
CH
35
0.1
U_
04
02
_1
0V
7K
~D
1
2
CH
32
1U
_0
40
2_
6.3
V6
K~
DC
H3
21
U_
04
02
_6
.3V
6K
~D
1
2
RH204 0_0603_5%~D@RH204 0_0603_5%~D@12
CH
44
10
U_
06
03
_6
.3V
6M
~D
CH
44
10
U_
06
03
_6
.3V
6M
~D
1
2
CH
10
30
.01
U_
04
02
_1
6V
7K
~D
CH
10
30
.01
U_
04
02
_1
6V
7K
~D
1
2
RH197 0_0603_5%~D@RH197 0_0603_5%~D@12
CH49 1U_0402_6.3V6K~DCH49 1U_0402_6.3V6K~D1 2
CH
33
1U
_0
40
2_
6.3
V6
K~
DC
H3
31
U_
04
02
_6
.3V
6K
~D
1
2
CH
47
1U
_0
40
2_
6.3
V6
K~
DC
H4
71
U_
04
02
_6
.3V
6K
~D
1
2
CH
54
1U
_0
40
2_
6.3
V6
K~
DC
H5
41
U_
04
02
_6
.3V
6K
~D
1
2
CH
52
0.1
U_
04
02
_1
0V
7K
~D
CH
52
0.1
U_
04
02
_1
0V
7K
~D
1
2
RH202 0_0603_5%~D@RH202 0_0603_5%~D@12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+PCH_V5REF_SUS
+PCH_V5REF_RUN
+PCH_V5REF_SUS
+VCCA_USBSUS
+VCCA_USBSUS
+VCCDSW3_3
+PCH_VCCDSW
+VCCAPLL_CPY_PCH
+3.3V_RUN_VCC_CLKF33
+VCCSUS1
+VCCACLK
+VCCRTCEXT
+VCCSST
+1.05V_M_VCCSUS
+1.05V_RUN_VCCA_A_DPL
+1.05V_RUN_VCCA_B_DPL
+1.05V_M_VCCSUS
+3.3V_RUN_VCC_CLKF33
+1.05V_RUN_VCCA_A_DPL
+1.05V_RUN_VCCA_B_DPL
+PCH_V5REF_RUN
+VCCSATAPLL
+VCCSATAPLL
5V_ALW_PCH_ENABLE
+3.3V_RUN +5V_RUN
+3.3V_ALW_PCH+5V_ALW_PCH
+1.05V_RUN
+3.3V_ALW_PCH
+3.3V_ALW_PCH
+3.3V_RUN
+3.3V_RUN
+1.05V_M
+3.3V_ALW_PCH
+1.05V_RUN
+1.05V_RUN
+3.3V_ALW_PCH
+3.3V_RUN
+3.3V_ALW_PCH
+3.3V_ALW_PCH
+3.3V_RUN
+1.05V_RUN
+1.05V_RUN
+1.05V_RUN
+1.05V_RUN_VTT
+RTC_CELL
+1.05V_RUN
+1.05V_+1.5V_1.8V_RUN
+1.05V_M
+1.05V_RUN
+3.3V_ALW2
+1.05V_+1.5V_1.8V_RUN
+1.05V_M
+1.05V_RUN
+1.05V_RUN
+PWR_SRC_S
+5V_ALW_PCH+5V_ALW
ALW_ON_3.3V#<42>
Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
PCH (7/8)
20 61Saturday, March 03, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
PCH (7/8)
20 61Saturday, March 03, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
PCH (7/8)
20 61Saturday, March 03, 2012
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
Note: If EMI concern, pop with
SHI00008S0L, 10UH +-20%
CH
82
1U
_0
40
2_
6.3
V6
K~
DC
H8
21
U_
04
02
_6
.3V
6K
~D
1
2
CH
77
1U
_0
40
2_
6.3
V6
K~
DC
H7
71
U_
04
02
_6
.3V
6K
~D
1
2
CH
64
22
U_
08
05
_6
.3V
6M
~D
CH
64
22
U_
08
05
_6
.3V
6M
~D
1
2
CH
62
1U
_0
40
2_
6.3
V6
K~
D@
CH
62
1U
_0
40
2_
6.3
V6
K~
D@1
2
RH201 0_0402_5%~DRH201 0_0402_5%~D1 2
CH
75
0.1
U_
04
02
_1
0V
7K
~D
CH
75
0.1
U_
04
02
_1
0V
7K
~D
1
2
CH
66
0.1
U_
04
02
_1
0V
7K
~D
CH
66
0.1
U_
04
02
_1
0V
7K
~D
1
2
RH248 0.022_0805_1%@RH248 0.022_0805_1%@1 2
CH
70
1U
_0
60
3_
10
V7
K~
DC
H7
01
U_
06
03
_1
0V
7K
~D
1
2
CH
79
1U
_0
40
2_
6.3
V6
K~
DC
H7
91
U_
04
02
_6
.3V
6K
~D
1
2
DH2RB751S40T1_SOD523-2~D
DH2RB751S40T1_SOD523-2~D
21
CH
73
10
U_
06
03
_6
.3V
6M
~D
@C
H7
31
0U
_0
60
3_
6.3
V6
M~
D@1
2
CH
61
1U
_0
40
2_
6.3
V6
K~
D@
CH
61
1U
_0
40
2_
6.3
V6
K~
D@1
2
RH
27
82
0K
_0
40
2_
5%
~D
RH
27
82
0K
_0
40
2_
5%
~D
12
+
CH
94
22
0U
_B
2_
2.5
VM
_R
35
M~
D
+
CH
94
22
0U
_B
2_
2.5
VM
_R
35
M~
D
1
2
CH
98
0.1
U_
04
02
_1
0V
7K
~D
CH
98
0.1
U_
04
02
_1
0V
7K
~D
1
2
CH78
0.1U_0402_10V7K~D
CH78
0.1U_0402_10V7K~D
12
CH
60
0.1
U_
04
02
_1
0V
7K
~D
CH
60
0.1
U_
04
02
_1
0V
7K
~D
1
2
CH
68
1U
_0
40
2_
6.3
V6
K~
DC
H6
81
U_
04
02
_6
.3V
6K
~D
1
2
G
D S
QH4SSM3K7002FU_SC70-3~D
G
D S
QH4SSM3K7002FU_SC70-3~D
2
1 3
CH
65
22
U_
08
05
_6
.3V
6M
~D
CH
65
22
U_
08
05
_6
.3V
6M
~D
1
2
CH
56
1U
_0
40
2_
6.3
V6
K~
DC
H5
61
U_
04
02
_6
.3V
6K
~D
1
2
CH
91
0.1
U_
04
02
_1
0V
7K
~D
CH
91
0.1
U_
04
02
_1
0V
7K
~D
1
2
RH253 0_0402_5%~D@RH253 0_0402_5%~D@1 2
CH
10
73
30
0P
_0
40
2_
50
V7
K~
DC
H1
07
33
00
P_
04
02
_5
0V
7K
~D
1
2
CH
76
0.1
U_
04
02
_1
0V
7K
~D
CH
76
0.1
U_
04
02
_1
0V
7K
~D
1
2
CH
80
10
U_
06
03
_6
.3V
6M
~D
@C
H8
01
0U
_0
60
3_
6.3
V6
M~
D@1
2
CH
83
1U
_0
40
2_
6.3
V6
K~
D@
CH
83
1U
_0
40
2_
6.3
V6
K~
D@1
2
CH
88
0.1
U_
04
02
_1
0V
7K
~D
CH
88
0.1
U_
04
02
_1
0V
7K
~D
1
2
CH
90
1U
_0
40
2_
6.3
V6
K~
DC
H9
01
U_
04
02
_6
.3V
6K
~D
1
2
CH
55
0.1
U_
04
02
_1
0V
7K
~D
CH
55
0.1
U_
04
02
_1
0V
7K
~D
1
2
CH
93
1U
_0
40
2_
6.3
V6
K~
DC
H9
31
U_
04
02
_6
.3V
6K
~D
1
2
CH
69
1U
_0
40
2_
6.3
V6
K~
DC
H6
91
U_
04
02
_6
.3V
6K
~D
1
2
CH
72
0.1
U_
04
02
_1
0V
7K
~D
CH
72
0.1
U_
04
02
_1
0V
7K
~D
1
2
CH
67
1U
_0
40
2_
6.3
V6
K~
DC
H6
71
U_
04
02
_6
.3V
6K
~D
1
2
RH200 0.022_0805_1%@RH200 0.022_0805_1%@1 2
CH
85
4.7
U_
06
03
_6
.3V
6K
~D
CH
85
4.7
U_
06
03
_6
.3V
6K
~D
1
2
CH
63
0.1
U_
04
02
_1
0V
7K
~D
CH
63
0.1
U_
04
02
_1
0V
7K
~D
1
2
CH
59
0.1
U_
04
02
_1
0V
7K
~D
CH
59
0.1
U_
04
02
_1
0V
7K
~D
1
2
RH
21
3
10
_0
40
2_
1%
~D
RH
21
3
10
_0
40
2_
1%
~D
12
LH7
10UH_LBR2012T100M_20%~D
LH7
10UH_LBR2012T100M_20%~D1 2
LH3
10UH_LBR2012T100M_20%~D
@LH3
10UH_LBR2012T100M_20%~D
@
1 2
LH6
10UH_LBR2012T100M_20%~D
LH6
10UH_LBR2012T100M_20%~D1 2
CH
74
1U
_0
40
2_
6.3
V6
K~
DC
H7
41
U_
04
02
_6
.3V
6K
~D
1
2
CH
92
1U
_0
40
2_
6.3
V6
K~
DC
H9
21
U_
04
02
_6
.3V
6K
~D
1
2
DH3
RB751S40T1_SOD523-2~D
DH3
RB751S40T1_SOD523-2~D
21
G
D
S
QH
6S
SM
3K
70
02
FU
_S
C7
0-3
~D
G
D
S
QH
6S
SM
3K
70
02
FU
_S
C7
0-3
~D
2
13
RH
20
8
10
_0
40
2_
1%
~D
RH
20
8
10
_0
40
2_
1%
~D
12
POWER
SATA
USB
Clock and Miscellaneous
HDA
CPU
RTC
PCI/GPIO/LPC
MISC
UH4J
BD82HM77 QPRG C1_BGA989~D
POWER
SATA
USB
Clock and Miscellaneous
HDA
CPU
RTC
PCI/GPIO/LPC
MISC
UH4J
BD82HM77 QPRG C1_BGA989~D
DCPSUSBYPV12
VCCASW[1]AA19
VCCASW[2]AA21
VCCASW[3]AA24
VCCASW[5]AA27
VCCASW[6]AA29
VCCSUSHDAP32
VCCSUS3_3[6]P24
VCCIO[34]T26
VCCIO[4]AD17
VCCASW[7]AA31
VCCASW[8]AC26
VCCASW[9]AC27
VCCASW[10]AC29
VCCASW[11]AC31
VCCASW[12]AD29
V5REFP34
VCC3_3[4]T34
VCCRTCA22
VCCSUS3_3[10]V24
VCCSUS3_3[9]V23
VCCSUS3_3[8]T24
VCCSUS3_3[7]T23
VCCIO[2]AC16
VCCADPLLBBF47
VCCDIFFCLKN[1]AF33
V5REF_SUSM26
VCCIO[3]AC17
DCPSUS[1]T17
VCCSSCAG33
VCCADPLLABD47
VCCVRM[4]Y49
VCCACLKAD49
DCPRTCN16
VCCASW[4]AA26
VCCDIFFCLKN[2]AF34
VCCIO[7]AF17
DCPSSTV16
VCCIO[5]AF13
VCCASW[22]T21
VCCASW[23]V21
VCCASW[21]T19
VCC3_3[1]AA16
VCC3_3[8]W16
VCCSUS3_3[2]N20
VCCSUS3_3[3]N22
VCCSUS3_3[4]P20
VCCSUS3_3[5]P22
VCCIO[29]N26
VCCIO[30]P26
VCCIO[31]P28
VCCIO[32]T27
V_PROC_IOBJ8
VCCIO[33]T29
VCCDIFFCLKN[3]AG34
VCCASW[13]AD31
VCCASW[14]W21
VCCASW[15]W23
VCCASW[16]W24
VCCASW[17]W26
VCCASW[18]W29
VCCASW[19]W31
VCCASW[20]W33
VCCIO[6]AF14
VCCVRM[1]AF11
VCCIO[12]AH13
VCCIO[13]AH14
VCC3_3[2]AJ2
VCCAPLLSATAAK1
DCPSUS[3]AL24
VCCIO[14]AL29
DCPSUS[4]AN23
VCCSUS3_3[1]AN24
VCCAPLLDMI2BH23
DCPSUS[2]V19
VCCDSW3_3T16
VCC3_3[5]T38
CH
58
10
U_
06
03
_6
.3V
6M
~D
@CH
58
10
U_
06
03
_6
.3V
6M
~D
@
1
2
CH
86
0.1
U_
04
02
_1
0V
7K
~D
CH
86
0.1
U_
04
02
_1
0V
7K
~D
1
2
CH
57
0.1
U_
04
02
_1
0V
7K
~D
@C
H5
70
.1U
_0
40
2_
10
V7
K~
D@
1
2
CH81
1U_0402_6.3V6K~D
CH81
1U_0402_6.3V6K~D
1 2
CH
84
0.1
U_
04
02
_1
0V
7K
~D
CH
84
0.1
U_
04
02
_1
0V
7K
~D
1
2
+
CH
95
22
0U
_B
2_
2.5
VM
_R
35
M~
D
+
CH
95
22
0U
_B
2_
2.5
VM
_R
35
M~
D
1
2
CH
89
0.1
U_
04
02
_1
0V
7K
~D
CH
89
0.1
U_
04
02
_1
0V
7K
~D
1
2
RH
27
91
00
K_
04
02
_5
%~
DR
H2
79
10
0K
_0
40
2_
5%
~D
12
CH
96
1U
_0
40
2_
6.3
V6
K~
DC
H9
61
U_
04
02
_6
.3V
6K
~D
1
2
CH
71
1U
_0
60
3_
10
V7
K~
DC
H7
11
U_
06
03
_1
0V
7K
~D
1
2
RH215 0.022_0805_1%RH215 0.022_0805_1%1 2
CH
87
0.1
U_
04
02
_1
0V
7K
~D
CH
87
0.1
U_
04
02
_1
0V
7K
~D
1
2
LH5
10UH_LBR2012T100M_20%~D
@LH5
10UH_LBR2012T100M_20%~D
@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
PCH (8/8)
21 61Saturday, March 03, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
PCH (8/8)
21 61Saturday, March 03, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
PCH (8/8)
21 61Saturday, March 03, 2012
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
UH4I
BD82HM77 QPRG C1_BGA989~D
UH4I
BD82HM77 QPRG C1_BGA989~D
VSS[159]AY4
VSS[160]AY42
VSS[161]AY46
VSS[162]AY8
VSS[163]B11
VSS[164]B15
VSS[165]B19
VSS[166]B23
VSS[167]B27
VSS[168]B31
VSS[169]B35
VSS[170]B39
VSS[171]B7
VSS[173]BB12
VSS[174]BB16
VSS[175]BB20
VSS[176]BB22
VSS[177]BB24
VSS[178]BB28
VSS[179]BB30
VSS[180]BB38
VSS[181]BB4
VSS[182]BB46
VSS[183]BC14
VSS[184]BC18
VSS[185]BC2
VSS[186]BC22
VSS[187]BC26
VSS[188]BC32
VSS[189]BC34
VSS[190]BC36
VSS[191]BC40
VSS[192]BC42
VSS[193]BC48
VSS[194]BD46
VSS[195]BD5
VSS[196]BE22
VSS[197]BE26
VSS[198]BE40
VSS[199]BF10
VSS[200]BF12
VSS[201]BF16
VSS[202]BF20
VSS[203]BF22
VSS[204]BF24
VSS[205]BF26
VSS[206]BF28
VSS[207]BD3
VSS[208]BF30
VSS[209]BF38
VSS[210]BF40
VSS[211]BF8
VSS[212]BG17
VSS[213]BG21
VSS[214]BG33
VSS[215]BG44
VSS[216]BG8
VSS[217]BH11
VSS[218]BH15
VSS[219]BH17
VSS[220]BH19
VSS[222]BH27
VSS[223]BH31
VSS[224]BH33
VSS[225]BH35
VSS[226]BH39
VSS[227]BH43
VSS[228]BH7
VSS[229]D3
VSS[230]D12
VSS[231]D16
VSS[232]D18
VSS[233]D22
VSS[234]D24
VSS[235]D26
VSS[236]D30
VSS[237]D32
VSS[264]K7
VSS[265]L18
VSS[266]L2
VSS[267]L20
VSS[268]L26
VSS[269]L28
VSS[270]L36
VSS[271]L48
VSS[272]M12
VSS[273]P16
VSS[274]M18
VSS[275]M22
VSS[276]M24
VSS[277]M30
VSS[278]M32
VSS[279]M34
VSS[280]M38
VSS[281]M4
VSS[282]M42
VSS[283]M46
VSS[284]M8
VSS[285]N18
VSS[286]P30
VSS[288]P11
VSS[289]P18
VSS[290]T33
VSS[291]P40
VSS[292]P43
VSS[293]P47
VSS[294]P7
VSS[295]R2
VSS[296]R48
VSS[297]T12
VSS[298]T31
VSS[299]T37
VSS[300]T4
VSS[301]W34
VSS[302]T46
VSS[303]T47
VSS[304]T8
VSS[305]V11
VSS[306]V17
VSS[307]V26
VSS[308]V27
VSS[309]V29
VSS[310]V31
VSS[311]V36
VSS[312]V39
VSS[313]V43
VSS[314]V7
VSS[315]W17
VSS[316]W19
VSS[238]D34
VSS[239]D38
VSS[240]D42
VSS[241]D8
VSS[242]E18
VSS[243]E26
VSS[244]G18
VSS[245]G20
VSS[246]G26
VSS[247]G28
VSS[248]G36
VSS[249]G48
VSS[250]H12
VSS[251]H18
VSS[317]W2
VSS[318]W27
VSS[319]W48
VSS[320]Y12
VSS[321]Y38
VSS[322]Y4
VSS[323]Y42
VSS[324]Y46
VSS[325]Y8
VSS[328]BG29
VSS[329]N24
VSS[330]AJ3
VSS[287]N47
VSS[252]H22
VSS[253]H24
VSS[254]H26
VSS[255]H30
VSS[256]H32
VSS[257]H34
VSS[258]F3
VSS[262]K39
VSS[263]K46
VSS[259]H46
VSS[260]K18
VSS[261]K26
VSS[331]AD47
VSS[333]B43
VSS[334]BE10
VSS[335]BG41
VSS[337]G14
VSS[338]H16
VSS[340]T36
VSS[342]BG22
VSS[343]BG24
VSS[344]C22
VSS[345]AP13
VSS[172]F45
VSS[221]H10
VSS[346]M14
VSS[347]AP3
VSS[348]AP1
VSS[349]BE16
VSS[350]BC16
VSS[351]BG28
VSS[352]BJ28
UH4H
BD82HM77 QPRG C1_BGA989~D
UH4H
BD82HM77 QPRG C1_BGA989~D
VSS[1]AA17
VSS[2]AA2
VSS[3]AA3
VSS[5]AA34
VSS[6]AB11
VSS[7]AB14
VSS[8]AB39
VSS[9]AB4
VSS[10]AB43
VSS[11]AB5
VSS[12]AB7
VSS[13]AC19
VSS[14]AC2
VSS[15]AC21
VSS[16]AC24
VSS[17]AC33
VSS[18]AC34
VSS[19]AC48
VSS[20]AD10
VSS[21]AD11
VSS[22]AD12
VSS[23]AD13
VSS[24]AD19
VSS[25]AD24
VSS[26]AD26
VSS[27]AD27
VSS[28]AD33
VSS[29]AD34
VSS[30]AD36
VSS[31]AD37
VSS[33]AD39
VSS[34]AD4
VSS[35]AD40
VSS[36]AD42
VSS[37]AD43
VSS[38]AD45
VSS[39]AD46
VSS[43]AF10
VSS[44]AF12
VSS[46]AD16
VSS[47]AF16
VSS[48]AF19
VSS[49]AF24
VSS[50]AF26
VSS[51]AF27
VSS[52]AF29
VSS[53]AF31
VSS[54]AF38
VSS[55]AF4
VSS[56]AF42
VSS[57]AF46
VSS[59]AF7
VSS[60]AF8
VSS[61]AG19
VSS[62]AG2
VSS[63]AG31
VSS[64]AG48
VSS[65]AH11
VSS[66]AH3
VSS[67]AH36
VSS[68]AH39
VSS[69]AH40
VSS[70]AH42
VSS[71]AH46
VSS[72]AH7
VSS[73]AJ19
VSS[76]AJ33
VSS[77]AJ34
VSS[78]AK12
VSS[79]AK3
VSS[80]AK38
VSS[81]AK4
VSS[82]AK42
VSS[83]AK46
VSS[84]AK8
VSS[85]AL16
VSS[86]AL17
VSS[87]AL19
VSS[88]AL2
VSS[89]AL21
VSS[90]AL23
VSS[91]AL26
VSS[92]AL27
VSS[93]AL31
VSS[96]AL48
VSS[97]AM11
VSS[98]AM14
VSS[99]AM36
VSS[100]AM39
VSS[102]AM45
VSS[103]AM46
VSS[104]AM7
VSS[105]AN2
VSS[106]AN29
VSS[107]AN3
VSS[108]AN31
VSS[109]AP12
VSS[110]AP19
VSS[111]AP28
VSS[112]AP30
VSS[113]AP32
VSS[114]AP38
VSS[116]AP42
VSS[117]AP46
VSS[118]AP8
VSS[119]AR2
VSS[120]AR48
VSS[121]AT11
VSS[122]AT13
VSS[123]AT18
VSS[124]AT22
VSS[125]AT26
VSS[126]AT28
VSS[127]AT30
VSS[128]AT32
VSS[131]AT42
VSS[132]AT46
VSS[133]AT7
VSS[134]AU24
VSS[135]AU30
VSS[136]AV16
VSS[137]AV20
VSS[138]AV24
VSS[139]AV30
VSS[140]AV38
VSS[141]AV4
VSS[142]AV43
VSS[143]AV8
VSS[144]AW14
VSS[145]AW18
VSS[146]AW2
VSS[147]AW22
VSS[148]AW26
VSS[149]AW28
VSS[150]AW32
VSS[151]AW34
VSS[152]AW36
VSS[153]AW40
VSS[154]AW48
VSS[155]AV11
VSS[156]AY12
VSS[157]AY22
VSS[158]AY28
VSS[40]AD8
VSS[42]AE3
VSS[45]AD14
VSS[115]AP4
VSS[0]H5
VSS[58]AF5
VSS[32]AD38
VSS[4]AA33
VSS[74]AJ21
VSS[75]AJ24
VSS[41]AE2
VSS[129]AT34
VSS[130]AT39
VSS[101]AM43
VSS[95]AL34
VSS[94]AL33
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
REM_DIODE1_P_4022
REM_DIODE1_N_4022
REM_DIODE2_N_4022
BC_INT#_EMC4022
POWER_SW#
FAN1_TACH_FB
VSET_4021
REM_DIODE1_P_4022REM_DIODE1_N_4022
+VCC_4022
3V_PWROK#
THERMATRIP2#
VSET_4021
+ADDR_XEN
FAN1_TACH_FB
POWER_SW#
THERM_STP#
FAN1_DET#
REM_DIODE2_P_4022
THERMATRIP2#
FAN1_DET#_R
FAN1_DET#
VCP2
BC_INT#_EMC4022
VCP_4021
FAN1_TACH_FB
FAN1_DET#
REM_DIODE2_P_4022REM_DIODE2_N_4022
VDD_PWRGD
VDD_PWRGD
THERM_STP#
FAN1_TACH_FB
+3.3V_M
+RTC_CELL
+3.3V_M
+RTC_CELL
+5V_RUN
+3.3V_RUN
+FAN1_VOUT
+VCC_4022
+1.05V_RUN_VTT
+3.3V_M
+3.3V_M
+3.3V_ALW
+FAN1_VOUT
+RTC_CELL
+3.3V_RUN
DOCK_PWR_SW# <40>
POWER_SW_IN# <40>
BC_CLK_EMC4022 <40>BC_DAT_EMC4022 <40>
PCH_PWRGD#<40>
BC_INT#_EMC4022 <40>
ACAV_IN <40,52,53>
THERM_STP# <45>
H_THERMTRIP#<7>
FAN1_DET#<39>
MAX8731_IINP<52>
Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
FAN & Thermal Sensor
22 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
FAN & Thermal Sensor
22 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
FAN & Thermal Sensor
22 61Friday, March 02, 2012
Compal Electronics, Inc.
Place under CPU
Place C266 close to the Q12 as possible
Rest=1.24k, Tp=92degree
DELL CONFIDENTIAL/PROPRIETARY
(1) DP3/DN3 for SODIMM on Q14, place Q14 close to SODIMM and C272 close to Q14
(2) DP5/DN5 for Skin on Q13, place Q13 close to Vcore VR choke.
HM76(w/o vpro): depop R385 and pop R386
QM77(w/ vpro) : pop R385 and depop R386
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Link CIS
JFAN1
ACES_50279-0040N-001CONN@
JFAN1
ACES_50279-0040N-001CONN@
11
22
33
GND5
GND6
44
R3992.2K_0402_5%~D
R3992.2K_0402_5%~D
1 2
10
U_
08
05
_1
0V
6K
~D
C2
76
10
U_
08
05
_1
0V
6K
~D
C2
76
1
2
C7
38
0.1
U_
04
02
_2
5V
6K
~D
C7
38
0.1
U_
04
02
_2
5V
6K
~D
1
2
R426 10K_0402_5%~DR426 10K_0402_5%~D12
R407 10K_0402_5%~D@R407 10K_0402_5%~D@ 12
R3874.7K_0402_5%~D R3874.7K_0402_5%~D 12
C2
72
10
0P
_0
40
2_
50
V8
J~
D@
C2
72
10
0P
_0
40
2_
50
V8
J~
D@ 1
2
U9
EMC4021-1-EZK-TR_QFN32_5X5~D
U9
EMC4021-1-EZK-TR_QFN32_5X5~D
VDD_H2
VDD_H3
DP1/VREF_T24
DN2/DP426
FAN_OUT4
FAN_OUT5
THERMTRIP2#17
VDD_L6
SMDATA/BC_DATA7
SMCLK/BC_CLK8
POWER_SW#20
ACAVAIL_CLR21
DP2/DN427
VSET28
DN1/THERM23
SYS_SHDN#19
N/C18
TEST311
ATF_INT#/BC_IRQ#9
TACH/GPIO110
3V_PWROK#12
RTC_PWR3V16
N/C29
N/C30
VCP31
ADDR_MODE/XEN32
VDD1
VSS33
VDD_PWRGD13
GPIO3/PWM/THERMTRIP_SIO15
VIN25
TEST114
TEST222
R430 10K_0402_5%~D@R430 10K_0402_5%~D@1 2
R806 0_0402_5%~D@R806 0_0402_5%~D@1 2
E
B
C
Q13MMBT3904WT1G_SC70-3~D
E
B
C
Q13MMBT3904WT1G_SC70-3~D
2
31
R3
95
8.2
K_
04
02
_5
%~
DR
39
58
.2K
_0
40
2_
5%
~D
12
R4
03
10
K_
04
02
_5
%~
DR
40
31
0K
_0
40
2_
5%
~D
12
C2
77
10
0P
_0
40
2_
50
V8
J~
D@
C2
77
10
0P
_0
40
2_
50
V8
J~
D@1
2
C2
78
0.1
U_
04
02
_2
5V
6K
~D
C2
78
0.1
U_
04
02
_2
5V
6K
~D
1
2
R4
06
1.2
4K
_0
40
2_
1%
~D
R4
06
1.2
4K
_0
40
2_
1%
~D
12
R389 10K_0402_5%~DR389 10K_0402_5%~D12
R385 10K_0402_5%~DR385 10K_0402_5%~D12
R3934.7K_0402_5%~D R3934.7K_0402_5%~D1 2
C281
0.1U_0402_25V6K~D
C281
0.1U_0402_25V6K~D
1 2
R391 1K_0402_1%~DR391 1K_0402_1%~D1 2
R42910K_0402_5%~D R42910K_0402_5%~D 12
R408 10K_0402_5%~D@R408 10K_0402_5%~D@12
E
B
C
Q16PMST3904_SOT323-3~D
E
B
C
Q16PMST3904_SOT323-3~D
2
31
C279 2200P_0402_50V7K~DC279 2200P_0402_50V7K~D12
C2
19
22
U_
08
05
_6
.3V
6M
~D
C2
19
22
U_
08
05
_6
.3V
6M
~D
1
2
C1
17
91
U_
04
02
_6
.3V
6K
~D
C1
17
91
U_
04
02
_6
.3V
6K
~D
1
2
C3
05
10
U_
06
03
_6
.3V
6M
~D
C3
05
10
U_
06
03
_6
.3V
6M
~D
1
2
C2
66
10
0P
_0
40
2_
50
V8
J~
D@
C2
66
10
0P
_0
40
2_
50
V8
J~
D@
1
2
C2
73
0.1
U_
04
02
_2
5V
6K
~D
C2
73
0.1
U_
04
02
_2
5V
6K
~D
1
2
E
B
C
Q14MMBT3904WT1G_SC70-3~D
E
B
C
Q14MMBT3904WT1G_SC70-3~D
2
31
U10TC7SH08FU_SSOP5~D
U10TC7SH08FU_SSOP5~D
B1
A2
G3
O4
P5
C2
82
0.1
U_
04
02
_2
5V
6K
~D
C2
82
0.1
U_
04
02
_2
5V
6K
~D
1
2
R402 10K_0402_5%~DR402 10K_0402_5%~D12
D2
RB
75
1S
40
T1
_S
OD
52
3-2
~D
D2
RB
75
1S
40
T1
_S
OD
52
3-2
~D
21
C270 2200P_0402_50V7K~DC270 2200P_0402_50V7K~D1 2
E
B
C
Q12MMBT3904WT1G_SC70-3~D
E
B
C
Q12MMBT3904WT1G_SC70-3~D
2
31
R38822_0402_5%~D
R38822_0402_5%~D
12
C2
74
1U
_0
40
2_
6.3
V6
K~
DC
27
41
U_
04
02
_6
.3V
6K
~D
1
2
R390 47K_0402_1%~D@R390 47K_0402_1%~D@1 2
R404 10K_0402_5%~DR404 10K_0402_5%~D12
C2
75
0.1
U_
04
02
_2
5V
6K
~D
C2
75
0.1
U_
04
02
_2
5V
6K
~D
1
2
R386 10K_0402_5%~D@R386 10K_0402_5%~D@12
2
2
1
1
B B
A A
CLK_DDC2_CRTDAT_DDC2_CRTVSYNC_BUFHSYNC_BUF
GREEN_CRTRED_CRT
BLUE_CRT
GREEN_DOCKBLUE_DOCK
RED_DOCK
HSYNC_DOCKVSYNC_DOCK
CLK_DDC2_DOCKDAT_DDC2_DOCK
PCH_CRT_DDC_CLK
PCH_CRT_BLUPCH_CRT_GRN
CRT_SWITCH
PCH_CRT_DDC_DATPCH_CRT_VSYNC
PCH_CRT_RED
PCH_CRT_HSYNC
+3.3V_RUN
+5V_RUN
+3.3V_RUN
+5V_RUN
+3.3V_RUN
+3.3V_RUN
GREEN_DOCK <38>RED_DOCK <38>
CLK_DDC2_DOCK <38>DAT_DDC2_DOCK <38>
BLUE_DOCK <38>
VSYNC_BUF <37>
VSYNC_DOCK <38>HSYNC_DOCK <38>
GREEN_CRT <37>RED_CRT <37>
HSYNC_BUF <37>
CLK_DDC2_CRT <37>DAT_DDC2_CRT <37>
BLUE_CRT <37>
PCH_CRT_DDC_DAT<16>
CRT_SWITCH<39>
PCH_CRT_DDC_CLK<16>
PCH_CRT_HSYNC<16>PCH_CRT_VSYNC<16>
PCH_CRT_BLU<16>PCH_CRT_GRN<16>PCH_CRT_RED<16>
Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
CRT/Video switch
23 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
CRT/Video switch
23 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
CRT/Video switch
23 61Friday, March 02, 2012
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
Source
APR/SPR
MBA=B1
A=B2
ChanelSEL1/SEL2
0
1
SW for MB/DOCK
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Close to U18
change TI(SA00004RS0L) as main source from Pericom
C3
34
0.1
U_
04
02
_2
5V
6K
~D
C3
34
0.1
U_
04
02
_2
5V
6K
~D
1
2
C3
39
0.1
U_
04
02
_2
5V
6K
~D
C3
39
0.1
U_
04
02
_2
5V
6K
~D
1
2
R556 4.7K_0402_5%~DR556 4.7K_0402_5%~D1 2
C3
33
0.0
1U
_0
40
2_
16
V7
K~
D@
C3
33
0.0
1U
_0
40
2_
16
V7
K~
D@1
2
U18
PI3V713-AZLEX_TQFN32_6X3~D
U18
PI3V713-AZLEX_TQFN32_6X3~D
R1
G2
GND3
VDD4
B5
H_SOURCE6
V_HOURCE7
V2_OUT17
V1_OUT18
H1_OUT20
H2_OUT19
R226
R127
G125
G224
GND31
VDD32
SDA_SOURCE9
Reserved8
SCL_SOURCE10
GND11
SDA112
SDA213
SCL114
B221
B122
VDD23
TEST29
GND28
SEL30
SCL215
5V VDD16
GPAD33
C3
35
0.1
U_
04
02
_2
5V
6K
~D
C3
35
0.1
U_
04
02
_2
5V
6K
~D
1
2
C3
32
0.0
1U
_0
40
2_
16
V7
K~
D@
C3
32
0.0
1U
_0
40
2_
16
V7
K~
D@1
2
C3
36
0.1
U_
04
02
_2
5V
6K
~D
C3
36
0.1
U_
04
02
_2
5V
6K
~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+L
CV
DV
DD
_C
HG
EN_LCDPWR
USBP12- USBP12_D-
USBP12+ DMIC_CLK0
DMIC0
LDDC_CLK_PCH
LDDC_DATA_PCH
BIA_PWM_LVDS DISP_ON
DMIC0
DMIC_CLK0
USBP12_D+USBP12_D-
BIA_PWM_LVDSDISP_ON
USBP12_D+
PWR_SRC_ON
+3.3V_ALW
+PWR_SRC_S
+3.3V_ALW
+LCDVDD
+LCDVDD
+CAMERA_VDD +3.3V_RUN
+3.3V_RUN
+LCDVDD +3.3V_RUN
+CAMERA_VDD
+BL_PWR_SRC
+LCDVDD
+3.3V_RUN
+BL_PWR_SRC
+PWR_SRC+BL_PWR_SRC
LCD_VCC_TEST_EN<39>
ENVDD_PCH<16,39>
CCD_OFF<39>
USBP12-<17>
USBP12+<17>
DMIC0<29>
DMIC_CLK0<29>
PANEL_BKEN_PCH <16>BIA_PWM_PCH <16>
PANEL_BKEN_EC <39>BIA_PWM_EC <40>
CAM_MIC_CBL_DET# <17>
LCD_CBL_DET# <17>
LCD_TST <39>
LDDC_DATA_PCH <16>LDDC_CLK_PCH <16>
LCD_ACLK+_PCH <16>
LCD_A2-_PCH <16>LCD_A2+_PCH <16>
LCD_A1+_PCH <16>
LCD_A0-_PCH <16>
LCD_A1-_PCH <16>LCD_A0+_PCH <16>
LCD_BCLK-_PCH <16>LCD_BCLK+_PCH <16>
LCD_B2-_PCH <16>LCD_B2+_PCH <16>
LCD_B1-_PCH <16>LCD_B1+_PCH <16>
LCD_B0+_PCH <16>LCD_B0-_PCH <16>
LCD_ACLK-_PCH <16>
EN_INVPWR<40>
Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
LVDS & CAM Conn
24 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
LVDS & CAM Conn
24 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
LVDS & CAM Conn
24 61Friday, March 02, 2012
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
FDC654P: P CHANNAL
40mil40mil
Panel backlight power control by EC
LCD PowerPlace near to JLVDS1
Webcam PWR CTRL
Close to JLVDS1.39,40 Close to JLVD1.38 Close to JLVD1.38
Link CIS
R160 2.2K_0402_5%~DR160 2.2K_0402_5%~D1 2
C2
46
0.1
U_
06
03
_5
0V
7K
~D
C2
46
0.1
U_
06
03
_5
0V
7K
~D
1
2
C2
93
0.0
22
U_
04
02
_2
5V
7K
~D
C2
93
0.0
22
U_
04
02
_2
5V
7K
~D
1
2
G
D S
Q23
PMV65XP_SOT23-3~D
G
D S
Q23
PMV65XP_SOT23-3~D
2
1 3
C2
92
0.1
U_
04
02
_2
5V
6K
~D
C2
92
0.1
U_
04
02
_2
5V
6K
~D
1
2
10
U_
08
05
_1
0V
6K
~D
C3
00
10
U_
08
05
_1
0V
6K
~D
C3
00
1
2
D69RB751VM-40TE-17_SOD323-2~D
D69RB751VM-40TE-17_SOD323-2~D
21
R1
63
24
.7M
_0
40
2_
5%
~D
R1
63
24
.7M
_0
40
2_
5%
~D
12
R428 0_0402_5%~D@R428 0_0402_5%~D@1 2
D66RB751VM-40TE-17_SOD323-2~D
D66RB751VM-40TE-17_SOD323-2~D
21
C4
35
P_
04
02
_5
0V
8C
~D
@C
43
5P
_0
40
2_
50
V8
C~
D@1
2
L10
OCF2012181YZF_4P
L10
OCF2012181YZF_4P
11
22
33
44
C2
43
0.1
U_
04
02
_2
5V
6K
~D
C2
43
0.1
U_
04
02
_2
5V
6K
~D
1
2
R4
14
10
K_
04
02
_5
%~
DR
41
41
0K
_0
40
2_
5%
~D
12
C4
15
P_
04
02
_5
0V
8C
~D
@C
41
5P
_0
40
2_
50
V8
C~
D@1
2
C4
25
P_
04
02
_5
0V
8C
~D
@C
42
5P
_0
40
2_
50
V8
C~
D@1
2
C2
98
0.1
U_
04
02
_2
5V
6K
~D
C2
98
0.1
U_
04
02
_2
5V
6K
~D
1
2
D68RB751VM-40TE-17_SOD323-2~D
D68RB751VM-40TE-17_SOD323-2~D
21
R1
13
71
0K
_0
40
2_
5%
~D
R1
13
71
0K
_0
40
2_
5%
~D
12
S
G
D
Q18SI3456DDV-T1-GE3_TSOP6~D
S
G
D
Q18SI3456DDV-T1-GE3_TSOP6~D
3
6
24 5
1
C2
99
0.1
U_
04
02
_2
5V
6K
~D
C2
99
0.1
U_
04
02
_2
5V
6K
~D
1
2
C4
05
P_
04
02
_5
0V
8C
~D
@C
40
5P
_0
40
2_
50
V8
C~
D@1
2
R423 47K_0402_5%~DR423 47K_0402_5%~D1 2
C2
96
0.1
U_
06
03
_5
0V
7K
~D
C2
96
0.1
U_
06
03
_5
0V
7K
~D
1
2
S
G
D
Q21FDC654P-G_SSOT-6~D
S
G
D
Q21FDC654P-G_SSOT-6~D
3
6
24 5
1
R159 2.2K_0402_5%~DR159 2.2K_0402_5%~D1 2
C2
97
10
00
P_
04
02
_5
0V
7K
~D
C2
97
10
00
P_
04
02
_5
0V
7K
~D
1
2
Q1
9B
DM
N6
6D
0L
DW
-7_
SO
T3
63
-6~
DQ
19
BD
MN
66
D0
LD
W-7
_S
OT
36
3-6
~D
3
5
4
Q1
9A
DM
N6
6D
0L
DW
-7_
SO
T3
63
-6~
DQ
19
AD
MN
66
D0
LD
W-7
_S
OT
36
3-6
~D
61
2
R4
13
13
0_
04
02
_1
%~
DR
41
31
30
_0
40
2_
1%
~D
12
D67RB751VM-40TE-17_SOD323-2~D
D67RB751VM-40TE-17_SOD323-2~D
21
D6BAT54CW_SOT323-3~D
D6BAT54CW_SOT323-3~D
12
3Q20
PDTC124EU_SC70-3~DQ20
PDTC124EU_SC70-3~D
2
13
R427 0_0402_5%~D@R427 0_0402_5%~D@1 2
R4
12
47
0K
_0
40
2_
5%
~D
R4
12
47
0K
_0
40
2_
5%
~D
12
D8
PE
SD
5V
0U
2B
T_
SO
T2
3-3
~D
D8
PE
SD
5V
0U
2B
T_
SO
T2
3-3
~D
2 31
JLVDS1
STARC_111H40-100000-G4-RCONN@
JLVDS1
STARC_111H40-100000-G4-RCONN@
11
22
33
44
55
66
77
88
99
1010
1111
1212
1313
1414
1515
1616
1717
1818
1919
2020
2121
2222
2323
2424
2525
2626
2727
2828
2929
3030
3131
3232
3333
3434
3535
3636
3737
3838
3939
4040
G141
G242
G343
G444
G545
R1
13
81
00
K_
04
02
_5
%~
DR
11
38
10
0K
_0
40
2_
5%
~D
12
G
D S
Q22SSM3K7002FU_SC70-3~D
G
D S
Q22SSM3K7002FU_SC70-3~D
2
1 3
LE92 BLM18BB221SN1D_2P~DLE92 BLM18BB221SN1D_2P~D1 2
R4
22
10
0K
_0
40
2_
5%
~D
R4
22
10
0K
_0
40
2_
5%
~D
12
D9
PE
SD
5V
0U
2B
T_
SO
T2
3-3
~D
D9
PE
SD
5V
0U
2B
T_
SO
T2
3-3
~D
231
C3
01
0.1
U_
04
02
_2
5V
6K
~D
C3
01
0.1
U_
04
02
_2
5V
6K
~D
1
2
2
2
1
1
B B
A ATMDSB_CON_P1
TMDSB_CON_N0
TMDSB_CON_CLK#
TMDSB_CON_P0
TMDSB_CON_P2
TMDSB_CON_N1
TMDSB_CON_CLK
TMDSB_CON_N2
HDMIB_PCH_HPD_R
PCH_SDVO_CTRLDATA_RPCH_SDVO_CTRLCLK_R
HDMI_CEC
TMDSB_PCH_N2_CTMDSB_PCH_P2_C HDMI_OB
TMDSB_PCH_N1_CTMDSB_PCH_P1_C
TMDSB_PCH_N0_CTMDSB_PCH_P0_C
TMDSB_PCH_CLK#_CTMDSB_PCH_CLK_C
PCH_SDVO_CTRLDATA_R
PCH_SDVO_CTRLCLK_R +5V_HDMI_DDC
HDMIB_PCH_HPD_R
HDMI_CEC
+5
V_
RU
N_
HD
MI
TMDSB_CON_P1
TMDSB_CON_N2
TMDSB_CON_P2
TMDSB_CON_N1
TMDSB_PCH_N2_C
TMDSB_PCH_CLK_C
TMDSB_PCH_CLK#_C
TMDSB_PCH_P1_C
TMDSB_PCH_P0_C
TMDSB_PCH_N1_C
TMDSB_PCH_P2_C
TMDSB_CON_CLK
TMDSB_CON_P0
TMDSB_CON_CLK#
TMDSB_CON_N0TMDSB_PCH_N0_C
+VDISPLAY_VCC
+3.3V_RUN
+3.3V_RUN
+5V_RUN
+3.3V_RUN
+3.3V_RUN
+5V_RUN
PCH_SDVO_CTRLCLK<16>
PCH_SDVO_CTRLDATA<16>
HDMIB_PCH_HPD<16>
TMDSB_PCH_CLK#<16>
TMDSB_PCH_CLK<16>
TMDSB_PCH_P0<16>
TMDSB_PCH_N0<16>
TMDSB_PCH_N2<16>
TMDSB_PCH_P2<16>
TMDSB_PCH_N1<16>
TMDSB_PCH_P1<16>
Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
HDMI port
25 61Saturday, March 03, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
HDMI port
25 61Saturday, March 03, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
HDMI port
25 61Saturday, March 03, 2012
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Link CIS
Note:AOI found open soldering is due to the difference between Main and 2nd on PAD dimension.F2 change to 2nd source "SP040003H0L (F_MF-MSMF050-2)" PCB Footprint
R1
16
81
M_
04
02
_5
%~
DR
11
68
1M
_0
40
2_
5%
~D1
2
C1
20
93
.9P
_0
40
2_
50
V8
CC
12
09
3.9
P_
04
02
_5
0V
8C
1
2
R448 604_0402_1%R448 604_0402_1%1 2
R1153 2.2K_0402_5%~DR1153 2.2K_0402_5%~D1 2
Q120BDMN66D0LDW-7_SOT363-6~D
Q120BDMN66D0LDW-7_SOT363-6~D
3
5
4
R458 10K_0402_5%~DR458 10K_0402_5%~D1 2
C1
21
13
.9P
_0
40
2_
50
V8
CC
12
11
3.9
P_
04
02
_5
0V
8C
1
2
Q120ADMN66D0LDW-7_SOT363-6~D
Q120ADMN66D0LDW-7_SOT363-6~D
61
2
G
DS
Q121SSM3K7002FU_SC70-3~D
G
DS
Q121SSM3K7002FU_SC70-3~D
2
13
C3
37
0.1
U_
04
02
_1
0V
7K
~D
C3
37
0.1
U_
04
02
_1
0V
7K
~D
1
2
R454 604_0402_1%R454 604_0402_1%1 2
10
U_
08
05
_1
0V
6K
~D
C3
38
10
U_
08
05
_1
0V
6K
~D
C3
38
1
2
C352 0.1U_0402_10V7K~DC352 0.1U_0402_10V7K~D12
C349 0.1U_0402_10V7K~DC349 0.1U_0402_10V7K~D12
R453 604_0402_1%R453 604_0402_1%1 2
G
D
S
Q2
6S
SM
3K
70
02
FU
_S
C7
0-3
~D
G
D
S
Q2
6S
SM
3K
70
02
FU
_S
C7
0-3
~D
2
13
L103
9NH_0402HS-9N0EJTS_5%~D
L103
9NH_0402HS-9N0EJTS_5%~D1 2
C1
21
33
.9P
_0
40
2_
50
V8
CC
12
13
3.9
P_
04
02
_5
0V
8C
1
2
R449 604_0402_1%R449 604_0402_1%1 2
L101
9NH_0402HS-9N0EJTS_5%~D
L101
9NH_0402HS-9N0EJTS_5%~D1 2
L99
9NH_0402HS-9N0EJTS_5%~D
L99
9NH_0402HS-9N0EJTS_5%~D1 2
C353 0.1U_0402_10V7K~DC353 0.1U_0402_10V7K~D12
C1
21
53
.9P
_0
40
2_
50
V8
CC
12
15
3.9
P_
04
02
_5
0V
8C
1
2
Part Number Description
RO0000002HM HDMI W/Logo:RO0000002HM
HDMI 46@
Part Number Description
RO0000002HM HDMI W/Logo:RO0000002HM
HDMI 46@
NC D
4B
AT
10
00
-7-F
_S
OT
23
-3~
D
NC D
4B
AT
10
00
-7-F
_S
OT
23
-3~
D
21
3
R1165 10K_0402_5%~DR1165 10K_0402_5%~D12
C350 0.1U_0402_10V7K~DC350 0.1U_0402_10V7K~D12
C1
21
03
.9P
_0
40
2_
50
V8
CC
12
10
3.9
P_
04
02
_5
0V
8C
1
2
R1152 2.2K_0402_5%~DR1152 2.2K_0402_5%~D1 2
R455 604_0402_1%R455 604_0402_1%1 2
L20
DLW21SN900HQ2L_0805_4P~D
@L20
DLW21SN900HQ2L_0805_4P~D
@
11
22
33
44
C1
21
23
.9P
_0
40
2_
50
V8
CC
12
12
3.9
P_
04
02
_5
0V
8C
1
2
L21
DLW21SN900HQ2L_0805_4P~D
@L21
DLW21SN900HQ2L_0805_4P~D
@
11
22
33
44
L22
DLW21SN900HQ2L_0805_4P~D
@L22
DLW21SN900HQ2L_0805_4P~D
@
11
22
33
44
L106
9NH_0402HS-9N0EJTS_5%~D
L106
9NH_0402HS-9N0EJTS_5%~D1 2
L105
9NH_0402HS-9N0EJTS_5%~D
L105
9NH_0402HS-9N0EJTS_5%~D1 2
R1
16
30
_0
40
2_
5%
~D
R1
16
30
_0
40
2_
5%
~D
12
JHDMI1
HONGL_13-13201904CP
CONN@JHDMI1
HONGL_13-13201904CP
CONN@
D2+1
D2_shield2
D2-3
D1+4
D1_shield5
D1-6
D0+7
D0_shield8
D0-9
CK+10
CK_shield11
CK-12
CEC13
Reserved14
SCL15
SDA16
DDC/CEC_GND17
+5V18
HP_DET19
GND20
GND21
GND22
GND23
R5
0_
12
06
_5
%~
D
@R5
0_
12
06
_5
%~
D
@
12
L19
DLW21SN900HQ2L_0805_4P~D
@L19
DLW21SN900HQ2L_0805_4P~D
@
11
22
33
44
R452 604_0402_1%R452 604_0402_1%1 2
L104
9NH_0402HS-9N0EJTS_5%~D
L104
9NH_0402HS-9N0EJTS_5%~D1 2
C351 0.1U_0402_10V7K~DC351 0.1U_0402_10V7K~D12
R450 604_0402_1%R450 604_0402_1%1 2
C1
21
43
.9P
_0
40
2_
50
V8
CC
12
14
3.9
P_
04
02
_5
0V
8C
1
2
R456 604_0402_1%R456 604_0402_1%1 2
L102
9NH_0402HS-9N0EJTS_5%~D
L102
9NH_0402HS-9N0EJTS_5%~D1 2
L100
9NH_0402HS-9N0EJTS_5%~D
L100
9NH_0402HS-9N0EJTS_5%~D1 2
C348 0.1U_0402_10V7K~DC348 0.1U_0402_10V7K~D12
D6
5R
B7
51
VM
-40
TE
-17
_S
OD
32
3-2
~D
@D
65
RB
75
1V
M-4
0T
E-1
7_
SO
D3
23
-2~
D@
21
C1
21
63
.9P
_0
40
2_
50
V8
CC
12
16
3.9
P_
04
02
_5
0V
8C
1
2
C346 0.1U_0402_10V7K~DC346 0.1U_0402_10V7K~D12
F2
0.5
A_
15
V_
SM
D1
81
2P
05
0T
FF
20
.5A
_1
5V
_S
MD
18
12
P0
50
TF
21
C347 0.1U_0402_10V7K~DC347 0.1U_0402_10V7K~D12
R1128 20K_0402_5%~DR1128 20K_0402_5%~D1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DPC_AUX_C
DPC_AUX#_C
DPC_CA_DET#
DPD_AUX_C
DPD_AUX#_C
DPD_CA_DET#
DPD_CA_DET
DPC_CA_DET
PCH_DDPD_CTRLCLK
PCH_DDPD_CTRLDATA
PCH_DDPC_CTRLCLK
PCH_DDPC_CTRLDATA
+5V_RUN
+3.3V_RUN
+5V_RUN
+3.3V_RUN
+3.3V_RUN
DPC_CA_DET<38>
DPC_PCH_DOCK_AUX#<16>
DPC_PCH_DOCK_AUX<16>
PCH_DDPC_CTRLDATA <16>
PCH_DDPC_CTRLCLK <16>
DPC_DOCK_AUX#<38>
DPC_DOCK_AUX<38>
DPD_CA_DET<38>
DPD_PCH_DOCK_AUX#<16>
DPD_PCH_DOCK_AUX<16>
PCH_DDPD_CTRLDATA <16>
PCH_DDPD_CTRLCLK <16>
DPD_DOCK_AUX#<38>
DPD_DOCK_AUX<38>
Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
DP SW
26 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
DP SW
26 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
DP SW
26 61Friday, March 02, 2012
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
AUX/DDC SW for DPD to E-DOCK
Intel WW18 Strapping option
Intel WW18 Strapping option
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
AUX/DDC SW for DPC to E-DOCK
Note:When implement 2nd source, please check Vil and Vih spec is meet main source specNote:When implement 2nd source, please check Vil and Vih spec is meet main source spec
R492 1M_0402_5%~DR492 1M_0402_5%~D1 2
U23
PI3C3125LEX_TSSOP14~D
U23
PI3C3125LEX_TSSOP14~D
B311
B16
BE14
A15
A29
GND7
A312
VCC14
B28
BE313
A02
B03
BE01
BE210
C369
0.1U_0402_25V6K~D
C369
0.1U_0402_25V6K~D
1 2
C357 0.1U_0402_10V7K~DC357 0.1U_0402_10V7K~D12
R487 2.2K_0402_5%~DR487 2.2K_0402_5%~D1 2
C356
0.1U_0402_25V6K~D
C356
0.1U_0402_25V6K~D
1 2
C368 0.1U_0402_10V7K~DC368 0.1U_0402_10V7K~D12
C365
0.1U_0402_25V6K~D
C365
0.1U_0402_25V6K~D
1 2
U24TC7SET04FU_SSOP5~D
U24TC7SET04FU_SSOP5~D
A2
Y4
P5
NC
1
G3
C366
0.1U_0402_25V6K~D
C366
0.1U_0402_25V6K~D
1 2
U21TC7SET04FU_SSOP5~D
U21TC7SET04FU_SSOP5~D
A2
Y4
P5
NC
1
G3
R490 2.2K_0402_5%~DR490 2.2K_0402_5%~D1 2
R489 2.2K_0402_5%~DR489 2.2K_0402_5%~D1 2
R491 1M_0402_5%~DR491 1M_0402_5%~D1 2
C360 0.1U_0402_10V7K~DC360 0.1U_0402_10V7K~D12
R488 2.2K_0402_5%~DR488 2.2K_0402_5%~D1 2
U20
PI3C3125LEX_TSSOP14~D
U20
PI3C3125LEX_TSSOP14~D
B311
B16
BE14
A15
A29
GND7
A312
VCC14
B28
BE313
A02
B03
BE01
BE210
C367 0.1U_0402_10V7K~DC367 0.1U_0402_10V7K~D12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SATA_PRX_DTX_N0SATA_PRX_DTX_P0
SATA_PTX_DRX_P0SATA_PTX_DRX_N0
HDD_DET#
HDD_EN_5V
FFS_INT2HDD_FALL_INT
DDR_XDP_WAN_SMBDAT
DDR_XDP_WAN_SMBCLK
FFS_INT2_Q
HDD_FALL_INT
+3.3V_RUN_FFS
FFS_INT2_Q
FFS_INT2
+3.3V_RUN_HDD
+5V_HDD
+5V_HDD
+5V_HDD
+5V_ALW
+5V_RUN
+3.3V_ALW2+3.3V_RUN
+3.3V_RUN_HDD
+PWR_SRC_S
+5V_HDD
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
FFS_INT2<18>
HDD_DET#<14>
PSATA_PRX_DTX_P0_C<14>PSATA_PRX_DTX_N0_C<14>
PSATA_PTX_DRX_P0_C<14>PSATA_PTX_DRX_N0_C<14>
HDD_FALL_INT<17>
DDR_XDP_WAN_SMBCLK<7,12,13,14,15,34>DDR_XDP_WAN_SMBDAT<7,12,13,14,15,34>
RUN_ON<35,39,42,47,48>
SIO_SLP_S3#<11,16,35,39,42,47,48,49>
Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
HDD CONNECTOR
27 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
HDD CONNECTOR
27 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
HDD CONNECTOR
27 61Friday, March 02, 2012
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
Close to JSATA1
HDD power
Link CIS
Note : Short PJP64 for SSD HDD issue
10
U_
08
05
_1
0V
6K
~D
C3
94
10
U_
08
05
_1
0V
6K
~D
C3
94
1
2
R4
99
10
0K
_0
40
2_
5%
~D
@R4
99
10
0K
_0
40
2_
5%
~D
@
12
PJP64
PAD-OPEN1x1m
@PJP64
PAD-OPEN1x1m
@
1 2
R503 100K_0402_5%~DR503 100K_0402_5%~D1 2
LNG3DMU88
LNG3DMTR_LGA16_3X3~D
LNG3DMU88
LNG3DMTR_LGA16_3X3~D
VDD_IO1
NC2
NC3
SCL/SPC4
GND5
VDD14
CS8
INT 111
INT 29
RES10
GND12
SDO/SA07
SDA / SDI / SDO6
RES13
RES16
RES15
S
G
D Q27SI3456DDV-T1-GE3_TSOP6~D
@
S
G
D Q27SI3456DDV-T1-GE3_TSOP6~D
@
3
624
51
JSATA1
SANTA_198202-1CONN@
JSATA1
SANTA_198202-1CONN@
GND1
A+2
A-3
GND4
B-5
B+6
GND7
V338
V339
V3310
GND11
GND12
GND13
V514
V515
V516
GND17
Reserved18
GND19
V1220
V1221
V1222
GND23
GND24
R501 10K_0402_5%~DR501 10K_0402_5%~D1 2
Q2
9B
DM
N6
6D
0L
DW
-7_
SO
T3
63
-6~
DQ
29
BD
MN
66
D0
LD
W-7
_S
OT
36
3-6
~D
3
5
4
C384 0.01U_0402_16V7K~DC384 0.01U_0402_16V7K~D12
Q2
8B
DM
N6
6D
0L
DW
-7_
SO
T3
63
-6~
D
@Q2
8B
DM
N6
6D
0L
DW
-7_
SO
T3
63
-6~
D
@
3
5
4
R1624 0_0402_5%~D@R1624 0_0402_5%~D@1 2
R5
05
10
0K
_0
40
2_
5%
~D
@R5
05
10
0K
_0
40
2_
5%
~D
@
12
C3
87
10
U_
06
03
_6
.3V
6M
~D
C3
87
10
U_
06
03
_6
.3V
6M
~D
1
2
R5
08
10
0K
_0
40
2_
5%
~D
R5
08
10
0K
_0
40
2_
5%
~D
12
R502 10K_0402_5%~DR502 10K_0402_5%~D1 2
Q2
9A
DM
N6
6D
0L
DW
-7_
SO
T3
63
-6~
DQ
29
AD
MN
66
D0
LD
W-7
_S
OT
36
3-6
~D
61
2
C3
93
0.1
U_
06
03
_5
0V
7K
~D
@C3
93
0.1
U_
06
03
_5
0V
7K
~D
@1
2
C385 0.01U_0402_16V7K~DC385 0.01U_0402_16V7K~D12
C3
99
0.1
U_
04
02
_2
5V
6K
~D
C3
99
0.1
U_
04
02
_2
5V
6K
~D
1
2
R5
06
10
0K
_0
40
2_
5%
~D
@R
50
61
00
K_
04
02
_5
%~
D@1
2
C383 0.01U_0402_16V7K~DC383 0.01U_0402_16V7K~D12
R5
04
10
0K
_0
40
2_
5%
~D
R5
04
10
0K
_0
40
2_
5%
~D
12
C3
95
10
00
P_
04
02
_5
0V
7K
~D
C3
95
10
00
P_
04
02
_5
0V
7K
~D
1
2
R5
17
1M
_0
40
2_
5%
~D
@R5
17
1M
_0
40
2_
5%
~D
@
12
C3
96
0.1
U_
04
02
_2
5V
6K
~D
C3
96
0.1
U_
04
02
_2
5V
6K
~D
1
2
PJP3
JUMP_43X79
@PJP3
JUMP_43X79
@
11
22
R5
00
10
0K
_0
40
2_
5%
~D
@R
50
01
00
K_
04
02
_5
%~
D@ 1
2
Q2
8A
DM
N6
6D
0L
DW
-7_
SO
T3
63
-6~
D
@Q2
8A
DM
N6
6D
0L
DW
-7_
SO
T3
63
-6~
D
@
61
2R1621 0_0402_5%~D@R1621 0_0402_5%~D@
1 2
PJP53
PAD-OPEN1x1m
@PJP53
PAD-OPEN1x1m
@
1 2
C386 0.01U_0402_16V7K~DC386 0.01U_0402_16V7K~D12C
40
20
.1U
_0
40
2_
25
V6
K~
DC
40
20
.1U
_0
40
2_
25
V6
K~
D
1
2
C3
88
0.1
U_
04
02
_2
5V
6K
~D
C3
88
0.1
U_
04
02
_2
5V
6K
~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MODC_EN#
SATA_ODD_PRX_DTX_N1
SATA_ODD_PTX_DRX_N1SATA_ODD_PTX_DRX_P1
SATA_ODD_PRX_DTX_P1
DEVICE_DET#
DEVICE_DET#
MOD_EN
TEST POINT
+5V_ALW
+3.3V_ALW2
+5V_MOD +5V_RUN
+5V_MOD
+5V_MOD
+PWR_SRC_S
+3.3V_RUN
MODC_EN<39>
SATA_ODD_PRX_DTX_P1_C<14>SATA_ODD_PRX_DTX_N1_C<14>
SATA_ODD_PTX_DRX_P1_C<14>SATA_ODD_PTX_DRX_N1_C<14>
DEVICE_DET#<40>
Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
ODD CONNECTOR
28 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
ODD CONNECTOR
28 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
ODD CONNECTOR
28 61Friday, March 02, 2012
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
2
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Close to JSATA2
ODD power
Link CIS
C3
97
10
00
P_
04
02
_5
0V
7K
~D
C3
97
10
00
P_
04
02
_5
0V
7K
~D
1
2
JSATA2
SANTA_205902-1~D
CONN@JSATA2
SANTA_205902-1~D
CONN@
GND114
GND215
GND1
RX+2
RX-3
GND4
TX-5
TX+6
GND7
DP8
+5V9
+5V10
MD11
GND12
GND13
C3
98
0.1
U_
04
02
_2
5V
6K
~D
C3
98
0.1
U_
04
02
_2
5V
6K
~D
1
2
R5
11
10
0K
_0
40
2_
5%
~D
R5
11
10
0K
_0
40
2_
5%
~D
12
R5
18
4.7
M_
04
02
_5
%~
DR
51
84
.7M
_0
40
2_
5%
~D
12
R5
09
10
0K
_0
40
2_
5%
~D
R5
09
10
0K
_0
40
2_
5%
~D
12
C405 0.01U_0402_16V7K~DC405 0.01U_0402_16V7K~D12
R5
07
47
0K
_0
40
2_
5%
~D
R5
07
47
0K
_0
40
2_
5%
~D
12
PJP4
JUMP_43X79
@PJP4
JUMP_43X79
@
11
22
R5
12
10
0K
_0
40
2_
5%
~D
R5
12
10
0K
_0
40
2_
5%
~D
12
C406 0.01U_0402_16V7K~DC406 0.01U_0402_16V7K~D12
S
G
D Q30SI3456DDV-T1-GE3_TSOP6~D
S
G
D Q30SI3456DDV-T1-GE3_TSOP6~D
362
451
10
U_
08
05
_1
0V
6K
~D
C4
01
10
U_
08
05
_1
0V
6K
~D
C4
01
1
2
C407 0.01U_0402_16V7K~DC407 0.01U_0402_16V7K~D12
Q3
1B
DM
N6
6D
0L
DW
-7_
SO
T3
63
-6~
DQ
31
BD
MN
66
D0
LD
W-7
_S
OT
36
3-6
~D
3
5
4
C4
00
0.0
22
U_
04
02
_2
5V
7K
~D
C4
00
0.0
22
U_
04
02
_2
5V
7K
~D
1
2
T88PAD~D @T88PAD~D @
R1125 100K_0402_5%~DR1125 100K_0402_5%~D12
C404 0.01U_0402_16V7K~DC404 0.01U_0402_16V7K~D12
Q3
1A
DM
N6
6D
0L
DW
-7_
SO
T3
63
-6~
DQ
31
AD
MN
66
D0
LD
W-7
_S
OT
36
3-6
~D
61
2
2
2
1
1
B B
A A
+DVDD_CORE
I2S_DI#
I2S_LRCLK
I2S_DO_R
AUD_SENSE_AAUD_SENSE_B
I2S_DO
PCH_AZ_CODEC_BITCLK
PCH_AZ_CODEC_RST#
PCH_AZ_CODEC_SDOUT
PCH_AZ_SDIN0_R
AUD_SENSE_B
PCH_AZ_CODEC_SDOUT PCH_AZ_CODEC_BITCLK
+VDDA_PVDD
I2S_LRCLK
I2S_BCLK DAI_BCLK#
DAI_LRCK#
I2S_DO
I2S_DI#
EN_I2S_NB_CODEC#
DAI_DO#
DAI_12MHZ#I2S_MCLK
AUD_PC_BEEP
MIC_IN_L
+VREFOUT
INT_SPK_R-INT_SPK_R+
INT_SPK_L-INT_SPK_L+
+VREFOUT
DAI_BCLK#
DAI_LRCK#
DAI_DO#
DAI_12MHZ#
DAI_DI
+VDDA_AVDD
INT_SPKR_R-INT_SPKR_R+
I2S_BCLK
I2S_MCLK
I2S_BCLK_R
I2S_MCLK_R
INT_SPKR_L-INT_SPKL_L+
PCH_AZ_CODEC_RST#
AUD_SENSE_A
DMIC_CLK_L
CODEC_VREGCODEC_VNCODEC_CAP2CODEC_VREF
MIC_IN_R
INT_SPK_R+INT_SPK_L-INT_SPK_L+
INT_SPK_R-
+VDDA_AVDD
+3.3V_RUN+3.3V_RUN
+5V_RUN
+3.3V_RUN+3.3V_RUN
+3.3V_RUN
+5V_RUN
+VREFOUT
+3.3V_RUN +3.3V_RUN_DVDD +3.3V_RUN_DVDD
+3.3V_RUN
+VDDA_AVDD
+3.3V_RUN
+3.3V_RUN
PCH_AZ_CODEC_SDIN0<14>
AUD_NB_MUTE#<39>
PCH_AZ_CODEC_BITCLK<14>
PCH_AZ_CODEC_RST#<14>
PCH_AZ_CODEC_SYNC<14>
PCH_AZ_CODEC_SDOUT<14>
DOCK_MIC_DET <39>DOCK_HP_DET<39>
AUD_HP_OUT_L <37>AUD_HP_OUT_R <37>
DAI_DO# <38>
DAI_DI <38>
DAI_12MHZ# <38>
DAI_LRCK# <38>
DAI_BCLK# <38>
MIC_IN_R <37>
BEEP <40>
SPKR <14>
DMIC_CLK1 <43>DMIC_CLK0 <24>
DMIC0 <24>
AUD_HP_NB_SENSE <37,39>
DMIC1 <43>EN_I2S_NB_CODEC# <39>
Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
Azalia (HD) Codec
29 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
Azalia (HD) Codec
29 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
Azalia (HD) Codec
29 61Friday, March 02, 2012
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
place at AGND and DGND plane
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Notes:
Keep PVDD supply and speaker traces routed on the DGND plane.
Keep away from AGND and other analog signals
place at Codec bottom side
R162, R163, R164, R165,R166 CO-lay with U73
Internal Speakers Header15 mils trace
Close to U72 pin6Close to U72 pin5
Place closely to Pin 13.
Add for solve pop noise and detect issue
Place closely to Pin 14
Place C994, C952~C957 close to Codec
Place R1096 close to codec
Place R1097 close to codec
NA
SPDIFOUT0
Pull-up to AVDD
PORT E
PORT F
DMIC0
SPDIFOUT1 (DMIC1)
Resistor SENSE_A SENSE_B
39.2K
20K
10K
5.11K
2.49K
PORT A
PORT B
HeadPhone Out
Dock Audio
Internal SPK
External MICPORT A
PORT B
PORT C
PORT D
Power/B
Camera/BDMIC0
DMIC1
place close to pin27
C957 place close to pin38
Place LE3/LE4 close to codec
Link CIS
Place C962 close to codec
Place closed U72
C973
2200P
_0402_50V
7K
~D
C973
2200P
_0402_50V
7K
~D
1
2
R1120 100K_0402_5%~DR1120 100K_0402_5%~D1 2
C980
0.1
U_0402_10V
7K
~D
C980
0.1
U_0402_10V
7K
~D
1
2
R1080
20K
_0402_1%
~D
R1080
20K
_0402_1%
~D
12 R
1082
100K
_0402_5%
~D
R1082
100K
_0402_5%
~D
12
10K_0402_5%~DR1099 10K_0402_5%~DR10991 2
Q106ADMN66D0LDW-7_SOT363-6~D
Q106ADMN66D0LDW-7_SOT363-6~D
61
2
C961
0.1
U_0402_25V
6K
~D
C961
0.1
U_0402_25V
6K
~D
1
2
DE
1P
ES
D5V
0U
2B
T_S
OT
23-3
~D
DE
1P
ES
D5V
0U
2B
T_S
OT
23-3
~D
231
C983 0.1U_0402_25V6K~DC983 0.1U_0402_25V6K~D1 2
C9624.7U_0603_6.3V6K~D
C9624.7U_0603_6.3V6K~D
1
2
R1641 0_0402_5%~DR1641 0_0402_5%~D1 2
C953
0.1
U_0402_25V
6K
~D
C953
0.1
U_0402_25V
6K
~D
1
2
2.2U_0603_6.3V6K~DC1163 2.2U_0603_6.3V6K~DC1163 1 2
C982 0.1U_0402_25V6K~DC982 0.1U_0402_25V6K~D1 2
JSPK1
ACES_50279-0040N-001CONN@
JSPK1
ACES_50279-0040N-001CONN@
11
22
33
GND5
GND6
44
C1105 0.1U_0402_25V6K~DC1105 0.1U_0402_25V6K~D12
R171
3.3
_0402_5%
~D
R171
3.3
_0402_5%
~D1
2
R1142 10K_0402_5%~D@R1142 10K_0402_5%~D@ 1 2
C979
1000P
_0402_50V
7K
~D
C979
1000P
_0402_50V
7K
~D
1
2
C978
0.1
U_0402_10V
7K
~D
@C
978
0.1
U_0402_10V
7K
~D
@
1
2
R1081
100K
_0402_5%
~D
R1081
100K
_0402_5%
~D
12
R1084
4.7
K_0402_5%
~D
@R
1084
4.7
K_0402_5%
~D
@12
R10782.49K_0402_1%~D
R10782.49K_0402_1%~D
12
D55
DA
204U
_S
OT
323-3
~D
@D
55
DA
204U
_S
OT
323-3
~D
@
231
R1119 100K_0402_5%~DR1119 100K_0402_5%~D1 2
R170
3.3
_0402_5%
~D
R170
3.3
_0402_5%
~D1
2
10U
_0805_10V
6K
~D
C955
10U
_0805_10V
6K
~D
C955
1
2
33_0402_5%~DR1096 33_0402_5%~DR1096 1 2
Q107ADMN66D0LDW-7_SOT363-6~D
Q107ADMN66D0LDW-7_SOT363-6~D
61
2
33_0402_5%~DR1097 33_0402_5%~DR1097 1 2
C986 0.1U_0402_25V6K~DC986 0.1U_0402_25V6K~D1 2
D54
DA
204U
_S
OT
323-3
~D
@D
54
DA
204U
_S
OT
323-3
~D
@
231
U72
92HD90B2X5NLGXYAX8_QFN48_7X7~D
U72
92HD90B2X5NLGXYAX8_QFN48_7X7~D
DVDD_CORE1
DMIC_CLK/GPIO 12
DVDD_IO3
DMIC_0/GPIO 24
SDATA_OUT5
BITCLK6
DVSS7
SDATA_IN8
DVDD9
SYNC10
RESET#11
PC_BEEP12
SENSE_A13
SENSE_B14
I2S_MCLK15
I2S_SCLK16
I2S_DOUT17
I2S_LRCLK18
No Connect19
No Connect20
VREFFILT21
CAP222
VrefOut_A23
I2S_DIN24
MONO_OUT25
AVSS126
AVDD127
PORTA_L28
PORTA_R29
AVSS30
PORTB_L31
PORTB_R32
AVSS33
V-34
CAP-35
CAP+36
Vreg37
AVDD238
PVDD39
PORTD_+L40
PORTD_-L41
PVSS42
PORTD_-R43
PORTD_+R44
PVDD45
DMIC1/GPIO0/SPDIFOUT146
EAPD47
SPDIFOUT0//GPIO3/Aux_Out48
GND49
R1079
39.2
K_0402_1%
~D
R1079
39.2
K_0402_1%
~D
12
LE4 BLM18BB221SN1D_2P~DLE4 BLM18BB221SN1D_2P~D1 2
C1180
1U
_0603_10V
7K
~D
C1180
1U
_0603_10V
7K
~D
1
2
C967
0.1
U_0402_25V
6K
~D
@C
967
0.1
U_0402_25V
6K
~D
@
1
2
Q107BDMN66D0LDW-7_SOT363-6~DQ107BDMN66D0LDW-7_SOT363-6~D
3
5
4
R172
3.3
_0402_5%
~D
R172
3.3
_0402_5%
~D1
2
R1086
20K
_0402_1%
~D
R1086
20K
_0402_1%
~D
12
10U
_0805_10V
6K
~D
C958
10U
_0805_10V
6K
~D
C958
1
2
PJP62
PAD-OPEN1x1m
@PJP62
PAD-OPEN1x1m
@
1 2
C952
1U
_0603_10V
7K
~D
C952
1U
_0603_10V
7K
~D
1
2
R168 0_0402_5%~D@R168 0_0402_5%~D@ 1 2
C1103
0.1
U_0402_10V
7K
~D
C1103
0.1
U_0402_10V
7K
~D
1
2
R1076
10_0402_1%
~D
@R
1076
10_0402_1%
~D
@12
10U
_0805_10V
6K
~D
C960
10U
_0805_10V
6K
~D
C960
1
2
R1141 10K_0402_5%~D@R1141 10K_0402_5%~D@ 1 2
C984
10P
_0402_50V
8J~
D@
C984
10P
_0402_50V
8J~
D@1
2
C994
0.1
U_0402_25V
6K
~D
C994
0.1
U_0402_25V
6K
~D
1
2
D58DA204U_SOT323-3~D
@D58DA204U_SOT323-3~D
@
231
R169
3.3
_0402_5%
~D
R169
3.3
_0402_5%
~D1
2
L91 BLM18PG121SN1D_0603L91 BLM18PG121SN1D_06031 2
C965
1U
_0603_10V
7K
~D
C965
1U
_0603_10V
7K
~D
1
2
R167 0_0402_5%~D@R167 0_0402_5%~D@ 1 2
PJP60
PAD-OPEN1x1m
@PJP60
PAD-OPEN1x1m
@
1 2
L77
BLM21PG600SN1D_0805~D
L77
BLM21PG600SN1D_0805~D1 2
R163 0_0402_5%~DR163 0_0402_5%~D1 2
R166 0_0402_5%~DR166 0_0402_5%~D1 2
L94 BLM18PG121SN1D_0603L94 BLM18PG121SN1D_06031 2
D57
DA
204U
_S
OT
323-3
~D
@D
57
DA
204U
_S
OT
323-3
~D
@
231
R162 22_0402_5%~DR162 22_0402_5%~D1 2
R1143 2.2K_0402_5%~DR1143 2.2K_0402_5%~D1 2
R1540 1K_0402_1%~D@R1540 1K_0402_1%~D@12
R10832.49K_0402_1%~D
R10832.49K_0402_1%~D
12
10U
_0805_10V
6K
~D
C966
10U
_0805_10V
6K
~D
C966
1
2
C974
2200P
_0402_50V
7K
~D
C974
2200P
_0402_50V
7K
~D
1
2
L92 BLM18PG121SN1D_0603L92 BLM18PG121SN1D_06031 2
C957
0.1
U_0402_25V
6K
~D
C957
0.1
U_0402_25V
6K
~D
1
2
10U
_0805_10V
6K
~D
C954
10U
_0805_10V
6K
~D
C954
1
2
C981 0.1U_0402_25V6K~DC981 0.1U_0402_25V6K~D1 2
C987 0.1U_0402_25V6K~DC987 0.1U_0402_25V6K~D1 2
PJP63
PAD-OPEN1x1m
@PJP63
PAD-OPEN1x1m
@
1 2
U73
CD74HC366M96_SO16~D
@U73
CD74HC366M96_SO16~D
@
1A2
OE1#1
VCC16
2A4
3A6
6A14
4A10
5A12
GND8
OE2#15
6Y#13
5Y#11
4Y#9
3Y#7
2Y#5
1Y#3
LE3 BLM18BB221SN1D_2P~DLE3 BLM18BB221SN1D_2P~D1 2
C964
4.7
U_0603_6.3
V6K
~D
C964
4.7
U_0603_6.3
V6K
~D
1
2
C975
2200P
_0402_50V
7K
~D
C975
2200P
_0402_50V
7K
~D
1
2
L93 BLM18PG121SN1D_0603L93 BLM18PG121SN1D_06031 2
Q106BDMN66D0LDW-7_SOT363-6~D
Q106BDMN66D0LDW-7_SOT363-6~D
3
5
4
C963
4.7
U_0603_6.3
V6K
~D
C963
4.7
U_0603_6.3
V6K
~D
1
2
C1106 0.1U_0402_25V6K~DC1106 0.1U_0402_25V6K~D12
R10950_0805_5%~D R10950_0805_5%~D12
R164 0_0402_5%~DR164 0_0402_5%~D1 2
DE
2P
ES
D5V
0U
2B
T_S
OT
23-3
~D
DE
2P
ES
D5V
0U
2B
T_S
OT
23-3
~D
231
C985 0.1U_0402_25V6K~DC985 0.1U_0402_25V6K~D1 2
D56
DA
204U
_S
OT
323-3
~D
@D
56
DA
204U
_S
OT
323-3
~D
@
231
C976
2200P
_0402_50V
7K
~D
C976
2200P
_0402_50V
7K
~D
1
2
R1087
100K
_0402_5%
~D
R1087
100K
_0402_5%
~D
12
C959
0.1
U_0402_25V
6K
~D
C959
0.1
U_0402_25V
6K
~D
1
2
R165 22_0402_5%~DR165 22_0402_5%~D1 2
C977
10P
_0402_50V
8J~
D@
C977
10P
_0402_50V
8J~
D@
1
2
C956
1U
_0603_10V
7K
~D
C956
1U
_0603_10V
7K
~D
1
2
R1077
47_0402_5%
~D
@R
1077
47_0402_5%
~D
@12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LOM_ACTLED_YEL#LOM_SPD100LED_ORG#LOM_SPD10LED_GRN#
LAN_TX1+R
LAN_TX1-RLAN_TX1-
LAN_TX2-R
LAN_TX1+
LAN_TX3+R
LAN_TX3-R
LAN_TX2-
LAN_TX2+ LAN_TX2+R
LAN_TX3-
LAN_TX3+
LAN_TX0-R
LAN_TX0+ LAN_TX0+R
LAN_TX0-
LANCLK_REQ#_R
APE_GPIO4
PCIE_WAKE#
GPIO0
LAN_APE_SMB_CLK0LAN_APE_SMB_DATA0
PCIE_PRX_GLANTX_P7_C
PCIE_PRX_GLANTX_N7_C
PCIE_PTX_GLANRX_N7_C
PCIE_PTX_GLANRX_P7_C
LAN_PWR_DOWN
LAN_TX1-LAN_TX1+
LAN_TX2+LAN_TX2-
LAN_TX3-
LAN_TX0-LAN_TX0+
LAN_TX3+
LOM_VMAINPRSNT
PLTRST_LAN#
LOM_ACTLED_YEL#
LOM_SPD100LED_ORG#
LAN_APE_SMB_CLK1LAN_APE_SMB_DATA1
LAN_SO
LAN_SCLKLAN_CS#LAN_SI
NV_STRAP1NV_STRAP0
LAN_TMS
LAN_TRST#LAN_TCKLAN_TDILAN_TDO
GPHY_TVCOI
LOM_LOW_PWR_R
ENERGYDET
RDAC
APE_GPIO6APE_GPIO5
APE_GPIO2APE_GPIO3
APE_GPIO0
LOM_SPD10LED_GRN#
GPIO2
GPIO1LAN_SMB_CLKLAN_SMB_DATA
LOM_VAUXPRSNT
ENAB_3VLAN
LOM_SPD10LED_GRN#
LOM_SPD100LED_ORG#
LOM_LOW_PWR_R
LAN_SI
LAN_SO
LAN_CS#
LAN_SCLK
LAN_SOLAN_SCLK
LAN_SILAN_CS#
XTALO
XTALI
XTALO
XTALI
LAN_SMB_DATA
LAN_SMB_CLK
LAN_APE_SMB_DATA1
LAN_APE_SMB_CLK1
LAN_APE_SMB_DATA0
LAN_APE_SMB_CLK0
ENERGYDET
LOM_SMB_ALERT#
NV_STRAP1
NV_STRAP0
LAN_SCLK
LAN_SOLAN_SILAN_CS#
LAN_APE_SMB_CLK0
LAN_APE_SMB_DATA0
+3.3V_LAN
+3.3V_RUN
+3.3V_RUN
+3.3V_LAN
+3.3V_LAN
+3.3V_LAN+3.3V_ALW
+3.3V_ALW2
+PWR_SRC_S
+3.3V_LAN
+3.3V_LAN
+3.3V_LAN+3.3V_LAN +3.3V_LAN
+3.3V_M
+3.3V_LAN
+3.3V_LAN
+3.3V_LAN
LANCLK_REQ#<15>
PCIE_PRX_GLANTX_P7<15>
PCIE_PRX_GLANTX_N7<15>
PCIE_PTX_GLANRX_N7<15>
PCIE_PTX_GLANRX_P7<15>
PLTRST_LAN#<17>
CLK_PCIE_LAN#<15>
CLK_PCIE_LAN<15>
SW_LAN_TX0- <37>
SW_LAN_TX1+ <37>SW_LAN_TX1- <37>
SW_LAN_TX0+ <37>
SW_LAN_TX3- <37>
SW_LAN_TX2- <37>SW_LAN_TX2+ <37>
DOCK_LOM_TRD1+ <38>
DOCK_LOM_TRD0+ <38>DOCK_LOM_TRD0- <38>
SW_LAN_TX3+ <37>
DOCK_LOM_TRD2+ <38>DOCK_LOM_TRD2- <38>
DOCK_LOM_TRD1- <38>
DOCKED<39>
DOCK_LOM_TRD3+ <38>DOCK_LOM_TRD3- <38>
DOCK_LOM_SPD100LED_ORG# <38>DOCK_LOM_SPD10LED_GRN# <38>
DOCK_LOM_ACTLED_YEL# <38>
LED_100_ORG# <37>LED_10_GRN# <37>
LAN_ACTLED_YEL# <37>
LOM_ENERGY_DET <39>
LOM_SMB_ALERT# <39>
LOM_LOW_PWR <39>
WLAN_LAN_DISB# <39>
SIO_SLP_LAN#<16,39>
AUX_ON<40>
SML1_SMBCLK <15,40>
SML1_SMBDATA <15,40>
SIO_LAN_SMBCLK <15,40>
SIO_LAN_SMBDATA <15,40>
PCIE_WAKE#<34,35,40>
Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
LAN (1/2) BCM5761
30 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
LAN (1/2) BCM5761
30 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
LAN (1/2) BCM5761
30 61Friday, March 02, 2012
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
LAN ANALOG SWITCH
Layout Notice : Place as
close PI3L500 as possible
DOCKEDFROM NIC1: TO DOCK
0: TO RJ45
TO DOCK
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
CL7 place close to UL2 co-lay with UL2
LOM_ENEGRY_DET is high active (TM )
WLAN_LAN_DISB# (vpro) is low active.1.TM config, --> depop U15
WLAN_LAN_DISB# signal level is floating.
2.vPro config,
LOM_ENERGY_DET pull high always.
change TI(SA00003LD0L) as main source from Pericom
RL16
4.7
K_0402_5%
~D
@R
L16
4.7
K_0402_5%
~D
@
12
L35 0_0603_5%~DL35 0_0603_5%~D1 2
RL490_0402_5%~D @RL490_0402_5%~D @12
TL2 PAD~D@TL2 PAD~D@
R1638
1M
_0402_5%
~D
R1638
1M
_0402_5%
~D
12
RL302.2K_0402_5%~D RL302.2K_0402_5%~D12
C474
0.1
U_0402_25V
6K
~D
C474
0.1
U_0402_25V
6K
~D
1
2
C472
0.1
U_0402_25V
6K
~D
C472
0.1
U_0402_25V
6K
~D
1
2
C476
0.1
U_0402_10V
7K
~D
C476
0.1
U_0402_10V
7K
~D
1
2
CL7
0.1
U_0402_25V
6K
~D
CL7
0.1
U_0402_25V
6K
~D
1
2
RL15
4.7
K_0402_5%
~D
@R
L15
4.7
K_0402_5%
~D
@
12
Media
BCM5761
Misc
TEST
PCI-E
Bias
SMBUS
LED
Clock
NVRAM
USB
UL1A
BCM5761B0KFBGH_FBGA121~D
Media
BCM5761
Misc
TEST
PCI-E
Bias
SMBUS
LED
Clock
NVRAM
USB
UL1A
BCM5761B0KFBGH_FBGA121~D
TRD0+K2
TRD0-K1
TRD1+J2
TRD1-J1
TRD2+H2
TRD2-H1
TRD3+G2
TRD3-G1
RDACF1
GPHY_TVCOIE2
LINKLED#K5
SPD100LED#J5
SPD1000LED#K4
TRAFFICLED#H6
ENERGYDETJ8
NV_STRAP1C10
NV_STRAP0D10
SOG5
SIJ3
CS#K3
SCLKJ4
VAUXPRSNTG7
VMAINPRSNTB1
LOW_PWRF10
HUSB_DPF11
HUSB_DNE11
SMB_CLKH5
SMB_DATAJ6
APE_SMB_CLK0L10
APE_SMB_DATA0L9
APE_SMB_CLK1L8
APE_SMB_DATA1L7
PCIE_TXDPA10
PCIE_TXDNB10
PCIE_RXDPA6
PCIE_RXDNB6
REFCLK+A8
REFCLK-B8
CLKREQ#J9
PERST#J10
WAKE#K7
XTALOA4
XTALIB4
TMSG10
TDOK6
TDIF9
TCKH7
TRST#K9
GPIO1/SERIAL_DIE5
GPIO2/SERIAL_DOJ7
GPIO0D2
PWR_DOWNB2
APE_GPIO0L3
APE_GPIO1L4
APE_GPIO2L5
APE_GPIO3L6
APE_GPIO5L2
APE_GPIO6L1
APE_GPIO4C1
C473
0.1
U_0402_25V
6K
~D
C473
0.1
U_0402_25V
6K
~D
1
2
RL332.2K_0402_5%~D RL332.2K_0402_5%~D12
QL2ADMN66D0LDW-7_SOT363-6~D
QL2ADMN66D0LDW-7_SOT363-6~D
61
2
C477
2200P
_0402_50V
7K
~D
C477
2200P
_0402_50V
7K
~D
1
2
RL25
4.7
K_0402_5%
~D
@R
L25
4.7
K_0402_5%
~D
@
12
UL3
M25PE80-VMW6TP_SO8W8
@UL3
M25PE80-VMW6TP_SO8W8
@
S#1
W#3
VSS4
Q2
D5
C6
VCC8
RESET#7
RL282.2K_0402_5%~D RL282.2K_0402_5%~D12
L37 0_0603_5%~DL37 0_0603_5%~D1 2
Q35A
DM
N66D
0LD
W-7
_S
OT
363-6
~D
Q35A
DM
N66D
0LD
W-7
_S
OT
363-6
~D
61
2
QL2BDMN66D0LDW-7_SOT363-6~D
QL2BDMN66D0LDW-7_SOT363-6~D
3
5
4
L34 0_0603_5%~DL34 0_0603_5%~D1 2
RL23 1.2K_0402_1%~DRL23 1.2K_0402_1%~D1 2
TL9 PAD~D@TL9 PAD~D@
RL26
4.7
K_0402_5%
~D
@R
L26
4.7
K_0402_5%
~D
@
12
RL312.2K_0402_5%~D RL312.2K_0402_5%~D12
YL125MHZ_10PF_X3G025000FA1H~D
YL125MHZ_10PF_X3G025000FA1H~D
IN1
GND2
OUT3
GND4
RL500_0402_5%~D RL500_0402_5%~D12
RL3 0_0402_5%~D@ RL3 0_0402_5%~D@ 1 2
TL8 PAD~D@TL8 PAD~D@
CL5
12P
_0402_50V
8J~
DC
L5
12P
_0402_50V
8J~
D
1
2
RL22 200_0402_1%~DRL22 200_0402_1%~D1 2
TL6 PAD~D@TL6 PAD~D@
RL17
4.7
K_0402_5%
~D
@R
L17
4.7
K_0402_5%
~D
@
12
L31 0_0603_5%~DL31 0_0603_5%~D1 2
TL11 PAD~D@TL11 PAD~D@
RL46 0_0402_5%~D@ RL46 0_0402_5%~D@ 1 2
RL61K_0402_1%~D RL61K_0402_1%~D 12
U32
PI3L720ZHEX_TQFN42_9X3P5~D
U32
PI3L720ZHEX_TQFN42_9X3P5~D
SEL13
A0+2
A0-3
A1+6
A1-7
A2+9
A2-10
A3+11
B0+38
C0+36
B0-37
C0-35
B1+34
C1+32
B1-33
C1-31
B2+29
C2+27
B2-28
C2-26
B3+25
C3+23
B3-24
C3-22
A3-12
LEDA015
LEDA116
LEDA242
LEDB017
LEDC019
LEDB118
LEDC120
LEDB241
LEDC240
PAD_GND43
VD
D1
VD
D4
VD
D8
VD
D14
VD
D21
VD
D30
VD
D39
PD5
RL14 4.7K_0402_5%~DRL14 4.7K_0402_5%~D1 2
RL24
4.7
K_0402_5%
~D
@R
L24
4.7
K_0402_5%
~D
@
12
C478
0.1U_0402_10V7K~D
@C478
0.1U_0402_10V7K~D
@
1 2
L33 0_0603_5%~DL33 0_0603_5%~D1 2
R549
10K
_0402_5%
~D
R549
10K
_0402_5%
~D
12
U15TC7SH08FU_SSOP5~D
@U15TC7SH08FU_SSOP5~D
@
B1
A2
G3
O4
P5
CL4 0.1U_0402_10V7K~DCL4 0.1U_0402_10V7K~D12
RL194.7K_0402_5%~D @RL194.7K_0402_5%~D @12
RL100_0402_5%~D @RL100_0402_5%~D @12
Q35B
DM
N66D
0LD
W-7
_S
OT
363-6
~D
Q35B
DM
N66D
0LD
W-7
_S
OT
363-6
~D
3
5
4
RL47 0_0402_5%~D@ RL47 0_0402_5%~D@ 1 2
L36 0_0603_5%~DL36 0_0603_5%~D1 2
R557
10K
_0402_5%
~D
@R
557
10K
_0402_5%
~D
@12
TL3 PAD~D@TL3 PAD~D@
RL51K_0402_1%~D RL51K_0402_1%~D 12
TL5 PAD~D@TL5 PAD~D@
R563 0_1206_5%~D@R563 0_1206_5%~D@1 2
TL7 PAD~D@TL7 PAD~D@
RL81K_0402_1%~D @RL81K_0402_1%~D @12
RL13 0_0402_5%~D@RL13 0_0402_5%~D@ 1 2
RL210K_0402_5%~D RL210K_0402_5%~D12
TL12PAD~D @TL12PAD~D @
RL70_0402_5%~D @RL70_0402_5%~D @12
CL2 0.1U_0402_10V7K~DCL2 0.1U_0402_10V7K~D1 2
RL40_0402_5%~D @RL40_0402_5%~D @12
L30 0_0603_5%~DL30 0_0603_5%~D1 2
RL124.7K_0402_5%~D RL124.7K_0402_5%~D12
S
G
D
Q34SI3456DDV-T1-GE3_TSOP6~D
S
G
D
Q34SI3456DDV-T1-GE3_TSOP6~D
3
6
245
1
L32 0_0603_5%~DL32 0_0603_5%~D1 2
RL510_0402_5%~D RL510_0402_5%~D12
RL110_0402_5%~D @RL110_0402_5%~D @12
RL21 4.7K_0402_5%~D@RL21 4.7K_0402_5%~D@ 1 2
RL204.7K_0402_5%~D @RL204.7K_0402_5%~D @12
TL1 PAD~D@TL1 PAD~D@
UL2
M25PE80-VMN6TP_SO8N8
UL2
M25PE80-VMN6TP_SO8N8
S#1
W#3
VSS4
Q2
D5
C6
VCC8
RESET#7
CL1 0.1U_0402_10V7K~DCL1 0.1U_0402_10V7K~D12
RL18
4.7
K_0402_5%
~D
@R
L18
4.7
K_0402_5%
~D
@
12
TL10 PAD~D@TL10 PAD~D@
C475
10U
_0603_6.3
V6M
~D
C475
10U
_0603_6.3
V6M
~D
1
2
R564
100K
_0402_5%
~D
R564
100K
_0402_5%
~D
12
RL292.2K_0402_5%~D RL292.2K_0402_5%~D12
RL91K_0402_1%~D @RL91K_0402_1%~D @12
RL1 10K_0402_5%~DRL1 10K_0402_5%~D1 2
RL27
4.7
K_0402_5%
~D
@R
L27
4.7
K_0402_5%
~D
@
12
R565
100K
_0402_5%
~D
R565
100K
_0402_5%
~D
12
CL6
12P
_0402_50V
8J~
DC
L6
12P
_0402_50V
8J~
D
1
2
RL480_0402_5%~D @RL480_0402_5%~D @12
TL4 PAD~D@TL4 PAD~D@
RL322.2K_0402_5%~D RL322.2K_0402_5%~D12
CL3 0.1U_0402_10V7K~DCL3 0.1U_0402_10V7K~D1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LAN_REGCTL12
LAN_REGOUT25
LAN_TP_C03
LAN_TP_D06LAN_TP_D07
+1.2V_LAN_PLLVDDL
+3.3V_LAN_AVDDH
LAN_TP_B05
LAN_TP_D05
+3.3V_LAN_BIASVDDH
LAN_NC_H11LAN_NC_J11LAN_NC_K11LAN_NC_L11
LAN_TP_C05+3.3V_LAN_XTALVDDH
LAN_VDDP
+1.2V_LAN_PCIE_PLLVDDL
LAN_VDDP
LAN_DC_D09
+1.2V_LAN_PCIE_SDSVDDL
LAN_TP_D08
LAN_TP_F05
+1.2V_LAN_GPHY_PLLVDDL
+1.2V_LAN_AVDDL
LAN_NC_K10
LAN_REGCTL12
+3.3V_LAN
+1.2V_LAN
+3.3V_LAN
+3.3V_LAN
+1.2V_LAN
+3.3V_LAN
+1.2V_LAN
+1.2V_LAN
+3.3V_LAN
+3.3V_LAN
+1.2V_LAN
+3.3V_LAN
+1.2V_LAN_PCIE_SDSVDDL
+3.3V_LAN_XTALVDDH
+3.3V_LAN_BIASVDDH
+1.2V_LAN_AVDDL
+3.3V_LAN_AVDDH
+1.2V_LAN_PCIE_PLLVDDL
+1.2V_LAN_GPHY_PLLVDDL
+1.2V_LAN_PLLVDDL
Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
LAN (2/2) BCM5761
31 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
LAN (2/2) BCM5761
31 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
LAN (2/2) BCM5761
31 61Friday, March 02, 2012
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
RL40 10K_0402_5%~DRL40 10K_0402_5%~D12
CL
18
0.1
U_
04
02
_2
5V
6K
~D
CL
18
0.1
U_
04
02
_2
5V
6K
~D
1
2
LL7
BLM18AG601SN1D_0603~D
LL7
BLM18AG601SN1D_0603~D1 2
RL36 10K_0402_5%~DRL36 10K_0402_5%~D12
CL12 1U_0603_10V7K~DCL12 1U_0603_10V7K~D12
CL
28
0.1
U_
04
02
_2
5V
6K
~D
CL
28
0.1
U_
04
02
_2
5V
6K
~D
1
2
CL
26
4.7
U_
06
03
_6
.3V
6K
~D
CL
26
4.7
U_
06
03
_6
.3V
6K
~D
1
2
TL15 PAD~D@TL15 PAD~D@
CL
14
0.1
U_
04
02
_2
5V
6K
~D
CL
14
0.1
U_
04
02
_2
5V
6K
~D
1
2
CL
23
0.1
U_
04
02
_2
5V
6K
~D
CL
23
0.1
U_
04
02
_2
5V
6K
~D
1
2
CL
29
0.0
47
U_
04
02
_1
6V
4Z
~D
@C
L2
90
.04
7U
_0
40
2_
16
V4
Z~
D@1
2
CL
20
0.1
U_
04
02
_2
5V
6K
~D
CL
20
0.1
U_
04
02
_2
5V
6K
~D
1
2
TL13 PAD~D@TL13 PAD~D@
RL35 10K_0402_5%~DRL35 10K_0402_5%~D12
RL39 10K_0402_5%~DRL39 10K_0402_5%~D12
CL
32
0.1
U_
04
02
_2
5V
6K
~D
CL
32
0.1
U_
04
02
_2
5V
6K
~D
1
2
CL
17
0.1
U_
04
02
_2
5V
6K
~D
CL
17
0.1
U_
04
02
_2
5V
6K
~D
1
2
CL
33
0.1
U_
04
02
_2
5V
6K
~D
CL
33
0.1
U_
04
02
_2
5V
6K
~D
1
2
CL
80
.1U
_0
40
2_
25
V6
K~
DC
L8
0.1
U_
04
02
_2
5V
6K
~D
1
2
CL
35
0.1
U_
04
02
_2
5V
6K
~D
CL
35
0.1
U_
04
02
_2
5V
6K
~D
1
2
LL5
BLM18AG601SN1D_0603~D
LL5
BLM18AG601SN1D_0603~D1 2
CL
16
0.1
U_
04
02
_2
5V
6K
~D
CL
16
0.1
U_
04
02
_2
5V
6K
~D
1
2
CL
13
0.1
U_
04
02
_2
5V
6K
~D
CL
13
0.1
U_
04
02
_2
5V
6K
~D
1
2
RL41 4.7K_0402_5%~D@RL41 4.7K_0402_5%~D@ 1 2
CL
19
4.7
U_
06
03
_6
.3V
6K
~D
CL
19
4.7
U_
06
03
_6
.3V
6K
~D
1
2
CL
10
4.7
U_
06
03
_6
.3V
6K
~D
CL
10
4.7
U_
06
03
_6
.3V
6K
~D
1
2
CL
15
4.7
U_
06
03
_6
.3V
6K
~D
CL
15
4.7
U_
06
03
_6
.3V
6K
~D
1
2
LL8
BLM18AG601SN1D_0603~D
LL8
BLM18AG601SN1D_0603~D1 2
RL34 10K_0402_5%~DRL34 10K_0402_5%~D12
LL4
BLM18AG601SN1D_0603~D
LL4
BLM18AG601SN1D_0603~D1 2
RL37 10K_0402_5%~DRL37 10K_0402_5%~D12
TL16 PAD~D@TL16 PAD~D@
RL43 4.7K_0402_5%~DRL43 4.7K_0402_5%~D1 2
LL3
BLM18AG601SN1D_0603~D
LL3
BLM18AG601SN1D_0603~D1 2
10
U_
08
05
_1
0V
6K
~D
CL
31
10
U_
08
05
_1
0V
6K
~D
CL
31
1
2
RL44 0_0402_5%~DRL44 0_0402_5%~D1 2
CL
27
0.1
U_
04
02
_2
5V
6K
~D
CL
27
0.1
U_
04
02
_2
5V
6K
~D
1
2
RL42 4.7K_0402_5%~D@RL42 4.7K_0402_5%~D@ 12
TL14 PAD~D@TL14 PAD~D@
QL1PBSS5540Z_SOT223-3~D
QL1PBSS5540Z_SOT223-3~D
1
23
4
CL
34
0.1
U_
04
02
_2
5V
6K
~D
CL
34
0.1
U_
04
02
_2
5V
6K
~D
1
2
RL
45
1.5
_1
20
6_
5%
RL
45
1.5
_1
20
6_
5%
12
BCM5761
GND
Others
Voltage
Regulator
Digital
Bias
Power
Power
Power
Analog
PLL
Power
UL1B
BCM5761B0KFBGH_FBGA121~D
BCM5761
GND
Others
Voltage
Regulator
Digital
Bias
Power
Power
Power
Analog
PLL
Power
UL1B
BCM5761B0KFBGH_FBGA121~D
XTALVDDHA5
AVDDH_G03G3
AVDDH_H03H3
BIASVDDHF2
AVDDL_E03E3
AVDDL_F03F3
GPHY_PLLVDDLE1
PCIE_PLLVDDLC7
PCIE_SDSVDDLB9
USB_PLLVDDLC11
REGCTL12D1
VDDPF4
REGOUT25A1
VDDC_H08H8
VDDC_G09G9
VDDC_G08G8
VDDC_E10E10
VDDC_C09C9
VDDIO_K08K8
VDDIO_H10H10
VDDIO_C02C2
VDDIO_A03A3
TP_B05B5
TP_C03C3
TP_F05F5
TP_C05C5
TP_D05D5
TP_D06D6
TP_D07D7
NC_C04C4
NC_L11L11
NC_K11K11
NC_J11J11
NC_H11H11
NC_K10K10
DC_D11D11
NC_B03B3
VSS_H09H9
VSS_H04H4
VSS_G11G11
VSS_G06G6
VSS_G04G4
VSS_F08F8
VSS_F07F7
VSS_F06F6
VSS_E08E8
VSS_E07E7
VSS_E06E6
VSS_E04E4
VSS_D04D4
VSS_D03D3
VSS_C06C6
VSS_B11B11
VSS_B07B7
VSS_A11A11
VSS_A09A9
VSS_A07A7
VSS_A02A2
DC_D09D9
DC_E09E9
DC_C08C8
TP_D08D8
CL
22
0.1
U_
04
02
_2
5V
6K
~D
CL
22
0.1
U_
04
02
_2
5V
6K
~D
1
2
CL
11
0.1
U_
04
02
_2
5V
6K
~D
CL
11
0.1
U_
04
02
_2
5V
6K
~D
1
2
CL
30
4.7
U_
06
03
_6
.3V
6K
~D
CL
30
4.7
U_
06
03
_6
.3V
6K
~D
1
2
LL6
BLM18AG601SN1D_0603~D
LL6
BLM18AG601SN1D_0603~D1 2
CL
21
4.7
U_
06
03
_6
.3V
6K
~D
CL
21
4.7
U_
06
03
_6
.3V
6K
~D
1
2
LL2
BLM18AG601SN1D_0603~D
LL2
BLM18AG601SN1D_0603~D1 2
RL38 10K_0402_5%~DRL38 10K_0402_5%~D12
CL
90
.1U
_0
40
2_
25
V6
K~
DC
L9
0.1
U_
04
02
_2
5V
6K
~D
1
2
CL
24
0.1
U_
04
02
_2
5V
6K
~D
CL
24
0.1
U_
04
02
_2
5V
6K
~D
1
2
CL
25
0.1
U_
04
02
_2
5V
6K
~D
CL
25
0.1
U_
04
02
_2
5V
6K
~D
1
2
LL1
BLM18AG601SN1D_0603~D
LL1
BLM18AG601SN1D_0603~D1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
USBP13_R_D-
USBP13_R_D+USBP13_R_D-
CLK_PCI_TPM_TCM
JETWAY_CLK14M
TCM_BA0
TCM_BA0TCM_BA1
CLKRUN#IRQ_SERIRQ
LPC_LFRAME#PCH_PLTRST#_EC
SP_TPM_LPC_EN_R
LPC_LAD3LPC_LAD2LPC_LAD1LPC_LAD0
TCM_BA1TCM_BA0
JETWAY_CLK14M
CLK_PCI_TPM_TCM
CLKRUN#
PCH_PLTRST#_ECIRQ_SERIRQ
LPC_LFRAME#
LPC_LAD3LPC_LAD2LPC_LAD1LPC_LAD0
CLK_PCI_TPM_TCM
NC_P
PP
PP
TCM_BA1
NC_12
NC_6
NC_PNC_P
NC_12
NC_6
USBP13_R_D+
SP_TPM_LPC_EN_R
+3.3V_RUN+3.3V_SB3V
+3.3V_RUN_TPM
+3.3V_RUN_TPM
+3.3V_RUN_TPM
+3.3V_RUN_TPM
+3.3V_RUN_TPM+3.3V_RUN
+3.3V_SB3V+3.3V_RUN_TPM
+3.3V_SB3V
+3.3V_RUN_TPM
USBP13-<17>
USBP13+<17>
LPC_LAD0<14,34,39,40>
LPC_LAD2<14,34,39,40>LPC_LAD1<14,34,39,40>
LPC_LAD3<14,34,39,40>
CLK_PCI_TPM_TCM<15>LPC_LFRAME#<14,34,39,40>
PCH_PLTRST#_EC<17,34,35,39,40>IRQ_SERIRQ<14,39,40>
CLKRUN#<16,39,40>
JETWAY_CLK14M <15>SP_TPM_LPC_EN<39>
Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
TPM/TCM/BIO Conn
32 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
TPM/TCM/BIO Conn
32 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
TPM/TCM/BIO Conn
32 61Friday, March 02, 2012
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
ATMEL TPM for E4
LPC layout: Place TCM first and then end LPC with TPM.
Co-lay U37 and U39
LOW:Power Down Mode
High:Working Mode
China TCM: NationZ & Jetway co-lay
Link CIS
R1663 10K_0402_5%~D@R1663 10K_0402_5%~D@1 2
C5
50
22
00
P_
04
02
_5
0V
7K
~D
5@C5
50
22
00
P_
04
02
_5
0V
7K
~D
5@1
2
C5
10
.1U
_0
40
2_
25
V6
K~
DC
51
0.1
U_
04
02
_2
5V
6K
~D
1
2
JBIO1
PS_HPF10052-06M000RCONN@
JBIO1
PS_HPF10052-06M000RCONN@
11
22
33
44
55
66
G17
G28
D87 RB751S40T1_SOD523-2~D@D87 RB751S40T1_SOD523-2~D@21
C554 1U_0402_6.3V6K~D4@ C554 1U_0402_6.3V6K~D4@1 2
CE
42
7P
_0
40
2_
50
V8
J~
D@
CE
42
7P
_0
40
2_
50
V8
J~
D@ 1
2
CE
32
7P
_0
40
2_
50
V8
J~
D@
CE
32
7P
_0
40
2_
50
V8
J~
D@1
2
D7
3P
ES
D5
V0
U2
BT
_S
OT
23
-3~
DD
73
PE
SD
5V
0U
2B
T_
SO
T2
3-3
~D
231
R656 4.7K_0402_5%~D@R656 4.7K_0402_5%~D@1 2
R742 0_0402_5%~D@R742 0_0402_5%~D@1 2
R741 0_0402_5%~D@R741 0_0402_5%~D@1 2
R6
58
10
K_
04
02
_5
%~
D@
R6
58
10
K_
04
02
_5
%~
D@
12
C5
52
22
00
P_
04
02
_5
0V
7K
~D
5@C5
52
22
00
P_
04
02
_5
0V
7K
~D
5@1
2
RE
53
3_
04
02
_5
%~
D@
RE
53
3_
04
02
_5
%~
D@
12
C5
53
0.1
U_
04
02
_2
5V
6K
~D
5@C5
53
0.1
U_
04
02
_2
5V
6K
~D
5@1
2
U37
SSX44-B-D-T1_TSSOP28~D
4@ U37
SSX44-B-D-T1_TSSOP28~D
4@
LAD317
LAD220
LAD123
LAD026
LCLK21
LFRAME#22
LRESET#16
SERIRQ27
CLKRUN#15
PP7
NC_11
NC_22
NC_66
NC_88
BA_09
VDD_010
VDD_119
VDD_224
GND_44
GND_1111
GND_1818
GND_2525
BA_13
NC_55
NC_1212
NC_1313
NC_P14
LPCPD#28
R6
60
10
K_
04
02
_5
%~
D
5@R6
60
10
K_
04
02
_5
%~
D
5@
12
PJP61
PAD-OPEN1x1m
@PJP61
PAD-OPEN1x1m
@
1 2
C5
51
22
00
P_
04
02
_5
0V
7K
~D
5@C5
51
22
00
P_
04
02
_5
0V
7K
~D
5@1
2
C4
54
70
0P
_0
40
2_
25
V7
K~
D1
@C
45
47
00
P_
04
02
_2
5V
7K
~D
1@
1
2
RE
63
3_
04
02
_5
%~
D@
RE
63
3_
04
02
_5
%~
D@
12
U39
AT97SC3204-X2A18-AB_TSSOP28
1@ U39
AT97SC3204-X2A18-AB_TSSOP28
1@
LAD317
LAD220
LAD123
LAD026
LCLK21
LFRAME#22
LRESET#16
SERIRQ27
CLKRUN#15
NC_77
ATEST_11
ATEST_22
GPIO66
TESTI8
TESTBI9
VCC_010
VCC_119
VCC_224
GND_44
GND_1111
GND_1818
GND_2525
ATEST_33
SB3V5
V_BAT12
NBO_1313
NBO_1414
LPCPD#28
R6
59
10
K_
04
02
_5
%~
D
5@R6
59
10
K_
04
02
_5
%~
D
5@
12
R873 0_0402_5%~D1@ R873 0_0402_5%~D1@1 2
R1662 0_0402_5%~D5@R1662 0_0402_5%~D5@
1 2
C4
40
.1U
_0
40
2_
25
V6
K~
D1
@C
44
0.1
U_
04
02
_2
5V
6K
~D
1@
1
2
L52
OCF2012181YZF_4P
L52
OCF2012181YZF_4P
11
22
33
44
R6
57
10
K_
04
02
_5
%~
D@
R6
57
10
K_
04
02
_5
%~
D@ 1
2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
MMICLK_REQ#
PLTRST_MMI#
PCIE_PRX_MMITX_N6_CPCIE_PRX_MMITX_P6_C
+SKT_VCC
+3.3VDDH+OZ_AVDD+OZ_DVDD
SD/MMC_CLK
PCIE_PTX_MMIRX_N6_CPCIE_PTX_MMIRX_P6_C
SD/MMCDAT1SD/MMCDAT2SD/MMCDAT0
SD/MMCDAT1_R
SD/MMCDAT0_RSD/MMCDAT2_R
SD/MMCDAT3SD/MMCDAT4SD/MMCDAT5SD/MMCDAT6SD/MMCDAT7SD/MMCDAT7_R
SD/MMCDAT5_RSD/MMCDAT6_R
SD/MMCDAT4_RSD/MMCDAT3_R
SD/MMCCMDSD/MMC_CLKSD/MMCCLK_R
SD/MMCCMD_R
SDWPSD/MMCCD#
+PE_VDDH
SD/MMCCMDSD/MMCDAT1SD/MMCDAT0 SD/MMCDAT2 SD/MMCDAT3
+VDDH_SD
SDWP
SD/MMC_CLK
SD/MMCDAT3
SDWP
SD/MMCCMD
SD/MMCDAT4
SD/MMCDAT7SD/MMCDAT6SD/MMCDAT5
SD/MMCCD#
SD/MMCDAT0SD/MMCDAT1SD/MMCDAT2
SD/MMCCD#
+1.5V_RUN +3.3V_RUN
+3.3V_RUN_CARD
+VDDH_SD
+PE_VDDH+3.3V_RUN
+3.3V_RUN_CARD
MMICLK_REQ#<15>
PLTRST_MMI#<17>
CLK_PCIE_MMI<15>CLK_PCIE_MMI#<15>
PCIE_PRX_MMITX_P6<15>PCIE_PRX_MMITX_N6<15>
PCIE_PTX_MMIRX_N6<15>PCIE_PTX_MMIRX_P6<15>
Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
Card Reader OZ600FJ0
33 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
Card Reader OZ600FJ0
33 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
Card Reader OZ600FJ0
33 61Friday, March 02, 2012
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Place closed R676 pin 2
Place R677 close to U38
Vendor review in 6/22 and reserve for SD3.0 UHS-I 200MHz transfer
place close to pin U38.32
Note: The trace need to route as
daisy-chain and the trace of SD signals
need to route as short as possible
C7
75
10
P_
04
02
_5
0V
8J~
D@
C7
75
10
P_
04
02
_5
0V
8J~
D@
1
2
C569 0.1U_0402_10V7K~DC569 0.1U_0402_10V7K~D1 2
R672 33_0402_5%~DR672 33_0402_5%~D1 2
C7
77
10
P_
04
02
_5
0V
8J~
D@
C7
77
10
P_
04
02
_5
0V
8J~
D@
1
2
C571 0.1U_0402_10V7K~DC571 0.1U_0402_10V7K~D1 2
C5
77
4.7
U_
06
03
_6
.3V
6K
~D
C5
77
4.7
U_
06
03
_6
.3V
6K
~D
1
2
C568 0.1U_0402_10V7K~DC568 0.1U_0402_10V7K~D1 2
C5
65
0.1
U_
04
02
_2
5V
6K
~D
C5
65
0.1
U_
04
02
_2
5V
6K
~D
1
2
R676 10_0402_1%~DR676 10_0402_1%~D1 2
U38
OZ600FJ0LN_QFN32_5X5~D
U38
OZ600FJ0LN_QFN32_5X5~D
AVDD8
PE_TXP6
PE_TXM7
PE_RST#13
MMI_D324
MMI_D423
PE_REXT3
DVDD10
MS_CD#11
MULTI-IO114
MULTI-IO231
MMI_D621
MMI_D720
MMI_D522
MS_D127
PE_RXP5
VDDH9
SD_D226
MS_D225
SKT_VCC17
PE_RXM4
MMI_CLK18
SD_WPI30
SD_CD#12
3.3VDDH16
SD_CMD/MS_BS19
PE_REFCLKM1
PE_REFCLKP2
MMI_VCC_OUT15
SD_D128
MMI_D029
PE_VDDH32
GPAD33
C5
74
0.0
1U
_0
40
2_
16
V7
K~
DC
57
40
.01
U_
04
02
_1
6V
7K
~D
1
2
C7
76
10
P_
04
02
_5
0V
8J~
D@
C7
76
10
P_
04
02
_5
0V
8J~
D@
1
2
C5
73
0.1
U_
04
02
_2
5V
6K
~D
C5
73
0.1
U_
04
02
_2
5V
6K
~D
1
2
R674 33_0402_5%~DR674 33_0402_5%~D1 2
C7
79
10
P_
04
02
_5
0V
8J~
D@
C7
79
10
P_
04
02
_5
0V
8J~
D@
1
2
C7
80
10
P_
04
02
_5
0V
8J~
D@
C7
80
10
P_
04
02
_5
0V
8J~
D@
1
2
R677 191_0402_1%~DR677 191_0402_1%~D1 2
C5
75
0.1
U_
04
02
_2
5V
6K
~D
C5
75
0.1
U_
04
02
_2
5V
6K
~D
1
2
R665 33_0402_5%~DR665 33_0402_5%~D1 2
C567 0.1U_0402_10V7K~DC567 0.1U_0402_10V7K~D1 2 R668 33_0402_5%~DR668 33_0402_5%~D1 2
R663 33_0402_5%~DR663 33_0402_5%~D1 2
C5
64
4.7
U_
06
03
_6
.3V
6K
~D
C5
64
4.7
U_
06
03
_6
.3V
6K
~D
1
2
JSD1
T-SOL_156-4000000601_NRCONN@
JSD1
T-SOL_156-4000000601_NRCONN@
GND_SW16
DAT3/SD114
CMD/SD212
VSS1/SD310
VCC/SD49
CLK/SD58
GND/VSSS2/SD66
DAT0/SD74
DAT1/SD83
DAT2/SD915
DAT4/MMC1013
DAT5/MMC1111
DAT6/MMC127
DAT7/MMC135
CD_WP_SW/GND19
CD_WP_SW/GND20
CD_SW_TAISOL/SD2
WP/SW_TAISOL/SD1
CD_SW/SD17
WP_SW/SD18
CE
75
71
0P
_0
40
2_
50
V8
J~
D@
CE
75
71
0P
_0
40
2_
50
V8
J~
D@
1
2
C5
78
4.7
U_
06
03
_6
.3V
6K
~D
C5
78
4.7
U_
06
03
_6
.3V
6K
~D
1
2
RE
67
83
3_
04
02
_5
%~
D@
RE
67
83
3_
04
02
_5
%~
D@
12
R673 33_0402_5%~DR673 33_0402_5%~D1 2
C5
70
0.1
U_
04
02
_2
5V
6K
~D
C5
70
0.1
U_
04
02
_2
5V
6K
~D
1
2
R670 33_0402_5%~DR670 33_0402_5%~D1 2
L44
BLM18BD601SN1D_0603~D
L44
BLM18BD601SN1D_0603~D1 2
C5
76
0.0
1U
_0
40
2_
16
V7
K~
DC
57
60
.01
U_
04
02
_1
6V
7K
~D
1
2
C5
63
0.1
U_
04
02
_2
5V
6K
~D
C5
63
0.1
U_
04
02
_2
5V
6K
~D
1
2
C5
72
4.7
U_
06
03
_6
.3V
6K
~D
C5
72
4.7
U_
06
03
_6
.3V
6K
~D
1
2
C5
62
0.1
U_
04
02
_2
5V
6K
~D
C5
62
0.1
U_
04
02
_2
5V
6K
~D
1
2
L45
BLM18PG471SN1D_2P~D
L45
BLM18PG471SN1D_2P~D1 2
C5
61
4.7
U_
06
03
_6
.3V
6K
~D
C5
61
4.7
U_
06
03
_6
.3V
6K
~D
1
2
C5
60
4.7
U_
06
03
_6
.3V
6K
~D
C5
60
4.7
U_
06
03
_6
.3V
6K
~D
1
2
C5
66
4.7
U_
06
03
_6
.3V
6K
~D
C5
66
4.7
U_
06
03
_6
.3V
6K
~D
1
2
R8
26
10
K_
04
02
_5
%~
DR
82
61
0K
_0
40
2_
5%
~D
12
C5
59
0.1
U_
04
02
_2
5V
6K
~D
C5
59
0.1
U_
04
02
_2
5V
6K
~D
1
2
L47
BLM18BD601SN1D_0603~D
L47
BLM18BD601SN1D_0603~D1 2
R669 33_0402_5%~DR669 33_0402_5%~D1 2
R664 33_0402_5%~DR664 33_0402_5%~D1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
USB_MCARD2_DET#
USB_MCARD2_DET#
WWAN_SMBCLKWWAN_SMBDAT
LED_WWAN_OUT#
UIM_DATAUIM_CLKUIM_RESETUIM_VPP
PCIE_PTX_WANRX_P1_CPCIE_PTX_WANRX_N1_C
PCIE_MCARD2_DET#_RUSBP5-USBP5+
CLK_PCIE_MINI1#CLK_PCIE_MINI1
MINI1CLK_REQ#
PCIE_PRX_WANTX_N1PCIE_PRX_WANTX_P1
WWAN_SMBCLK
WWAN_SMBDAT
PCIE_MCARD2_DET#USB_MCARD2_DET#
LED_WWAN_OUT#
PCIE_WAKE#
PCIE_MCARD1_DET#USB_MCARD1_DET#
USB_MCARD3_DET# PCIE_MCARD3_DET#
HOST_DEBUG_TX
LPC_LAD1
LPC_LFRAME#
LPC_LAD0
LPC_LAD3LPC_LAD2
PCH_PLTRST#_EC
PCIE_MCARD1_DET#
PCIE_PRX_WLANTX_P2PCIE_PRX_WLANTX_N2
PCIE_PTX_WLANRX_N2_CPCIE_PTX_WLANRX_P2_C
USB_MCARD1_DET#
MSDATA
USBP4-USBP4+
WLAN_LED#
WLAN_RADIO_DIS#_RPCH_PLTRST#_EC
WIMAX_LED#
HOST_DEBUG_TX
PCIE_MCARD1_DET#
PCIE_MCARD1_DET#
WIRELESS_LED#WIMAX_LED#
WLAN_LED#
USB_MCARD3_DET#
USB_MCARD1_DET#
NC_USB_MCARD3_DET#
USBP6-USBP6+
WLAN_RADIO_DIS#_R
COEX2_WLAN_ACTIVE
PCIE_MCARD3_DET#
PCIE_PTX_WPANRX_N5_CPCIE_PTX_WPANRX_P5_C
PCH_PLTRST#_EC
PCIE_PRX_WPANTX_N5PCIE_PRX_WPANTX_P5
CLK_PCIE_MINI3#CLK_PCIE_MINI3
COEX2_WLAN_ACTIVEPCIE_WAKE#
+3.3V_PCIE_WWAN
+3.3V_RUN
+3.3V_PCIE_WWAN
+3.3V_PCIE_WWAN
+1.5V_RUN_WWAN
+3.3V_PCIE_WWAN+3.3V_PCIE_WWAN
+SIM_PWR
+1.5V_RUN_WWAN+1.5V_RUN
+3.3V_WLAN+1.5V_RUN
+3.3V_PCIE_FLASH
+3.3V_RUN
+3.3V_ALW_PCH
+1.5V_RUN
+3.3V_WLAN
+3.3V_PCIE_FLASH+1.5V_RUN
+3.3V_WLAN
+1.5V_RUN
+3.3V_WLAN
+3.3V_WLAN
+3.3V_PCIE_FLASH
+3.3V_RUN
DDR_XDP_WAN_SMBDAT <7,12,13,14,15,27>
DDR_XDP_WAN_SMBCLK <7,12,13,14,15,27>
WIRELESS_LED# <39,43>
PCIE_PRX_WANTX_N1<15>PCIE_PRX_WANTX_P1<15>
CLK_PCIE_MINI1<15>CLK_PCIE_MINI1#<15>
MINI1CLK_REQ#<15>
WWAN_RADIO_DIS# <39>
PCIE_MCARD2_DET#<17>
PCH_PLTRST#_EC <17,32,35,39,40>
USB_MCARD2_DET# <18>
USBP5- <17>USBP5+ <17>
PCIE_PTX_WANRX_N1<15>PCIE_PTX_WANRX_P1<15>
HW_GPS_DISABLE2#<39>
UIM_DATA <37>
UIM_VPP <37>UIM_RESET <37>UIM_CLK <37>
WLAN_RADIO_DIS#<39>
USBP6- <17>USBP6+ <17>
LPC_LAD1 <14,32,39,40>
LPC_LFRAME# <14,32,39,40>
LPC_LAD0 <14,32,39,40>
LPC_LAD3 <14,32,39,40>LPC_LAD2 <14,32,39,40>
PCIE_MCARD1_DET#<18>
PCIE_PRX_WLANTX_P2<15>PCIE_PRX_WLANTX_N2<15>
MINI2CLK_REQ#<15>
PCH_CL_RST1#<15>PCH_CL_DATA1<15>
HOST_DEBUG_RX<40>MSCLK<40>
COEX2_WLAN_ACTIVE<41>COEX1_BT_ACTIVE<41>
CLK_PCIE_MINI2#<15>CLK_PCIE_MINI2<15>
PCH_CL_CLK1<15>
PCIE_PTX_WLANRX_P2<15>PCIE_PTX_WLANRX_N2<15>
HOST_DEBUG_TX <40>
MSDATA <40>
USB_MCARD1_DET# <14,18>USBP4+ <17>USBP4- <17>
PCIE_WAKE#<30,35,40>
MINI3CLK_REQ#<15>
CLK_PCIE_MINI3#<15>CLK_PCIE_MINI3<15>
PCIE_PRX_WPANTX_P5<15>PCIE_PRX_WPANTX_N5<15>
PCIE_MCARD3_DET#<18>
PCIE_PTX_WPANRX_N5<15>PCIE_PTX_WPANRX_P5<15>
PCLK_80H<15>
Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
Mini Card
34 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
Mini Card
34 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
Mini Card
34 61Friday, March 02, 2012
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
+-9%
+3.3Vaux
+3.3V
Voltage
Tolerance
+1.5V
+-9%
+-5%
PWR
Rail
Primary Power Aux Power
Peak Normal Normal
1000 750
330
500
250
375
250 (Wake enable)5 (Not wake enable)
NA
Mini WWAN/GPS/LTE/UWB H=4
WPAN Noise
Mini WLAN/WIMAX H=6.7
WIMAX_LED# STUDY FOR DEBUG
Link CIS
Link CIS
1/2 Minicard Pink Pather/60GHz Card H=6.7
Link CIS
C605
0.0
47U
_0402_16V
4Z
~D
C605
0.0
47U
_0402_16V
4Z
~D
1
2
JMINI2
BELLW_80003-4041
CONN@JMINI2
BELLW_80003-4041
CONN@
11
33
55
77
99
1111
1313
1515
1717
1919
2121
2323
2525
2727
2929
3131
3333
3535
3737
3939
4141
4343
4545
4747
4949
5151
GND153
22
44
66
88
1010
1212
1414
1616
1818
2020
2222
2424
2626
2828
3030
3232
3434
3636
3838
4040
4242
4444
4646
4848
5050
5252
GND254
JMINI1
LCN_DAN08-52406-0500
CONN@JMINI1
LCN_DAN08-52406-0500
CONN@
11
33
55
77
99
1111
1313
1515
1717
1919
2121
2323
2525
2727
2929
3131
3333
3535
3737
3939
4141
4343
4545
4747
4949
5151
GND153
22
44
66
88
1010
1212
1414
1616
1818
2020
2222
2424
2626
2828
3030
3232
3434
3636
3838
4040
4242
4444
4646
4848
5050
5252
GND254
C621
0.1
U_0402_25V
6K
~D
@C
621
0.1
U_0402_25V
6K
~D
@1
2
R694 100K_0402_5%~DR694 100K_0402_5%~D1 2
C619
0.0
47U
_0402_16V
4Z
~D
C619
0.0
47U
_0402_16V
4Z
~D
1
2
R700 0_0402_5%~D@R700 0_0402_5%~D@ 1 2
+
C615
330U
_6.3
V_M
+
C615
330U
_6.3
V_M
1
2
R703 0_0402_5%~D@R703 0_0402_5%~D@12
C600
33P
_0402_50V
8J~
D@
C600
33P
_0402_50V
8J~
D@
1
2
R727 0_0805_5%~DR727 0_0805_5%~D12
C614
33P
_0402_50V
8J~
DC
614
33P
_0402_50V
8J~
D
1
2
R707 0_0402_5%~D@R707 0_0402_5%~D@ 1 2
R701 100K_0402_5%~DR701 100K_0402_5%~D1 2
R702 0_0402_5%~D@R702 0_0402_5%~D@ 1 2
C601
0.0
47U
_0402_16V
4Z
~D
C601
0.0
47U
_0402_16V
4Z
~D
1
2
R709 0_0402_5%~D@ R709 0_0402_5%~D@1 2
JMINI3
BELLW_80003-4041
CONN@JMINI3
BELLW_80003-4041
CONN@
11
33
55
77
99
1111
1313
1515
1717
1919
2121
2323
2525
2727
2929
3131
3333
3535
3737
3939
4141
4343
4545
4747
4949
5151
GND153
22
44
66
88
1010
1212
1414
1616
1818
2020
2222
2424
2626
2828
3030
3232
3434
3636
3838
4040
4242
4444
4646
4848
5050
5252
GND254
C627
4700P
_0402_25V
7K
~D
@C
627
4700P
_0402_25V
7K
~D
@1
2
R705
100K
_0402_5%
~D
R705
100K
_0402_5%
~D
12
C596 0.1U_0402_10V7K~DC596 0.1U_0402_10V7K~D
1 2
R718
100K
_0402_5%
~D
R718
100K
_0402_5%
~D
12
R710 0_0402_5%~D@ R710 0_0402_5%~D@1 2
C602
0.0
47U
_0402_16V
4Z
~D
C602
0.0
47U
_0402_16V
4Z
~D
1
2
R704 0_0402_5%~D@R704 0_0402_5%~D@1 2
C626
4.7
U_0603_6.3
V6K
~D
C626
4.7
U_0603_6.3
V6K
~D
1
2
C607
0.1
U_0402_25V
6K
~D
C607
0.1
U_0402_25V
6K
~D
1
2
C623
0.0
47U
_0402_16V
4Z
~D
C623
0.0
47U
_0402_16V
4Z
~D
1
2
C612
33P
_0402_50V
8J~
DC
612
33P
_0402_50V
8J~
D
1
2
C603
0.1
U_0402_25V
6K
~D
@C
603
0.1
U_0402_25V
6K
~D
@1
2
R698 0_0402_5%~D@R698 0_0402_5%~D@1 2
C610
0.0
47U
_0402_16V
4Z
~D
C610
0.0
47U
_0402_16V
4Z
~D
1
2
C618 0.1U_0402_10V7K~DC618 0.1U_0402_10V7K~D1 2
R708 0_0402_5%~D@R708 0_0402_5%~D@1 2
G
DS
Q77SSM3K7002FU_SC70-3~D
G
DS
Q77SSM3K7002FU_SC70-3~D
2
13
R1159
2.2
K_0402_5%
~D
@R
1159
2.2
K_0402_5%
~D
@12
C625
0.1
U_0402_25V
6K
~D
C625
0.1
U_0402_25V
6K
~D
1
2
R1160
2.2
K_0402_5%
~D
@R
1160
2.2
K_0402_5%
~D
@12
C597 0.1U_0402_10V7K~DC597 0.1U_0402_10V7K~D1 2
C613
22U
_0805_6.3
V6M
~D
C613
22U
_0805_6.3
V6M
~D
1
2
Q124BDMN66D0LDW-7_SOT363-6~D
Q124BDMN66D0LDW-7_SOT363-6~D
3
5
4
Q124ADMN66D0LDW-7_SOT363-6~D
Q124ADMN66D0LDW-7_SOT363-6~D
61
2
R699 100K_0402_5%~D@R699 100K_0402_5%~D@1 2
C611
0.0
47U
_0402_16V
4Z
~D
C611
0.0
47U
_0402_16V
4Z
~D
1
2
C593
33P
_0402_50V
8J~
DC
593
33P
_0402_50V
8J~
D
1
2
C622
0.0
47U
_0402_16V
4Z
~D
C622
0.0
47U
_0402_16V
4Z
~D
1
2
C599 0.1U_0402_10V7K~DC599 0.1U_0402_10V7K~D1 2
C604
0.0
47U
_0402_16V
4Z
~D
C604
0.0
47U
_0402_16V
4Z
~D
1
2
R11570_0402_5%~D @R11570_0402_5%~D @1 2
C595
4700P
_0402_25V
7K
~D
C595
4700P
_0402_25V
7K
~D
1
2
R725 0_0402_5%~D@R725 0_0402_5%~D@1 2
R706 0_0402_5%~D@R706 0_0402_5%~D@1 2
D31RB751S40T1_SOD523-2~D
D31RB751S40T1_SOD523-2~D
21
R11580_0402_5%~D @R11580_0402_5%~D @1 2
R711 100K_0402_5%~DR711 100K_0402_5%~D1 2
C608
4.7
U_0603_6.3
V6K
~D
C608
4.7
U_0603_6.3
V6K
~D
1
2
R692 100K_0402_5%~DR692 100K_0402_5%~D1 2
C624
0.1
U_0402_25V
6K
~D
C624
0.1
U_0402_25V
6K
~D
1
2
R719
100K
_0402_5%
~D
R719
100K
_0402_5%
~D
12
C598 0.1U_0402_10V7K~DC598 0.1U_0402_10V7K~D1 2
C617 0.1U_0402_10V7K~DC617 0.1U_0402_10V7K~D1 2
C620
0.0
47U
_0402_16V
4Z
~D
C620
0.0
47U
_0402_16V
4Z
~D
1
2
C606
0.1
U_0402_25V
6K
~D
C606
0.1
U_0402_25V
6K
~D
1
2
R697 0_0402_5%~D@R697 0_0402_5%~D@1 2
C594
0.0
47U
_0402_16V
4Z
~D
C594
0.0
47U
_0402_16V
4Z
~D
1
2
+
C1176
330U
_D
2E
_6.3
VM
_R
25~
D@
+
C1176
330U
_D
2E
_6.3
VM
_R
25~
D@1
2
R693 0_0402_5%~D@R693 0_0402_5%~D@1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MCARD_WWAN_PWREN#
PCIE_PTX_EXPRX_N3_CPCIE_PTX_EXPRX_P3_C EXPRCRD_STBY_R#
CARD_SMBDAT
CARD_SMBCLK
MCARD_WWAN_PWREN#
+3.3
V_W
WA
N_C
HG
EXPCLK_REQ# EXPRESS_DET# PCH_PLTRST#_EC
+3.3V_ALW +3.3V_PCIE_FLASH
+3.3V_ALW
+3.3V_WLAN+3.3V_ALW
+3.3V_ALW
+PWR_SRC_S
+3.3V_ALW
+PWR_SRC_S
+3.3V_ALW
+PWR_SRC_S
+3.3V_RUN +1.5V_RUN
+PCIE_WWAN
+3.3V_SUS
+5V_RUN
+3.3V_SUS
+5V_RUN+1.5V_RUN +3.3V_SUS+3.3V_RUN
+3.3V_PCIE_WWAN
+1.5V_RUN
MCARD_MISC_PWREN<39>
MCARD_WWAN_PWREN<39>
AUX_EN_WOWL<39>
USBP10+<17>USBP10-<17>
CARD_SMBCLK<40>CARD_SMBDAT<40>
CLK_PCIE_EXP#<15>CLK_PCIE_EXP<15>
PCIE_WAKE#<30,34,40>
PCIE_PRX_EXPTX_N3<15>PCIE_PRX_EXPTX_P3<15>
PCIE_PTX_EXPRX_N3<15>PCIE_PTX_EXPRX_P3<15>
CLK_SMART_48M <15>
SMART_DET# <39>EXPCLK_REQ# <15>
PCH_PLTRST#_EC <17,32,34,39,40>
EXPRESS_DET# <39>RUN_ON <27,39,42,47,48>
SIO_SLP_S3# <11,16,27,39,42,47,48,49>
Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
MINI CARD PWR/EXP_SC
35 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
MINI CARD PWR/EXP_SC
35 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
MINI CARD PWR/EXP_SC
35 61Friday, March 02, 2012
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Express/Smart Card Conn.
Power Control for Mini card1
Power Control for Mini card2
Power Control for Mini card3
Close to JEXP1
Link CIS
ESD Request
Q41B
DM
N66D
0LD
W-7
_S
OT
363-6
~D
Q41B
DM
N66D
0LD
W-7
_S
OT
363-6
~D
3
5
4
JEXP1
E&T_1001K-F40C-03LCONN@
JEXP1
E&T_1001K-F40C-03LCONN@
11
22
33
44
55
66
77
88
99
1010
1111
1212
G141
1414
1616
1818
2020
1313
1515
1717
1919
2222
2424
2626
2828
3030
3232
3434
3636
2121
2323
2525
2727
2929
3131
3333
3535
3737
3939
3838
4040
G242
R730
20K
_0402_5%
~D
R730
20K
_0402_5%
~D
12
R7340_0402_5%~D @R7340_0402_5%~D @12C647 0.1U_0402_10V7K~DC647 0.1U_0402_10V7K~D
1 2
R729
470K
_0402_5%
~D
R729
470K
_0402_5%
~D
12
Q43A
DM
N66D
0LD
W-7
_S
OT
363-6
~D
Q43A
DM
N66D
0LD
W-7
_S
OT
363-6
~D
61
2
R721
100K
_0402_5%
~D
R721
100K
_0402_5%
~D
12
G
D
S
Q73
SS
M3K
7002F
U_S
C70-3
~D
G
D
S
Q73
SS
M3K
7002F
U_S
C70-3
~D
2
13
C635
0.1
U_0402_25V
6K
~D
C635
0.1
U_0402_25V
6K
~D
1
2
Q43B
DM
N66D
0LD
W-7
_S
OT
363-6
~D
Q43B
DM
N66D
0LD
W-7
_S
OT
363-6
~D
3
5
4
S
G
D
Q42SI3456DDV-T1-GE3_TSOP6~D
S
G
D
Q42SI3456DDV-T1-GE3_TSOP6~D
3
6
245
1
R723
1K
_0402_1%
~D
R723
1K
_0402_1%
~D
12
R722
470K
_0402_5%
~D
R722
470K
_0402_5%
~D
12
CE
20
0.1
U_0402_25V
6K
~D
CE
20
0.1
U_0402_25V
6K
~D
1
2
C633
0.1
U_0402_25V
6K
~D
C633
0.1
U_0402_25V
6K
~D
1
2
R733
100K
_0402_5%
~D
R733
100K
_0402_5%
~D
12
CE
22
0.1
U_0402_25V
6K
~D
CE
22
0.1
U_0402_25V
6K
~D
1
2
C636
0.1
U_0402_25V
6K
~D
C636
0.1
U_0402_25V
6K
~D
1
2
R1620
1M
_0402_5%
~D
R1620
1M
_0402_5%
~D
12Q
39A
DM
N66D
0LD
W-7
_S
OT
363-6
~D
Q39A
DM
N66D
0LD
W-7
_S
OT
363-6
~D
61
2
S
G
D
Q40SI3456DDV-T1-GE3_TSOP6~D
S
G
D
Q40SI3456DDV-T1-GE3_TSOP6~D
3
6
245
1
R715
20K
_0402_5%
~D
R715
20K
_0402_5%
~D
12
Q41A
DM
N66D
0LD
W-7
_S
OT
363-6
~D
Q41A
DM
N66D
0LD
W-7
_S
OT
363-6
~D
61
2
R728
100K
_0402_5%
~D
R728
100K
_0402_5%
~D
12
C648 0.1U_0402_10V7K~DC648 0.1U_0402_10V7K~D1 2
R726
100K
_0402_5%
~D
R726
100K
_0402_5%
~D
12
C644
220P
_0402_50V
8J~
DC
644
220P
_0402_50V
8J~
D
1
2
R716
100K
_0402_5%
~D
R716
100K
_0402_5%
~D
12
R714
100K
_0402_5%
~D
R714
100K
_0402_5%
~D
12
R1625
4.7
M_0402_5%
~D
R1625
4.7
M_0402_5%
~D
12
C650
220P
_0402_50V
8J~
DC
650
220P
_0402_50V
8J~
D
1
2
R731 2.2K_0402_5%~DR731 2.2K_0402_5%~D1 2
PJP9
PAD-OPEN 1x3m
@ PJP9
PAD-OPEN 1x3m
@
1 2
R732 2.2K_0402_5%~DR732 2.2K_0402_5%~D1 2
C632
4700P
_0402_25V
7K
~D
C632
4700P
_0402_25V
7K
~D
1
2
R7170_0402_5%~D @R7170_0402_5%~D @12
C645
0.1
U_0402_25V
6K
~D
C645
0.1
U_0402_25V
6K
~D
1
2
R713
100K
_0402_5%
~D
R713
100K
_0402_5%
~D
12
CE
14
0.1
U_0402_25V
6K
~D
CE
14
0.1
U_0402_25V
6K
~D
1
2
C634
0.1
U_0402_25V
6K
~D
C634
0.1
U_0402_25V
6K
~D
1
2
R1628
4.7
M_0402_5%
~D
R1628
4.7
M_0402_5%
~D
12
Q39B
DM
N66D
0LD
W-7
_S
OT
363-6
~D
Q39B
DM
N66D
0LD
W-7
_S
OT
363-6
~D
3
5
4
S
G
D
Q38SI3456DDV-T1-GE3_TSOP6~D
S
G
D
Q38SI3456DDV-T1-GE3_TSOP6~D
3
6
245
1
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
USB3TN2_D- USB3TN2_D-
USB3RP2_D+USB3RN2_D-
USB3TP2_D+USB3TN2_D-
USB3RN2_D- USB3RN2_D-
USB3TP2_D+ USB3TP2_D+
USB3RP2_D+
USB3RN2_D-
USB3RP2_D+ USB3RP2_D+
USBP1_R_D+
USBP1_R_D-
USBP1_R_D-USBP1_R_D+
USB3TN3_D-
USB3TP3_D+USB3T_P3
USBP2_D-
USBP2_D+USBP2_D-
SATA_PRX_DTX_N4SATA_PRX_DTX_P4
SATA_PTX_DRX_N4SATA_PTX_DRX_P4
USBP2_D+
USB3RN3_D-
USB3RP3_D+
USB3RP3_D+USB3RN3_D-
USB3TN3_D-USB3TP3_D+
USB3T_N3
USB3RP3_D+ USB3RP3_D+
USB3TN3_D- USB3TN3_D-
USB3RN3_D- USB3RN3_D-
USB3TP3_D+ USB3TP3_D+
USB3T_N2 USB3TN2_D-
USB3TP2_D+USB3T_P2
+5V_USB_PWR
+5V_ALW
+5V_USB_PWR
+SATA_SIDE_PWR
+SATA_SIDE_PWR
USB3RP2<17>
USB3RN2<17>
ESATA_USB_PWR_EN#<39> USB_OC1# <17>
USB_OC0# <17,37>
USBP1+<17>
USBP1-<17>
USB3TN3<17>
USB3TP3<17>
ESATA_PRX_DTX_P4_C<14>ESATA_PRX_DTX_N4_C<14>
ESATA_PTX_DRX_P4_C<14>ESATA_PTX_DRX_N4_C<14>
USB3RP3<17>
USB3RN3<17>
USBP2+<17>
USBP2-<17>
USB3TN2<17>
USB3TP2<17>
Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
USB2.0/3.0 ESATA
36 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
USB2.0/3.0 ESATA
36 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
USB2.0/3.0 ESATA
36 61Friday, March 02, 2012
Compal Electronics, Inc.
Place D74 close to JESATA1
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
Place D72 close to JUSB1
Place D78 close to JUSB1
Place D79 close to JESATA1
Link CIS
Link CIS
R1151 0_0402_5%~D@R1151 0_0402_5%~D@1 2
D7
2P
ES
D5
V0
U2
BT
_S
OT
23
-3~
DD
72
PE
SD
5V
0U
2B
T_
SO
T2
3-3
~D
231
C414 .1U_0402_16V7K~DC414 .1U_0402_16V7K~D12
C674 0.01U_0402_16V7K~DC674 0.01U_0402_16V7K~D1 2
C412 .1U_0402_16V7K~DC412 .1U_0402_16V7K~D12
R1607 0_0402_5%~D@R1607 0_0402_5%~D@1 2
R740 0_0402_5%~D@R740 0_0402_5%~D@1 2
R736 0_0402_5%~D@R736 0_0402_5%~D@1 2
R7
48
24
.9K
_0
40
2_
1%
~D
R7
48
24
.9K
_0
40
2_
1%
~D
12
C671 0.01U_0402_16V7K~DC671 0.01U_0402_16V7K~D1 2
R1606 0_0402_5%~D@R1606 0_0402_5%~D@1 2
R1604 0_0402_5%~D@R1604 0_0402_5%~D@1 2
L90
DLW21SN900SQ2L_0805_4P~D
L90
DLW21SN900SQ2L_0805_4P~D
11
22
33
44
U48
TPS2560DRCR-PG1.1_SON10_3X3~D
U48
TPS2560DRCR-PG1.1_SON10_3X3~D
GND1
IN2
ILIM7
OUT28
FAULT1#10
IN3
EN1#4
OUT19
T-PAD11
EN2#5
FAULT#26
8
D79
IP4292CZ10-TB_XSON10U10~D
8
D79
IP4292CZ10-TB_XSON10U10~D
4
5
1
6
2
7
3
10
9
R1612 0_0402_5%~D@R1612 0_0402_5%~D@1 2
R1609 0_0402_5%~D@R1609 0_0402_5%~D@1 2
R1608 0_0402_5%~D@R1608 0_0402_5%~D@1 2
C672 0.01U_0402_16V7K~DC672 0.01U_0402_16V7K~D1 2
C673 0.01U_0402_16V7K~DC673 0.01U_0402_16V7K~D1 2
+
C6
51
15
0U
_D
2_
6.3
VY
_R
15
M~
D
+
C6
51
15
0U
_D
2_
6.3
VY
_R
15
M~
D
1
2
JUSB1
LOTES_AUSB0015-P001A
CONN@JUSB1
LOTES_AUSB0015-P001A
CONN@
VBUS1
D-2
D+3
GND4
StdA-SSRX-5
StdA-SSRX+6
GND-DRAIN7
StdA-SSTX-8
StdA-SSTX+9
GND10
GND11
GND12
GND13
10
U_
08
05
_1
0V
6K
~D
C6
76
10
U_
08
05
_1
0V
6K
~D
C6
76
1
2
L97
DLW21SN900HQ2L_0805_4P~D
L97
DLW21SN900HQ2L_0805_4P~D
11
22
33
44
R1150 0_0402_5%~D@R1150 0_0402_5%~D@1 2
C6
54
0.1
U_
04
02
_2
5V
6K
~D
C6
54
0.1
U_
04
02
_2
5V
6K
~D
1
2
+
C6
67
15
0U
_D
2_
6.3
VY
_R
15
M~
D
+
C6
67
15
0U
_D
2_
6.3
VY
_R
15
M~
D
1
2
R1605 0_0402_5%~D@R1605 0_0402_5%~D@1 2
L51
DLW21SN900SQ2L_0805_4P~D
L51
DLW21SN900SQ2L_0805_4P~D
11
22
33
44
C6
75
0.1
U_
04
02
_2
5V
6K
~D
C6
75
0.1
U_
04
02
_2
5V
6K
~D
1
2
USB2.0
ESATA
USB3.0
JESA1
TAIWI_EU147-165CRL-TW
CONN@
USB2.0
ESATA
USB3.0
JESA1
TAIWI_EU147-165CRL-TW
CONN@
VBUS1
D-2
D+3
GND4
GND5
A+6
A-7
GND8
B-9
B+10
GND11
SSRX-12
SSRX+13
GND14
SSTX-15
SSTX+16
GND19
GND20
GND18
GND17
D7
4P
ES
D5
V0
U2
BT
_S
OT
23
-3~
DD
74
PE
SD
5V
0U
2B
T_
SO
T2
3-3
~D
231
C413 .1U_0402_16V7K~DC413 .1U_0402_16V7K~D12
C6
68
0.1
U_
04
02
_2
5V
6K
~D
C6
68
0.1
U_
04
02
_2
5V
6K
~D
1
2
8
D78
IP4292CZ10-TB_XSON10U10~D
8
D78
IP4292CZ10-TB_XSON10U10~D
4
5
1
6
2
7
3
10
9
L95
DLW21SN900HQ2L_0805_4P~D
L95
DLW21SN900HQ2L_0805_4P~D
11
22
33
44
C415 .1U_0402_16V7K~DC415 .1U_0402_16V7K~D12
R1603 0_0402_5%~D@R1603 0_0402_5%~D@1 2
L98
DLW21SN900HQ2L_0805_4P~D
L98
DLW21SN900HQ2L_0805_4P~D
11
22
33
44
L96
DLW21SN900HQ2L_0805_4P~D
L96
DLW21SN900HQ2L_0805_4P~D
11
22
33
44
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCH_AZ_MDC_RST1#
SW_LAN_TX2-
SW_LAN_TX3-
SW_LAN_TX0-SW_LAN_TX0+
SW_LAN_TX1-SW_LAN_TX1+
SW_LAN_TX2+
SW_LAN_TX3+
HSYNC_BUFVSYNC_BUF
RED_CRT
BLUE_CRTGREEN_CRT
DAT_DDC2_CRTCLK_DDC2_CRT
PCH_AZ_MDC_RST1#
USBP9_R_D+
USBP9_R_D-
USBP9_R_D-USBP9_R_D+
+3.3V_ALW_PCH+5V_RUN +5V_ALW+3.3V_LAN
+5V_ALW
+3.3V_LAN+5V_RUN
+3.3V_ALW_PCH
+SIM_PWR
+5V_ALW
+5V_ALW
+5V_ALW
USB_OC0#<17,36>USB_SIDE_EN#<39>
USBP0+<17>USBP0-<17>
SW_LAN_TX0+<30>SW_LAN_TX0-<30>
SW_LAN_TX1+<30>SW_LAN_TX1-<30>
SW_LAN_TX2+<30>SW_LAN_TX2-<30>
SW_LAN_TX3+<30>SW_LAN_TX3-<30>
PCH_AZ_MDC_SDOUT <14>PCH_AZ_MDC_SYNC <14>PCH_AZ_MDC_SDIN1 <14>
PCH_AZ_MDC_BITCLK <14>
LAN_ACTLED_YEL#<30>LED_100_ORG#<30>
LED_10_GRN#<30>
HSYNC_BUF <23>VSYNC_BUF <23>
RED_CRT <23>
BLUE_CRT <23>
GREEN_CRT <23>
CLK_DDC2_CRT <23>DAT_DDC2_CRT <23>
UIM_DATA <34>UIM_VPP <34>UIM_RESET <34>UIM_CLK <34>
MDC_RST_DIS#<39>
PCH_AZ_MDC_RST#<14>
USBP9+ <17>
USBP9- <17>
WIRELESS_ON#/OFF<39>
AUD_HP_OUT_R <29>
AUD_HP_OUT_L <29>
AUD_HP_NB_SENSE <29,39>
MIC_IN_R <29>
USB_OC4# <17>USB_SIDE_EN# <39>
Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
IO/AUDIO/MEDIA/SNF
37 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
IO/AUDIO/MEDIA/SNF
37 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
IO/AUDIO/MEDIA/SNF
37 61Friday, March 02, 2012
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Place close to JIO1.20,22 Place close to JIO1.14,16 Place close to JIO1.14,16 Place close to JIO1.6,8,10,12
IO BOARD
AUDIO BOARD
Close to JAUD1.
Link CISLink CIS
Defult on,
WIRELESS_ON/OFF#:
LOW: ON
HIGH: OFF
Sniffer Switch
R7
52
10
K_
04
02
_5
%~
DR
75
21
0K
_0
40
2_
5%
~D
12
C4
82
0.1
U_
04
02
_1
0V
7K
~D
C4
82
0.1
U_
04
02
_1
0V
7K
~D
1
2
C9
98
0.1
U_
04
02
_2
5V
6K
~D
C9
98
0.1
U_
04
02
_2
5V
6K
~D
1
2
SF1
SC12P-C-V-TR_3P
SF1
SC12P-C-V-TR_3P
11
22
33
C1
00
10
.1U
_0
40
2_
25
V6
K~
DC
10
01
0.1
U_
04
02
_2
5V
6K
~D
1
2
JAUD1
ACES_51522-0200N-P01CONN@
JAUD1
ACES_51522-0200N-P01CONN@
11
22
33
44
55
66
77
88
99
1010
1111
1212
1313
1414
1515
1616
1717
1818
1919
2020
GND21
GND22
JIO1
E&T_1000K-F50E-04RCONN@
JIO1
E&T_1000K-F50E-04RCONN@
11
22
33
44
55
66
77
88
99
1010
1111
1212
G151
1414
1616
1818
2020
1313
1515
1717
1919
2222
2424
2626
2828
3030
3232
3434
3636
2121
2323
2525
2727
2929
3131
3333
3535
3737
3939
4141
4343
4545
4747
4949
3838
4040
4242
4444
4646
4848
5050
G252
L107
OCF2012181YZF_4P
L107
OCF2012181YZF_4P
11
22
33
44
G
D S
Q44SSM3K7002FU_SC70-3~D
G
D S
Q44SSM3K7002FU_SC70-3~D
2
1 3
R16560_0402_5%~D @R16560_0402_5%~D @12
R7
51
10
0K
_0
40
2_
5%
~D
R7
51
10
0K
_0
40
2_
5%
~D
12
C1
18
60
.1U
_0
40
2_
16
V4
Z~
DC
11
86
0.1
U_
04
02
_1
6V
4Z
~D
1
2
R16570_0402_5%~D @R16570_0402_5%~D @12
C1
18
50
.1U
_0
40
2_
16
V4
Z~
DC
11
85
0.1
U_
04
02
_1
6V
4Z
~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DPC_DOCK_LANE_P3DPC_DOCK_LANE_N3
DPC_DOCK_LANE_P2DPC_DOCK_LANE_N2
DPC_DOCK_LANE_P1DPC_DOCK_LANE_N1
DPC_DOCK_LANE_N0DPC_DOCK_LANE_P0
DPC_PCH_DOCK_HPD
DPD_PCH_DOCK_HPD
CLK_PCI_DOCK
DOCK_DET_R#
DOCK_AC_OFF
DOCK_DET#
DPD_PCH_DOCK_HPD
DPC_PCH_DOCK_HPD
SATA_PRX_DKTX_P5SATA_PRX_DKTX_N5
USBP7_D+USBP7_D-
DAI_12MHZ# DAI_BCLK#
DPC_CA_DET
DPC_DOCK_AUXDPC_DOCK_AUX#
SATA_PTX_DKRX_P5SATA_PTX_DKRX_N5
DPD_CA_DET
DPD_DOCK_AUXDPD_DOCK_AUX#
RED_DOCK
GREEN_DOCK
BLUE_DOCK
DPD_DOCK_LANE_P3DPD_DOCK_LANE_N3
DPD_DOCK_LANE_P2DPD_DOCK_LANE_N2
DPD_DOCK_LANE_P1DPD_DOCK_LANE_N1
DPD_DOCK_LANE_N0DPD_DOCK_LANE_P0
+DOCK_PWR_BAR+DOCK_PWR_BAR
+LOM_VCT
+NBDOCK_DC_IN_SS
+3.3V_ALW+LOM_VCT
DOCK_AC_OFF <39,53>
RED_DOCK<23>
BLUE_DOCK<23>
GREEN_DOCK<23>
VSYNC_DOCK<23>
DAT_MSE<40>CLK_MSE<40>
DAI_BCLK#<29>DAI_LRCK#<29>
DAI_DI<29>DAI_DO#<29>
DAI_12MHZ#<29>
D_LAD1<39>D_LAD0<39>
D_LAD2<39>D_LAD3<39>
D_LFRAME#<39>D_CLKRUN#<39>
D_SERIRQ<39>D_DLDRQ1#<39>
CLK_PCI_DOCK<17>
DOCK_SMB_CLK<40>DOCK_SMB_DAT<40>
DOCK_SMB_ALERT#<39,44>DOCK_PSID<44>
DOCK_PWR_BTN#<40>
DOCK_LOM_SPD10LED_GRN#<30>
HSYNC_DOCK<23>
DOCK_LOM_SPD100LED_ORG# <30>
DAT_KBD <40>CLK_KBD <40>
DOCK_LOM_TRD0+ <30>DOCK_LOM_TRD0- <30>
DOCK_LOM_TRD2- <30>DOCK_LOM_TRD2+ <30>
ACAV_DOCK_SRC# <53>
CLK_DDC2_DOCK <23>DAT_DDC2_DOCK <23>
SATA_PTX_DKRX_P5_C <14>SATA_PTX_DKRX_N5_C <14>
SATA_PRX_DKTX_P5_C <14>
BREATH_LED# <39,43>DOCK_LOM_ACTLED_YEL# <30>
DOCK_LOM_TRD1- <30>DOCK_LOM_TRD1+ <30>
DOCK_LOM_TRD3- <30>DOCK_LOM_TRD3+ <30>
DOCK_DCIN_IS+ <52>DOCK_DCIN_IS- <52>
DOCK_POR_RST# <40>
SATA_PRX_DKTX_N5_C <14>
USBP3+ <17>USBP3- <17>
SLICE_BAT_PRES#<39,44,53> DOCK_DET# <39>
DPC_DOCK_AUX <26>DPC_DOCK_AUX# <26>
DPC_CA_DET <26>DPD_CA_DET<26>
DPD_DOCK_AUX#<26>DPD_DOCK_AUX<26>
DPD_PCH_DOCK_HPD<16> DPC_PCH_DOCK_HPD <16>
USB3RN4 <17>USB3RP4 <17>
USB3TN4 <17>USB3TP4 <17>
DPD_PCH_LANE_P0<16>DPD_PCH_LANE_N0<16>
DPD_PCH_LANE_P1<16>DPD_PCH_LANE_N1<16>
DPD_PCH_LANE_P2<16>DPD_PCH_LANE_N2<16>
DPD_PCH_LANE_P3<16>DPD_PCH_LANE_N3<16>
DPC_PCH_LANE_P2 <16>DPC_PCH_LANE_N2 <16>
DPC_PCH_LANE_P0 <16>DPC_PCH_LANE_N0 <16>
DPC_PCH_LANE_P3 <16>DPC_PCH_LANE_N3 <16>
DPC_PCH_LANE_P1 <16>DPC_PCH_LANE_N1 <16>
USBP7- <17>
USBP7+ <17>
Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
DOCKING CONN
38 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
DOCKING CONN
38 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
DOCKING CONN
38 61Friday, March 02, 2012
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
DOCK_DET_1
Close to DOCK
Its for Enhance ESD on dock issue.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Close to DOCK
Its for Enhance ESD on dock issue.
Link CIS
R7
56
33
_0
40
2_
5%
~D
R7
56
33
_0
40
2_
5%
~D
12
C6
95
0.0
33
U_
04
02
_1
6V
7K
~D
C6
95
0.0
33
U_
04
02
_1
6V
7K
~D
1
2
D3
3P
ES
D2
4V
S2
UT
_S
OT
23
-3~
DD
33
PE
SD
24
VS
2U
T_
SO
T2
3-3
~D
231
C700 0.01U_0402_16V7K~DC700 0.01U_0402_16V7K~D1 2
D32
RB751S40T1_SOD523-2~D
D32
RB751S40T1_SOD523-2~D
21
C699 0.01U_0402_16V7K~DC699 0.01U_0402_16V7K~D1 2
C692 0.1U_0402_10V7K~DC692 0.1U_0402_10V7K~D12
R7
57
10
0K
_0
40
2_
5%
~D
R7
57
10
0K
_0
40
2_
5%
~D
12
C688 0.1U_0402_10V7K~DC688 0.1U_0402_10V7K~D12
R75510K_0402_5%~D R75510K_0402_5%~D1 2
C680 0.1U_0402_10V7K~DC680 0.1U_0402_10V7K~D12
C697 0.01U_0402_16V7K~DC697 0.01U_0402_16V7K~D12
C685 0.1U_0402_10V7K~DC685 0.1U_0402_10V7K~D12
C698 0.01U_0402_16V7K~DC698 0.01U_0402_16V7K~D12
JDOCK1
JAE_WD2F144WB6-DTCONN@
JDOCK1
JAE_WD2F144WB6-DTCONN@
11
33
55
77
99
1111
1313
1515
1717
1919
2121
2323
2525
2727
2929
3131
3333
3535
3737
3939
4141
4343
4545
4747
4949
5151
5353
5555
5757
5959
6161
6363
6565
6767
6969
7171
7373
7575
7777
7979
8181
8383
8585
8787
8989
9191
9393
9595
9797
9999
101101
103103
105105
107107
109109
111111
113113
115115
117117
119119
121121
123123
125125
127127
129129
131131
133133
135135
137137
22
44
66
88
1010
1212
1414
1616
1818
2020
2222
2424
2626
2828
3030
3232
3434
3636
3838
4040
4242
4444
4646
4848
5050
5252
5454
5656
5858
6060
6262
6464
6666
6868
7070
7272
7474
7676
7878
8080
8282
8484
8686
8888
9090
9292
9494
9696
9898
100100
102102
104104
106106
108108
110110
112112
114114
116116
118118
120120
122122
124124
126126
128128
130130
132132
134134
136136
138138
GND1145
PWR1146
PWR2149
GND2152
Shield_G153
Shield_G154
Shield_G155
Shield_G156
Shield_G157
Shield_G158
139139
140140
141141
142142
143143
144144
PWR1147
PWR1148
PWR2150
PWR2151
Shield_G159
Shield_G160
Shield_G161
Shield_G162
Shield_G163
Shield_G164
C690 0.1U_0402_10V7K~DC690 0.1U_0402_10V7K~D12
C689 0.1U_0402_10V7K~DC689 0.1U_0402_10V7K~D12
R7
58
10
0K
_0
40
2_
5%
~D
R7
58
10
0K
_0
40
2_
5%
~D
12
CE
94
.7P
_0
40
2_
50
V8
C~
D@
CE
94
.7P
_0
40
2_
50
V8
C~
D@ 1
2
C679 0.1U_0402_10V7K~DC679 0.1U_0402_10V7K~D12
C687 0.1U_0402_10V7K~DC687 0.1U_0402_10V7K~D12
C681 0.1U_0402_10V7K~DC681 0.1U_0402_10V7K~D12
RE
11
10
_0
40
2_
1%
~D
@R
E1
11
0_
04
02
_1
%~
D@
12
L108 OCF2012181YZF_4P@L108 OCF2012181YZF_4P@
11
22
33
44
C7
02
0.1
U_
06
03
_5
0V
7K
~D
C7
02
0.1
U_
06
03
_5
0V
7K
~D
1
2
C683 0.1U_0402_10V7K~DC683 0.1U_0402_10V7K~D12
RE
12
10
_0
40
2_
1%
~D
@R
E1
21
0_
04
02
_1
%~
D@1
2
R1672 0_0402_5%~DR1672 0_0402_5%~D12
C6
96
0.0
33
U_
04
02
_1
6V
7K
~D
C6
96
0.0
33
U_
04
02
_1
6V
7K
~D
1
2
C693 0.1U_0402_10V7K~DC693 0.1U_0402_10V7K~D12
C7
03
0.1
U_
06
03
_5
0V
7K
~D
C7
03
0.1
U_
06
03
_5
0V
7K
~D
1
2
C686 0.1U_0402_10V7K~DC686 0.1U_0402_10V7K~D12
C7
04
12
P_
04
02
_5
0V
8J~
DC
70
41
2P
_0
40
2_
50
V8
J~
D
1
2
C7
01
1U
_0
40
2_
6.3
V6
K~
D@
C7
01
1U
_0
40
2_
6.3
V6
K~
D@1
2
CE
64
.7U
_0
80
5_
25
V6
K~
D
@
CE
64
.7U
_0
80
5_
25
V6
K~
D
@1
2
CE
84
.7P
_0
40
2_
50
V8
C~
D@
CE
84
.7P
_0
40
2_
50
V8
C~
D@ 1
2
C682 0.1U_0402_10V7K~DC682 0.1U_0402_10V7K~D12
C694 0.1U_0402_10V7K~DC694 0.1U_0402_10V7K~D12
R1673 0_0402_5%~DR1673 0_0402_5%~D12
C691 0.1U_0402_10V7K~DC691 0.1U_0402_10V7K~D12
C684 0.1U_0402_10V7K~DC684 0.1U_0402_10V7K~D12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_PCI_5048 CLK_SIO_14M
D_CLKRUN#
D_SERIRQ
D_DLDRQ1#
SYS_LED_MASK#
LPC_LAD3
IRQ_SERIRQ
PCH_PLTRST#_EC
LPC_LDRQ1#
CLKRUN#
LPC_LAD1LPC_LAD2
D_LAD3
D_LAD1
D_DLDRQ1#
CLK_PCI_5048
LPC_LFRAME#
LOM_LOW_PWR
D_CLKRUN#D_LFRAME#
ME_FWP
WLAN_RADIO_DIS#
D_LAD0
D_LAD2
LPC_LAD0
D_SERIRQ
0.75V_DDR_VTT_ON
CLK_SIO_14M
WWAN_RADIO_DIS#
ESATA_USB_PWR_EN#
WIRELESS_ON#/OFFBT_RADIO_DIS#
BC_INT#_ECE5048BC_DAT_ECE5048BC_CLK_ECE5048
LOM_SMB_ALERT#
EN_DOCK_PWR_BAR
PSID_DISABLE#
ENVDD_PCHPANEL_BKEN_EC
EN_I2S_NB_CODEC#
LCD_TST
AUD_NB_MUTE#DOCK_DET#
LCD_VCC_TEST_ENCCD_OFF
DOCKED
MCARD_WWAN_PWREN
AUD_HP_NB_SENSEESATA_USB_PWR_EN#
IMVP_PWRGD
SIO_SLP_LAN#
DOCK_HP_DETDOCK_MIC_DET
+CAP_LDO
SP_TPM_LPC_EN
ME_FWP
RUN_ON
EXPRESS_DET#
CPU_DETECT#
PBAT_PRES#
SLICE_BAT_PRES#
ZODD_WAKE#
MDC_RST_DIS#MCARD_MISC_PWREN
LID_CL_SIO#
SMART_DET#PCMCIA_DET#
CPU_DETECT#
SLP_ME_CSW_DEV#
SYS_PWROK
CPU_VTT_ON
SIO_SLP_SUS#
VGA_ID
SLICE_BAT_ON
MASK_SATA_LED#
LED_SATA_DIAG_OUT#
MODC_EN
RUNPWROK
CRT_SWITCH
SUSACK#
DYN_TURB_PWR_ALRT#
SLICE_BAT_PRES#
DYN_TURB_PWR_ALRT#
TEMP_ALERT#_R
SUS_ON
GFX_MEM_VTT_ON
DGPU_PWR_EN
3.3V_RUN_GFX_ON
DGPU_PWROKLOM_ENERGY_DET
DGPU_SELECT#
DP_HDMI_HPD
HW_GPS_DISABLE2#
HW_GPS_DISABLE2#
USH_PWR_ON
BREATH_LED#
BAT1_LED#
BAT2_LED#
USB_PWR_SHR_EN#
USB_PWR_SHR_EN#
WWAN_RADIO_DIS#
PROCHOT_GATE
PROCHOT_GATE
USB_SIDE_EN#
USB_SIDE_EN#
USB_PWR_SHR_VBUS_EN
USB_PWR_SHR_VBUS_EN
MCARD_PCIE_SATA#
CHARGE_EN
DOCK_SMB_ALERT#
DOCK_SMB_ALERT#
SIO_FAN1_DET#
ZODD_WAKE#
SIO_FAN1_DET#
PCH_PLTRST#_EC
SIO_SLP_S4#SIO_SLP_S3#
SIO_SLP_A#
SP_TPM_LPC_EN
SMART_DET#
EXPRESS_DET#
MCARD_PCIE_SATA#
PCMCIA_DET#
DOCK_AC_OFF_EC
ACAV_IN_NB
SUS_ON
RUN_ON
0.75V_DDR_VTT_ON
CPU_VTT_ON
SLICE_BAT_ON
LCD_TST
CHARGE_EN
SYS_LED_MASK#
GFX_MEM_VTT_ON
DGPU_PWR_EN
VGA_ID
LID_CL_SIO#
WIRELESS_ON#/OFF
WIRELESS_ON#/OFF
+3.3V_ALW
+3.3V_ALW
+3.3V_RUN
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
LPC_LFRAME# <14,32,34,40>
SYS_LED_MASK#<43>
WLAN_RADIO_DIS#<34>
WWAN_RADIO_DIS#<34>
LID_CL# <43>
0.75V_DDR_VTT_ON <46>
IMVP_VR_ON <51>
SIO_EXT_WAKE#<18>
D_SERIRQ <38>D_DLDRQ1# <38>
CLK_PCI_5048 <17>
D_LAD3 <38>
D_CLKRUN# <38>
D_LAD1 <38>
LPC_LDRQ1# <14>
PCH_PLTRST#_EC <17,32,34,35,40>
D_LAD2 <38>
D_LFRAME# <38>
IRQ_SERIRQ <14,32,40>CLK_SIO_14M <15>
D_LAD0 <38>
CLKRUN# <16,32,40>
AUX_EN_WOWL <35>
WIRELESS_ON#/OFF<37>BT_RADIO_DIS#<41>
BC_CLK_ECE5048 <40>
BC_INT#_ECE5048 <40>BC_DAT_ECE5048 <40>
EN_DOCK_PWR_BAR<53>
PSID_DISABLE#<44>
LCD_TST<24>
EN_I2S_NB_CODEC#<29>
ENVDD_PCH<16,24>PANEL_BKEN_EC<24>
DOCKED<30>DOCK_DET#<38>
AUD_NB_MUTE#<29>
LCD_VCC_TEST_EN<24>
AUD_HP_NB_SENSE<29,37>ESATA_USB_PWR_EN#<36>
CCD_OFF<24>
MCARD_WWAN_PWREN<35>
DOCK_AC_OFF_EC <53>
WLAN_LAN_DISB# <30>SIO_SLP_LAN# <16,30>
GPIO_PSID_SELECT <44>
DOCK_HP_DET <29>DOCK_MIC_DET <29>
SP_TPM_LPC_EN <32>
ME_FWP <14>
RUN_ON <27,35,42,47,48>
1.8V_RUN_PWRGD <47>
SPI_WP#_SEL <14>
IMVP_PWRGD <51>
EC_32KHZ_ECE5048 <40>
EXPRESS_DET#<35>
PCH_DPWROK<16>
PBAT_PRES#<44>
SLICE_BAT_PRES#<38,44,53>
MDC_RST_DIS#<37>MCARD_MISC_PWREN<35>
SMART_DET#<35>
CPU_DETECT#<7>
SLP_ME_CSW_DEV#<14,18>
SYS_PWROK<7,16>
CPU_VTT_ON<49>
SIO_SLP_SUS# <16>
SLICE_BAT_ON<53>
WIRELESS_LED#<34,43>
MASK_SATA_LED# <43>
LED_SATA_DIAG_OUT# <43>
MODC_EN <28>
RUNPWROK <7,40>
CRT_SWITCH<23>
SUSACK#<16>
TEMP_ALERT# <14,18>
LPC_LAD0 <14,32,34,40>
SUS_ON <42>
HW_GPS_DISABLE2# <34>BREATH_LED# <38,43>
BAT1_LED# <43>
BAT2_LED# <43>
LPC_LAD1 <14,32,34,40>LPC_LAD2 <14,32,34,40>LPC_LAD3 <14,32,34,40>
PROCHOT_GATE<52>
USB_SIDE_EN#<37>
DOCK_SMB_ALERT#<38,44>
LOM_ENERGY_DET<30>
LOM_SMB_ALERT#<30>
LOM_LOW_PWR<30>
FAN1_DET#<22>
SIO_SLP_A# <16,42,48>
SIO_SLP_S4# <16,42,46>SIO_SLP_S3# <11,16,27,35,42,47,48,49>
ACAV_IN_NB<40,52,53>
DOCK_AC_OFF <38,53>
Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
ECE5048
39 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
ECE5048
39 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
ECE5048
39 61Friday, March 02, 2012
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
+CAP_LDO trace width 20 mils
B4 non used
---vPro only
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Reserve for ESD in 6/22
Place closed U46
VGA_ID0
Discrete
UMA 1
0
ME_FWP PCH has internal 20K PD.
(suspend power rail)
trace width 20 mils
trace width 20 mils
R1582 100K_0402_5%~DR1582 100K_0402_5%~D12
C7
05
10
U_
06
03
_6
.3V
6M
~D
C7
05
10
U_
06
03
_6
.3V
6M
~D
1
2 R777 100K_0402_5%~DR777 100K_0402_5%~D12
R878 100K_0402_5%~DR878 100K_0402_5%~D12
R802 0_0402_5%~D@R802 0_0402_5%~D@1 2
R763 100K_0402_5%~DR763 100K_0402_5%~D1 2
T109 PAD~D@ T109 PAD~D@
T117PAD~D @T117PAD~D @
U46
DB Version 0.4ECE5048-LZY_DQFN132_11X11~D
U46
DB Version 0.4ECE5048-LZY_DQFN132_11X11~D
GPIOA0B52
GPIOA1A49
GPIOA2B53
GPIOA3A50
GPIOA4B54
GPIOA5A51
GPIOA6B55
GPIOA7A52
GPIOD1B32
GPIOD2A31
GPIOD3B33
GPIOD4B15
GPIOD5A15
GPIOD6B16
GPIOD7A16
GPIOF7B58
GPIOF6A55
GPIOF5B59
GPIOF4/TACH7A56
GPIOL0/PWM7B60
GPIOL1/PWM8A57
GPIOF3/TACH8B61
GPIOF2A58
GPIOF1B62
GPIOF0A59
VC
C1
B5
CAP_LDOB46
TEST_PINB19
LAD0A27
LAD1A26
LAD2B26
LAD3B25
LFRAME#A21
LRESET#B22
PCICLKA28
CLKRUN#B20
GPIOI0A23
LDRQ1#A22
SER_IRQB21
14.318MHZ/GPIOM0A32
GPIOM4/PWM6B51
DLAD0B29
DLAD1B28
DLAD2A25
DLAD3A24
DLFRAME#B23
DCLKRUN#A19
DLDRQ1#B24
DSER_IRQA20
PWRGDA4
OUT65B56
VSSB27
GPIOM3/PWM4B39
GPIOL2/PWM0B64
VC
C1
A1
7
VC
C1
B3
0
VC
C1
A4
3
VC
C1
A5
4
BC_INT#A29
BC_DATB31
BC_CLKA30
GPIOB0A33
GPIOB1B36
GPOC2A34
GPOC3B37
GPOC4A35
GPOC5B38
GPOC6/TACH4A36
GPIOC7A37
GPIOD0B40
GPIOC1A38
GPIOC0B41
GPIOB7A39
GPIOB6B42
GPIOB5A40
GPIOB4B43
GPIOB3A41
GPIOB2B44
GPIOH0B13
GPIOH1A13
SYSOPT1/GPIOH2A53
SYSOPT0/GPIOH3B57
GPIOH4B14
GPIOH5A14
GPIOH6B17
GPIOH7B18
GPIOE0/RXDA1
GPIOE1/TXDB2
GPIOE2/RTS#A2
GPIOE3/DSR#B3
GPIOE4/CTS#A3
GPIOE5/DTR#B45
GPIOE6/RI#A42
GPIOE7/DCD#B4
GPIOG0/TACH5B47
GPIOG1A45
GPIOG2B48
GPIOG3A46
GPIOG4B49
GPIOG5A47
GPIOG6B50
GPIOG7/TACH6A48
GPIOK0A8
GPIOK1/TACH3B9
GPIOK2B10
GPIOK3A10
GPIOK4B11
GPIOK5A11
GPIOK6B12
GPIOK7A12
GPIOI1B63
GPIOI2/TACH0A60
GPIOI3A61
GPIOI4B65
GPIOI5A62
GPIOI6B66
GPIOI7A63
GPIOJ0B67
GPIOJ1/TACH1A64
GPIOJ2/TACH2A5
GPIOJ3B6
GPIOJ4A6
GPIOJ5B7
GPIOJ6A7
GPIOJ7B8
GPIOM1B34
CLK32/GPIOM2B35
EPC1
GPIOL3/PWM1B68
GPIOL4/PWM3A9
GPIOL5/PWM2B1
GPIOL6A18
GPIOL7/PWM5A44
R791 100K_0402_5%~DR791 100K_0402_5%~D12
C7
06
0.1
U_
04
02
_2
5V
6K
~D
C7
06
0.1
U_
04
02
_2
5V
6K
~D
1
2
R3 100K_0402_5%~DR3 100K_0402_5%~D12
R798 100K_0402_5%~DR798 100K_0402_5%~D1 2
T114 PAD~D@ T114 PAD~D@
R516 10K_0402_5%~DR516 10K_0402_5%~D1 2
R460 100K_0402_5%~DR460 100K_0402_5%~D12
R786 100K_0402_5%~DR786 100K_0402_5%~D12
R1583 100K_0402_5%~DR1583 100K_0402_5%~D12
C7
12
4.7
P_
04
02
_5
0V
8C
~D
@C
71
24
.7P
_0
40
2_
50
V8
C~
D@ 1
2
R804 1K_0402_1%~DR804 1K_0402_1%~D1 2
R782 100K_0402_5%~DR782 100K_0402_5%~D12
R461 100K_0402_5%~DR461 100K_0402_5%~D12
R7
93
1K
_0
40
2_
1%
~D
@R
79
31
K_
04
02
_1
%~
D@1
2
R789 100K_0402_5%~DR789 100K_0402_5%~D12
R796 10K_0402_5%~DR796 10K_0402_5%~D1 2
R766 100K_0402_5%~D@R766 100K_0402_5%~D@12
R776 100K_0402_5%~DR776 100K_0402_5%~D1 2
R780 100K_0402_5%~DR780 100K_0402_5%~D12
R463 100K_0402_5%~DR463 100K_0402_5%~D12
R790 100K_0402_5%~DR790 100K_0402_5%~D12
R761 100K_0402_5%~DR761 100K_0402_5%~D1 2
C7
16
0.0
47
U_
04
02
_1
6V
4Z
~D
C7
16
0.0
47
U_
04
02
_1
6V
4Z
~D
1
2
U47TC7SH08FU_SSOP5~D
@U47TC7SH08FU_SSOP5~D
@
B1
A2
G3
O4
P5
R801 0_0402_5%~D@R801 0_0402_5%~D@ 1 2
C7
10
0.1
U_
04
02
_2
5V
6K
~D
C7
10
0.1
U_
04
02
_2
5V
6K
~D
1
2
R807 10_0402_1%~DR807 10_0402_1%~D12
R768 10K_0402_5%~DR768 10K_0402_5%~D1 2
C7110.1U_0402_25V6K~D
@C7110.1U_0402_25V6K~D
@
1 2
R765 0_0402_5%~D@R765 0_0402_5%~D@1 2
C7
08
0.1
U_
04
02
_1
0V
7K
~D
C7
08
0.1
U_
04
02
_1
0V
7K
~D
1
2
R8
03
10
0K
_0
40
2_
5%
~D
@R
80
31
00
K_
04
02
_5
%~
D@
12
R760 100K_0402_5%~DR760 100K_0402_5%~D1 2
R771 100K_0402_5%~DR771 100K_0402_5%~D1 2
T110 PAD~D@ T110 PAD~D@
R772 10K_0402_5%~D@R772 10K_0402_5%~D@12
D34
RB751S40T1_SOD523-2~D
@D34
RB751S40T1_SOD523-2~D
@
2 1
R778 100K_0402_5%~DR778 100K_0402_5%~D1 2
C7
09
0.1
U_
04
02
_2
5V
6K
~D
C7
09
0.1
U_
04
02
_2
5V
6K
~D
1
2
R7
94
10
_0
40
2_
1%
~D
@R
79
41
0_
04
02
_1
%~
D@
12
R762 10K_0402_5%~DR762 10K_0402_5%~D1 2
R8
05
10
0K
_0
40
2_
5%
~D
R8
05
10
0K
_0
40
2_
5%
~D
12
T116 PAD~D@ T116 PAD~D@
R7
70
33
K_
04
02
_5
%~
D@
R7
70
33
K_
04
02
_5
%~
D@
12
C7
07
0.1
U_
04
02
_2
5V
6K
~D
C7
07
0.1
U_
04
02
_2
5V
6K
~D
1
2
R8
00
10
0K
_0
40
2_
5%
~D
R8
00
10
0K
_0
40
2_
5%
~D
12
R7
95
10
_0
40
2_
1%
~D
@R
79
51
0_
04
02
_1
%~
D@
12
R457 100K_0402_5%~DR457 100K_0402_5%~D12
R774 100K_0402_5%~DR774 100K_0402_5%~D1 2
R769 100K_0402_5%~DR769 100K_0402_5%~D1 2
R767 100K_0402_5%~DR767 100K_0402_5%~D12
C7
14
4.7
U_
06
03
_6
.3V
6K
~D
C7
14
4.7
U_
06
03
_6
.3V
6K
~D
1
2
R738 0_0402_5%~D@R738 0_0402_5%~D@1 2
R775 10K_0402_5%~DR775 10K_0402_5%~D12
R797 0_0402_5%~D@R797 0_0402_5%~D@1 2
CE
11
0.1
U_
04
02
_2
5V
6K
~D
@C
E1
10
.1U
_0
40
2_
25
V6
K~
D@1
2
C7
13
4.7
P_
04
02
_5
0V
8C
~D
@C
71
34
.7P
_0
40
2_
50
V8
C~
D@ 1
2
R1183 10K_0402_5%~DR1183 10K_0402_5%~D1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BC_DAT_ECE5048
JTAG_TDI
BC_DAT_ECE1117
PBAT_SMBDAT
PBAT_SMBCLK
CLK_KBD
DAT_KBD
CLK_MSE
DAT_MSE
CHARGER_SMBDAT
CHARGER_SMBCLK
SYSTEM_ID
JTAG_TDOJTAG_CLKJTAG_TMS
AC_PRESENT
GPU_SMBDAT
GPU_SMBCLK
JTAG_RST#
VCI_IN1#
PCIE_WAKE#
VOL_UP
VOL_DOWN
VOL_MUTE
HOST_DEBUG_RXHOST_DEBUG_TXHOST_DEB_TX
MSCLKMSDATA
HOST_DEB_RX
+RTC_CELL_VBAT
BEEP
LPC_LDRQ#_MEC
BC_DAT_ECE5048BC_INT#_ECE5048
BC_CLK_ECE5048
IRQ_SERIRQ
CLK_PCI_MECPCH_PLTRST#_EC
SML1_SMBCLKSML1_SMBDATA
CLK_KBDDAT_TP_SIO
CLK_MSEDAT_KBD
DAT_MSE
CLK_TP_SIO
PBAT_SMBCLKPBAT_SMBDAT
BC_DAT_ECE1117BC_CLK_ECE1117
BC_INT#_ECE1117
LPC_LAD0LPC_LAD1LPC_LAD2
SIO_EXT_SCI#
LPC_LAD3CLKRUN#
LPC_LFRAME#
BIA_PWM_EC
JTAG_RST#
JTAG_TDIJTAG_TDOJTAG_CLKJTAG_TMS
PCH_ALW_ON
SIO_EXT_SMI#SIO_RCIN#
MEC_XTAL2 MEC_XTAL2_RMEC_XTAL1
BC_CLK_EMC4022
BC_INT#_EMC4022BC_DAT_EMC4022
1.05V_A_PWRGD_SIO
GPU_SMBDATGPU_SMBCLK
CPU1.5V_S3_GATEDYN_TUR_CURRNT_SET#
MSDATAMSCLKSIO_A20GATE
SIO_PWRBTN#AC_PRESENTPCH_RSMRST#
ALWONLAT_ON_SW#
PS_ID
PROCHOT#_EC
HOST_DEBUG_TXHOST_DEBUG_RX
FWP#
RESET_OUT#
SYSTEM_IDBOARD_ID
POWER_SW_IN#
+PECI_VREF
DDR_HVREF_RST_GATE
RUNPWROK
DOCK_SMB_CLKDOCK_SMB_DAT
BAY_SMBCLKBAY_SMBDAT
LCD_SMBDAT
CARD_SMBDATCARD_SMBCLK
SIO_LAN_SMBCLKSIO_LAN_SMBDATA
CHARGER_SMBCLKCHARGER_SMBDAT
LCD_SMBCLK
1.5V_SUS_PWRGD
ACAV_IN
PECI_EC_R
DDR_ON
+V
R_
CA
P
LPC_LDRQ#_MEC
ACAV_IN_NB
PCIE_WAKE#
DEVICE_DET#
PCH_PCIE_WAKE#
EN_INVPWR
DOCK_PWR_SW#
VCI_IN1#
BC_DAT_EMC4022
SIO_LAN_SMBDATA
SIO_LAN_SMBCLK
AUX_ON
SIO_SLP_S5#
DYN_TUR_CURRNT_SET#
BAY_SMBDAT
BAY_SMBCLK
LCD_SMBCLK
LCD_SMBDAT
DOCK_SMB_CLK
DOCK_SMB_DAT
PCH_ALW_ON
PCH_RSMRST#
AUX_ON
CPU1.5V_S3_GATE
MSDATA
DOCK_POR_RST#
DDR_ON
1.05V_0.8V_PWROK
EN_INVPWR
RESET_OUT#
PROCHOT#_EC
LAT_ON_SW#
1.05V_A_PWRGD_SIO
PROCHOT#_EC
CLK_PCI_MEC
MEC_XTAL1
MEC_XTAL2
RESET_OUT#
FWP#
BOARD_ID
PCH_PLTRST#_ECDOCK_POR_RST#
RUNPWROK
+3.3V_ALW
+3.3V_ALW
+5V_RUN
+RTC_CELL
+RTC_CELL
+3.3V_ALW
+3.3V_ALW_PCH
+3.3V_ALW
+3.3V_ALW
+RTC_CELL
+3.3V_RUN
+3.3V_ALW
+RTC_CELL
+1.05V_RUN_VTT
+3.3V_ALW
+1.05V_RUN_VTT
+3.3V_M+3.3V_ALW
+3.3V_ALW
+3.3V_RUN
DOCK_PWR_BTN# <38>
1.05V_VTTPWRGD<49,50>
VCCSAPWROK<50>1.05V_0.8V_PWROK <14,51>
PCH_PCIE_WAKE#<16>
BEEP<29>
BC_CLK_EMC4022<22>BC_DAT_EMC4022<22>
BC_INT#_EMC4022<22>
BC_INT#_ECE5048<39>BC_DAT_ECE5048<39>
BC_CLK_ECE5048<39>
PCH_PLTRST#_EC<17,32,34,35,39>CLK_PCI_MEC<17>
IRQ_SERIRQ<14,32,39>
DAT_TP_SIO<41>CLK_KBD<38>DAT_KBD<38>
DAT_MSE<38>CLK_MSE<38>
PBAT_SMBDAT<44>
SML1_SMBDATA<15,30>SML1_SMBCLK<15,30>
PBAT_SMBCLK<44>
CLK_TP_SIO<41>
BC_CLK_ECE1117<41>BC_DAT_ECE1117<41>
BC_INT#_ECE1117<41>
LPC_LFRAME#<14,32,34,39>
LPC_LAD1<14,32,34,39>LPC_LAD2<14,32,34,39>LPC_LAD3<14,32,34,39>
LPC_LAD0<14,32,34,39>
SIO_EXT_SCI#<18>CLKRUN#<16,32,39>
BIA_PWM_EC<24>PCH_ALW_ON<42,44>
SIO_EXT_SMI#<14,17>
SIO_RCIN#<18>
EC_32KHZ_ECE5048<39>
MSCLK <34>MSDATA <34>
CPU1.5V_S3_GATE <11>DYN_TUR_CURRNT_SET# <52>
SIO_A20GATE <18>
AC_PRESENT <16>SIO_PWRBTN# <16>
PCH_RSMRST# <41>
ME_SUS_PWR_ACK <16>
ALWON <45>
PS_ID <44>
HOST_DEBUG_TX <34>HOST_DEBUG_RX <34>
RESET_OUT# <16>
VOL_MUTE <43>
RUNPWROK <7,39>
PCH_SATA_MOD_EN# <14>
DDR_HVREF_RST_GATE <7>
DOCK_SMB_DAT <38>DOCK_SMB_CLK <38>
CHARGER_SMBCLK <52>CARD_SMBDAT <35>
CHARGER_SMBDAT <52>
CARD_SMBCLK <35>
PM_APWROK <16>
ACAV_IN <22,52,53>
PECI_EC <7>
DDR_ON <46>
ALW_PWRGD_3V_5V <45>
POWER_SW_IN#<22>
DOCK_PWR_SW#<22>
ACAV_IN_NB<39,52,53>
PCIE_WAKE#<30,34,35>
DEVICE_DET# <28>
EN_INVPWR <24>
VOL_DOWN <43>
DOCK_POR_RST#<38>
VOL_UP <43>AUX_ON<30>
1.5V_SUS_PWRGD <46>
1.05V_A_PWRGD <48>
SIO_SLP_S5#<16,42>
POWER_SW#_MB <43>
H_PROCHOT# <7,51,52>PCH_PWRGD#<22>
RUN_ON_ENABLE#<42>
SIO_LAN_SMBCLK <15,30>SIO_LAN_SMBDATA <15,30>
Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
MEC5055
40 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
MEC5055
40 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P1.0
MEC5055
40 61Friday, March 02, 2012
Compal Electronics, Inc.
JTAG_RST# citcuit
close to U51.B57
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Place closely pin A29
SYSTEM_ID for BID function
Pop R877 240K for vPro and depop R871
* Pop R871 130K for non-vPro and depoip R877
32 KHz Clock
R862 close to
U51& least 250mils
C740 close to U51.B12
15
mil
15
mil
1K4700p4700p
4700p4700p4700p4700p
X02X01X00
62K33K8.2K4.3K
R875 C744
130K 4700p
REV
240K 4700p
2K
BOARD_ID rise time is measured from 5%~68%.
A00
Reserve for ESD in 6/22 Place closed U51
*
R881 100K_0402_5%~DR881 100K_0402_5%~D1 2
R8
58
10
K_
04
02
_5
%~
DR
85
81
0K
_0
40
2_
5%
~D
12
R853 0_0402_5%~D@ R853 0_0402_5%~D@ 1 2
R1197 100K_0402_5%~D@ R1197 100K_0402_5%~D@12
R869 10K_0402_5%~DR869 10K_0402_5%~D1 2
R887 1K_0402_1%~DR887 1K_0402_1%~D1 2
R815 0_0402_5%~D@ R815 0_0402_5%~D@1 2
R759 10K_0402_5%~DR759 10K_0402_5%~D1 2
R863 43_0402_5%~DR863 43_0402_5%~D1 2
R8
19
10
0K
_0
40
2_
5%
~D
R8
19
10
0K
_0
40
2_
5%
~D
12
C7
29
0.1
U_
04
02
_2
5V
6K
~D
C7
29
0.1
U_
04
02
_2
5V
6K
~D
1
2
C7
25
0.1
U_
04
02
_2
5V
6K
~D
C7
25
0.1
U_
04
02
_2
5V
6K
~D
1
2
R8
77
24
0K
_0
40
2_
5%
~D
@R
87
72
40
K_
04
02
_5
%~
D@
12
R8
64
49
.9_
04
02
_1
%~
DR
86
44
9.9
_0
40
2_
1%
~D
12
U50TC7SH08FU_SSOP5~D
U50TC7SH08FU_SSOP5~D
B1
A2
G3
O4
P5
R874 2.7K_0402_5%~DR874 2.7K_0402_5%~D1 2
R811 10K_0402_5%~DR811 10K_0402_5%~D1 2
R845 4.7K_0402_5%~DR845 4.7K_0402_5%~D12
R1180 0_0402_5%~D@R1180 0_0402_5%~D@1 2J
TA
G1
@S
HO
RT
PA
DS
~D
CO
NN
@JT
AG
1@
SH
OR
T P
AD
S~
DC
ON
N@
11
22
R420 2.2K_0402_5%~DR420 2.2K_0402_5%~D1 2
R8
59
10
K_
04
02
_5
%~
DR
85
91
0K
_0
40
2_
5%
~D
12 R
84
71
0K
_0
40
2_
5%
~D
R8
47
10
K_
04
02
_5
%~
D
12
R1169 100K_0402_5%~D@ R1169 100K_0402_5%~D@12
R8
72
10
K_
04
02
_5
%~
DR
87
21
0K
_0
40
2_
5%
~D
12
R8
85
10
_0
40
2_
1%
~D
@R
88
51
0_
04
02
_1
%~
D@
12
R814 100K_0402_5%~DR814 100K_0402_5%~D1 2
G
D
S
Q4
7S
SM
3K
70
02
FU
_S
C7
0-3
~D
@
G
D
S
Q4
7S
SM
3K
70
02
FU
_S
C7
0-3
~D
@
2
13
C7
39
0.1
U_
04
02
_2
5V
6K
~D
C7
39
0.1
U_
04
02
_2
5V
6K
~D
1
2
R818 2.2K_0402_5%~DR818 2.2K_0402_5%~D1 2
R830 2.2K_0402_5%~DR830 2.2K_0402_5%~D1 2
R418 2.2K_0402_5%~DR418 2.2K_0402_5%~D1 2
C720
0.1U_0402_25V6K~D
C720
0.1U_0402_25V6K~D
1 2
R862 0_0402_5%~D@ R862 0_0402_5%~D@1 2
R8
75
33
K_
04
02
_5
%~
DR
87
53
3K
_0
40
2_
5%
~D
12
C7
28
0.1
U_
04
02
_2
5V
6K
~D
C7
28
0.1
U_
04
02
_2
5V
6K
~D
1
2
R817 100K_0402_5%~DR817 100K_0402_5%~D1 2
R8
79
10
K_
04
02
_5
%~
D@
R8
79
10
K_
04
02
_5
%~
D@
12
R822 2.2K_0402_5%~DR822 2.2K_0402_5%~D1 2
C7
47
4.7
P_
04
02
_5
0V
8C
~D
@C
74
74
.7P
_0
40
2_
50
V8
C~
D@
1
2
C7
30
10
U_
06
03
_6
.3V
6M
~D
C7
30
10
U_
06
03
_6
.3V
6M
~D
1
2
R8
48
10
K_
04
02
_5
%~
DR
84
81
0K
_0
40
2_
5%
~D
12
R841 2.2K_0402_5%~DR841 2.2K_0402_5%~D1 2
C7
23
0.1
U_
04
02
_2
5V
6K
~D
C7
23
0.1
U_
04
02
_2
5V
6K
~D
1
2
R892 10K_0402_5%~DR892 10K_0402_5%~D1 2
R8
24
10
K_
04
02
_5
%~
DR
82
41
0K
_0
40
2_
5%
~D
12
R852 4.7K_0402_5%~DR852 4.7K_0402_5%~D12
C7
44
47
00
P_
04
02
_2
5V
7K
~D
C7
44
47
00
P_
04
02
_2
5V
7K
~D
1
2
R1156 100K_0402_5%~DR1156 100K_0402_5%~D12
R827 2.2K_0402_5%~DR827 2.2K_0402_5%~D1 2
R856 2.2K_0402_5%~DR856 2.2K_0402_5%~D1 2
R886 1K_0402_1%~DR886 1K_0402_1%~D1 2
PS/2 INTERFACE
JTAG INTERFACE
FAN PWM & TACH
BC-LINK
HOST INTERFACE
MASTER CLOCK
SMBUS INTERFACE
GENERAL PURPOSE I/O
MISC INTERFACE
DELL PWR SW INF
I2S
PECI
U51
DB Version 0.12
MEC5055-LZY_DQFN132_11X11~D
PS/2 INTERFACE
JTAG INTERFACE
FAN PWM & TACH
BC-LINK
HOST INTERFACE
MASTER CLOCK
SMBUS INTERFACE
GENERAL PURPOSE I/O
MISC INTERFACE
DELL PWR SW INF
I2S
PECI
U51
DB Version 0.12
MEC5055-LZY_DQFN132_11X11~D
GPIO012/I2C1H_DATA/I2C2D_DATAB7
GPIO013/I2C1H_CLK/I2C2D_CLKA7
GPIO021/RC_ID1A10
VS
S[1
]B
11
GPIO025/UART_CLKB14
GPIO127/A20MA45
GPIO060/KBRSTA25
GPIO110/PS2_CLK2/GPTP-IN6A37
GPIO111/PS2_DAT2/GPTP-OUT6B40
GPIO112/PS2_CLK1AA38
GPIO113/PS2_DAT1AB41
GPIO114/PS2_CLK0AA39
GPIO115/PS2_DAT0AB42
GPIO116/MSDATAA40
GPIO117/MSCLKB43
GPIO145/I2C1K_DATA/JTAG_TDIA51
GPIO147/I2C1J_DATA/I2C2C_DATA/JTAG_CLKB56
JTAG_RST#B57
GPIO146/I2C1K_CLK/JTAG_TDOB55
GPIO150/I2C1J_CLK/I2C2C_CLK/JTAG_TMSA53
GPIO153/LED3A55
GPIO123/BCM_A_CLKA43
GPIO122/BCM_A_DATB45
GPIO121/BCM_A_INT#A42
XTAL1A61
XTAL2A62
nFWPB65
VB
AT
B64
VT
R[1
]A
11
VT
R[2
]A
22
VT
R[3
]B
35
VT
R[4
]A
41
VT
R[5
]A
58
GPIO160/32KHZ_OUTB62
VCC_PRWGDB26
I2S_WSB28
GPIO106/HSPI_MOSIA36
AG
ND
B66
VR
_C
AP
B12
VS
S_R
OB
54
VT
R[6
]A
52
GPIO006/I2C1B_CLKB5
GPIO005/I2C1B_DATAA4
GPIO004/I2C1A_CLKB4
GPIO003/I2C1A_DATAA3
GPIO130/I2C2A_DATAB48
GPIO131/I2C2A_CLKB49
GPIO132/I2C1G_DATAA47
GPIO140/I2C1G_CLKB50
GPIO154/I2C1C_DATA/PS2_CLK1BB59
GPIO155/I2C1C_CLK/PS2_DAT1BA56
GPIO007/I2C1D_DATA/PS2_CLK0B/I2C3A_DATAA5
GPIO010/I2C1D_CLK/PS2_DAT0B/I2C3A_CLKB6
GPIO141/I2C1F_DATA/I2C2B_DATAB52
GPIO142/I2C1F_CLK/I2C2B_CLKA49
GPIO143/I2C1E_DATAB53
GPIO144/I2C1E_CLKA50
GPIO052/FAN_TACH3B23
GPIO051/FAN_TACH2A21
GPIO050/FAN_TACH1B22
GPIO056/PWM3A24
GPIO055/PWM2B25
GPIO054/PWM1A23
GPIO053/PWM0B24
GPIO103/ECGP_MISOB37
GPIO102/HSPI_SCLKA34
GPIO101/ECGP_SCLKB36
GPIO104/HSPI_MISOA35
GPIO105/ECGP_MOSIB38
VT
R[7
]B
3
VT
R[8
]A
26
GPIO157/LED2B61
GPIO156/LED1A57
I2S_CLKB27
VS
S[4
]B
60
GPIO022/BCM_B_CLKA12
GPIO023/BCM_B_DATB13
GPIO024/BCM_B_INT#A13
GPIO042/BCM_C_INT#B19
GPIO043/BCM_C_DATA18
GPIO044/BCM_C_CLKB20
GPIO045/LSBCM_D_INT#A19
GPIO046/LSBCM_D_DATB21
GPIO047/LSBCM_D_CLKA20
BGPO0A59
VCI_IN2#B63
VCI_OUTA60
VCI_IN1#A63
VCI_IN0#B67
VCI_OVRD_INB1
VCI_IN3#A1
GPIO001/ECSPI_CS1B2
GPIO002/ECSPI_CS2A2
GPIO014/GPTP-IN7/HSPI_CS1B8
GPIO015/GPTP-OUT7A8
GPIO016/GPTP-IN8B9
GPIO017/GPTP-OUT8A9
GPIO020/RC_ID2B10
GPIO026/GPTP-IN1A14
GPIO027/GPTP-OUT1B15
GPIO30/GPTP-IN2/BCM_E_INT#A15
GPIO31/GPTP-OUT2/BCM_E_DATB16
GPIO032/GPTP-IN3/BCM_E_CLKA16
GPIO040/GPTP-OUT3/HSPI_CS2B18
GPIO041A17
GPIO107/nRESET_OUTB39
GPIO120/UART_TXB44
GPIO124/GPTP-OUT5/UART_RXB46
GPIO125/GPTP-IN5A44
GPIO126B47
GPIO151/GPTP-IN4A54
GPIO152/GPTP-OUT4B58
GPIO011/nSMIA6
GPIO061/LPCPD#A27
LDRQ#B29
SER_IRQA28
LRESET#B30
PCI_CLKA29
LFRAME#B31
LAD0A30
LAD1B32
LAD2A31
LAD3B33
CLKRUN#A32
GPIO100/nEC_SCIA33
EP
C1
I2S_DATB17
NC1B34
PROCHOT#/PWM4A46
PECIA48
PECI_VREFB51
NC2A64
NC3B68
R880 100K_0402_5%~DR880 100K_0402_5%~D1 2
C7
32
0.1
U_
04
02
_2
5V
6K
~D
C7
32
0.1
U_
04
02
_2
5V
6K
~D
1
2
C7
35
0.1
U_
04
02
_2
5V
6K
~D
C7
35
0.1
U_
04
02
_2
5V
6K
~D
1
2
R829 2.2K_0402_5%~DR829 2.2K_0402_5%~D1 2
R854 2.2K_0402_5%~DR854 2.2K_0402_5%~D1 2
C7
27
0.1
U_
04
02
_2
5V
6K
~D
C7
27
0.1
U_
04
02
_2
5V
6K
~D
1
2
R843 8.2K_0402_5%~D@ R843 8.2K_0402_5%~D@1 2
R1118 100K_0402_5%~D@ R1118 100K_0402_5%~D@12
R8
49
10
K_
04
02
_5
%~
DR
84
91
0K
_0
40
2_
5%
~D
12
R825 10K_0402_5%~DR825 10K_0402_5%~D1 2
C7
22
1U
_0
40
2_
6.3
V6
K~
DC
72
21
U_
04
02
_6
.3V
6K
~D
1
2
C7
37
0.1
U_
04
02
_2
5V
6K
~D
C7
37
0.1
U_
04
02
_2
5V
6K
~D
1
2
R8
61
10
K_
04
02
_5
%~
DR
86
11
0K
_0
40
2_
5%
~D
12
R7
99
10
K_
04
02
_5
%~
DR
79
91
0K
_0
40
2_
5%
~D
12
R1171 100K_0402_5%~DR1171 100K_0402_5%~D1 2
R828 2.2K_0402_5%~DR828 2.2K_0402_5%~D1 2
R870 100K_0402_5%~DR870 100K_0402_5%~D12
C7
26
0.1
U_
04
02
_2
5V
6K
~D
C7
26
0.1
U_
04
02
_2
5V
6K
~D
1
2
C721
1U_0402_6.3V6K~D
@ C721
1U_0402_6.3V6K~D
@
1 2
R889 100K_0402_5%~DR889 100K_0402_5%~D1 2
R884 1K_0402_1%~DR884 1K_0402_1%~D1 2
G
D
S
Q5
0S
SM
3K
70
02
FU
_S
C7
0-3
~D
G
D
S
Q5
0S
SM
3K
70
02
FU
_S
C7
0-3
~D
2
13
R821 100K_0402_5%~DR821 100K_0402_5%~D12
C7
36
0.1
U_
04
02
_2
5V
6K
~D
C7
36
0.1
U_
04
02
_2
5V
6K
~D
1
2
R8
10
10
0K
_0
40
2_
5%
~D
R8
10
10
0K
_0
40
2_
5%
~D
12
R838 2.2K_0402_5%~DR838 2.2K_0402_5%~D1 2
R1068 0_0402_5%~D@ R1068 0_0402_5%~D@12
R882 100K_0402_5%~DR882 100K_0402_5%~D1 2
R846 4.7K_0402_5%~DR846 4.7K_0402_5%~D12
JDEG2
TYCO_1-2041070-0~DCONN@
JDEG2
TYCO_1-2041070-0~DCONN@
11
22
33
44
55
66
77
88
G111
G212
99
1010
R8
93
10
0K
_0
40
2_
5%
~D
R8
93
10
0K
_0
40
2_
5%
~D
12
R831 2.2K_0402_5%~DR831 2.2K_0402_5%~D1 2
R8
50
10
0K
_0
40
2_
5%
~D
@R
85
01
00
K_
04
02
_5
%~
D@1
2
R888 100K_0402_5%~D@ R888 100K_0402_5%~D@1 2
G
D
S
Q4
5S
SM
3K
70
02
FU
_S
C7
0-3
~D
G
D
S
Q4
5S
SM
3K
70
02
FU
_S
C7
0-3
~D
2
13
R867 0_0402_5%~D@ R867 0_0402_5%~D@1 2
R876 100K_0402_5%~DR876 100K_0402_5%~D1 2
R8
12
10
0K
_0
40
2_
5%
~D
@R
81
21
00
K_
04
02
_5
%~
D@
12
Y632.768KHZ_12.5PF_Q13FC1350000~D
Y632.768KHZ_12.5PF_Q13FC1350000~D
1 2
C7
34
1U
_0
40
2_
6.3
V6
K~
DC
73
41
U_
04
02
_6
.3V
6K
~D
1
2
R8
36
10
0_
04
02
_1
%~
D
@R8
36
10
0_
04
02
_1
%~
D
@
12
R8
71
13
0K
_0
40
2_
5%
~D
R8
71
13
0K
_0
40
2_
5%
~D
12
R1658 100K_0402_5%~DR1658 100K_0402_5%~D1 2
CE
12
0.1
U_
04
02
_2
5V
6K
~D
@C
E1
20
.1U
_0
40
2_
25
V6
K~
D@1
2
C7
41
39
P_
04
02
_5
0V
8J~
DC
74
13
9P
_0
40
2_
50
V8
J~
D
1
2
R8
60
10
K_
04
02
_5
%~
DR
86
01
0K
_0
40
2_
5%
~D
12
C7
31
0.1
U_
04
02
_2
5V
6K
~D
C7
31
0.1
U_
04
02
_2
5V
6K
~D
1
2
R883 10K_0402_5%~DR883 10K_0402_5%~D1 2
C7
42
47
00
P_
04
02
_2
5V
7K
~D
@C7
42
47
00
P_
04
02
_2
5V
7K
~D
@
1
2
R820 2.2K_0402_5%~DR820 2.2K_0402_5%~D1 2
C733
1U_0402_6.3V6K~D
@ C733
1U_0402_6.3V6K~D
@
1 2
R857 0_0402_5%~D@ R857 0_0402_5%~D@1 2
R855 0_0402_5%~D@ R855 0_0402_5%~D@ 1 2
C7
43
39
P_
04
02
_5
0V
8J~
DC
74
33
9P
_0
40
2_
50
V8
J~
D
1
2
R851 4.7K_0402_5%~DR851 4.7K_0402_5%~D12
R1
17
91
0K
_0
40
2_
5%
~D
@R
11
79
10
K_
04
02
_5
%~
D@
12
R1659 100K_0402_5%~DR1659 100K_0402_5%~D1 2
C7
40
4.7
U_
06
03
_6
.3V
6K
~D
C7
40
4.7
U_
06
03
_6
.3V
6K
~D
1
2
R823 100K_0402_5%~D@ R823 100K_0402_5%~D@1 2
R835 10K_0402_5%~DR835 10K_0402_5%~D12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BT_COEX_STATUS2BT_PRI_STATUS
PS2_DAT_TSPS2_CLK_TS
TP_CLKTP_DATA
PS2_CLK_TSPS2_DAT_TS
BT_PRI_STATUS
BT_COEX_STATUS2
TP_DATA
TP_CLK
+5V_ALW_PCH_U4RSMRST#
+3.3V_TP
+3.3V_RUN
+3.3V_TP
+3.3V_ALW+5V_RUN
+3.3V_TP
+3.3V_TP
+5V_RUN+3.3V_ALW
+3.3V_ALW +3.3V_RUN
+3.3V_RUN
+3.3V_ALW+3.3V_ALW_PCH
+5V_ALW_PCH
BT_DET#<17>COEX1_BT_ACTIVE<34>
BT_RADIO_DIS#<39>COEX2_WLAN_ACTIVE<34>
USBP11+<17>USBP11-<17>
CLK_TP_SIO<40>
DAT_TP_SIO<40>
BT_ACTIVE<43>
BC_INT#_ECE1117 <40>BC_DAT_ECE1117 <40>
KB_DET# <18>
BC_CLK_ECE1117 <40>
PCH_RSMRST#_Q <14,16>PCH_RSMRST#<40>
Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
Int KB/TP/BT/RSMRST
41 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
Int KB/TP/BT/RSMRST
41 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
Int KB/TP/BT/RSMRST
41 61Friday, March 02, 2012
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
Keyboard
Place close to JKB1
Place close to JTP1
Touch Pad BlueTooth
RSMRST circuit
Link CIS
Link CIS
Link CIS
R1162 0_0603_5%~D@R1162 0_0603_5%~D@1 2
C7
48
0.1
U_
04
02
_1
6V
4Z
~D
C7
48
0.1
U_
04
02
_1
6V
4Z
~D
1
2
C7
55
0.1
U_
04
02
_1
6V
4Z
~D
C7
55
0.1
U_
04
02
_1
6V
4Z
~D
1
2
C7
51
10
P_
04
02
_5
0V
8J~
DC
75
11
0P
_0
40
2_
50
V8
J~
D
1
2
C2
89
0.0
1U
_0
40
2_
16
V7
K~
DC
28
90
.01
U_
04
02
_1
6V
7K
~D
1
2
C7
52
10
P_
04
02
_5
0V
8J~
DC
75
21
0P
_0
40
2_
50
V8
J~
D
1
2
R1655 0_0402_5%~DR1655 0_0402_5%~D1 2
C7
53
33
P_
04
02
_5
0V
8J~
DC
75
33
3P
_0
40
2_
50
V8
J~
D
1
2
R1161 0_0603_5%~DR1161 0_0603_5%~D1 2
C7
58
0.1
U_
04
02
_2
5V
6K
~D
C7
58
0.1
U_
04
02
_2
5V
6K
~D
1
2
C288
0.1U_0402_25V6K~D
C288
0.1U_0402_25V6K~D
1 2
JKB1
ACES_51524-0100N-001CONN@
JKB1
ACES_51524-0100N-001CONN@
11
22
33
44
55
66
77
88
99
1010
GND11
GND12
R1
62
21
00
K_
04
02
_5
%~
DR
16
22
10
0K
_0
40
2_
5%
~D
12
U7TC7SH08FU_SSOP5~D
U7TC7SH08FU_SSOP5~D
B1
A2
G3
O4
P5
D3
7P
ES
D5
V0
U2
BT
_S
OT
23
-3~
DD
37
PE
SD
5V
0U
2B
T_
SO
T2
3-3
~D
231
JBT1
ACES_50224-0120N-001CONN@
JBT1
ACES_50224-0120N-001CONN@
11
22
33
44
55
66
77
88
99
1010
1111
1212
G113
G214
L55 BLM18AG601SN1D_0603~DL55 BLM18AG601SN1D_0603~D12
U4
RT9818A-44GU3_SC70-3~D
U4
RT9818A-44GU3_SC70-3~D
VCC1
GND2
RESET#3
R1
62
93
3_
04
02
_5
%~
DR
16
29
33
_0
40
2_
5%
~D
12
R1134 1K_0402_1%~DR1134 1K_0402_1%~D1 2
R9
03
4.7
K_
04
02
_5
%~
DR
90
34
.7K
_0
40
2_
5%
~D
12
R9
02
4.7
K_
04
02
_5
%~
DR
90
24
.7K
_0
40
2_
5%
~D
12
C7
56
0.1
U_
04
02
_2
5V
6K
~D
C7
56
0.1
U_
04
02
_2
5V
6K
~D
1
2
L54 BLM18AG601SN1D_0603~DL54 BLM18AG601SN1D_0603~D12
C7
54
10
0P
_0
40
2_
50
V8
J~
D@
C7
54
10
0P
_0
40
2_
50
V8
J~
D@
1
2
R9
04
10
K_
04
02
_5
%~
DR
90
41
0K
_0
40
2_
5%
~D
12
C7
49
10
P_
04
02
_5
0V
8J~
DC
74
91
0P
_0
40
2_
50
V8
J~
D
1
2
JTP1
ACES_51522-00801-001CONN@
JTP1
ACES_51522-00801-001CONN@
11
22
33
44
55
66
77
88
G19
G210
C7
50
10
P_
04
02
_5
0V
8J~
DC
75
01
0P
_0
40
2_
50
V8
J~
D
1
2
R1623 0_0402_5%~D@R1623 0_0402_5%~D@1 2
R1133 1K_0402_1%~DR1133 1K_0402_1%~D1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SUS_ON_3.3V#
ALW_ENABLE
1.05V_RUN_ENABLESUS_ENABLE
RUN_ON_ENABLE#
+D
DR
_C
HG
+1.5
V_C
PU
_V
DD
Q_C
HG
1.5V_RUN_ENABLE
A_ENABLE
ALW_ON_3.3V#
+3.3
V_A
LW
PC
H_C
HG
+1.5
V_R
UN
_C
HG
+5V
_R
UN
_C
HG
+3.3
V_R
UN
_C
HG
RUN_ON_ENABLE#SUS_ON_3.3V#
+3.3
V_S
US
_C
HG
ALW_ON_3.3V#+
1.0
5V
_R
UN
_C
HG
A_ON_3.3V#
+3.3
V_M
_C
HG
A_ON_3.3V#
3.3V_RUN_ENABLE
5V_RUN_ENABLE
+1.05V_RUN_VTT +1.05V_RUN
+1.05V_M
+3.3V_ALW2
+3.3V_ALW2+3.3V_ALW +3.3V_ALW_PCH
+3.3V_ALW +3.3V_SUS
+3.3V_ALW2
+3.3V_ALW+3.3V_M
+3.3V_ALW2
+3.3V_SUS +1.5V_RUN +3.3V_RUN+5V_RUN+3.3V_ALW_PCH
+1.5V_MEM
+1.05V_M
+1.05V_RUN +0.75V_DDR_VTT+1.5V_CPU_VDDQ
+PWR_SRC_S
+PWR_SRC_S
+PWR_SRC_S
+PWR_SRC_S
+PWR_SRC_S
+3.3V_SUS
+3.3V_M
+1.05V_RUN
+1.5V_RUN
+PWR_SRC_S
+PWR_SRC_S
+5V_ALW
+3.3V_RUN+3.3V_ALW
+5V_RUN
RUN_ON<27,35,39,47,48>
RUN_ON_CPU1.5VS3#<7,11>
RUN_ON_ENABLE#<40>
SIO_SLP_S3#<11,16,27,35,39,47,48,49>
SIO_SLP_A#<16,39,48>
SIO_SLP_S5#<16,40>
PCH_ALW_ON<40,44>
SUS_ON<39>
SIO_SLP_S4#<16,39,46>
ALW_ON_3.3V#<20>
Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
POWER CONTROL
42 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
POWER CONTROL
42 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
POWER CONTROL
42 61Friday, March 02, 2012
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
DC/DC Interface
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
+1.5V_RUN Source
+1.05V_RUN Source
Discharge Circuit
For w/o vpro,+3.3V_M
change to +3.3V_SUS
+3.3V_M Source
+3.3V_SUS Source
+3.3V_ALW_PCH Source
+3.3V_RUN Source
+5V_RUN Source
For SSI
w/ vpro: PJP7 open and PJP8 open
w/o vpro: PJP7 open and PJP8 short.depop Q63
For PT
w/o vpro: PJP7 and PJP8 open.pop Q63*
R1619
1M
_0402_5%
~D
R1619
1M
_0402_5%
~D
12
C765
10U
_0603_6.3
V6M
~D
C765
10U
_0603_6.3
V6M
~D
1
2
G
D
S
Q64
SS
M3K
7002F
U_S
C70-3
~D
G
D
S
Q64
SS
M3K
7002F
U_S
C70-3
~D
2
13
C766
220P
_0402_25V
8J
C766
220P
_0402_25V
8J
1
2
R916
39_0603_5%
~D
R916
39_0603_5%
~D
12
S
G
D
Q54SI3456DDV-T1-GE3_TSOP6~D
S
G
D
Q54SI3456DDV-T1-GE3_TSOP6~D
3
6
245
1
G
D
S
Q68
SS
M3K
7002F
U_S
C70-3
~D
@
G
D
S
Q68
SS
M3K
7002F
U_S
C70-3
~D
@
2
13
Q63SI4164DY-T1-GE3_SO8~D
Q63SI4164DY-T1-GE3_SO8~D
365
78
2
4
1
G
D
S
Q70
SS
M3K
7002F
U_S
C70-3
~D
@
G
D
S
Q70
SS
M3K
7002F
U_S
C70-3
~D
@
2
13
Q53B
DM
N66D
0LD
W-7
_S
OT
363-6
~D
Q53B
DM
N66D
0LD
W-7
_S
OT
363-6
~D
3
5
4
Q52A
DM
N66D
0LD
W-7
_S
OT
363-6
~D
Q52A
DM
N66D
0LD
W-7
_S
OT
363-6
~D
61
2
R905
100K
_0402_5%
~D
R905
100K
_0402_5%
~D
12
Q55AO4478L_SO8Q55AO4478L_SO8
365
78
2
4
1
R739 0_0402_5%~D@R739 0_0402_5%~D@1 2
R913
20K
_0402_5%
~D
R913
20K
_0402_5%
~D
12
R922
1K
_0402_1%
~D
@R
922
1K
_0402_1%
~D
@12
G
D
S
Q62
SS
M3K
7002F
U_S
C70-3
~D
G
D
S
Q62
SS
M3K
7002F
U_S
C70-3
~D
2
13
G
D
S
Q56
SS
M3K
7002F
U_S
C70-3
~D
G
D
S
Q56
SS
M3K
7002F
U_S
C70-3
~D
2
13
Q61AO4478L_SO8Q61AO4478L_SO8
365
78
2
4
1
C770
220P
_0402_50V
8J~
DC
770
220P
_0402_50V
8J~
D
1
2
G
D
S
Q72
SS
M3K
7002F
U_S
C70-3
~D
G
D
S
Q72
SS
M3K
7002F
U_S
C70-3
~D
2
13
Q57A
DM
N66D
0LD
W-7
_S
OT
363-6
~D
Q57A
DM
N66D
0LD
W-7
_S
OT
363-6
~D
61
2
Q51B
DM
N66D
0LD
W-7
_S
OT
363-6
~D
Q51B
DM
N66D
0LD
W-7
_S
OT
363-6
~D
3
5
4 Q52B
DM
N66D
0LD
W-7
_S
OT
363-6
~D
Q52B
DM
N66D
0LD
W-7
_S
OT
363-6
~D
3
5
4
R908
20K
_0402_5%
~D
R908
20K
_0402_5%
~D
12
R735 0_0402_5%~D@R735 0_0402_5%~D@1 2
Q53A
DM
N66D
0LD
W-7
_S
OT
363-6
~D
Q53A
DM
N66D
0LD
W-7
_S
OT
363-6
~D
61
2
R907
100K
_0402_5%
~D
R907
100K
_0402_5%
~D
12
C764
10U
_0805_6.3
V6M
~D
C764
10U
_0805_6.3
V6M
~D
1
2
R917
470K
_0402_5%
~D
R917
470K
_0402_5%
~D
12
R911
470K
_0402_5%
~D
R911
470K
_0402_5%
~D
12 C
772
10U
_0603_6.3
V6M
~D
C772
10U
_0603_6.3
V6M
~D
1
2
R930
330K
_0402_5%
~D
R930
330K
_0402_5%
~D
12
R929
39_0603_5%
~D
@R929
39_0603_5%
~D
@
12
R910
20K
_0402_5%
~D
R910
20K
_0402_5%
~D
12
C762
3300P
_0402_50V
7K
~D
C762
3300P
_0402_50V
7K
~D
1
2
Q51A
DM
N66D
0LD
W-7
_S
OT
363-6
~D
Q51A
DM
N66D
0LD
W-7
_S
OT
363-6
~D
61
2
R927
22_0603_5%
~D
R927
22_0603_5%
~D
12
R1610
2.2
M_0402_5%
R1610
2.2
M_0402_5%
12
PJP8
PAD-OPEN 1x3m
@PJP8
PAD-OPEN 1x3m
@
1 2
R919
20K
_0402_5%
~D
@R
919
20K
_0402_5%
~D
@12
R1627
1M
_0402_5%
~D
@R1627
1M
_0402_5%
~D
@
12
R920
470K
_0402_5%
~D
R920
470K
_0402_5%
~D
12
G
D
S
Q66
SS
M3K
7002F
U_S
C70-3
~D
@
G
D
S
Q66
SS
M3K
7002F
U_S
C70-3
~D
@
2
13
Q59AO4304L_SO8
Q59AO4304L_SO8
62
4
1
35
78
R914
20K
_0402_5%
~D
R914
20K
_0402_5%
~D
12
R915
100K
_0402_5%
~D
R915
100K
_0402_5%
~D
12
R931
20K
_0402_5%
~D
R931
20K
_0402_5%
~D
12
R923
1K
_0402_1%
~D
@R
923
1K
_0402_1%
~D
@
12
G
D
S
Q67
SS
M3K
7002F
U_S
C70-3
~D
@
G
D
S
Q67
SS
M3K
7002F
U_S
C70-3
~D
@
2
13
R1611
1M
_0402_5%
~D
R1611
1M
_0402_5%
~D
12
S
G
D
Q58SI3456DDV-T1-GE3_TSOP6~D
S
G
D
Q58SI3456DDV-T1-GE3_TSOP6~D
3
6
245
1
R921
20K
_0402_5%
~D
R921
20K
_0402_5%
~D
12
C769
10U
_0603_6.3
V6M
~D
C769
10U
_0603_6.3
V6M
~D
1
2
R1617
4.7
M_0402_5%
~D
R1617
4.7
M_0402_5%
~D
12
G
D
S
Q65
SS
M3K
7002F
U_S
C70-3
~D
@
G
D
S
Q65
SS
M3K
7002F
U_S
C70-3
~D
@
2
13
C768
10U
_0603_6.3
V6M
~D
C768
10U
_0603_6.3
V6M
~D
1
2
R737 0_0402_5%~D@R737 0_0402_5%~D@1 2
R744 0_0402_5%~D@R744 0_0402_5%~D@1 2
R924
1K
_0402_1%
~D
@R
924
1K
_0402_1%
~D
@
12
C771
470P
_0402_50V
7K
~D
C771
470P
_0402_50V
7K
~D
1
2
R909
100K
_0402_5%
~D
R909
100K
_0402_5%
~D
12
C763
220P
_0402_25V
8J
C763
220P
_0402_25V
8J
1
2
R746 0_0402_5%~D@R746 0_0402_5%~D@1 2
R928
1K
_0402_1%
~D
@R
928
1K
_0402_1%
~D
@
12
G
D
S
Q60
SS
M3K
7002F
U_S
C70-3
~D
G
D
S
Q60
SS
M3K
7002F
U_S
C70-3
~D
2
13
C760
10U
_0603_6.3
V6M
~D
C760
10U
_0603_6.3
V6M
~D
1
2
R912
470K
_0402_5%
~D
R912
470K
_0402_5%
~D
12
R926
220_0402_5%
~D
R926
220_0402_5%
~D
12
R925
39_0402_5%
~D
@R
925
39_0402_5%
~D
@
12
G
D
S
Q69
SS
M3K
7002F
U_S
C70-3
~D
@
G
D
S
Q69
SS
M3K
7002F
U_S
C70-3
~D
@2
13
Q57B
DM
N66D
0LD
W-7
_S
OT
363-6
~D
Q57B
DM
N66D
0LD
W-7
_S
OT
363-6
~D
3
5
4
R745 0_0402_5%~D@R745 0_0402_5%~D@1 2
R1618
4.7
M_0402_5%
~D
R1618
4.7
M_0402_5%
~D
12
PJP7
PAD-OPEN 1x3m
@PJP7
PAD-OPEN 1x3m
@
1 2
R206 0_0603_5%~D@ R206 0_0603_5%~D@12
C773
100P
_0402_50V
8J~
DC
773
100P
_0402_50V
8J~
D
1
2
R918
100K
_0402_5%
~D
R918
100K
_0402_5%
~D
12
C761
10U
_0805_10V
4Z
~D
C761
10U
_0805_10V
4Z
~D
1
2
G
D
S
Q71
SS
M3K
7002F
U_S
C70-3
~D
G
D
S
Q71
SS
M3K
7002F
U_S
C70-3
~D
2
13
R906
470K
_0402_5%
~D
R906
470K
_0402_5%
~D
12
S
G
D
Q49SI3456DDV-T1-GE3_TSOP6~D
S
G
D
Q49SI3456DDV-T1-GE3_TSOP6~D
3
6
245
1
C767
220P
_0402_50V
8J~
DC
767
220P
_0402_50V
8J~
D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SATA_LED_MB
MASK_BASE_LEDS#
WLAN_LED
MASK_BASE_LEDS#
BATT_WHITE_LED
BATT_WHITE_MBBAT2_MB_LED#_Q
BATT_YELLOW_LED
BREATH_WHITE_LED_MBBREATH_LED#_Q
HDD_LED
MASK_BASE_LEDS#
BREATH_PWR_LED#_R
BAT1_MB_LED#_Q BATT_YELLOW_MB
MASK_BASE_LEDS#
MASK_BASE_LEDS#
BAT2_LED#_Q
BAT1_LED#_Q
BREATH_PWR_LED#
BREATH_PWR_LED#
BATT_YELLOW_LEDBATT_WHITE_LEDHDD_LED
WLAN_LED
POWER_SW#_MB
MASK_BASE_LEDS#
SYS_LED_MASK#
SYS_LED_MASK#
SYS_LED_MASK#
SYS_LED_MASK#
+5V_ALW
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW+5V_ALW
+5V_ALW
+5V_ALW
+5V_ALW
+3.3V_RUN
+3.3V_ALW +5V_ALW
+5V_ALW
+5V_ALW+3.3V_RUN
+3.3V_ALW
SATA_ACT#<14>
SYS_LED_MASK#<39>
LID_CL#<39>
LED_SATA_DIAG_OUT#<39>
MASK_SATA_LED#<39>
WIRELESS_LED#<34,39>
BT_ACTIVE<41>
BAT2_LED#<39>
BAT1_LED#<39>
BREATH_LED#<38,39>
VOL_MUTE<40>
VOL_UP<40>
MEDIA_DET#<18>
VOL_DOWN<40>
POWER_SW#_MB<40>
DMIC_CLK1<29>
DMIC1<29>
LID_CL#<39>
Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
PWR/LED Conn/PAD/ME
43 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
PWR/LED Conn/PAD/ME
43 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
PWR/LED Conn/PAD/ME
43 61Friday, March 02, 2012
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
WLAN LED solution for White LED
EMI CLIP
Fiducial Mark
SYS_LED_MASK# LID_CL#
Mask All LEDs (Sniffer Function)
Mask Base MB LEDs (Lid Closed)
0
1 0
X
LED Circuit Control Table
Do not Mask LEDs (Lid Opened) 11
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
HDD LED solution for White LEDBattery LED
Close to JLED1
Breath LED
LED BOARD
MEDIA BOARD
Close to JMED1
Link CIS
Link CIS
Note: LED current must be at least 2mA
Note: LED current must be at least 2mA
Note: LED current must be at least 2mA
U58TC7SH08FU_SSOP5~D
U58TC7SH08FU_SSOP5~D
B1
A2
G3
O4
P5
Q84BDMN66D0LDW-7_SOT363-6~D
Q84BDMN66D0LDW-7_SOT363-6~D
3
5
4
H11H_3P8@ H11H_3P8@
1
D62
RB751S40T1_SOD523-2~D
D62
RB751S40T1_SOD523-2~D
21
Q75PDTA114EU_SC70-3~D
Q75PDTA114EU_SC70-3~D
2
13
H19H_2P3@ H19H_2P3@
1
H9H_1P6X3P0N@ H9H_1P6X3P0N@
1
D23
PE
SD
24V
S2U
T_S
OT
23-3
~D
D23
PE
SD
24V
S2U
T_S
OT
23-3
~D
231
H3H_3P0@ H3H_3P0@
1
H12H_3P8@ H12H_3P8@
1
Q74BDMN66D0LDW-7_SOT363-6~D
Q74BDMN66D0LDW-7_SOT363-6~D
3
5
4
H14H_6P7N@ H14H_6P7N@
1
H6H_3P0@ H6H_3P0@
1
H17H_2P3@ H17H_2P3@
1
C778
0.1U_0402_25V6K~D
C778
0.1U_0402_25V6K~D
1 2
R932
10K
_0402_5%
~D
R932
10K
_0402_5%
~D
12
H2H_3P0@ H2H_3P0@
1
LED1LTW-110DC5-C_WHITE
LED1LTW-110DC5-C_WHITE
21
3
JLED1
ACES_51522-01001-001CONN@
JLED1
ACES_51522-01001-001CONN@
11
22
33
44
55
66
77
88
99
1010
GND11
GND12
D59
RB751S40T1_SOD523-2~D
D59
RB751S40T1_SOD523-2~D
21
LED3
LTW-110DC5-C_WHITE
LED3
LTW-110DC5-C_WHITE
2 1
3
SW2NTC033-XJ1J-X260CM_4P
@ SW2NTC033-XJ1J-X260CM_4P
@
1
2
3
4
H7H_3P3@ H7H_3P3@
1
Q79PDTA114EU_SC70-3~D
Q79PDTA114EU_SC70-3~D
21
3
CLIP1EMI_CLIP
@CLIP1EMI_CLIP
@
GND1
C1005
0.1
U_0402_25V
6K
~D
C1005
0.1
U_0402_25V
6K
~D
1
2
JMED1
ACES_51522-01201-001CONN@
JMED1
ACES_51522-01201-001CONN@
11
22
33
44
55
66
77
88
99
1010
1111
1212
GND13
GND14
R950
100K
_0402_5%
~D
R950
100K
_0402_5%
~D
12
R949 1.2K_0402_5%~DR949 1.2K_0402_5%~D1 2
H1H_2P8@ H1H_2P8@
1
H8H_3P3@ H8H_3P3@
1
H5H_3P0@ H5H_3P0@
1
R939 1.2K_0402_5%~DR939 1.2K_0402_5%~D1 2
C1003
0.1
U_0402_25V
6K
~D
C1003
0.1
U_0402_25V
6K
~D
1
2
R957 1.2K_0402_5%~DR957 1.2K_0402_5%~D1 2
R951 470_0402_5%~DR951 470_0402_5%~D1 2
Q78B
DM
N66D
0LD
W-7
_S
OT
363-6
~D
Q78B
DM
N66D
0LD
W-7
_S
OT
363-6
~D
3
5
4
Q74ADMN66D0LDW-7_SOT363-6~D
Q74ADMN66D0LDW-7_SOT363-6~D
61
2
R937
100K
_0402_5%
~D
R937
100K
_0402_5%
~D
12
C1002
0.1
U_0402_25V
6K
~D
C1002
0.1
U_0402_25V
6K
~D
1
2
R959 1.2K_0402_5%~DR959 1.2K_0402_5%~D1 2
R958 560_0402_5%~DR958 560_0402_5%~D1 2
FD3
FIDUCIAL MARK~D
@ FD3
FIDUCIAL MARK~D
@
1
R934 1.2K_0402_5%~DR934 1.2K_0402_5%~D1 2
Q84ADMN66D0LDW-7_SOT363-6~D
Q84ADMN66D0LDW-7_SOT363-6~D
61
2
C1004
0.1
U_0402_25V
6K
~D
C1004
0.1
U_0402_25V
6K
~D
1
2
R953 130_0402_5%~DR953 130_0402_5%~D1 2
Q83ADMN66D0LDW-7_SOT363-6~D
Q83ADMN66D0LDW-7_SOT363-6~D
61
2
R938 1.1K_0402_1%~DR938 1.1K_0402_1%~D1 2
H18H_3P3@ H18H_3P3@
1
Q80ADMN66D0LDW-7_SOT363-6~D
Q80ADMN66D0LDW-7_SOT363-6~D
61
2
White
Yellow
LED2LTW-326DSKS-5A_WHI-YEL
White
Yellow
LED2LTW-326DSKS-5A_WHI-YEL
2
13
Q83BDMN66D0LDW-7_SOT363-6~D
Q83BDMN66D0LDW-7_SOT363-6~D
3
5
4
FD4
FIDUCIAL MARK~D
@ FD4
FIDUCIAL MARK~D
@
1
FD1
FIDUCIAL MARK~D
@ FD1
FIDUCIAL MARK~D
@
1
H15H_2P2N@ H15H_2P2N@
1
Q78ADMN66D0LDW-7_SOT363-6~D
Q78ADMN66D0LDW-7_SOT363-6~D
61
2
H4H_3P0@ H4H_3P0@
1
Q125ADMN66D0LDW-7_SOT363-6~D
Q125ADMN66D0LDW-7_SOT363-6~D
61
2
H13H_3P8@ H13H_3P8@
1
FD2
FIDUCIAL MARK~D
@ FD2
FIDUCIAL MARK~D
@
1
Q125BDMN66D0LDW-7_SOT363-6~D
Q125BDMN66D0LDW-7_SOT363-6~D
3
5
4
Q81PDTA114EU_SC70-3~D
Q81PDTA114EU_SC70-3~D
2
13
H16H_2P3@ H16H_2P3@
1
H10H_3P8@ H10H_3P8@
1
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Z4304
Z4306Z4305
Z4012
VSB_N_002
VS
B_N
_003
VSB_N_001
NB_PSID_TS5A63157
+DC_IN
PBATT+_C
NB_PSID
+DCIN_JACK
-DCIN_JACK
+COINCELL
+3.3V_ALW
+5V_ALW
+DC_IN_SS
PBATT+
GND
+3.3V_ALW
+DC_IN
+5V_ALW
+COINCELL
+RTC_CELL
+3.3V_RTC_LDO
+PWR_SRC +PWR_SRC_S
DOCK_SMB_ALERT# <38,39>
SLICE_BAT_PRES#<38,39,53>
PSID_DISABLE# <39>
DOCK_PSID<38>
PS_ID <40>
SOFT_START_GC <53>
PBAT_SMBDAT <40>PBAT_SMBCLK <40>
PBAT_PRES# <39>
GPIO_PSID_SELECT <39>
PCH_ALW_ON<40,42>
Title
Size Document Number Rev
Date: Sheet of
LA-7902P 1.0
+DCIN
44 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7902P 1.0
+DCIN
44 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7902P 1.0
+DCIN
44 61Friday, March 02, 2012
Compal Electronics, Inc.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
ESD Diodes
Primary Battery Connector
DC_IN+ Source
COIN RTC Battery
Move to power schematic
DELL CONFIDENTIAL/PROPRIETARY
8/18 change from 7 pin to 5 pin
PC
80.1
U_0402_25V
6P
C8
0.1
U_0402_25V
6
12
PC
11
0.1
U_0402_25V
6P
C11
0.1
U_0402_25V
6 12
PR9100_0402_5%
PR9100_0402_5%
1 2
PJPDC1PS_HPW15003-05M101R
CONN@
PJPDC1PS_HPW15003-05M101R
CONN@
11
33
44
55
22
PR11
0_0402_5%
@PR11
0_0402_5%
@
1 2
E
B
C
PQ3MMST3904-7-F_SOT323~D
E
B
C
PQ3MMST3904-7-F_SOT323~D
2
31
PL6FBMJ4516HS720NT_2P~D
PL6FBMJ4516HS720NT_2P~D
1 2
PC
40.1
U_0402_25V
6P
C4
0.1
U_0402_25V
6 12
PR8100_0402_5%
PR8100_0402_5%
1 2
PC
17
.1U
_0402_16V
7K
PC
17
.1U
_0402_16V
7K1
2
PD8
SCH DIO DB2J31400L SOD323-2
PD8
SCH DIO DB2J31400L SOD323-2
1 2
PL4BLM18BD102SN1D_0603~D
PL4BLM18BD102SN1D_0603~D
12
PR2022K_0402_1%
PR2022K_0402_1%
1 2
PC52200P_0402_25V7KPC52200P_0402_25V7K
12
PR17
10K_0402_5%@
PR17
10K_0402_5%@
1 2
PR
21
1M
_0402_5%
~D
PR
21
1M
_0402_5%
~D
12
PR
16
15K
_0402_1%
~D
PR
16
15K
_0402_1%
~D
12
G
D
S
PQ6SSM3K7002FU_SC70-3G
D
S
PQ6SSM3K7002FU_SC70-3
2
13
G
D S
PQ2FDV301N_G_NL_SOT23-3~DG
D S
PQ2FDV301N_G_NL_SOT23-3~D2
1 3
PR1333_0402_5%~D
PR1333_0402_5%~D
1 2
PC
16
0.1
U_0402_25V
6@
PC
16
0.1
U_0402_25V
6@
12
PR
12
2.2
K_0402_1%
PR
12
2.2
K_0402_1%
12
PC
18
0.1
U_0402_25V
6P
C18
0.1
U_0402_25V
6 12
PQ4TP0610K-T1-E3_SOT23-3
PQ4TP0610K-T1-E3_SOT23-3
2
13
PC
10
0.0
22U
_0603_50V
7K
PC
10
0.0
22U
_0603_50V
7K
12
PQ5FDS6679AZ_G_SO8~D
PQ5FDS6679AZ_G_SO8~D
S1
S2
S3
G4
D8
D7
D6
D5
PC
13
0.1
U_0402_25V
6P
C13
0.1
U_0402_25V
6 12
PD4
RB715FGT106_UMD3
PD4
RB715FGT106_UMD3
231
PC31U_0603_10V6KPC31U_0603_10V6K
12
PC
90.2
2U
_0603_25V
7K
PC
90.2
2U
_0603_25V
7K
12
PR250_0402_5%
@
PR250_0402_5%
@
1 2
PR
22
100K
_0402_5%
PR
22
100K
_0402_5% 1
2
PR
15
10K
_0402_1%
PR
15
10K
_0402_1%1
2
2
1 3
PQ1
FDN338P_G_NL_SOT23-3~D
2
1 3
PQ1
FDN338P_G_NL_SOT23-3~D
2
1 3
PR
24
4.7
K_0805_5%
~D
@P
R24
4.7
K_0805_5%
~D
@
12
PR
14
100K
_0402_1%
PR
14
100K
_0402_1%
12
PR100_0402_5%
@
PR100_0402_5%
@
1 2
PC
14
0.1
U_0402_25V
6P
C14
0.1
U_0402_25V
6 12
PL3FBMJ4516HS720NT_2P~D
PL3FBMJ4516HS720NT_2P~D
1 2
PC
12
0.1
U_0402_25V
6P
C12
0.1
U_0402_25V
6 12
PR7100_0402_5%
PR7100_0402_5%
1 2
PU1
TS5A63157DCKR_SC70-6~D
PU1
TS5A63157DCKR_SC70-6~D
V+5
NC3
COM4
GND2
IN6
NO1
PR23
10K_0402_5%
PR23
10K_0402_5%
1 2
PR
26
1M
_0402_5%
~D
PR
26
1M
_0402_5%
~D
12
PR
19
100K
_0402_1%
PR
19
100K
_0402_1%1
2
JRTC1
ACES_50273-0020N-001CONN@
JRTC1
ACES_50273-0020N-001CONN@
11
22
G13
G24
PR
6100K
_0402_5%
PR
6100K
_0402_5%
12
PD5
PESD24VS2UT_SOT23-3~D
PD5
PESD24VS2UT_SOT23-3~D
2 31
PL2FBMJ4516HS720NT_2P~D
PL2FBMJ4516HS720NT_2P~D
1 2
PBATT1
SUYIN_200045MR009G188ZLCONN@
PBATT1
SUYIN_200045MR009G188ZLCONN@
11
33
44
55
66
77
22
88
99
G110
G211
PC6
1500P_0402_7K~D
PC6
1500P_0402_7K~D
12
PR11K_0402_5%PR11K_0402_5%
12
PL5FBMJ4516HS720NT_2P~D
PL5FBMJ4516HS720NT_2P~D
1 2
PD6
PESD24VS2UT_SOT23-3~D
PD6
PESD24VS2UT_SOT23-3~D
2 31
PC
15
10U
_0805_25V
6K
PC
15
10U
_0805_25V
6K
12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
BST_5V
ENTRIP2
LX_5V
BST1_5VBST1_3V
UG_5V
BST_3V
ENTRIP1
FB_3V
LG_5V
SN
UB
_3
V
SN
UB
_5
V
LG_3V
UG_3V
LX_3V
FB_5V
EN
TR
IP1
EN
TR
IP2
+DC1_PWR_SRC
+5V_ALWP
+5V_ALW2
+3.3V_ALWP
+DC1_PWR_SRC
+DC1_PWR_SRC
2VREF_6182
+PWR_SRC
+3.3V_ALW2
2VREF_6182
+5V_ALWP
+3.3V_ALW
+5V_ALW
+3.3V_ALWP
+3.3V_RTC_LDO
+3.3V_ALW
+5V_ALW2
+PWR_SRC
ALW_PWRGD_3V_5V <40>
ALWON<40>
THERM_STP#<22>
Title
Size Document Number Rev
Date: Sheet of
LA-7902P 1.0
+5V_ALW/3.3V_ALW
45 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7902P 1.0
+5V_ALW/3.3V_ALW
45 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7902P 1.0
+5V_ALW/3.3V_ALW
45 61Friday, March 02, 2012
Compal Electronics, Inc.
(5A,180mils ,Via NO.= 9)
(4A,120mils ,Via NO.= 6)
3.3VALWPTDC 5.185APeak Current 7.407AOCP current 9.629A
5VALWPTDC 4.415APeak Current 6.308AOCP current 8.2A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DELL CONFIDENTIAL/PROPRIETARY
PC1160.1U_0402_25V6PC1160.1U_0402_25V6
12
PR108
2.2_0603_5%
PR108
2.2_0603_5%
1 2
+
PC
11
11
50
U_
B2
_6
.3V
M_
R3
5M
+
PC
11
11
50
U_
B2
_6
.3V
M_
R3
5M
1
2
PQ102FDMC8878_POWER33-8-5PQ102FDMC8878_POWER33-8-5
35
2
4
1
PQ103FDMC7692S_POWER33-8-5
PQ103FDMC7692S_POWER33-8-5
35
2
4
1
PC
11
36
80
P_
04
02
_5
0V
7K
PC
11
36
80
P_
04
02
_5
0V
7K
12
PC
11
91
0U
_0
80
5_
25
V6
K
@
PC
11
91
0U
_0
80
5_
25
V6
K
@
12
PC
11
71
U_
06
03
_1
0V
6K
@
PC
11
71
U_
06
03
_1
0V
6K
@
12
PC
11
26
80
P_
04
02
_5
0V
7K
PC
11
26
80
P_
04
02
_5
0V
7K
12
PQ101FDMC8884_POWER33-8-5PQ101FDMC8884_POWER33-8-5
35
2
4
1
PC
11
81
0U
_0
80
5_
25
V6
K
@
PC
11
81
0U
_0
80
5_
25
V6
K
@
12
PC1011U_0603_16V6K
PC1011U_0603_16V6K
12
PR1152K_0402_1%
PR1152K_0402_1%
1 2
PC
10
40
.1U
_0
40
2_
25
V6
PC
10
40
.1U
_0
40
2_
25
V6
12
PR112100K_0402_1%
PR112100K_0402_1%
12
PQ
10
4A
2N
70
02
DW
-T/R
7_
SO
T3
63
-6~
D
PQ
10
4A
2N
70
02
DW
-T/R
7_
SO
T3
63
-6~
D
61
2
PR116
0_0402_5%@
PR116
0_0402_5%@
1 2
PC1090.22U_0402_16V7K~D
PC1090.22U_0402_16V7K~D
1 2
PC
10
00
.1U
_0
40
2_
25
V6
PC
10
00
.1U
_0
40
2_
25
V6
12
PQ
10
4B
2N
70
02
DW
-T/R
7_
SO
T3
63
-6~
D
PQ
10
4B
2N
70
02
DW
-T/R
7_
SO
T3
63
-6~
D
3
5
4
PD100
RLZ5.1B_LL34@
PD100
RLZ5.1B_LL34@
1 2
PC
10
52
20
0P
_0
40
2_
25
V7
KP
C1
05
22
00
P_
04
02
_2
5V
7K
12
PR10320K_0402_1%
PR10320K_0402_1%
1 2
PR
11
04
.7_
12
06
_5
%P
R1
10
4.7
_1
20
6_
5%
12
PJP102
PAD-OPEN 1x3m
PJP102
PAD-OPEN 1x3m
1 2
PC1144.7U_0805_10V6KPC1144.7U_0805_10V6K
12
PR10113.7K_0402_1%
PR10113.7K_0402_1%
1 2
PR10693.1K_0402_1%~DPR10693.1K_0402_1%~D
1 2
PC
11
51
U_
06
03
_1
0V
6K
PC
11
51
U_
06
03
_1
0V
6K
12
PQ100FDMC8884_POWER33-8-5
PQ100FDMC8884_POWER33-8-5
35
2
4
1
PL1014.7UH_FDSD0630-H-4R7M-P3_5.5A_20%PL1014.7UH_FDSD0630-H-4R7M-P3_5.5A_20%
1 2
PC
10
22
20
0P
_0
40
2_
25
V7
KP
C1
02
22
00
P_
04
02
_2
5V
7K
12
PJP100
PAD-OPEN 1x3m@
PJP100
PAD-OPEN 1x3m@
1 2
+
PC
11
01
50
U_
B2
_6
.3V
M_
R3
5M
+
PC
11
01
50
U_
B2
_6
.3V
M_
R3
5M
1
2
PR
11
13
00
K_
04
02
_1
%
@
PR
11
13
00
K_
04
02
_1
%
@
12
PC
10
31
0U
_0
80
5_
25
V6
KP
C1
03
10
U_
08
05
_2
5V
6K
12
PR107
2.2_0603_5%
PR107
2.2_0603_5%
1 2
PR114
100K_0402_1%
PR114
100K_0402_1%
1 2
PR10230.9K_0402_1%PR10230.9K_0402_1%
1 2
PC121
22P_0402_50V8J~D
@ PC121
22P_0402_50V8J~D
@
12
PJP103
PAD-OPEN 1x3m
PJP103
PAD-OPEN 1x3m
1 2
PQ105PDTC115EU_SOT323-3
PQ105PDTC115EU_SOT323-3
2
13
PR
10
94
.7_
12
06
_5
%P
R1
09
4.7
_1
20
6_
5%
12
PR10420K_0402_1%PR10420K_0402_1%
1 2
PC10710U_0603_6.3V6M
PC10710U_0603_6.3V6M
12
PL1001UH_PCMB053T-1R0MS_7A_20%
PL1001UH_PCMB053T-1R0MS_7A_20%
12
PC120
22P_0402_50V8J~D
@ PC120
22P_0402_50V8J~D
@
12
PR100
0_0402_5%@
PR100
0_0402_5%@
1 2
PC
10
61
0U
_0
80
5_
25
V6
KP
C1
06
10
U_
08
05
_2
5V
6K
12
PR113499K_0402_1%@
PR113499K_0402_1%@
12
PL1034.7UH_FDSD0630-H-4R7M-P3_5.5A_20%
PL1034.7UH_FDSD0630-H-4R7M-P3_5.5A_20%
1 2
PU100
RT8205LZQW(2) WQFN 24P PWM
PU100
RT8205LZQW(2) WQFN 24P PWM
FB
12
RE
F3
VO124
EN
TR
IP1
1
TO
NS
EL
4
FB
25
SK
IPS
EL
14
NC
18
VR
EG
51
7
VO27
VREG38
VIN
16
GN
D1
5
UGATE121
BOOT122
EN
TR
IP2
6
PGOOD23
PHASE120
LGATE119
EN
13
BOOT29
UGATE210
PHASE211
LGATE212
P PAD25
PR105130K_0402_1%
PR105130K_0402_1%
1 2
PJP101
PAD-OPEN 1x3m
PJP101
PAD-OPEN 1x3m
1 2
PC1080.22U_0402_16V7K~D
PC1080.22U_0402_16V7K~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DH_1.5V
SW_1.5V
CS_1.5V
1.5V_SUS_PWRGD
DL_1.5V
1.5V_B+
VDD_1.5V
VLDOIN_1.5V
VDDQ_1.5V
S5_1.5V
SN
UB
_1.5
V
BOOT_1.5V
1.5V_B+
1.5V_FB
+1.5V_MEN_P
+V_DDR_REF
+1.5V_MEN_P +1.5V_MEM +0.75V_DDR_VTT+0.75V_P
+PWR_SRC
+5V_ALW
+5V_ALW
+1.5V_MEN_P
+0.75V_P
+3.3V_ALW
+1.5V_MEN_P
+1.5V_MEN_P
+V_DDR_REF
1.5V_SUS_PWRGD<40>
DDR_ON<40>
0.75V_DDR_VTT_ON<39>
SIO_SLP_S4#<16,39,42>
Title
Size Document Number Rev
Date: Sheet of
LA-7902P 1.0
+1.5V_MEN/+0.75V_DDR_VTT
46 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7902P 1.0
+1.5V_MEN/+0.75V_DDR_VTT
46 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7902P 1.0
+1.5V_MEN/+0.75V_DDR_VTT
46 61Friday, March 02, 2012
Compal Electronics, Inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DELL CONFIDENTIAL/PROPRIETARY
0.75Volt +/- 5%
TDC 0.525A
Peak Current 0.75A
OCP Current 0.9A
1.5Volt +/- 5%
TDC 9.74A
Peak Current 13.915A
OCP current 16.698A
Mode Level +0.75V_P +V_DDR_REF
S5 L off off
S3 L off on
S0 H on on
Note: S3 - sleep ; S5 - power off
PR2370_0402_5%
@PR237
0_0402_5%
@
1 2
PR2034.7_1206_5%PR2034.7_1206_5%
12
[email protected]_0402_16V7K@
12
PR238
0_0402_5%
PR238
0_0402_5%
12
PC2812200P_0402_25V7KPC2812200P_0402_25V7K
12
PJP201
JUMP_1x3m@
PJP201
JUMP_1x3m@
1 122
PC
278
0.2
2U
_0402_16V
7K
~D
PC
278
0.2
2U
_0402_16V
7K
~D
12
PR2051M_0402_1%~D
PR2051M_0402_1%~D
1 2
PC
280
10U
_0603_6.3
V6M
PC
280
10U
_0603_6.3
V6M
12 P
C263
10U
_0603_6.3
V6M
PC
263
10U
_0603_6.3
V6M
12
PC2770.033U_0402_16V7~DPC2770.033U_0402_16V7~D
PR2060_0402_5%
@PR206
0_0402_5%
@
1 2
PJP204
PAD-OPEN1x1m@
PJP204
PAD-OPEN1x1m@
12
PU200
RT8207MZQW_WQFN20_3X3
PU200
RT8207MZQW_WQFN20_3X3
VTTSNS 2
FB
6
S5
8
PG
OO
D10
VDDP12
PH
AS
E16
BO
OT
18
VTTREF 4
PGND14
VTTGND 1
GND 3
VDDQ 5
S3
7
TO
N9
VDD11
CS13
LGATE15 UG
AT
E17
VT
T20
VLD
OIN
19
PAD 21
PC
279
0.1
U_0402_25V
6P
C279
0.1
U_0402_25V
6
12
[email protected]_0402_16V7K@
12
PR204100K_0402_1%
PR204100K_0402_1%
12
PJP200
PAD-OPEN 1x2m~D@
PJP200
PAD-OPEN 1x2m~D@
2 1
PC2721U_0603_10V6KPC2721U_0603_10V6K
1 2
PR200
2.2_0603_5%
PR200
2.2_0603_5%
1 2
PC
276
4.7
U_0805_25V
6K
~D
PC
276
4.7
U_0805_25V
6K
~D
12
+ PC65330U_2.5V_M
+ PC65330U_2.5V_M
1
2
PR232
0_0402_5%@
PR232
0_0402_5%@
1 2
PQ200FDMC8884_POWER33-8-5
PQ200FDMC8884_POWER33-8-5
35
2
4
1
PC
274
4.7
U_0805_25V
6K
~D
PC
274
4.7
U_0805_25V
6K
~D
12
PJP203
PAD-OPEN1x1m@
PJP203
PAD-OPEN1x1m@
12
PC2531U_0603_10V6KPC2531U_0603_10V6K
12
PR20122.6K_0402_1%
PR20122.6K_0402_1%
1 2
PR2025.1_0603_5%~D
PR2025.1_0603_5%~D
1 2
PR236
0_0402_5%@
PR236
0_0402_5%@
1 2
PC21522P_0402_50V8J~D
@ PC21522P_0402_50V8J~D
@
12
PL2001UH_FDSD0630-H-1R0M_11A_20%
PL2001UH_FDSD0630-H-1R0M_11A_20%
1 2
PC275680P_0402_50V7KPC275680P_0402_50V7K
12
PQ210FDMC7692S_POWER33-8-5PQ210FDMC7692S_POWER33-8-5
35
24
1
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
SN
UB
_1
.8V
SPEN_1.8VSP
1.8VSP_VIN
1.8VSP_FB
1.8VSP_LX+1.8V_RUNP
+1.8V_RUNP +1.8V_RUN
+3.3V_ALW
+3.3V_RUN
1.8V_RUN_PWRGD <39>
RUN_ON<27,35,39,42,48>
SIO_SLP_S3#<11,16,27,35,39,42,48,49>
Title
Size Document Number Rev
Date: Sheet of
LA-7902P 1.0
+1.8V_RUN
47 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7902P 1.0
+1.8V_RUN
47 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7902P 1.0
+1.8V_RUN
47 61Friday, March 02, 2012
Compal Electronics, Inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DELL CONFIDENTIAL/PROPRIETARY
<Vo=1.8V> VFB=0.6V
Vo=VFB*(1+PR64/PR67)=0.6*(1+20K/10K)=1.8V
1.8Volt +/-5%
TDC 0.85A
Peak Current 1.215A
OCP current 1.458A
PC3070.1U_0402_25V6PC3070.1U_0402_25V6
12
PC30022U_0805_6.3VAMPC30022U_0805_6.3VAM
12
PU300
SYN470DBC_DFN10_3X3
PU300
SYN470DBC_DFN10_3X3
EN5
PG
4
LX3
FB6
SVIN8
TP
11
LX2
PVIN10
NC
7
PVIN9
NC
1
PC
30
32
2U
_0
80
5_
6.3
VA
MP
C3
03
22
U_
08
05
_6
.3V
AM
12
PR30447K_0402_5%
@PR30447K_0402_5%
@
12
PR303
0_0402_5%
@PR303
0_0402_5%
@
1 2
PL3011UH +-30% NRS4018T1R0NDGJ 3.2A
PL3011UH +-30% NRS4018T1R0NDGJ 3.2A
1 2
PR30510K_0402_1%
PR30510K_0402_1%
12
PC
30
12
2P
_0
40
2_
50
V8
JP
C3
01
22
P_
04
02
_5
0V
8J
12
PR30220K_0402_1%
PR30220K_0402_1%
12
PC
30
4.1
U_
04
02
_1
6V
7K
@
PC
30
4.1
U_
04
02
_1
6V
7K
@
12
PC
30
64
7P
_0
40
2_
50
V8
JP
C3
06
47
P_
04
02
_5
0V
8J
12
PC
30
56
80
P_
04
02
_5
0V
7K
@
PC
30
56
80
P_
04
02
_5
0V
7K
@
12
PR300
10K_0402_5%
PR300
10K_0402_5%
12
PR
30
14
.7_
06
03
_5
%
@
PR
30
14
.7_
06
03
_5
%
@
12
PJP301
PAD-OPEN 1x2m~D@
PJP301
PAD-OPEN 1x2m~D@
2 1
PJP300
PAD-OPEN 1x2m~D@
PJP300
PAD-OPEN 1x2m~D@
2 1
PR306
0_0402_5% @
PR306
0_0402_5% @
1 2
PC
30
22
2U
_0
80
5_
6.3
VA
MP
C3
02
22
U_
08
05
_6
.3V
AM
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BST_+V1.05SP
SW_+V1.05SP
UG_+V1.05SP
LG_+V1.05SP
TRIP_+V1.05SP
EN_+V1.05SP
FB_+V1.05SP
RF_+V1.05SP
+V1.05SP_B++PWR_SRC
+5V_ALW
+1.05V_MP
+1.05V_MP +1.05V_M
+3.3V_ALW
1.05V_A_PWRGD<40>
SIO_SLP_A#<16,39,42>
RUN_ON<27,35,39,42,47>
SIO_SLP_S3#<11,16,27,35,39,42,47,49>
Title
Size Document Number Rev
Date: Sheet of
LA-7902P 1.0
+1.05V_M
48 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7902P 1.0
+1.05V_M
48 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7902P 1.0
+1.05V_M
48 61Friday, March 02, 2012
Compal Electronics, Inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DELL CONFIDENTIAL/PROPRIETARY
With vPro：：：：pop PR403
Without vPro：：：：pop PR408
S0 mode be high level
+1.05Volt +/- 5%
TDC 4.7A
Peak Current 6.5A
OCP current 7.8A
5@ for TM pop
6@ for vPOR pop
PC4040.1U_0402_25V6PC4040.1U_0402_25V6
1 2
PL4001UH_FDSD0630-H-1R0M_11A_20%
PL4001UH_FDSD0630-H-1R0M_11A_20%
1 2
PC
40
22
20
0P
_0
40
2_
25
V7
KP
C4
02
22
00
P_
04
02
_2
5V
7K
12
PJP400
PAD-OPEN 1x2m~D@
PJP400
PAD-OPEN 1x2m~D@
2 1
PQ400FDMC8884_POWER33-8-5PQ400FDMC8884_POWER33-8-5
35
2
4
1
PC
40
10
.1U
_0
40
2_
25
V6
PC
40
10
.1U
_0
40
2_
25
V6
12 P
C4
03
4.7
U_
08
05
_2
5V
6K
~D
PC
40
34
.7U
_0
80
5_
25
V6
K~
D
12
PR4064.99K_0402_1%PR4064.99K_0402_1%
12
PR40282K_0402_1%
PR40282K_0402_1%
1 2
PR409 0_0402_5%@
PR409 0_0402_5%@
1 2
PR4012.2_0603_5%
PR4012.2_0603_5%
1 2
PR408 0_0402_5%@
PR408 0_0402_5%@
1 2
PC
40
04
.7U
_0
80
5_
25
V6
K~
DP
C4
00
4.7
U_
08
05
_2
5V
6K
~D
12
PC407.1U_0402_16V7K@
PC407.1U_0402_16V7K@
12
+ PC406220U_B2_2.5VM_R15M
+ PC406220U_B2_2.5VM_R15M
1
2
PR4044.7_1206_5%PR4044.7_1206_5%
12
PJP401PAD-OPEN 1x2m~D@PJP401PAD-OPEN 1x2m~D@
2 1
PR405470K_0402_1%PR405470K_0402_1%
12
PR
40
01
00
K_
04
02
_1
%P
R4
00
10
0K
_0
40
2_
1%
12
PU400
TPS51212DSCR_SON10_3X3
PU400
TPS51212DSCR_SON10_3X3
EN3
TRIP2
V5IN7
DRVH9
SW8
DRVL6
VBST10
RF5
VFB4
PGOOD1
TP11
PQ
40
5F
DM
C8
87
8_
PO
WE
R3
3-8
-5P
Q4
05
FD
MC
88
78
_P
OW
ER
33
-8-5
35
2
4
1
PR40710K_0402_1%PR40710K_0402_1%
12
PC408680P_0402_50V7KPC408680P_0402_50V7K
12
PR403
0_0402_5%@
PR403
0_0402_5%@
1 2
PC4051U_0402_6.3V6KPC4051U_0402_6.3V6K
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VSSIO_SENSE_R_FB
BST_+V1.05S_VCCPP
SW_+V1.05S_VCCPP
UG_+V1.05S_VCCPP
LG_+V1.05S_VCCPP
TRIP_+V1.05S_VCCPP
EN_+V1.05S_VCCPP
FB_+V1.05S_VCCPP
RF_+V1.05S_VCCPP
+V1.05S_VCCPP_B+
VTT_SENSE_FB
+PWR_SRC
+5V_ALW
+1.05VTTP
+3.3V_RUN
+3.3V_RUN
+1.05VTTP +1.05V_RUN_VTT
VCCP_PWRCTRL <11>
VTT_SENSE <10>
VSSIO_SENSE_R <10>
CPU_VTT_ON<39>
1.05V_VTTPWRGD<40,50>
SIO_SLP_S3#<11,16,27,35,39,42,47,48>
Title
Size Document Number Rev
Date: Sheet of
LA-7902P 1.0
+1.05V_RUN_VTT
49 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7902P 1.0
+1.05V_RUN_VTT
49 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7902P 1.0
+1.05V_RUN_VTT
49 61Friday, March 02, 2012
Compal Electronics, Inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
From GPIO
VCCP_PWRCTRL = "High" , Vo = 1.05V (SNB)
VCCP_PWRCTRL = "Low" , Vo = 1V (IVB)
Local sense put on HW site
+1.05Volt +/- 5%
TDC 6A
Peak Current 8.5A
OCP current 10.2A
DELL CONFIDENTIAL/PROPRIETARY
PR51110K_0402_5%@PR51110K_0402_5%@
12
PJP501
PAD-OPEN 1x2m~D@
PJP501
PAD-OPEN 1x2m~D@
2 1
PC
50
10
.1U
_0
40
2_
25
V6
PC
50
10
.1U
_0
40
2_
25
V6
12
PC
50
34
.7U
_0
80
5_
25
V6
K~
DP
C5
03
4.7
U_
08
05
_2
5V
6K
~D
12
PR50971.5K_0402_1%
@ PR50971.5K_0402_1%
@
12
PR5022.2_0603_5%
PR5022.2_0603_5%
1 2
PU500
TPS51212DSCR_SON10_3X3
PU500
TPS51212DSCR_SON10_3X3
EN3
TRIP2
V5IN7
DRVH9
SW8
DRVL6
VBST10
RF5
VFB4
PGOOD1
TP11
PC506.1U_0402_16V7K@
PC506.1U_0402_16V7K@
12
PR503
0_0402_5%
@PR503
0_0402_5%
@
1 2
PC
50
04
.7U
_0
80
5_
25
V6
K~
DP
C5
00
4.7
U_
08
05
_2
5V
6K
~D
12
PR505
470K_0402_1%
PR505
470K_0402_1%
12
PC508680P_0402_50V7KPC508680P_0402_50V7K
12
PR51410_0402_1%@PR51410_0402_1%@
12
PJP500
PAD-OPEN 1x2m~D@
PJP500
PAD-OPEN 1x2m~D@
2 1
PC
50
22
20
0P
_0
40
2_
25
V7
KP
C5
02
22
00
P_
04
02
_2
5V
7K
12
PJP502
PAD-OPEN 1x2m~D@
PJP502
PAD-OPEN 1x2m~D@
2 1
PC5051U_0603_6.3V6MPC5051U_0603_6.3V6M
12 PR504
4.7_1206_5%PR5044.7_1206_5%
12
+ PC511220U_B2_2.5VM_R15M
+ PC511220U_B2_2.5VM_R15M
1
2
PR500
100K_0402_5%
PR500
100K_0402_5%
12
G
D
S
PQ
50
2S
SM
3K
70
02
FU
_S
C7
0-3
@
G
D
S
PQ
50
2S
SM
3K
70
02
FU
_S
C7
0-3
@
2
13
PR50184.5K_0402_1%
PR50184.5K_0402_1%
1 2
[email protected]_0402_16V7K@
12
PC5040.1U_0402_25V6
PC5040.1U_0402_25V6
1 2
PQ501FDMC7692S_POWER33-8-5
PQ501FDMC7692S_POWER33-8-5
35
2
4
1
PR5130_0402_5%
@
PR5130_0402_5%
@
1 2
PL5001UH_FDSD0630-H-1R0M_11A_20%
PL5001UH_FDSD0630-H-1R0M_11A_20%
1 2
PR307
0_0402_5%
@ PR307
0_0402_5%
@1 2
PQ500FDMC8884_POWER33-8-5PQ500FDMC8884_POWER33-8-5
35
2
4
1
PR5074.99K_0402_1%PR5074.99K_0402_1%
12
PC510.1U_0402_16V7K
@
PC510.1U_0402_16V7K
@
12
PR510
10K_0402_1%
PR510
10K_0402_1%
12
PR5080_0402_5%
@
PR5080_0402_5%
@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VCCSA_BT_1
+V
CC
SA
_P
WR
GD
+VCCSA_PWR_SRC
+VCCSA_BT
+VCCSA_PHASE
+VCCSA_EN
+V
CC
SA
_P
WR
GD
+VCCSA_PWR_SRC
+VCCSA_P
+3.3V_ALW
+VCCSA_P
+VCC_SA
GNDA_VCCSA
GNDA_VCCSA
+5V_ALW
+3.3V_RUN
VCCSAPWROK<40>
VCCSA_VID_1 <11>
VCCSA_VID_0 <11>
1.05V_VTTPWRGD <40,49>
VCCSA_SENSE <11>
Title
Size Document Number Rev
Date: Sheet of
LA-7902P 1.0
+VCC_SA
50 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7902P 1.0
+VCC_SA
50 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7902P 1.0
+VCC_SA
50 61Friday, March 02, 2012
Compal Electronics, Inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DELL CONFIDENTIAL/PROPRIETARY
output voltage adjustable network
VID [0] VID[1] VCCSA Vout
0 0 0.9V
0 1 0.8V
1 0 0.725V
1 1 0.675V
VCCSATDC 4.2APeak Current 6AOCP current 7.2A
The 1k PD on the VCCSA VIDs are empty.These should be stuffed to ensure thatVCCSA VID is 00 prior to VCCIO stability.
PC
74
1U
_0603_10V
6K
PC
74
1U
_0603_10V
6K
12
PR880_0402_5%
@
PR880_0402_5%
@
1 2
PR87100_0402_5%
PR87100_0402_5%
12
PU7
TPS51461RGER_QFN24_4X4~D
PU7
TPS51461RGER_QFN24_4X4~D
V5D
RV
18
PGND20
SW11
EN
13
SW9
VIN24
VO
UT
5
PG
OO
D16
CO
MP
3
VID
014
MO
DE
6
SW10
SLE
W4
PGND21
PGND19
SW8
GN
D1
VIN23
VIN22
VR
EF
2
VID
115
V5F
ILT
17
SW7
BST12
TP25
PC8910U_0805_25V6KPC8910U_0805_25V6K
12
PR910_0402_5%
@
PR910_0402_5%
@
1 2
PR842.2_0603_1%PR842.2_0603_1%
1 2
PC913300P_0402_50V7K
PC913300P_0402_50V7K
12
PC
85
22U
_0805_6.3
V6M
PC
85
22U
_0805_6.3
V6M
12
PC77680P_0402_50V7K@PC77680P_0402_50V7K@
12
PC
92
0.0
1U
_0402_25V
7K
PC
92
0.0
1U
_0402_25V
7K
12
PC752.2U_0603_10V7K
PC752.2U_0603_10V7K
1 2
PJP19
PAD-OPEN 1x2m~D@
PJP19
PAD-OPEN 1x2m~D@
2 1
PC
88
10U
_0805_25V
6K
PC
88
10U
_0805_25V
6K
12
PC
83
2200P
_0402_25V
7K
PC
83
2200P
_0402_25V
7K
12
PR781K_0402_5%
PR781K_0402_5%
12
PR8622K_0402_1%PR8622K_0402_1%
12
PR900_0402_5%
@
PR900_0402_5%
@
1 2
PR800_0402_5%
@
PR800_0402_5%
@
12
PC760.1U_0402_25V6
PC760.1U_0402_25V6
1 2
PC90
0.22U_0402_16V7K~D
PC90
0.22U_0402_16V7K~D
12
PR83
0_0402_5%@
PR83
0_0402_5%@
1 2
PJP20
PAD-OPEN 4x4m
PJP20
PAD-OPEN 4x4m
1 2
PC
84
22U
_0805_6.3
V6M
PC
84
22U
_0805_6.3
V6M
12
PR895.1K_0402_1%
PR895.1K_0402_1%
12
PC
86
2200P
_0402_25V
7K
PC
86
2200P
_0402_25V
7K
12
PJP21
PAD-OPEN1x1m
PJP21
PAD-OPEN1x1m
12
PR
79
100K
_0402_5%
PR
79
100K
_0402_5%
12
PC
80
.1U
_0402_16V
7K
PC
80
.1U
_0402_16V
7K
12
PC
82
22U
_0805_6.3
V6M
PC
82
22U
_0805_6.3
V6M
12
PC
81
22U
_0805_6.3
V6M
PC
81
22U
_0805_6.3
V6M
12
PR8210_0402_1%
PR8210_0402_1%
12
PC
79
22U
_0805_6.3
V6M
@
PC
79
22U
_0805_6.3
V6M
@
12
PL150.47UH_FDVE0630-H-R47M=P3_17.7A_20%
PL150.47UH_FDVE0630-H-R47M=P3_17.7A_20%
1 2
PR811K_0402_5%
PR811K_0402_5%
12
PR854.7_1206_5%@PR854.7_1206_5%@
12
PC
87
0.1
U_0402_25V
6P
C87
0.1
U_0402_25V
6
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VSUM+
VSUM-
NTCG
LGATE2
VCCP
PG
OO
DG
ISEN1G
GP1_SW GP1_Vo
ISEN2G
VSUMG-VSUMG+
UGATE2
PHASE2
BOOT2
ISEN1
P2_Vo
P1_SW
PWM3
LGATE1G
UGATE2
SDA
ISEN2
P1_Vo
PHASE1G
UGATE1
ISE
N3
PHASE2
BOOT2P2_SW
VSUM+
ISEN2
VSUM-VSUM-
+VCC_PWR_SRC
LGATE2
SCLK
PHASE1
BOOT1
VSUM+
ISEN1
SDA
BOOT1
VSUM-
UGATE1G
PHASE1
UGATE1
LGATE1
LGATE1
BOOT1G
ALERT#
+VCC_PWR_SRC
SCLKALERT#
PG
OO
D
NTC
VSUMG+
VSUMG-
ISEN1GISEN2G
VSUMG-
VR_HOT#
VR_EN
CO
MP
ISE
N1
COMP
ISE
N2
IMVP_PWRGD
+VCC_CORE
+VCC_CORE
+5V_ALW
+1.05V_RUN_VTT
+3.3V_RUN
+5V_RUN
+5V_RUN
+VCC_GFXCORE
+VCC_PWR_SRC
+PWR_SRCIMVP_VR_ON<39>
VCC_AXG_SENSE<11>
VSS_AXG_SENSE<11>
VIDALERT_N<10>
VIDSCLK<10>
VIDSOUT<10>
1.05V_0.8V_PWROK<14,40>
VCCSENSE <10>
VSSSENSE <10>
IMVP_PWRGD <39>
H_PROCHOT#<7,40,52>
Title
Size Document Number Rev
Date: Sheet of
LA-7902P 1.0
+VCC_CORE
51 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7902P 1.0
+VCC_CORE
51 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7902P 1.0
+VCC_CORE
51 61Friday, March 02, 2012
Compal Electronics, Inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DELL CONFIDENTIAL/PROPRIETARY
VCC_GFXCORETDC 21.5APeak Current 33AOCP current 57.18ALoad line -3.9mV/A
VCC_coreTDC 36APeak Current 53AOCP current 64ALoad line -1.9mV/AIcc_Dyn_VID1 43A
Local sense put on HW site
Local sense put on HW site
PR734
10K_0402_1%@
PR734
10K_0402_1%@12
PR
76
21
0K
_0
40
2_
1%
@
PR
76
21
0K
_0
40
2_
1%
@12
PR7130_0402_5%
@
PR7130_0402_5%
@
1 2
PC720 22P_0402_50V8JPC720 22P_0402_50V8J
12
PR733
10K_0603_1%
PR733
10K_0603_1%1 2
PR
73
14
.7_
12
06
_5
%P
R7
31
4.7
_1
20
6_
5%
12
PR71527.4K_0402_1%
PR71527.4K_0402_1%
12
PR
74
71
1K
_0
40
2_
1%
PR
74
71
1K
_0
40
2_
1%
12
PR
70
91
1K
_0
40
2_
1%
PR
70
91
1K
_0
40
2_
1%
12
PR720
1_0603_5%
PR720
1_0603_5%
12
PC737
330P_0402_50V7K
@PC737
330P_0402_50V7K
@
1 2
PR7230_0402_5%
@
PR7230_0402_5%
@
1 2
PR7012K_0402_1%
PR7012K_0402_1%
12
PC7420.22U_0402_16V7K~D
PC7420.22U_0402_16V7K~D
1 2
PC
74
61
0U
_0
80
5_
25
V6
KP
C7
46
10
U_
08
05
_2
5V
6K
12
PR72727.4K_0402_1%
PR72727.4K_0402_1%
12
PL700FBMA-L11-453215-121LMA90T_2
PL700FBMA-L11-453215-121LMA90T_2
1 2
PC
71
61
0U
_0
80
5_
25
V6
KP
C7
16
10
U_
08
05
_2
5V
6K
12
PC706
0.01U_0402_50V7K
PC706
0.01U_0402_50V7K
1 2
PC
71
71
0U
_0
80
5_
25
V6
KP
C7
17
10
U_
08
05
_2
5V
6K
12
PR
75
91
_0
40
2_
5%
PR
75
91
_0
40
2_
5%
12
PR7210_0402_5%
@
PR7210_0402_5%
@
1 2
PC722390P_0402_50V7K
PC722390P_0402_50V7K
12
PR74221K_0402_1%
PR74221K_0402_1%
1 2
PR744
2K_0402_1%
PR744
2K_0402_1%
1 2
PR724
0_0402_5%
@PR724
0_0402_5%
@
1 2
PC701330P_0402_50V7K
PC701330P_0402_50V7K
12
PL7010.36UH_FDUE104J-H-R36M=P3_33A_20%~D
PL7010.36UH_FDUE104J-H-R36M=P3_33A_20%~D
1
3
4
2
PC
74
3.1
U_
04
02
_1
6V
7K
PC
74
3.1
U_
04
02
_1
6V
7K
12
PH701470K_0402_5%_ TSM0B474J4702RE
PH701470K_0402_5%_ TSM0B474J4702RE
12
PQ708
MDU1516URH 1N POWERDFN56-8
PQ708
MDU1516URH 1N POWERDFN56-8
4
5
123
PR730 54.9_0402_1%PR730 54.9_0402_1%
12
PR736
499_0402_1%
PR736
499_0402_1%
12
PC705
68P_0402_50V8J
PC705
68P_0402_50V8J
1 2
PR7180_0402_5%
@
PR7180_0402_5%
@
1 2
PC7103300P_0402_50V7K
@
PC7103300P_0402_50V7K
@
12
PC
74
56
80
P_
04
02
_5
0V
7K
PC
74
56
80
P_
04
02
_5
0V
7K
12
PR
75
83
.65
K_
06
03
_1
%P
R7
58
3.6
5K
_0
60
3_
1%
12
PR755
3.65K_0603_1%
PR755
3.65K_0603_1%1 2
PC
75
42
20
0P
_0
40
2_
25
V7
KP
C7
54
22
00
P_
04
02
_2
5V
7K
12
PC7210.22U_0402_16V7K~D
PC7210.22U_0402_16V7K~D
1 2
PC712
0.22U_0402_16V7K~D
@PC712
0.22U_0402_16V7K~D
@
12
PR702
2.74K_0402_1%
PR702
2.74K_0402_1%
12
PR
76
04
.7_
12
06
_5
%P
R7
60
4.7
_1
20
6_
5%
12
PC
73
60
.1U
_0
40
2_
25
V6
PC
73
60
.1U
_0
40
2_
25
V6
12
PC
75
32
20
0P
_0
40
2_
25
V7
KP
C7
53
22
00
P_
04
02
_2
5V
7K
12
PR738
3.65K_0603_1%
PR738
3.65K_0603_1%1 2
PR728 1.91K_0402_1%PR728 1.91K_0402_1%
12
PH702470K_0402_5%_ TSM0B474J4702RE
PH702470K_0402_5%_ TSM0B474J4702RE
12
PQ703
SIR
81
8D
P-T
1-G
E3
_P
OW
ER
PA
K8
-5PQ703
SIR
81
8D
P-T
1-G
E3
_P
OW
ER
PA
K8
-5
5
4
2 13
PC
70
8.1
U_
04
02
_1
6V
7K
PC
70
8.1
U_
04
02
_1
6V
7K
12
PR7171_0603_5%PR7171_0603_5%
1 2
PL7020.36UH_FDUE104J-H-R36M=P3_33A_20%~D
PL7020.36UH_FDUE104J-H-R36M=P3_33A_20%~D
1
3
4
2
PR740
2K_0402_1%
PR740
2K_0402_1%
12
PR7160_0402_5%
@
PR7160_0402_5%
@
1 2
+
PC
73
01
00
U_
25
V_
M~
D
+
PC
73
01
00
U_
25
V_
M~
D
1
2
PQ700
MDU1516URH 1N POWERDFN56-8
PQ700
MDU1516URH 1N POWERDFN56-8
4
5
123
PR729
2.2_0603_5%
PR729
2.2_0603_5%12
PL7040.36UH_FDUE104J-H-R36M=P3_33A_20%~D
PL7040.36UH_FDUE104J-H-R36M=P3_33A_20%~D
1
3
4
2
PR750
365_0402_1%
PR750
365_0402_1%12
PC
74
90
.1U
_0
40
2_
25
V6
PC
74
90
.1U
_0
40
2_
25
V6
12
PR714
0_0402_5%@
PR714
0_0402_5%@
1 2
PC726
0.22U_0402_6.3V6K
PC726
0.22U_0402_6.3V6K12
PR737 130_0402_1%PR737 130_0402_1%
12
PC702
150P_0402_50V8F~D
PC702
150P_0402_50V8F~D
12
PR
76
11
0K
_0
60
3_
1%
@
PR
76
11
0K
_0
60
3_
1%
@
12
PR
70
5
15
0K
_0
40
2_
1%
~D
PR
70
5
15
0K
_0
40
2_
1%
~D
12
PR704
499_0402_1%
PR704
499_0402_1%
12
PC7443300P_0402_25V7KPC7443300P_0402_25V7K
1 2
PR753
10K_0402_1%@
PR753
10K_0402_1%@12
PU700
ISL95836HRTZ-T_TQFN40_5X5~D
PU700
ISL95836HRTZ-T_TQFN40_5X5~DC
OM
PG
37
RT
NG
39
FB
G3
8
PG
OO
DG
36
SDA7
SCLK5
ISE
N2
12
FB
17
ISU
MP
14
ISE
N3
/FB
21
1
CO
MP
18
NTC10
VR_HOT#8
ALERT#6
PG
OO
D1
9
ISU
MN
15
VDD25
RT
N1
6
ISE
N1
13
VR_ON9
BO
OT
12
0
UGATE121
PHASE122
LGATE123
PWM324
VCCP26
LGATE227
PHASE228
UGATE229
BOOT230
PW
M2
G3
5
LG
AT
E1
G3
4
PH
AS
E1
G3
3
UG
AT
E1
G3
2
BO
OT
1G
31
NTCG4
ISU
MN
G4
0
ISUMPG1
ISEN2G3
ISEN1G2
TP41
PC
73
41
0U
_0
80
5_
25
V6
KP
C7
34
10
U_
08
05
_2
5V
6K
12
+
PC
73
11
00
U_
25
V_
M~
D
+
PC
73
11
00
U_
25
V_
M~
D
1
2
PR
70
72
.61
K_
04
02
_1
%P
R7
07
2.6
1K
_0
40
2_
1%
12
PH
70
3
10
KB
_0
40
2_
5%
_E
RT
J0
ER
10
3J
PH
70
3
10
KB
_0
40
2_
5%
_E
RT
J0
ER
10
3J
12
PC704
390P_0402_50V7K
PC704
390P_0402_50V7K
12
PR710649_0402_1%~D
@PR710649_0402_1%~D
@
1 2
PR703
130K_0402_1%
PR703
130K_0402_1%
12
PR735 75_0402_5%@ PR735 75_0402_5%@
12
PQ711
SIR
81
8D
P-T
1-G
E3
_P
OW
ER
PA
K8
-5PQ711
SIR
81
8D
P-T
1-G
E3
_P
OW
ER
PA
K8
-5
5
4
2 13
PR726
0_0402_5%@
PR726
0_0402_5%@
1 2
PR743
1_0402_5%
PR743
1_0402_5%12
PC
74
71
0U
_0
80
5_
25
V6
KP
C7
47
10
U_
08
05
_2
5V
6K
12
PC741
0.01U_0402_50V7K
PC741
0.01U_0402_50V7K
1 2
PR757
1_0402_5%
PR757
1_0402_5%12
PC
74
00
.04
7U
_0
40
2_
25
V7
KP
C7
40
0.0
47
U_
04
02
_2
5V
7K
12
PC728
0.22U_0402_6.3V6K
PC728
0.22U_0402_6.3V6K12
PR754
649_0402_1%~D
PR754
649_0402_1%~D
1 2
PH
70
0
10
KB
_0
40
2_
5%
_E
RT
J0
ER
10
3J
PH
70
0
10
KB
_0
40
2_
5%
_E
RT
J0
ER
10
3J
12
PC724
0.22U_0402_6.3V6K
@PC724
0.22U_0402_6.3V6K
@
12
PQ707
SIR
81
8D
P-T
1-G
E3
_P
OW
ER
PA
K8
-5PQ707
SIR
81
8D
P-T
1-G
E3
_P
OW
ER
PA
K8
-5
5
4
2 13
PR
75
14
.7_
12
06
_5
%P
R7
51
4.7
_1
20
6_
5%
12
PR712
3.83K_0402_1%
PR712
3.83K_0402_1%
1 2
PC727
150P_0402_50V8F~D
PC727
150P_0402_50V8F~D
12
PC
72
56
80
P_
04
02
_5
0V
7K
PC
72
56
80
P_
04
02
_5
0V
7K
12
PC
73
31
0U
_0
80
5_
25
V6
KP
C7
33
10
U_
08
05
_2
5V
6K
12
PC750
0.22U_0402_16V7K~D
PC750
0.22U_0402_16V7K~D 12
PQ704
MDU1516URH 1N POWERDFN56-8
PQ704
MDU1516URH 1N POWERDFN56-8
4
5
123
PC723
47P_0402_50V8J
PC723
47P_0402_50V8J
12
PC
75
22
20
0P
_0
40
2_
25
V7
KP
C7
52
22
00
P_
04
02
_2
5V
7K
12
PC
73
9 0.2
2U
_0
40
2_
16
V7
K~
D
PC
73
9 0.2
2U
_0
40
2_
16
V7
K~
D
12
PR741
130K_0402_1%
PR741
130K_0402_1%
12
PR711383_0402_1%
PR711383_0402_1%
1 2
PC7141U_0603_10V6K
PC7141U_0603_10V6K
12
PC
70
90
.08
2U
_0
40
2_
16
V7
KP
C7
09
0.0
82
U_
04
02
_1
6V
7K
12
PC
71
94
3P
_0
40
2_
50
V8
J~
DP
C7
19
43
P_
04
02
_5
0V
8J~
D
12
PQ702
SIR
81
8D
P-T
1-G
E3
_P
OW
ER
PA
K8
-5PQ702
SIR
81
8D
P-T
1-G
E3
_P
OW
ER
PA
K8
-5
5
4
2 13
PC
70
70
.02
2U
_0
40
2_
25
V7
KP
C7
07
0.0
22
U_
04
02
_2
5V
7K
12
PR752
10K_0603_1%
PR752
10K_0603_1%1 2
PR7190_0402_5%
@
PR7190_0402_5%
@
1 2
PR
74
62
.61
K_
04
02
_1
%P
R7
46
2.6
1K
_0
40
2_
1%
12
PC
75
16
80
P_
04
02
_5
0V
7K
PC
75
16
80
P_
04
02
_5
0V
7K
12
PC729
680P_0402_50V7K
PC729
680P_0402_50V7K
1 2
PC
70
00
.1U
_0
40
2_
25
V6
PC
70
00
.1U
_0
40
2_
25
V6
12
PC7151U_0603_10V6KPC7151U_0603_10V6K
12
PR725
3.83K_0402_1%
PR725
3.83K_0402_1%
1 2
PR732
0_0402_5%
@PR732
0_0402_5%
@
1 2
PR708 0_0402_5%@
PR708 0_0402_5%@
1 2
PR749
2.2_0603_5%
PR749
2.2_0603_5%12
PQ706
SIR
81
8D
P-T
1-G
E3
_P
OW
ER
PA
K8
-5
PQ706
SIR
81
8D
P-T
1-G
E3
_P
OW
ER
PA
K8
-55
4
2 13
PC713
0.22U_0402_16V7K~D
@PC713
0.22U_0402_16V7K~D
@
12
PC
71
1.1
U_
04
02
_1
6V
7K
PC
71
1.1
U_
04
02
_1
6V
7K
12
PR7632.2_0603_5%
PR7632.2_0603_5%
12
PC703
330P_0402_50V7K
@ PC703
330P_0402_50V7K
@
12
PC
73
8
.1U
_0
40
2_
16
V7
K
PC
73
8
.1U
_0
40
2_
16
V7
K
12
PQ710
SIR
81
8D
P-T
1-G
E3
_P
OW
ER
PA
K8
-5PQ710
SIR
81
8D
P-T
1-G
E3
_P
OW
ER
PA
K8
-5
5
4
2 13
PR722
0_0402_5%
@PR722
0_0402_5%
@
1 2
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
MAX8731_REF
ICOUT
CHG_LGATE
CHG_UGATE
+VCHGR_B
CS
SN
_1
MAX8731_IINP
BOOT_D
+VCHGR_L
MAX8731_REF
VFB
MAX8731A_LDO
+DCIN
CS
SP
_1
MAX8731_REF
BOOT
MAX8731A_LDO
MAX8731_REF
MAX8731_IINP
+DOCK_PWR_BAR
+DC_IN_SS
+5V_ALW
GNDA_CHG
+5V_ALW
+SDC_IN
+DC_IN
+5V_ALW
+VCHGR
CHAGER_SRC
+VCHGR
+PWR_SRC
GNDA_CHG
GNDA_CHG
+5V_ALW
GNDA_CHGGNDA_CHG
GNDA_CHG
+SDC_IN
+DC_IN_SS
GNDA_CHG
GNDA_CHG
GNDA_CHG
GNDA_CHG
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW2
CHARGER_SMBDAT<40>
CHARGER_SMBCLK<40>
MAX8731_IINP<22>
DYN_TUR_CURRNT_SET#<40>
PROCHOT_GATE <39>ACAV_IN <22,40,53>
ACAV_IN_NB <39,40,53>
DOCK_DCIN_IS- <38>
DOCK_DCIN_IS+ <38>
DK_CSS_GC <53>
H_PROCHOT# <7,40,51>
CSS_GC<53>DC_BLOCK_GC <53>
+CHGR_DC_IN<53>
ACAV_IN<22,40,53>
Title
Size Document Number Rev
Date: Sheet of
LA-7902P 1.0
Charger
52 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7902P 1.0
Charger
52 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7902P 1.0
Charger
52 61Friday, March 02, 2012
Compal Electronics, Inc.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DELL CONFIDENTIAL/PROPRIETARY
Vref
TI bq24747 = 3.3V
Intersil ISL88731C = 3.2V
VDDP
TI bq24747 = 6V
Intersil ISL88731C = 5.1V
Maximum charging current is 7.2A
To preset system to throtlle
switching from AC to DCAdapter Protection Circuit for Turbo Mode
90W
High
Low
DYN_TUR_CURRENT_SET#
65W
E2 AC_OK=17.7 Volt
PR1313
TI bq24745 = 316K
Intersil ISL88731 = 226K
ISL88731C 11@
BQ24747 22@
PR1342
0_0402_5%@
PR1342
0_0402_5%@
1 2
PC1342
0.1U_0402_25V6
PC1342
0.1U_0402_25V6
12
PC1304
0.1U_0402_25V6
22@PC1304
0.1U_0402_25V6
22@
PR
1325
2.2
K_0402_1%
11@PR
1325
2.2
K_0402_1%
11@
12
PQ1300SI7121DN-T1-GE3_POWERPAK8-5PQ1300SI7121DN-T1-GE3_POWERPAK8-5
352
4
1
PR131749.9K_0402_1%PR131749.9K_0402_1%12
PU1304A
LM393DR_SO8~D
PU1304A
LM393DR_SO8~D
+3
-2
O1
P8
G4
PC
1310
0.1
U_0402_25V
6P
C1310
0.1
U_0402_25V
6 12
PR
1311
10K
_0402_5%
22@
PR
1311
10K
_0402_5%
22@
12
PC13111U_0603_10V6KPC13111U_0603_10V6K
1 2
PC
1326
0.0
1U
_0402_25V
7K
11@
PC
1326
0.0
1U
_0402_25V
7K
11@
12
PU1304B
LM393DR_SO8~D
PU1304B
LM393DR_SO8~D
+5
-6
O7
P8
G4
PR1330
0_0402_5%
22@PR1330
0_0402_5%
22@
PQ
1305
FD
MC
8878_P
OW
ER
33-8
-5P
Q1305
FD
MC
8878_P
OW
ER
33-8
-5
35
2
4
1
PC13091U_0603_10V6K11@
PC13091U_0603_10V6K11@
12
PR
1329
8.4
5K
_0402_1%
@P
R1329
8.4
5K
_0402_1%
@
12
G
D
S
PQ1306
2N7002KW 1N SOT323-3G
D
S
PQ1306
2N7002KW 1N SOT323-3
2
13
PR
1347
42.2
K_0402_1%
~D
PR
1347
42.2
K_0402_1%
~D
12
G
D
SPQ1310
2N7002KW 1N SOT323-3
G
D
SPQ1310
2N7002KW 1N SOT323-3
2
13
PL13015.6UH_FDVE1040-H-5R6M-P3_9.2A_20%~D
PL13015.6UH_FDVE1040-H-5R6M-P3_9.2A_20%~D
12
PL13001UH_PCMB053T-1R0MS_7A_20%
PL13001UH_PCMB053T-1R0MS_7A_20%
12
PR1300
0_0402_5%@
PR1300
0_0402_5%@
1 2
PC
1315
10U
_0805_25V
6K
PC
1315
10U
_0805_25V
6K
12
PC13182200P_0402_25V7K
22@
PC13182200P_0402_25V7K
22@
12
PR
1304
10_0402_5%
11@
PR
1304
10_0402_5%
11@
12
PC
1323
220P
_0402_50V
7K
~D
22@
PC
1323
220P
_0402_50V
7K
~D
22@
12
PR13091_0805_5%~D@PR13091_0805_5%~D@
1 2
PC
1336
100P
_0402_50V
8J
@P
C1336
100P
_0402_50V
8J
@
12
PD1302
BAT54CW_SOT323~D
PD1302
BAT54CW_SOT323~D
3
2
1
G
S
D
PQ1302NTR4502PT1G_SOT23-3~D
G
S
D
PQ1302NTR4502PT1G_SOT23-3~D
2
13
PR
1335
232K
_0402_1%
~D
PR
1335
232K
_0402_1%
~D 1
2
PC1322680P_0402_50V7K
PC1322680P_0402_50V7K
12
PC
1314
10U
_0805_25V
6K
PC
1314
10U
_0805_25V
6K
12
PR134320K_0402_1%
PR134320K_0402_1%
1 2
PJP801
PAD-OPEN1x1m@
PJP801
PAD-OPEN1x1m@
1 2
PU1300
BQ24747
22@PU1300
BQ24747
22@
PR1312
0_0402_5%@
PR1312
0_0402_5%@
1 2
PR1302
0_0402_5%@
PR1302
0_0402_5%@
1 2
[email protected]_0402_25V6@
1 2
PC
1325
0.0
1U
_0402_25V
7K
@
PC
1325
0.0
1U
_0402_25V
7K
@
12
PC
1330
10U
_0805_25V
6K
PC
1330
10U
_0805_25V
6K
12
PR13260.01_1206_1%~D
PR13260.01_1206_1%~D
1
3
4
2
PR
1350
66.5
K_0402_1%
PR
1350
66.5
K_0402_1%
12
PR130310K_0402_5%
PR130310K_0402_5%
12
PC
1319
3300P
_0402_50V
7K
@P
C1319
3300P
_0402_50V
7K
@
12
PR1304
0_0402_5%
22@PR1304
0_0402_5%
22@
PC13040.047U_0402_25V7K11@
PC13040.047U_0402_25V7K11@ 1 2
PR1328
100_0402_5%
PR1328
100_0402_5%
1 2
PU1302
TC7SH08FU_SSOP5~D
PU1302
TC7SH08FU_SSOP5~D
B1
A2
G3
O4
P5
PC13271U_0603_10V6K
22@
PC13271U_0603_10V6K
22@
12
PR
1305
10_0402_5%
11@
PR
1305
10_0402_5%
11@
12
PR13220_0603_5%11@
PR13220_0603_5%11@
12
PC
1301
47P
_0402_50V
8J
PC
1301
47P
_0402_50V
8J
12
PC
1320
56P
_0402_50V
8~
D22@
PC
1320
56P
_0402_50V
8~
D22@
12
PR
1334
221K
_0402_1%
~D
PR
1334
221K
_0402_1%
~D
12
PC
1337
0.0
1U
_0402_25V
7K
@P
C1337
0.0
1U
_0402_25V
7K
@
12
PC13330.1U_0402_25V622@
PC13330.1U_0402_25V622@ 1 2
PR13401.8M_0402_1%
PR13401.8M_0402_1%
1 2
PR1313
316k_0402_1%
22@PR1313
316k_0402_1%
22@
PR1323200K_0402_5%22@
PR1323200K_0402_5%22@
1 2
PR
1313
226K
_0402_1%
~D
11@
PR
1313
226K
_0402_1%
~D
11@
12
PR1339
0_0402_5%
@
PR1339
0_0402_5%
@
12
PU1300
ISL88731C_QFN28_5X5~D11@
PU1300
ISL88731C_QFN28_5X5~D11@
UGATE24
CSOP18
PHASE23
VFB15
SDA9
VICM8
ICR
EF
1
DCIN22
ACIN2
VDDSMB11
SCL10
ACOK13
NC14
BOOT25
NC16
EAO4
VDDP21
ICOUT26
CS
SP
28
CSON17
PGND19
LGATE20
FBO6
EAI5
CS
SN
27
VREF3
CE7
GND12
TP29
PR1305
0_0402_5%
22@PR1305
0_0402_5%
22@
PC
1341
100P
_0402_50V
8J
PC
1341
100P
_0402_50V
8J
12
PC
1324
0.0
1U
_0402_25V
7K
11@
PC
1324
0.0
1U
_0402_25V
7K
11@
12
PR13247.5K_0402_5%22@
PR13247.5K_0402_5%22@
1 2
PQ
1307A
2N
7002D
W-T
/R7_S
OT
363-6
~D
PQ
1307A
2N
7002D
W-T
/R7_S
OT
363-6
~D
61
2
PR
1316
15.8
K_0402_1%
11@
PR
1316
15.8
K_0402_1%
11@
12
PC
1339
100P
_0402_50V
8J
PC
1339
100P
_0402_50V
8J
12
PQ1304
MDU1516URH 1N POWERDFN56-8
PQ1304
MDU1516URH 1N POWERDFN56-8
4
5
123
PR13194.7_0603_5%11@
PR13194.7_0603_5%11@
12
PC
1313
0.1
U_0402_25V
6P
C1313
0.1
U_0402_25V
6
12
PR13324.7_1206_5%PR13324.7_1206_5%
12
PC
1340
220P
_0402_50V
7K
~D
PC
1340
220P
_0402_50V
7K
~D
12
ES2AA-13-F
PD1300@
ES2AA-13-F
PD1300@
2 1
PC13030.1U_0402_25V6
PC13030.1U_0402_25V6
1 2
PR
1348
41.2
K_0402_1%
~D
@
PR
1348
41.2
K_0402_1%
~D
@
12
PR1341150K_0402_1%~DPR1341150K_0402_1%~D
12
PC
1331
10U
_0805_25V
6K
PC
1331
10U
_0805_25V
6K
12
PR
1336
47K
_0402_1%
~D
PR
1336
47K
_0402_1%
~D 1
2
PR
1346
22.6
K_0402_1%
PR
1346
22.6
K_0402_1%
12
PR13310_0402_5%
@
PR13310_0402_5%
@
12
G
DS
PQ1303AAP2623GY-HF 2P SOT26-6
G
DS
PQ1303AAP2623GY-HF 2P SOT26-6
1
65
PC
1302
0.1
U_0402_25V
6
@
PC
1302
0.1
U_0402_25V
6
@
12
PR1325
4.7k_0402_1%
22@PR1325
4.7k_0402_1%
22@ PR1322
1 +-5% 0603
22@PR1322
1 +-5% 0603
22@
PR
1306
100K
_0402_1%
PR
1306
100K
_0402_1%
12
PR13200_0402_5%
@
PR13200_0402_5%
@
1 2
PR
1349
150K
_0402_1%
~D
PR
1349
150K
_0402_1%
~D
12
PC13070.01U_0402_25V7KPC13070.01U_0402_25V7K
12
PR1351100K_0402_5%
PR1351100K_0402_5%
12
PJP800
PAD-OPEN 4x4m@
PJP800
PAD-OPEN 4x4m@
1 2
G
DS
PQ1303BAP2623GY-HF 2P SOT26-6
G
DS
PQ1303BAP2623GY-HF 2P SOT26-6
3
42
PR
1338
10K
_0402_1%
PR
1338
10K
_0402_1%
12
PC
1332
10U
_0805_25V
6K
PC
1332
10U
_0805_25V
6K
12
PR13010.01_1206_1%~D
PR13010.01_1206_1%~D
1
3
4
2
PC
1329
0.1
U_0402_25V
6P
C1329
0.1
U_0402_25V
6
12
PR13331M_0402_1%~D
PR13331M_0402_1%~D
1 2
PR132710K_0402_5%22@
PR132710K_0402_5%22@
1 2
PC1321120P_0402_50VNPO~D
22@
PC1321120P_0402_50VNPO~D
22@1 2
PR
1330
10_0402_5%
11@PR
1330
10_0402_5%
11@
12
PC13060.1U_0805_50V7K
PC13060.1U_0805_50V7K
12
PC
1300
0.1
U_0402_25V
6@
PC
1300
0.1
U_0402_25V
6@
12
PQ
1307B
2N
7002D
W-T
/R7_S
OT
363-6
~D
PQ
1307B
2N
7002D
W-T
/R7_S
OT
363-6
~D
3
5
4
PC1317220P_0402_50V7K~D@PC1317220P_0402_50V7K~D@
12
PC
1338
100P
_0402_50V
8J
PC
1338
100P
_0402_50V
8J
12
PC1334
0.1U_0402_25V6
22@PC1334
0.1U_0402_25V6
22@
G
S
DPQ1301NTR4502PT1G_SOT23-3~DG
S
DPQ1301NTR4502PT1G_SOT23-3~D
2
13
PR
1307
100K
_0402_1%
PR
1307
100K
_0402_1% 1
2
PD
1301
1P
S76S
B21 S
OD
323-2
22@
PD
1301
1P
S76S
B21 S
OD
323-2
22@
12
PC13050.1U_0402_25V611@
PC13050.1U_0402_25V611@
1 2
PC13340.22U_0402_16V7K11@
PC13340.22U_0402_16V7K11@
1 2
PC
1312
2200P
_0402_25V
7K
PC
1312
2200P
_0402_25V
7K
12
PR13182.2_0603_1%PR13182.2_0603_1%
1 2
PC1316.1U_0402_16V7KPC1316.1U_0402_16V7K
12
PR
1310
10K
_0402_1%
11@
PR
1310
10K
_0402_1%
11@
12
PC
1328
.1U
_0402_16V
7K
@P
C1328
.1U
_0402_16V
7K
@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DK_AC_OFF
PBATT_IN_SS
ACAVINP33ALW2
BLKNG_MOSFET_GCSL_BAT_PRES#
ER
C2
CD3301_DCIN
ERC1
DS
CH
RG
_M
OS
FE
T_G
C
P33ALW
ACAVDK_SRC
ERC3
DK_AC_OFF_ENCD3301_SDC_IN
3301_PWRSRC
3301_ACAV_IN_NB
STSTART_DCBLOCK_GC
BLK_MOSFET_GC
EN_DK_PWRBAR
STSTART_DCBLOCK_GC
CD_PBATT_OFF
DK_PWR_BAR
3301_DC_IN_SS
PBATT+
+PWR_SRC
+DOCK_PWR_BAR
+VCHGR
+DOCK_PWR_BAR
+DC_IN_SS
+DC_IN
+SDC_IN
+3.3V_ALW2
+PWR_SRC
+3.3V_ALW
+5V_ALW
+NBDOCK_DC_IN_SS
+3.3V_ALW2
DC_BLOCK_GC<52>
CSS_GC<52>DK_CSS_GC<52>
EN_DOCK_PWR_BAR <39>
SLICE_BAT_PRES# <38,39,44>
DOCK_AC_OFF_EC <39>
ACAV_IN_NB <39,40,52>
SLICE_BAT_ON <39>
DOCK_AC_OFF <38,39>
SOFT_START_GC<44>
ACAV_DOCK_SRC#<38>
+CHGR_DC_IN<52>
ACAV_IN<22,40,52>
Title
Size Document Number Rev
Date: Sheet of
LA-7902P 1.0
Selector
53 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7902P 1.0
Selector
53 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7902P 1.0
Selector
53 61Friday, March 02, 2012
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
GPIO Input from NB
Embedded Controller
PR219 100K_0402_5%PR219 100K_0402_5%
1 2
PR2260_0402_5%
@
PR2260_0402_5%
@
1 2
PR2231M_0402_5%~D
PR2231M_0402_5%~D
1 2
PR207330K_0402_5%PR207330K_0402_5%
12
PR212
0_0402_5%@
PR212
0_0402_5%@
1 2
PR231
0_0402_5%@
PR231
0_0402_5%@
1 2
PC
196
0.1
U_0402_25V
6P
C196
0.1
U_0402_25V
6
12
S2AA-13-F SMAPD17
S2AA-13-F SMAPD17
2 1
PR2250_0402_5%
@
PR2250_0402_5%
@
1 2
PC1901U_0603_25V6
PC1901U_0603_25V6
12
PR217 47_0805_5%~DPR217 47_0805_5%~D1 2
PQ45FDS6679AZ_SO8~D
PQ45FDS6679AZ_SO8~D
S1
S2
S3
G4
D8
D7
D6
D5
PC
200
0.1
U_0402_25V
6P
C200
0.1
U_0402_25V
6
12
PR214
0_0402_5%
@ PR214
0_0402_5%
@
1 2
PR229
0_0402_5%@
PR229
0_0402_5%@
1 2
PC192
0.1U_0603_50V4Z
PC192
0.1U_0603_50V4Z
12
PR235
0_0402_5%@
PR235
0_0402_5%@
1 2
PR208
0_0402_5%@
PR208
0_0402_5%@
1 2
PR2300_0402_5%
@
PR2300_0402_5%
@
1 2
PR210
0_0402_5%@
PR210
0_0402_5%@
1 2
PR213
0_0402_5%
@
PR213
0_0402_5%
@
12
PC
194
0.0
47U
_0402_25V
7K
PC
194
0.0
47U
_0402_25V
7K
12
PQ46
FDS6679AZ_SO8~D
PQ46
FDS6679AZ_SO8~D
S1
S2
S3
G4
D8
D7
D6
D5
PR2220_0402_5%
@
PR2220_0402_5%
@
1 2
PR2160_0402_5%
@ PR2160_0402_5%
@
1 2
PC
191
1U
_0603_25V
6P
C191
1U
_0603_25V
6
12
PR2341M_0402_5%~D
@ PR2341M_0402_5%~D
@
1 2
PR220
0_0402_5%@
PR220
0_0402_5%@
1 2
PR215
0_0402_5%
@
PR215
0_0402_5%
@
12
PQ44SI7121DN-T1-GE3_POWERPAK8-5PQ44SI7121DN-T1-GE3_POWERPAK8-5
352
4
1
PC
198
0.1
U_0402_25V
6P
C198
0.1
U_0402_25V
6
12
PC
195
0.1
U_0402_25V
6
@
PC
195
0.1
U_0402_25V
6
@
12
PC
193
0.1
U_0402_25V
6P
C193
0.1
U_0402_25V
6
12
PU11
CD3301ARHHR QFN 36P CONTROL LOGIC
PU11
CD3301ARHHR QFN 36P CONTROL LOGIC
DC_IN1
SS_GC2
ERC13
ACAVDK_SRC4
GND5
SDC_IN6
DC_BLK_GC7
ACAV_IN8
SS
_D
CB
LK
_G
C16
CS
S_G
C10
DK
_C
SS
_G
C11
ER
C3
12
ER
C2
13
GN
D14
PW
R_S
RC
15
BLKNG_MOSFET_GC20
SL_BAT_PRES#21
DK_AC_OFF_EN22
GND23
ACAV_IN_NB24
DK_AC_OFF_EN25
PBATT_OFF26
P50ALW27
PB
att+
28
DS
CH
RG
_M
OS
FE
T_G
C29
BLK
_M
OS
FE
T_G
C30
NC
31
DK
_P
WR
BA
R33
DC
_IN
_S
S34
CH
AR
GE
RV
R_D
CIN
35
P33ALW29
EN
_D
K_P
WR
BA
R17
P33A
LW
18
TP37
NBDK_DCINSS19
NC
36
GN
D32
PR233
0_0402_5%@
PR233
0_0402_5%@
1 2
PR209330K_0402_5%PR209330K_0402_5%
1 2
PC
197
0.1
U_0402_25V
6P
C197
0.1
U_0402_25V
6
12
PQ43
FDS6679AZ_SO8~D
PQ43
FDS6679AZ_SO8~D
S1
S2
S3
G4
D8
D7
D6
D5
PD18
PDS5100H-13_POWERDI5-3~D
PD18
PDS5100H-13_POWERDI5-3~D
2
31
PC
187
0.4
7U
_0805_25V
7K
~D
PC
187
0.4
7U
_0805_25V
7K
~D
12
PC
199
0.1
U_0402_25V
6P
C199
0.1
U_0402_25V
6
12
PR
211
1K
_1206_5%
PR
211
1K
_1206_5%
12
PR224
0_0402_5%@
PR224
0_0402_5%@
1 2
PC
188
2200P
_0402_25V
7K
PC
188
2200P
_0402_25V
7K
12
PR2210_0402_5%
@
PR2210_0402_5%
@
1 2
PC
189
0.1
U_0402_25V
6P
C189
0.1
U_0402_25V
6
12
PR2280_0402_5%
@
PR2280_0402_5%
@
1 2
PR2270_0402_5%
@
PR2270_0402_5%
@
1 2
PR218
0_0402_5%
@ PR218
0_0402_5%
@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.05V_RUN_VTT +VCC_CORE
+VCC_CORE
+VCC_CORE
+VCC_GFXCORE
+1.05V_RUN_VTT
Title
Size Document Number Rev
Date: Sheet of
LA-7902P 1.0
PROCESSOR DECOUPLING
54 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7902P 1.0
PROCESSOR DECOUPLING
54 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7902P 1.0
PROCESSOR DECOUPLING
54 61Friday, March 02, 2012
Compal Electronics, Inc.
PC
1400
.1U
_0402_16V
7K
PC
1400
.1U
_0402_16V
7K
12
+
PC1176330U 2V M D2E LESR6M
+
PC1176330U 2V M D2E LESR6M
1
2 3
PC
1138
22U
_0805_6.3
V6M
PC
1138
22U
_0805_6.3
V6M
1
2
PC115310U_0805_4VAM~DPC115310U_0805_4VAM~D
1
2
PC
1112
22U
_0805_6.3
V6M
PC
1112
22U
_0805_6.3
V6M
1
2
+ PC1175
470U_D2_2VM_R4.5M
@
+ PC1175
470U_D2_2VM_R4.5M
@
1
2 3
PC
1136
22U
_0805_6.3
V6M
PC
1136
22U
_0805_6.3
V6M
1
2
+
PC
1165
330U
2V
M D
2E
LE
SR
6M
+
PC
1165
330U
2V
M D
2E
LE
SR
6M
1
2
PC
1131
22U
_0805_6.3
VA
MP
C1131
22U
_0805_6.3
VA
M
1
2
PC111010U_0805_4VAM~DPC111010U_0805_4VAM~D
1
2
PC
1137
22U
_0805_6.3
V6M
PC
1137
22U
_0805_6.3
V6M
1
2
PC
1149
22U
_0805_6.3
VA
MP
C1149
22U
_0805_6.3
VA
M
1
2PC114322U_0805_6.3VAMPC114322U_0805_6.3VAM
1
2
PC110422U_0805_6.3VAMPC110422U_0805_6.3VAM
1
2
PC116410U_0805_4VAM~DPC116410U_0805_4VAM~D
1
2
PC
1139
22U
_0805_6.3
V6M
PC
1139
22U
_0805_6.3
V6M
1
2
+
PC
1157
330U
2V
M D
2E
LE
SR
6M
+
PC
1157
330U
2V
M D
2E
LE
SR
6M
1
2
+
PC
1174
330U
2V
M D
2E
LE
SR
6M
+
PC
1174
330U
2V
M D
2E
LE
SR
6M
1
2 3
PC116310U_0805_4VAM~DPC116310U_0805_4VAM~D
1
2
PC
1135
22U
_0805_6.3
V6M
PC
1135
22U
_0805_6.3
V6M
1
2
PC
1502
.1U
_0402_16V
7K
PC
1502
.1U
_0402_16V
7K
12
PC
1154
22U
_0805_6.3
VA
MP
C1154
22U
_0805_6.3
VA
M
1
2
PC
1126
22U
_0805_6.3
VA
MP
C1126
22U
_0805_6.3
VA
M
1
2
PC114622U_0805_6.3VAMPC114622U_0805_6.3VAM
1
2
PC
1140
22U
_0805_6.3
V6M
PC
1140
22U
_0805_6.3
V6M
1
2
PC
1152
22U
_0805_6.3
VA
M
@PC
1152
22U
_0805_6.3
VA
M
@1
2
PC
1147
22U
_0805_6.3
VA
M
@PC
1147
22U
_0805_6.3
VA
M
@1
2
PC
1124
22U
_0805_6.3
VA
MP
C1124
22U
_0805_6.3
VA
M
1
2
PC
1504
.1U
_0402_16V
7K
PC
1504
.1U
_0402_16V
7K
12
PC
1111
22U
_0805_6.3
V6M
PC
1111
22U
_0805_6.3
V6M
1
2
PC
1132
22U
_0805_6.3
VA
MP
C1132
22U
_0805_6.3
VA
M
1
2
PC110522U_0805_6.3VAMPC110522U_0805_6.3VAM
1
2
PC116810U_0805_4VAM~DPC116810U_0805_4VAM~D
1
2
+
PC
1166
330U
2V
M D
2E
LE
SR
6M
+
PC
1166
330U
2V
M D
2E
LE
SR
6M
1
2
PC
1404
.1U
_0402_16V
7K
PC
1404
.1U
_0402_16V
7K
12
+
PC
1187
330U
2V
M D
2E
LE
SR
6M
+
PC
1187
330U
2V
M D
2E
LE
SR
6M
1
2 3
PC
1113
22U
_0805_6.3
V6M
PC
1113
22U
_0805_6.3
V6M
1
2
PC
1116
22U
_0805_6.3
V6M
PC
1116
22U
_0805_6.3
V6M
1
2
PC110810U_0805_4VAM~DPC110810U_0805_4VAM~D
1
2
PC110722U_0805_6.3VAMPC110722U_0805_6.3VAM
1
2
PC114422U_0805_6.3VAMPC114422U_0805_6.3VAM
1
2
PC114522U_0805_6.3VAMPC114522U_0805_6.3VAM
1
2
PC
1114
22U
_0805_6.3
V6M
PC
1114
22U
_0805_6.3
V6M
1
2
PC110910U_0805_4VAM~DPC110910U_0805_4VAM~D
1
2
PC110622U_0805_6.3VAMPC110622U_0805_6.3VAM
1
2
+
PC
1173
330U
2V
M D
2E
LE
SR
6M
+
PC
1173
330U
2V
M D
2E
LE
SR
6M
1
2 3
PC112122U_0805_6.3VAMPC112122U_0805_6.3VAM
1
2
PC
1117
22U
_0805_6.3
V6M
PC
1117
22U
_0805_6.3
V6M
1
2
PC
1402
.1U
_0402_16V
7K
PC
1402
.1U
_0402_16V
7K
12
PC
1134
22U
_0805_6.3
VA
MP
C1134
22U
_0805_6.3
VA
M
1
2
PC
1501
.1U
_0402_16V
7K
PC
1501
.1U
_0402_16V
7K
12
PC
1115
22U
_0805_6.3
V6M
@
PC
1115
22U
_0805_6.3
V6M
@
1
2
PC
1130
22U
_0805_6.3
VA
MP
C1130
22U
_0805_6.3
VA
M
1
2
PC
1125
22U
_0805_6.3
VA
MP
C1125
22U
_0805_6.3
VA
M
1
2PC112322U_0805_6.3VAMPC112322U_0805_6.3VAM
1
2
PC
1118
22U
_0805_6.3
V6M
PC
1118
22U
_0805_6.3
V6M
1
2
PC112222U_0805_6.3VAMPC112222U_0805_6.3VAM
1
2
PC
1128
22U
_0805_6.3
VA
MP
C1128
22U
_0805_6.3
VA
M1
2
PC117110U_0805_4VAM~DPC117110U_0805_4VAM~D
1
2
PC
1500
.1U
_0402_16V
7K
PC
1500
.1U
_0402_16V
7K
12
PC
1503
.1U
_0402_16V
7K
PC
1503
.1U
_0402_16V
7K
12
PC116910U_0805_4VAM~DPC116910U_0805_4VAM~D
1
2
PC
1148
22U
_0805_6.3
VA
M
@PC
1148
22U
_0805_6.3
VA
M
@1
2
PC
1129
22U
_0805_6.3
VA
MP
C1129
22U
_0805_6.3
VA
M
1
2
PC110322U_0805_6.3VAMPC110322U_0805_6.3VAM
1
2
PC
1151
22U
_0805_6.3
VA
MP
C1151
22U
_0805_6.3
VA
M
1
2
PC
1403
.1U
_0402_16V
7K
PC
1403
.1U
_0402_16V
7K
12
PC110122U_0805_6.3VAMPC110122U_0805_6.3VAM
1
2
PC
1127
22U
_0805_6.3
VA
MP
C1127
22U
_0805_6.3
VA
M
1
2
+
PC
1158
330U
2V
M D
2E
LE
SR
6M
+
PC
1158
330U
2V
M D
2E
LE
SR
6M
1
2
PC112022U_0805_6.3VAMPC112022U_0805_6.3VAM
1
2
PC
1401
.1U
_0402_16V
7K
PC
1401
.1U
_0402_16V
7K
12
PC117010U_0805_4VAM~DPC117010U_0805_4VAM~D
1
2
PC
1141
22U
_0805_6.3
V6M
PC
1141
22U
_0805_6.3
V6M
1
2
PC110222U_0805_6.3VAMPC110222U_0805_6.3VAM
1
2
PC111922U_0805_6.3VAMPC111922U_0805_6.3VAM
1
2
PC
1150
22U
_0805_6.3
VA
MP
C1150
22U
_0805_6.3
VA
M
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
LA-7902P 1.0
PWR_PIR 1
55 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7902P 1.0
PWR_PIR 1
55 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7902P 1.0
PWR_PIR 1
55 61Friday, March 02, 2012
Compal Electronics, Inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DELL CONFIDENTIAL/PROPRIETARY
1 44 8/18 ME design change. PJPDC1 change from 7pin to 5pin X01
45 Main and 2nd IC common setting. De-pop PD100,PR113,PR111
Add PC120,PC121,PC215 parallel with
PR101,PR102,PR207Prevent Jitter issue.Compal
45
46
51PU700 VCCP and VDD change form +5V_RUN
to +5V_ALWPrevent output voltage glitch when power up.Compal
Compal
Compal8/18
8/18
8/18
X01
X01
X01
2
3
4
5 53 8/18 Dell Change net name PBATT to SLICE_BAT_ON. Change net name same as E4. X01
Add PR90, PR91 X016 50 8/18 Compal Reserve 0 ohm resistance for test.
P age 1P age 1P age 1P age 1
Solution D escriptionSolution D escriptionSolution D escriptionSolution D escription R ev .R ev .R ev .R ev .P age#P age#P age#P age# T itleT itleT itleT itle
V ersion C hange L ist ( P . I . R . L ist )V ersion C hange L ist ( P . I . R . L ist )V ersion C hange L ist ( P . I . R . L ist )V ersion C hange L ist ( P . I . R . L ist )
ItemItemItemItem Issue D escriptionIssue D escriptionIssue D escriptionIssue D escriptionD ateD ateD ateD ateR equestR equestR equestR equest
O w nerO w nerO w nerO w ner
745
528/30 Compal Pop PL100, PL1300 X01
8 54 8/30 Compal Reserve cap for improve transient response. Reserve PC1176
53 8/30 Compal For reduce EMI radiation.
For reduce EMI radiation.
Add PC196, PC197, PC198, PC199, PC2009
X01
X01
54 Power 8/31 Compal Change to green P/N.
Change PQ4, PC1153, PC1163, PC1164, PC1168,
PC1169, PC1170, PC1171, PC1108, PC1109, PC1110,
PC1187, PC1173, PC1174, PC1175, PC1157, PC1158,
PC179, PQ1310, PQ1306 to green P/N
X0110
48 Power 9/1 Dell For support TL+TM X0111
Power
Power
Power
Power
Power
Power
Power
Power
Power
Change 6@ to pop for PC400~PC406, PC408, PL400,
PQ400, PQ405, PR400~PR407,
PU400. 5@ to @ for PR408.
49 Power 9/112 Compal For fix 1.05V_RUN_VTT on 1.05VDepop PR509, PR511, PQ502.
Change PR507 to 4.99k.X01
Power51 9/5 Compal Follow EMI requirement. Change PL700 to SM01000DJ0013 X01
1445
46Power 9/6 Compal Change to green P/N.
Change PC107, PC263, PC280, PC405,
PC505 to HF P/N.X01
15 52 Power 9/13 Compal For reduce EMI radiation. Pop PC1400~1404, PC1500~PC1504. X01
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
LA-7902P 1.0
PWR_PIR 2
56 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7902P 1.0
PWR_PIR 2
56 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7902P 1.0
PWR_PIR 2
56 61Friday, March 02, 2012
Compal Electronics, Inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DELL CONFIDENTIAL/PROPRIETARY
Solution D escriptionSolution D escriptionSolution D escriptionSolution D escription R ev .R ev .R ev .R ev .P age#P age#P age#P age# T itleT itleT itleT itleItemItemItemItem Issue D escriptionIssue D escriptionIssue D escriptionIssue D escriptionD ateD ateD ateD ateR equestR equestR equestR equest
O w nerO w nerO w nerO w ner
Power16 51 9/14 Adjust CPU transient ,
loadline and OCP
Add PC740 to 0.1uF X01Compal
Change PR750 to 365 ohm
Change PR741 to 130K ohm
17 51 Power 9/14 Adjust AXG transient ,
loadline and OCP
Compal Change PR703 to 130K ohm X01
Change PC709 to 82nF
Change PR702 to 2.74K ohm
Change PR711 to 383 ohm
Change PC744 to 3300pF,PR754 to 649ohm.
18 52 Power 11/17 Compal Shortage issue Change PQ1303 from NTGD416 to AP2623 X02
19 52 Power 11/17 Compal Need ESD protected Change PQ1306, PQ1310 from SB57002040L
to SB000009Q80
X02
20 53 Power 11/17 Compal IC version upgrade Change PU11 from CD3301 to CD3301A X02
21 45 Power 11/17 Compal Shortage issue Change PC110, PC111 from SGA00004E00
to SGA00002N80
X02
22 45 Power 11/17 Compal EMI request Pop PC1138,PC1139,PC1149,PC1150 X02
23 44 Power 11/21 Compal Erp lot6 tier2 Fail issue PWR_SRC_S control signal change from +3.3V_ALW
to PCH_ALW_ON
X02
24 44 Power 12/05 Compal Prevent COS. Change PD8 from SCS0340L01L to SCS00005C00 X02
Change PD1301 from SCS00003M0L to SCS00004O0L
X0225 Power Change PC1176,PC1174,PC1173,PC1187,PC1157,PC1158,
PC1165,PC1166 to SGA00002U1L
Prevent COS.54 Compal12/13
26 50 Power 12/13 Compal Improve efficiency change PR86 to 22K_0402_5% X02
X0227 Power47 12/16 Compal Prevent COS. Change PL301 from SH00000MN00 to SH00000MW00
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
HW_PIR 1
57 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
HW_PIR 1
57 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
HW_PIR 1
57 61Friday, March 02, 2012
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
Solution D escriptionSolution D escriptionSolution D escriptionSolution D escription R ev .R ev .R ev .R ev .P age#P age#P age#P age# T itleT itleT itleT itleItemItemItemItem Issue D escriptionIssue D escriptionIssue D escriptionIssue D escriptionD ateD ateD ateD ateR equestR equestR equestR equest
O w nerO w nerO w nerO w ner
1 11 HW COMPAL INTEL review feedback Add CC178,CC179,CC149,CC150 X01
2 HW
HW3
SMSC request to delete LPC_LDRQ0#Leave LDRQ0# no connection on both of 5048 and PCH side
COMPALHW4
Removed R743
X01
X01
X01
14,39
5
22
HW COMPAL
Removed reserve circuit for EMC4022 Removed R405,C280,R392,R394
6
42
HW
Load SW sources output rising time
mismatch and COS. cost concern
Change back to E3 +3.3V/5V_RUN discrete solution
Removed U78 and add Q55,Q61 circuit
X01
Codec is change to 92HD93
Reserve co-lay with ALC290
Pop R162~R166 and de-pop U73,R1540
Reserve for ALC290 only: C1204, C1205, R1647, C1165, R1648
Pop option for 92HD93/ALC290=>R1646/C1164; R1644/R1643;
C965/R1642; Q107/R171
Reserve for 92HD93 only: R1645, C963
Add R174 depop and R175 pop
COMPAL
29
29
Vgs less than cut-in voltage in battery mode Add control circuit QH6,R279,CH107 for +5V_ALW_PCH X01COMPALHW7
Vgs of 5V MOS maybe large than max rating Add R517, R518COMPALHW8
9
20
HW COMPAL Follow INTEL PDDG 0.8 De-pop RC140
Change board ID to X01 Change R875 to 130KohmsCOMPALHW
27,28
10
X01
X01
X01
PCH GPIO52 need 8.2~10K pull up +3.3VS Change R695 from 100K to 10KohmsCOMPALHW
11
11
12 HW COMPAL CRT SW 2nd source TI, TS3V713 pin29 is VDD Connect U18 pin29 to +3.3V_RUN
40
13 HW COMPAL +1.05V_M turn off before APWROK de-assert Add UH5,CH108 6@ circuit reserve for VPRO
X01
X01
X01
34
14 HW COMPAL Reset IC threshold voltage issue Change U4 to RT9801A (threshold adjustable)
Add R1649~R1654;Reserve R1655 and pop R1623
X01
23
15 HW COMPAL DPX_CA_DET voltage too low through dongle Change U21 and U24 to SA000055G0L
16
16 HW COMPAL Request from INTEL review feedback Pop RH332 for PCH_GPIO3 and RH180 for GPIO27
X01
X01
41
17
26
HW COMPAL Material changed Power team request Q59 change to SB00000L80L X01
White light LED brightness is abnormal Change R934, R938, R939, R949, R958, R957 and R959
to 1.2 Kohms
X01COMPALHW
17,18
18
19 HW COMPAL
42
Reserve C1208 for ESD backup planReserve C1208 for ESD backup plan X01
S3 can't resume issue Control 1.5V_VDDQ by EC. Pop RC79 and de-pop RC82 X01COMPALHW20
43
21
40
HW COMPAL X01
COMPAL
COMPAL
X01
11
17 INTEL review feedback Change RH331,RH272 to 10K ohm08/25/2011
08/25/2011
08/25/2011
08/25/2011
08/25/2011
08/25/2011
08/25/2011
08/25/2011
08/25/2011
08/25/2011
08/25/2011
08/25/2011
08/25/2011
08/25/2011
08/25/2011
08/25/2011
08/25/2011
08/25/2011
08/25/2011
08/25/2011
08/25/2011
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
HW_PIR 2
58 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
HW_PIR 2
58 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
HW_PIR 2
58 61Friday, March 02, 2012
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
27
HW
X01
Solution D escriptionSolution D escriptionSolution D escriptionSolution D escription R ev .R ev .R ev .R ev .P age#P age#P age#P age# T itleT itleT itleT itleItemItemItemItem Issue D escriptionIssue D escriptionIssue D escriptionIssue D escriptionD ateD ateD ateD ateR equestR equestR equestR equest
O w nerO w nerO w nerO w ner
WWAN card request JMINI1 pin 1 connect to PCIE_WAKE#
HW COMPAL
HW25
26 X01
24
22 HW COMPAL X01
23 HW COMPAL
HW
X01
X01
X01COMPAL
34
14 ROM size changed Change U52 to 8M and R936,R895,R897,R900 to 6@
11 Material package changed Change CC161~CC166 from 0402 to 0603
42 BOM changed Change Q60 to 6@
COMPAL39
08/25/2011 COMPAL
GPIO signal name changed same as E/P Change PBATT_OFF to SLICE_BAT_ON
34 Material package changed Changed C615 to SF000002000
08/25/2011
08/25/2011
08/25/2011
08/25/2011
08/25/2011
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
08/26/2011 COMPAL30 LAN EA result Changed RL23 to 1.2K Ohm.28 HW X01
29 40 08/26/2011 COMPAL Backdrive issue Depop R1169,R1197,R118 due to it has internal pull high.HW X01
30 37 HW 08/29/2011 COMPAL To avoid power short to GND NC Pin 15 for JAUD1 X01
31 37 HW 08/30/2011 COMPAL Follow connector list Swap JAUD1 pin. X01
32 12 HW 08/30/2011 COMPAL Change part to HF part Change QD1, QD2 part number to SB501380050 (for HF) X01
33 15 HW 09/01/2011 COMPAL For clock EA Change RH311 and RH314 to 10 ohm X01
34 43 HW 09/01/2011 COMPAL ME drawing update Add H19 X01
35
14,16
19,22
30,40
42
HW 09/01/2011 COMPAL BOM option change for TL
Change U53,R936,R895,R897,R900,RH350,UH5,CH108,RH116
RH202,R385,R426,R402,Q63,R931,Q58,Q60
R916,RL46,R871 to pop
Change RH359,RH321,RH119,RH204,R430,R386,R408
,R206,RL47,R877,to depop
X01
HW25
Add C1209, C1210, C1211, C1212, C1213, C1214, C1215
and C1216 between Inductor and HDMI connector
Due to EMI HDMI test Fail, add EMI solutionCOMPAL09/02/201136X01
37 37 HW 09/05/2011 COMPAL ME connector list change Change JAU1 to 50271-0020N-001 X01
38 37 HW 09/06/2011 COMPAL EMI issue X01
39 15,30 HW 09/06/2011 COMPAL Follow LL to reserve SM bus for BRCM LAN Add QH8,RL50,RL51X01
Chamge resistor to Inductor
Change R451, R459, R462, R466, R468, R469, R470, R471 to
9nH L99, L100, L101, L102, L103, L104, L105, L106.
40 Change C412~C415 to 0.1uF for USB3.0 signalCOMPAL09/08/2011HW36 X01Follow Intel design guide
Add L107 & R1656,R1657
09/08/2011HW7X01
Reserve CC1141~CC144 for ESDFollow ESD recommand.COMPAL41
Change C741,C743 to 39pF
Change CH18,CH19 to 10pF
14,15,40 HW 09/08/2011 COMPAL Crystal EA result
Change CH2,CH3 to 18pF
42
X01
Change CL5,CL6=33pF,RL22=510 ohm
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
HW_PIR 3
59 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
HW_PIR 3
59 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
HW_PIR 3
59 61Friday, March 02, 2012
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Solution D escriptionSolution D escriptionSolution D escriptionSolution D escription R ev .R ev .R ev .R ev .P age#P age#P age#P age# T itleT itleT itleT itleItemItemItemItem Issue D escriptionIssue D escriptionIssue D escriptionIssue D escriptionD ateD ateD ateD ateR equestR equestR equestR equest
O w nerO w nerO w nerO w ner
29 HW 09/13/2011 X0143 COMPAL Follow IDT recommand Swap R169~R172,C973~C976 connection
42 COMPAL09/13/2011HWChange Q55,Q61 part for open soldering
issue.X01Change Q55,Q61 from DMN3030LSS-13 to AO4478L44
40 HW 10/13/2011 COMPAL Change board ID to X02 X0245 Change R875 to 62Kohm
4246 HW 10/13/2011 COMPAL Rated Vgs of Q61 is 25V X02De-pop R1627
47 39 HW 10/13/2011 COMPAL SMSC change 5048 pin A23 to GPIOI0 Re-link ECE 5048 symbol X02
COMPAL10/13/2011HW4048 Reserve R1658 and R1659 100Kohms to GND for I2S disabledSMSC review feedback X02
41 HW 10/13/2011 COMPAL Change reset IC to RT9818A-44GU3
Update U4 symbol and add R1629 for backup of inrush
prevention.
Change RSMRST# pull up with 100Koms. Pop R1655 and de-pop
R1623.Delete R1649~R1654
49 X02
39 HW 10/13/2011 COMPALWhen suspend/resume cycles, wireless SW
GPIO IRQs keeps givingChange pull up rail to +3.3V_ALW for WIRELESS_ON#/OFF X0250
29 HW 10/13/2011 COMPAL 15" UMA speaker no sound issuePop snubber on speaker trace with C: 2200pF and R: 3.3ohms.
Change bead rated current from 200mA to 2A.51 X02
29 HW 10/13/2011 COMPAL EMI request52 Pop C981,C982,C983,C985,C986,C987 X02
27 HW 10/13/2011 COMPAL53 Depop HDD control power circuit for cost down. Depop R1624,Q28,R500,R499,R617,C393 X02
3054 HW 10/18/2011 COMPAL Crystal EA result Change YL1 to 3G025000FA1H, CL5,CL6 to 12pF.RL22 to 200 ohm. X02
COMPALAll X02Change 0 ohm to R-short.For cost saving.HW55 10/18/2011
56 42 HW 10/26/2011 COMPAL 1V leakage on 3.3V_RUN during system boot Pop Q69 and R929 X02
Inrush current with Smart Card
detect fail issuechange C763 and C766 to 2200p57 42 HW 10/26/2011 COMPAL X02
Change MOSFET to wihtout Schottky Diode for
+1.5V_RUN leakage issuechange QC3, Q59 as AO4304L from AO4728L
58
42
HW 10/27/2011 COMPAL X02
59
43
HW
LED Conn PIN definition change JLED1 PIN define change
10/27/2011 COMPAL X02
60
37
HW 11/01/2011 COMPAL X02
14 RTC issue change CH2, CH3 to 15pF61 HW 11/15/2011 COMPAL X02
14 S5 power consumption over spec. depop RH288HW 11/15/2011 COMPAL62 X02
Remove 2pin connector for Audio performance Remove JAG1 2 pin connector.
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
HW_PIR 4
60 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
HW_PIR 4
60 61Friday, March 02, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
HW_PIR 4
60 61Friday, March 02, 2012
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Solution D escriptionSolution D escriptionSolution D escriptionSolution D escription R ev .R ev .R ev .R ev .P age#P age#P age#P age# T itleT itleT itleT itleItemItemItemItem Issue D escriptionIssue D escriptionIssue D escriptionIssue D escriptionD ateD ateD ateD ateR equestR equestR equestR equest
O w nerO w nerO w nerO w ner
34 HW 11/29/2011 X0263 COMPAL S3 had leakage in +3/5V_RUNDe-pop R725, remove R695 and add +3.3V_RUN
pull high at PCH side(RH361)
32 COMPALHW TPM is changed to AT97SC3204-X2A18-ABU39(TPM) is changed to SA00004WQ10
(AT97SC3204-X2A18-AB) for WIN8 support64 11/29/2011 X02
11/29/2011 X0232 COMPALHW +3.3V_RUN Giltch when AC pluginAdd D87, R1662 and R1663 (pull high to +3.3V_RUN_TPM)
for HW solution backup65
11/29/2011 X0214~21 COMPALHW Change PCH to C1 version Change UH4 to SA00005AG1L(HM77 for non vpro)66
67 11/29/2011HW COMPAL
RC72 from 100K to 330K; RC143 form 330K to 1M; CC136 form 0.1u to 0.022u
R412 from 100K to 470K; R1632 form 1M to 4.7M; C293 form 0.1u to 0.022u
R507 from 100K to 470K; R517 form 1M to 4.7M; C400 form 0.1u to 0.022u
R722 from 100K to 470K; R1625 form 1M to 4.7M; C644 form 4700p to 220p
R729 from 100K to 470K; R1628 form 1M to 4.7M; C650 form 4700p to 220p
R917 from 100K to 470K; R1617 form 1M to 4.7M; C770 form 4700p to 220p
R920 from 100K to 470K; R1610 form 470K to 2.2M; C771 form 4700p to 470p
R930 from 100K to 330K; R1611 form 470K to 1M; C773 form 2200p to 100p
R906 from 100K to 470K; C763 form 2200p to 220p
R912 from 100K to 470K; C766 form 470p to 220p
Change RC value at Gate of MOS
Load SW to modify power rail
soft start timing
X02
68 COMPAL Change P/N for HF Change C412~C415 P/N to SE076104K8L36 HW 12/01/2011 X02
12/01/2011 COMPAL X0269 HW Reserve 0.1uF CAP to GND for ESD request reserve CE14, CE20, CE22, CC151, CC152, CC153 to GND35
70 12/05/2011 COMPAL X02HW Change LH1 to 1uH Inductor(SHI00007W0L)19 Change LH1 from bead to Inductor for CRT
17,38 12/07/2011 COMPALHW EMI solution for E-Docking USB port
Swap USB Port7 and Port8 and reserve a choke(L108)
at E-Docking side:
Port7 from NA to E-docking
Port8 from E-Docking to NA
71 X02
72 12/07/2011 X0224,32,37 HW COMPALChange USB9,12,13 CMC to 180ohm
for EMI requestChange L10,L52,L107 to SM070002X00(OCF2012181YZF)
73 12/08/2011 COMPAL X0237 HWFollow CONN List_1130A
Change JAUD1 to ACES_51522-0200N-P01Change JAUD1 to ACES_51522-0200N-P01
74 12/09/2011 COMPAL22 HWThermal requests to change OTP
from 88 to 92Change R406 from 953ohm to 1.24Kohm X02
75 12/09/2011 To prevent inrush current at reset IC inputCOMPALHW41 Change R1629 from 0ohms to 33ohms resistor X02
76 12/09/2011 For CRT issue19 HW COMPAL Change CH36 from 10uF to 22uF X02
12/13/2011 X0225 HW COMPAL Change HDMI R,C value for EMI requestChange R448,R449,R450,R452,R453,R454,R455,R456
from 680ohm to 604ohm; C1209~C1216 from 4.7pF to 3.9pF77
42 HW 12/15/2011 COMPAL +3.3V_SUS sequence timing R911 from 100K to 470K; R1618 from 1M to 4.7M;
C767 from 4700p to 220p
78X02
R934 from 1.2K to 820, R957 from 1.2K to 1K, R951 from 330 to 270,
R949 from 1.2K to 910,43 HW 12/15/2011 COMPAL Change current limit resistors of LED X0279
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
HW_PIR 5
61 61Saturday, March 03, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
HW_PIR 5
61 61Saturday, March 03, 2012
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7901P 1.0
HW_PIR 5
61 61Saturday, March 03, 2012
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Solution D escriptionSolution D escriptionSolution D escriptionSolution D escription R ev .R ev .R ev .R ev .P age#P age#P age#P age# T itleT itleT itleT itleItemItemItemItem Issue D escriptionIssue D escriptionIssue D escriptionIssue D escriptionD ateD ateD ateD ateR equestR equestR equestR equest
O w nerO w nerO w nerO w ner
34 HW 01/04/201280 COMPAL Change RC25 value for ESD
COMPAL
Change RC25 from 0ohm to 1kohm(ST MEMO) A00
81 40 HW 01/17/2012 A00
82
40
HW 02/20/2012 A00COMPAL
Change board ID to A00 Change R875 to 33K ohm
Change U51 P/N to SA00003TZ2LSMSC creates a new catalog part number and
IC marking for the MEC5055
Change SD CLK damping resistor for EMI
request33
02/24/2012
HW
Change R676 from 33 ohm to 10 ohm
COMPAL
84
32 Change BOM option for TPM/TCM funtion
HW
02/24/2012
Change C550,C551,C552,C553,R659,R660,R1662,RH311
BOM option to 5@
85
COMPAL A00
A00
86
HW
02/24/2012
COMPAL
A00
Change R938 to 1.1k ohm, R958 to 560 ohm, R953 to 130 ohm,
R951 to 470 ohm,
change R939, R959, R957, R934, R949 to 1.2k ohmChange current limit resistors of LED43
HW COMPAL
Dalmore14 UMA hang on white screen issue
when attached AC+media battery after hot
dock.02/24/201283 Change R755 from 100k ohm to 10k ohm A0038
25 HW 03/03/2012 COMPAL SMT request to change F2 footprint A0087For DFX conern of F2 2nd source, SP040003H0L,
change F2 footprint to F_MF-MSMF050-2
88 HW 03/03/2012 COMPAL Change PCH P/N for X-build14~21,30 UH4 is changed to SA00005AG3L A00
1489 A00HW 03/03/2012 COMPAL De-pop resistor on PCH JTAG for power saving De-pop RH288, RH47, RH48 and RH49
